TableGen/GlobalISel: Fix srcvalue inputs

arsenm · arsenm · commit 03a592f18ba5 · 2020-01-16T13:49:43.000-05:00
Allow using srcvalue for discarding pattern inputs.
diff --git a/llvm/test/TableGen/GlobalISelEmitter-input-discard.td b/llvm/test/TableGen/GlobalISelEmitter-input-discard.td
@@ -0,0 +1,32 @@
+// RUN: llvm-tblgen -gen-global-isel -warn-on-skipped-patterns -I %p/../../include -I %p/Common %s -o - < %s | FileCheck -check-prefix=GISEL %s
+
+include "llvm/Target/Target.td"
+include "GlobalISelEmitterCommon.td"
+
+def int_tgt_foo : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+
+// Test that using srcvalue works for discarded pattern inputs.
+def FOO : I<(outs GPR32:$dst), (ins GPR32Op:$src0, GPR32Op:$src1), []>;
+
+// GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
+// GISEL-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
+// GISEL-NEXT: GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::tgt_foo,
+// GISEL-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
+// GISEL-NEXT: GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
+// GISEL-NEXT: GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
+// GISEL-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
+// GISEL-NEXT: // (intrinsic_w_chain:{ *:[i32] } 248:{ *:[iPTR] }, srcvalue:{ *:[i32] }, i32:{ *:[i32] }:$src1)  =>  (FOO:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GPR32:{ *:[i32] }:$src1)
+// GISEL-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
+// GISEL-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
+// GISEL-NEXT: GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
+// GISEL-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
+// GISEL-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/MyTarget::FOO,
+// GISEL-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
+// GISEL-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
+// GISEL-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src1
+// GISEL-NEXT: GIR_EraseFromParent, /*InsnID*/0,
+// GISEL-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
+def : Pat <
+  (int_tgt_foo (i32 srcvalue), i32:$src1),
+  (FOO (IMPLICIT_DEF), GPR32:$src1)
+>;
diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -3971,6 +3971,10 @@ Error GlobalISelEmitter::importChildMatcher(
           "Src pattern child def is an unsupported tablegen class (ImmLeaf)");
     }
 
+    // Place holder for SRCVALUE nodes. Nothing to do here.
+    if (ChildRec->getName() == "srcvalue")
+      return Error::success();
+
     return failedImport(
         "Src pattern child def is an unsupported tablegen class");
   }

Original file line number	Diff line number	Diff line change
`@@ -3971,6 +3971,10 @@ Error GlobalISelEmitter::importChildMatcher(`
`3971`	`3971`	`"Src pattern child def is an unsupported tablegen class (ImmLeaf)");`
`3972`	`3972`	`}`
`3973`	`3973`
	`3974`	`+ // Place holder for SRCVALUE nodes. Nothing to do here.`
	`3975`	`+ if (ChildRec->getName() == "srcvalue")`
	`3976`	`+ return Error::success();`
	`3977`	`+`
`3974`	`3978`	`return failedImport(`
`3975`	`3979`	`"Src pattern child def is an unsupported tablegen class");`
`3976`	`3980`	`}`