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lines changed Original file line number Diff line number Diff line change @@ -1423,6 +1423,14 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
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MachineFunction &MF = *MBB.getParent ();
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MachineRegisterInfo &MRI = MF.getRegInfo ();
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+ const AArch64Subtarget *Subtarget =
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+ &static_cast <const AArch64Subtarget &>(MF.getSubtarget ());
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+ if (Subtarget->requiresStrictAlign ()) {
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+ // We don't support this feature yet.
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+ LLVM_DEBUG (dbgs () << " AArch64 GISel does not support strict-align yet\n " );
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+ return false ;
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+ }
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+
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unsigned Opcode = I.getOpcode ();
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// G_PHI requires same handling as PHI
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if (!isPreISelGenericOpcode (Opcode) || Opcode == TargetOpcode::G_PHI) {
Original file line number Diff line number Diff line change @@ -209,3 +209,12 @@ define <4 x i16> @zext_v4s8(<4 x i8> %in) {
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ret <4 x i16 > %ext
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}
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+ ; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: cannot select: RET_ReallyLR implicit $x0 (in function: strict_align_feature)
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+ ; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for strict_align_feature
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+ ; FALLBACK-WITH-REPORT-OUT-LABEL: strict_align_feature
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+ define i64 @strict_align_feature (i64* %p ) #0 {
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+ %x = load i64 , i64* %p , align 1
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+ ret i64 %x
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+ }
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+
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+ attributes #0 = { "target-features" ="+strict-align" }
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