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[AArch64] Add option to enable/disable load-store renaming.
This patch adds a new option to enable/disable register renaming in the load-store optimizer. Defaults to disabled, as there is a potential mis-compile caused by this.
1 parent 223a209 commit 8e3f59b

9 files changed

+28
-15
lines changed

‎llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

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@@ -66,6 +66,10 @@ static cl::opt<unsigned> LdStLimit("aarch64-load-store-scan-limit",
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static cl::opt<unsigned> UpdateLimit("aarch64-update-scan-limit", cl::init(100),
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cl::Hidden);
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// Enable register renaming to find additional store pairing opportunities.
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static cl::opt<bool> EnableRenaming("aarch64-load-store-renaming",
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cl::init(false), cl::Hidden);
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#define AARCH64_LOAD_STORE_OPT_NAME "AArch64 load / store optimization pass"
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namespace {
@@ -1446,6 +1450,9 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
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bool IsPromotableZeroStore = isPromotableZeroStoreInst(FirstMI);
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Optional<bool> MaybeCanRename = None;
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if (!EnableRenaming)
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MaybeCanRename = {false};
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SmallPtrSet<const TargetRegisterClass *, 5> RequiredClasses;
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LiveRegUnits UsedInBetween;
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UsedInBetween.init(*TRI);

‎llvm/test/CodeGen/AArch64/arm64-abi-varargs.ll

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@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=arm64-apple-ios7.0.0 -mcpu=cyclone -enable-misched=false | FileCheck %s
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; RUN: llc -aarch64-load-store-renaming=true < %s -mtriple=arm64-apple-ios7.0.0 -mcpu=cyclone -enable-misched=false | FileCheck %s
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; rdar://13625505
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; Here we have 9 fixed integer arguments the 9th argument in on stack, the

‎llvm/test/CodeGen/AArch64/arm64-abi_align.ll

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@@ -1,5 +1,5 @@
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; RUN: llc -fast-isel-sink-local-values < %s -mtriple=arm64-apple-darwin -mcpu=cyclone -enable-misched=false -frame-pointer=all | FileCheck %s
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; RUN: llc -fast-isel-sink-local-values < %s -mtriple=arm64-apple-darwin -O0 -frame-pointer=all -fast-isel | FileCheck -check-prefix=FAST %s
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; RUN: llc -fast-isel-sink-local-values -aarch64-load-store-renaming=true < %s -mtriple=arm64-apple-darwin -mcpu=cyclone -enable-misched=false -frame-pointer=all | FileCheck %s
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; RUN: llc -fast-isel-sink-local-values -aarch64-load-store-renaming=true < %s -mtriple=arm64-apple-darwin -O0 -frame-pointer=all -fast-isel | FileCheck -check-prefix=FAST %s
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; rdar://12648441
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; Generated from arm64-arguments.c with -O2.

‎llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll

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@@ -1,4 +1,4 @@
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; RUN: llc -verify-machineinstrs -mtriple=arm64-linux-gnu -pre-RA-sched=linearize -enable-misched=false -disable-post-ra < %s | FileCheck %s
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; RUN: llc -aarch64-load-store-renaming=true -verify-machineinstrs -mtriple=arm64-linux-gnu -pre-RA-sched=linearize -enable-misched=false -disable-post-ra < %s | FileCheck %s
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%va_list = type {i8*, i8*, i8*, i32, i32}
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‎llvm/test/CodeGen/AArch64/machine-outliner-remarks.ll

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@@ -4,7 +4,7 @@
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; CHECK-SAME: Bytes from outlining all occurrences (16) >=
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; CHECK-SAME: Unoutlined instruction bytes (16)
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; CHECK-SAME: (Also found at: <UNKNOWN LOCATION>)
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; CHECK: remark: <unknown>:0:0: Saved 36 bytes by outlining 11 instructions
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; CHECK: remark: <unknown>:0:0: Saved 48 bytes by outlining 14 instructions
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; CHECK-SAME: from 2 locations. (Found at: <UNKNOWN LOCATION>,
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; CHECK-SAME: <UNKNOWN LOCATION>)
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; RUN: llc %s -enable-machine-outliner -mtriple=aarch64-unknown-unknown -o /dev/null -pass-remarks-missed=machine-outliner -pass-remarks-output=%t.yaml
@@ -38,10 +38,10 @@
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; YAML-NEXT: Function: OUTLINED_FUNCTION_0
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; YAML-NEXT: Args:
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; YAML-NEXT: - String: 'Saved '
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; YAML-NEXT: - OutliningBenefit: '36'
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; YAML-NEXT: - OutliningBenefit: '48'
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; YAML-NEXT: - String: ' bytes by '
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; YAML-NEXT: - String: 'outlining '
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; YAML-NEXT: - Length: '11'
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; YAML-NEXT: - Length: '14'
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; YAML-NEXT: - String: ' instructions '
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; YAML-NEXT: - String: 'from '
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; YAML-NEXT: - NumOccurrences: '2'

‎llvm/test/CodeGen/AArch64/machine-outliner.ll

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@@ -1,5 +1,5 @@
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple=aarch64-apple-darwin < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple=aarch64-apple-darwin -mcpu=cortex-a53 -enable-misched=false < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -aarch64-load-store-renaming=true -mtriple=aarch64-apple-darwin < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -aarch64-load-store-renaming=true -mtriple=aarch64-apple-darwin -mcpu=cortex-a53 -enable-misched=false < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -enable-linkonceodr-outlining -mtriple=aarch64-apple-darwin < %s | FileCheck %s -check-prefix=ODR
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple=aarch64-apple-darwin -stop-after=machine-outliner < %s | FileCheck %s -check-prefix=TARGET_FEATURES
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‎llvm/test/CodeGen/AArch64/stp-opt-with-renaming-debug.mir

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@@ -1,4 +1,4 @@
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# RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -aarch64-load-store-renaming=true -verify-machineinstrs -o - %s | FileCheck %s
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--- |
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define void @test_dbg_value1() #0 { ret void }
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define void @test_dbg_value2() #0 { ret void }

‎llvm/test/CodeGen/AArch64/stp-opt-with-renaming-reserved-regs.mir

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@@ -1,9 +1,9 @@
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# RUN: llc -run-pass=aarch64-ldst-opt -mattr=+reserve-x10 -mattr=+reserve-x11 \
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# RUN: -mattr=+reserve-x15 -mtriple=arm64-apple-iphoneos -verify-machineinstrs \
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# RUN: llc -run-pass=aarch64-ldst-opt -aarch64-load-store-renaming=true -mattr=+reserve-x10 \
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# RUN: -mattr=+reserve-x11 -mattr=+reserve-x15 -mtriple=arm64-apple-iphoneos -verify-machineinstrs \
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# RUN: -o - %s | FileCheck --check-prefix=CHECK --check-prefix=PRESERVED %s
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5-
# RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -verify-machineinstrs \
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# RUN: -o - %s | FileCheck --check-prefix=CHECK --check-prefix=NOPRES %s
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# RUN: llc -run-pass=aarch64-ldst-opt -aarch64-load-store-renaming=true -mtriple=arm64-apple-iphoneos \
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# RUN: -verify-machineinstrs -o - %s | FileCheck --check-prefix=CHECK --check-prefix=NOPRES %s
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# Make sure we do not pick reserved registers. For test1, we would pick x10,

‎llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir

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@@ -1,5 +1,11 @@
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# RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -verify-machineinstrs -aarch64-load-store-renaming=true -o - %s | FileCheck %s
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# RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -verify-machineinstrs -o - %s | FileCheck --check-prefix=NO-RENAME %s
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# NO-RENAME-NOT: STP
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# NO-RENAME: test12
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# NO-RENAME: STP
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# NO-RENAME-NOT: STP
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#
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---
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# CHECK-LABEL: name: test1
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# CHECK: bb.0:

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