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Stefan Pintile
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[PowerPC] Implementing overflow version for XO-Form instructions
The Overflow version of XO-Form instruction uses the SO, OV and OV32 special registers. This changes modifies existing multiclasses and instruction definitions to allow for the use of the XER register to record the various types if overflow from possible add, subtract and multiply instructions. It then modifies the existing instructions as to use these multiclasses as needed. Patch By: Kamau Bridgeman Differential Revision: https://reviews.llvm.org/D66902
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‎llvm/lib/Target/PowerPC/P9InstrResources.td

Lines changed: 28 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -129,14 +129,14 @@ def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DISP_1C],
129129
(instregex "MTV(S)?RW(A|Z)$"),
130130
(instregex "CMP(WI|LWI|W|LW)(8)?$"),
131131
(instregex "CMP(L)?D(I)?$"),
132-
(instregex "SUBF(I)?C(8)?$"),
132+
(instregex "SUBF(I)?C(8)?(O)?$"),
133133
(instregex "ANDI(S)?o(8)?$"),
134-
(instregex "ADDC(8)?$"),
134+
(instregex "ADDC(8)?(O)?$"),
135135
(instregex "ADDIC(8)?(o)?$"),
136-
(instregex "ADD(8|4)(o)?$"),
137-
(instregex "ADD(E|ME|ZE)(8)?(o)?$"),
138-
(instregex "SUBF(E|ME|ZE)?(8)?(o)?$"),
139-
(instregex "NEG(8)?(o)?$"),
136+
(instregex "ADD(8|4)(O)?(o)?$"),
137+
(instregex "ADD(E|ME|ZE)(8)?(O)?(o)?$"),
138+
(instregex "SUBF(E|ME|ZE)?(8)?(O)?(o)?$"),
139+
(instregex "NEG(8)?(O)?(o)?$"),
140140
(instregex "POPCNTB$"),
141141
(instregex "ADD(I|IS)?(8)?$"),
142142
(instregex "LI(S)?(8)?$"),
@@ -148,7 +148,7 @@ def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DISP_1C],
148148
(instregex "EQV(8)?(o)?$"),
149149
(instregex "EXTS(B|H|W)(8)?(_32)?(_64)?(o)?$"),
150150
(instregex "ADD(4|8)(TLS)?(_)?$"),
151-
(instregex "NEG(8)?$"),
151+
(instregex "NEG(8)?(O)?$"),
152152
(instregex "ADDI(S)?toc(HA|L)(8)?$"),
153153
COPY,
154154
MCRF,
@@ -399,7 +399,7 @@ def : InstRW<[P9_DPE_7C, P9_DPO_7C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C],
399399
def : InstRW<[P9_DP_5C, IP_EXEC_1C, DISP_3SLOTS_1C],
400400
(instrs
401401
(instregex "MADD(HD|HDU|LD|LD8)$"),
402-
(instregex "MUL(HD|HW|LD|LI|LI8|LW)(U)?$")
402+
(instregex "MUL(HD|HW|LD|LI|LI8|LW)(U)?(O)?$")
403403
)>;
404404

405405
// 7 cycle Restricted DP operation. One DP unit, one EXEC pipeline and all three
@@ -458,7 +458,7 @@ def : InstRW<[P9_DP_7C, P9_ALU_3C, IP_EXEC_1C, IP_EXEC_1C,
458458
def : InstRW<[P9_DPOpAndALUOp_7C, IP_EXEC_1C, IP_EXEC_1C,
459459
DISP_3SLOTS_1C, DISP_1C],
460460
(instrs
461-
(instregex "MUL(H|L)(D|W)(U)?o$")
461+
(instregex "MUL(H|L)(D|W)(U)?(O)?o$")
462462
)>;
463463

464464
// 7 cycle Restricted DP operation and one 3 cycle ALU operation.
@@ -946,7 +946,9 @@ def : InstRW<[P9_DIV_12C, IP_EXECE_1C, IP_EXECO_1C, DISP_EVEN_1C],
946946
def : InstRW<[P9_DIV_16C_8, IP_EXECO_1C, IP_EXECE_1C, DISP_EVEN_1C],
947947
(instrs
948948
DIVW,
949+
DIVWO,
949950
DIVWU,
951+
DIVWUO,
950952
MODSW
951953
)>;
952954

@@ -956,9 +958,13 @@ def : InstRW<[P9_DIV_16C_8, IP_EXECO_1C, IP_EXECE_1C, DISP_EVEN_1C],
956958
def : InstRW<[P9_DIV_24C_8, IP_EXECO_1C, IP_EXECE_1C, DISP_EVEN_1C],
957959
(instrs
958960
DIVWE,
961+
DIVWEO,
959962
DIVD,
963+
DIVDO,
960964
DIVWEU,
965+
DIVWEUO,
961966
DIVDU,
967+
DIVDUO,
962968
MODSD,
963969
MODUD,
964970
MODUW
@@ -970,7 +976,9 @@ def : InstRW<[P9_DIV_24C_8, IP_EXECO_1C, IP_EXECE_1C, DISP_EVEN_1C],
970976
def : InstRW<[P9_DIV_40C_8, IP_EXECO_1C, IP_EXECE_1C, DISP_EVEN_1C],
971977
(instrs
972978
DIVDE,
973-
DIVDEU
979+
DIVDEO,
980+
DIVDEU,
981+
DIVDEUO
974982
)>;
975983

976984
// Cracked DIV and ALU operation. Requires one full slice for the ALU operation
@@ -989,9 +997,13 @@ def : InstRW<[P9_IntDivAndALUOp_26C_8, IP_EXECE_1C, IP_EXECO_1C, IP_EXEC_1C,
989997
DISP_EVEN_1C, DISP_1C],
990998
(instrs
991999
DIVDo,
1000+
DIVDOo,
9921001
DIVDUo,
1002+
DIVDUOo,
9931003
DIVWEo,
994-
DIVWEUo
1004+
DIVWEOo,
1005+
DIVWEUo,
1006+
DIVWEUOo
9951007
)>;
9961008

9971009
// Cracked DIV and ALU operation. Requires one full slice for the ALU operation
@@ -1001,7 +1013,9 @@ def : InstRW<[P9_IntDivAndALUOp_42C_8, IP_EXECE_1C, IP_EXECO_1C, IP_EXEC_1C,
10011013
DISP_EVEN_1C, DISP_1C],
10021014
(instrs
10031015
DIVDEo,
1004-
DIVDEUo
1016+
DIVDEOo,
1017+
DIVDEUo,
1018+
DIVDEUOo
10051019
)>;
10061020

10071021
// CR access instructions in _BrMCR, IIC_BrMCRX.
@@ -1026,8 +1040,8 @@ def : InstRW<[P9_ALU_2C, P9_ALU_2C, IP_EXEC_1C, IP_EXEC_1C,
10261040
def : InstRW<[P9_ALU_2C, P9_ALU_2C, IP_EXEC_1C, IP_EXEC_1C,
10271041
DISP_1C, DISP_1C],
10281042
(instrs
1029-
(instregex "ADDC(8)?o$"),
1030-
(instregex "SUBFC(8)?o$")
1043+
(instregex "ADDC(8)?(O)?o$"),
1044+
(instregex "SUBFC(8)?(O)?o$")
10311045
)>;
10321046

10331047
// Cracked ALU operations.

‎llvm/lib/Target/PowerPC/PPCInstr64Bit.td

Lines changed: 17 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -497,9 +497,9 @@ def XORIS8 : DForm_4<27, (outs g8rc:$dst), (ins g8rc:$src1, u16imm64:$src2),
497497
[(set i64:$dst, (xor i64:$src1, imm16ShiftedZExt:$src2))]>;
498498

499499
let isCommutable = 1 in
500-
defm ADD8 : XOForm_1r<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
501-
"add", "$rT, $rA, $rB", IIC_IntSimple,
502-
[(set i64:$rT, (add i64:$rA, i64:$rB))]>;
500+
defm ADD8 : XOForm_1rx<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
501+
"add", "$rT, $rA, $rB", IIC_IntSimple,
502+
[(set i64:$rT, (add i64:$rA, i64:$rB))]>;
503503
// ADD8 has a special form: reg = ADD8(reg, sym@tls) for use by the
504504
// initial-exec thread-local storage model. We need to forbid r0 here -
505505
// while it works for add just fine, the linker can relax this to local-exec
@@ -576,9 +576,9 @@ defm SUBFC8 : XOForm_1rc<31, 8, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
576576
"subfc", "$rT, $rA, $rB", IIC_IntGeneral,
577577
[(set i64:$rT, (subc i64:$rB, i64:$rA))]>,
578578
PPC970_DGroup_Cracked;
579-
defm SUBF8 : XOForm_1r<31, 40, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
580-
"subf", "$rT, $rA, $rB", IIC_IntGeneral,
581-
[(set i64:$rT, (sub i64:$rB, i64:$rA))]>;
579+
defm SUBF8 : XOForm_1rx<31, 40, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
580+
"subf", "$rT, $rA, $rB", IIC_IntGeneral,
581+
[(set i64:$rT, (sub i64:$rB, i64:$rA))]>;
582582
defm NEG8 : XOForm_3r<31, 104, 0, (outs g8rc:$rT), (ins g8rc:$rA),
583583
"neg", "$rT, $rA", IIC_IntSimple,
584584
[(set i64:$rT, (ineg i64:$rA))]>;
@@ -777,10 +777,10 @@ defm DIVD : XOForm_1rcr<31, 489, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
777777
defm DIVDU : XOForm_1rcr<31, 457, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
778778
"divdu", "$rT, $rA, $rB", IIC_IntDivD,
779779
[(set i64:$rT, (udiv i64:$rA, i64:$rB))]>, isPPC64;
780-
def DIVDE : XOForm_1<31, 425, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
781-
"divde $rT, $rA, $rB", IIC_IntDivD,
782-
[(set i64:$rT, (int_ppc_divde g8rc:$rA, g8rc:$rB))]>,
783-
isPPC64, Requires<[HasExtDiv]>;
780+
defm DIVDE : XOForm_1rcr<31, 425, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
781+
"divde", "$rT, $rA, $rB", IIC_IntDivD,
782+
[(set i64:$rT, (int_ppc_divde g8rc:$rA, g8rc:$rB))]>,
783+
isPPC64, Requires<[HasExtDiv]>;
784784

785785
let Predicates = [IsISA3_0] in {
786786
def MADDHD : VAForm_1a<48, (outs g8rc :$RT), (ins g8rc:$RA, g8rc:$RB, g8rc:$RC),
@@ -815,24 +815,14 @@ def MODUD : XForm_8<31, 265, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
815815
[(set i64:$rT, (urem i64:$rA, i64:$rB))]>;
816816
}
817817

818-
let Defs = [CR0] in
819-
def DIVDEo : XOForm_1<31, 425, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
820-
"divde. $rT, $rA, $rB", IIC_IntDivD,
821-
[]>, isDOT, PPC970_DGroup_Cracked, PPC970_DGroup_First,
822-
isPPC64, Requires<[HasExtDiv]>;
823-
def DIVDEU : XOForm_1<31, 393, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
824-
"divdeu $rT, $rA, $rB", IIC_IntDivD,
825-
[(set i64:$rT, (int_ppc_divdeu g8rc:$rA, g8rc:$rB))]>,
826-
isPPC64, Requires<[HasExtDiv]>;
827-
let Defs = [CR0] in
828-
def DIVDEUo : XOForm_1<31, 393, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
829-
"divdeu. $rT, $rA, $rB", IIC_IntDivD,
830-
[]>, isDOT, PPC970_DGroup_Cracked, PPC970_DGroup_First,
831-
isPPC64, Requires<[HasExtDiv]>;
818+
defm DIVDEU : XOForm_1rcr<31, 393, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
819+
"divdeu", "$rT, $rA, $rB", IIC_IntDivD,
820+
[(set i64:$rT, (int_ppc_divdeu g8rc:$rA, g8rc:$rB))]>,
821+
isPPC64, Requires<[HasExtDiv]>;
832822
let isCommutable = 1 in
833-
defm MULLD : XOForm_1r<31, 233, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
834-
"mulld", "$rT, $rA, $rB", IIC_IntMulHD,
835-
[(set i64:$rT, (mul i64:$rA, i64:$rB))]>, isPPC64;
823+
defm MULLD : XOForm_1rx<31, 233, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
824+
"mulld", "$rT, $rA, $rB", IIC_IntMulHD,
825+
[(set i64:$rT, (mul i64:$rA, i64:$rB))]>, isPPC64;
836826
let Interpretation64Bit = 1, isCodeGenOnly = 1 in
837827
def MULLI8 : DForm_2<7, (outs g8rc:$rD), (ins g8rc:$rA, s16imm64:$imm),
838828
"mulli $rD, $rA, $imm", IIC_IntMulLI,

‎llvm/lib/Target/PowerPC/PPCInstrInfo.td

Lines changed: 83 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -1030,6 +1030,32 @@ multiclass XOForm_1r<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
10301030
}
10311031
}
10321032

1033+
// Multiclass for instructions which have a record overflow form as well
1034+
// as a record form but no carry (i.e. mulld, mulldo, subf, subfo, etc.)
1035+
multiclass XOForm_1rx<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
1036+
string asmbase, string asmstr, InstrItinClass itin,
1037+
list<dag> pattern> {
1038+
let BaseName = asmbase in {
1039+
def NAME : XOForm_1<opcode, xo, 0, OOL, IOL,
1040+
!strconcat(asmbase, !strconcat(" ", asmstr)), itin,
1041+
pattern>, RecFormRel;
1042+
let Defs = [CR0] in
1043+
def o : XOForm_1<opcode, xo, 0, OOL, IOL,
1044+
!strconcat(asmbase, !strconcat(". ", asmstr)), itin,
1045+
[]>, isDOT, RecFormRel;
1046+
}
1047+
let BaseName = !strconcat(asmbase, "O") in {
1048+
let Defs = [XER] in
1049+
def O : XOForm_1<opcode, xo, 1, OOL, IOL,
1050+
!strconcat(asmbase, !strconcat("o ", asmstr)), itin,
1051+
[]>, RecFormRel;
1052+
let Defs = [XER, CR0] in
1053+
def Oo : XOForm_1<opcode, xo, 1, OOL, IOL,
1054+
!strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
1055+
[]>, isDOT, RecFormRel;
1056+
}
1057+
}
1058+
10331059
// Multiclass for instructions for which the non record form is not cracked
10341060
// and the record form is cracked (i.e. divw, mullw, etc.)
10351061
multiclass XOForm_1rcr<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
@@ -1045,6 +1071,16 @@ multiclass XOForm_1rcr<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
10451071
[]>, isDOT, RecFormRel, PPC970_DGroup_First,
10461072
PPC970_DGroup_Cracked;
10471073
}
1074+
let BaseName = !strconcat(asmbase, "O") in {
1075+
let Defs = [XER] in
1076+
def O : XOForm_1<opcode, xo, 1, OOL, IOL,
1077+
!strconcat(asmbase, !strconcat("o ", asmstr)), itin,
1078+
[]>, RecFormRel;
1079+
let Defs = [XER, CR0] in
1080+
def Oo : XOForm_1<opcode, xo, 1, OOL, IOL,
1081+
!strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
1082+
[]>, isDOT, RecFormRel;
1083+
}
10481084
}
10491085

10501086
multiclass XOForm_1rc<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
@@ -1060,6 +1096,16 @@ multiclass XOForm_1rc<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
10601096
!strconcat(asmbase, !strconcat(". ", asmstr)), itin,
10611097
[]>, isDOT, RecFormRel;
10621098
}
1099+
let BaseName = !strconcat(asmbase, "O") in {
1100+
let Defs = [CARRY, XER] in
1101+
def O : XOForm_1<opcode, xo, 1, OOL, IOL,
1102+
!strconcat(asmbase, !strconcat("o ", asmstr)), itin,
1103+
[]>, RecFormRel;
1104+
let Defs = [CARRY, XER, CR0] in
1105+
def Oo : XOForm_1<opcode, xo, 1, OOL, IOL,
1106+
!strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
1107+
[]>, isDOT, RecFormRel;
1108+
}
10631109
}
10641110

10651111
multiclass XOForm_3r<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
@@ -1074,6 +1120,16 @@ multiclass XOForm_3r<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
10741120
!strconcat(asmbase, !strconcat(". ", asmstr)), itin,
10751121
[]>, isDOT, RecFormRel;
10761122
}
1123+
let BaseName = !strconcat(asmbase, "O") in {
1124+
let Defs = [XER] in
1125+
def O : XOForm_3<opcode, xo, 1, OOL, IOL,
1126+
!strconcat(asmbase, !strconcat("o ", asmstr)), itin,
1127+
[]>, RecFormRel;
1128+
let Defs = [XER, CR0] in
1129+
def Oo : XOForm_3<opcode, xo, 1, OOL, IOL,
1130+
!strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
1131+
[]>, isDOT, RecFormRel;
1132+
}
10771133
}
10781134

10791135
multiclass XOForm_3rc<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
@@ -1089,6 +1145,16 @@ multiclass XOForm_3rc<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
10891145
!strconcat(asmbase, !strconcat(". ", asmstr)), itin,
10901146
[]>, isDOT, RecFormRel;
10911147
}
1148+
let BaseName = !strconcat(asmbase, "O") in {
1149+
let Defs = [CARRY, XER] in
1150+
def O : XOForm_3<opcode, xo, 1, OOL, IOL,
1151+
!strconcat(asmbase, !strconcat("o ", asmstr)), itin,
1152+
[]>, RecFormRel;
1153+
let Defs = [CARRY, XER, CR0] in
1154+
def Oo : XOForm_3<opcode, xo, 1, OOL, IOL,
1155+
!strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
1156+
[]>, isDOT, RecFormRel;
1157+
}
10921158
}
10931159

10941160
multiclass MForm_2r<bits<6> opcode, dag OOL, dag IOL,
@@ -2785,9 +2851,9 @@ def MODUW : XForm_8<31, 267, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
27852851
let PPC970_Unit = 1, hasSideEffects = 0 in { // FXU Operations.
27862852
// XO-Form instructions. Arithmetic instructions that can set overflow bit
27872853
let isCommutable = 1 in
2788-
defm ADD4 : XOForm_1r<31, 266, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2789-
"add", "$rT, $rA, $rB", IIC_IntSimple,
2790-
[(set i32:$rT, (add i32:$rA, i32:$rB))]>;
2854+
defm ADD4 : XOForm_1rx<31, 266, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2855+
"add", "$rT, $rA, $rB", IIC_IntSimple,
2856+
[(set i32:$rT, (add i32:$rA, i32:$rB))]>;
27912857
let isCodeGenOnly = 1 in
27922858
def ADD4TLS : XOForm_1<31, 266, 0, (outs gprc:$rT), (ins gprc:$rA, tlsreg32:$rB),
27932859
"add $rT, $rA, $rB", IIC_IntSimple,
@@ -2804,38 +2870,28 @@ defm DIVW : XOForm_1rcr<31, 491, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
28042870
defm DIVWU : XOForm_1rcr<31, 459, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
28052871
"divwu", "$rT, $rA, $rB", IIC_IntDivW,
28062872
[(set i32:$rT, (udiv i32:$rA, i32:$rB))]>;
2807-
def DIVWE : XOForm_1<31, 427, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2808-
"divwe $rT, $rA, $rB", IIC_IntDivW,
2809-
[(set i32:$rT, (int_ppc_divwe gprc:$rA, gprc:$rB))]>,
2810-
Requires<[HasExtDiv]>;
2811-
let Defs = [CR0] in
2812-
def DIVWEo : XOForm_1<31, 427, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2813-
"divwe. $rT, $rA, $rB", IIC_IntDivW,
2814-
[]>, isDOT, PPC970_DGroup_Cracked, PPC970_DGroup_First,
2815-
Requires<[HasExtDiv]>;
2816-
def DIVWEU : XOForm_1<31, 395, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2817-
"divweu $rT, $rA, $rB", IIC_IntDivW,
2818-
[(set i32:$rT, (int_ppc_divweu gprc:$rA, gprc:$rB))]>,
2819-
Requires<[HasExtDiv]>;
2820-
let Defs = [CR0] in
2821-
def DIVWEUo : XOForm_1<31, 395, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2822-
"divweu. $rT, $rA, $rB", IIC_IntDivW,
2823-
[]>, isDOT, PPC970_DGroup_Cracked, PPC970_DGroup_First,
2824-
Requires<[HasExtDiv]>;
2873+
defm DIVWE : XOForm_1rcr<31, 427, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2874+
"divwe", "$rT, $rA, $rB", IIC_IntDivW,
2875+
[(set i32:$rT, (int_ppc_divwe gprc:$rA, gprc:$rB))]>,
2876+
Requires<[HasExtDiv]>;
2877+
defm DIVWEU : XOForm_1rcr<31, 395, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2878+
"divweu", "$rT, $rA, $rB", IIC_IntDivW,
2879+
[(set i32:$rT, (int_ppc_divweu gprc:$rA, gprc:$rB))]>,
2880+
Requires<[HasExtDiv]>;
28252881
let isCommutable = 1 in {
28262882
defm MULHW : XOForm_1r<31, 75, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
28272883
"mulhw", "$rT, $rA, $rB", IIC_IntMulHW,
28282884
[(set i32:$rT, (mulhs i32:$rA, i32:$rB))]>;
28292885
defm MULHWU : XOForm_1r<31, 11, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
28302886
"mulhwu", "$rT, $rA, $rB", IIC_IntMulHWU,
28312887
[(set i32:$rT, (mulhu i32:$rA, i32:$rB))]>;
2832-
defm MULLW : XOForm_1r<31, 235, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2833-
"mullw", "$rT, $rA, $rB", IIC_IntMulHW,
2834-
[(set i32:$rT, (mul i32:$rA, i32:$rB))]>;
2888+
defm MULLW : XOForm_1rx<31, 235, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2889+
"mullw", "$rT, $rA, $rB", IIC_IntMulHW,
2890+
[(set i32:$rT, (mul i32:$rA, i32:$rB))]>;
28352891
} // isCommutable
2836-
defm SUBF : XOForm_1r<31, 40, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2837-
"subf", "$rT, $rA, $rB", IIC_IntGeneral,
2838-
[(set i32:$rT, (sub i32:$rB, i32:$rA))]>;
2892+
defm SUBF : XOForm_1rx<31, 40, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
2893+
"subf", "$rT, $rA, $rB", IIC_IntGeneral,
2894+
[(set i32:$rT, (sub i32:$rB, i32:$rA))]>;
28392895
defm SUBFC : XOForm_1rc<31, 8, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
28402896
"subfc", "$rT, $rA, $rB", IIC_IntGeneral,
28412897
[(set i32:$rT, (subc i32:$rB, i32:$rA))]>,

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