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Merge tag 'kvm-arm-for-v4.4-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master
KVM/ARM fixes for v4.4-rc4 - A series of fixes to deal with the aliasing between the sp and xzr register - A fix for the cache flush fix that went in -rc3
2 parents 31ade3b + 0de58f8 commit 0992207

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9 files changed

+107
-89
lines changed

9 files changed

+107
-89
lines changed

arch/arm/include/asm/kvm_emulate.h

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,18 @@
2828
unsigned long *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num);
2929
unsigned long *vcpu_spsr(struct kvm_vcpu *vcpu);
3030

31+
static inline unsigned long vcpu_get_reg(struct kvm_vcpu *vcpu,
32+
u8 reg_num)
33+
{
34+
return *vcpu_reg(vcpu, reg_num);
35+
}
36+
37+
static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num,
38+
unsigned long val)
39+
{
40+
*vcpu_reg(vcpu, reg_num) = val;
41+
}
42+
3143
bool kvm_condition_valid(struct kvm_vcpu *vcpu);
3244
void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr);
3345
void kvm_inject_undefined(struct kvm_vcpu *vcpu);

arch/arm/kvm/mmio.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -115,7 +115,7 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run)
115115
trace_kvm_mmio(KVM_TRACE_MMIO_READ, len, run->mmio.phys_addr,
116116
data);
117117
data = vcpu_data_host_to_guest(vcpu, data, len);
118-
*vcpu_reg(vcpu, vcpu->arch.mmio_decode.rt) = data;
118+
vcpu_set_reg(vcpu, vcpu->arch.mmio_decode.rt, data);
119119
}
120120

121121
return 0;
@@ -186,7 +186,8 @@ int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
186186
rt = vcpu->arch.mmio_decode.rt;
187187

188188
if (is_write) {
189-
data = vcpu_data_guest_to_host(vcpu, *vcpu_reg(vcpu, rt), len);
189+
data = vcpu_data_guest_to_host(vcpu, vcpu_get_reg(vcpu, rt),
190+
len);
190191

191192
trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, len, fault_ipa, data);
192193
mmio_write_buf(data_buf, len, data);

arch/arm/kvm/mmu.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -218,7 +218,7 @@ static void unmap_ptes(struct kvm *kvm, pmd_t *pmd,
218218
kvm_tlb_flush_vmid_ipa(kvm, addr);
219219

220220
/* No need to invalidate the cache for device mappings */
221-
if (!kvm_is_device_pfn(__phys_to_pfn(addr)))
221+
if (!kvm_is_device_pfn(pte_pfn(old_pte)))
222222
kvm_flush_dcache_pte(old_pte);
223223

224224
put_page(virt_to_page(pte));
@@ -310,7 +310,7 @@ static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
310310

311311
pte = pte_offset_kernel(pmd, addr);
312312
do {
313-
if (!pte_none(*pte) && !kvm_is_device_pfn(__phys_to_pfn(addr)))
313+
if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
314314
kvm_flush_dcache_pte(*pte);
315315
} while (pte++, addr += PAGE_SIZE, addr != end);
316316
}

arch/arm/kvm/psci.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
7575
unsigned long context_id;
7676
phys_addr_t target_pc;
7777

78-
cpu_id = *vcpu_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK;
78+
cpu_id = vcpu_get_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK;
7979
if (vcpu_mode_is_32bit(source_vcpu))
8080
cpu_id &= ~((u32) 0);
8181

@@ -94,8 +94,8 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
9494
return PSCI_RET_INVALID_PARAMS;
9595
}
9696

97-
target_pc = *vcpu_reg(source_vcpu, 2);
98-
context_id = *vcpu_reg(source_vcpu, 3);
97+
target_pc = vcpu_get_reg(source_vcpu, 2);
98+
context_id = vcpu_get_reg(source_vcpu, 3);
9999

100100
kvm_reset_vcpu(vcpu);
101101

@@ -114,7 +114,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
114114
* NOTE: We always update r0 (or x0) because for PSCI v0.1
115115
* the general puspose registers are undefined upon CPU_ON.
116116
*/
117-
*vcpu_reg(vcpu, 0) = context_id;
117+
vcpu_set_reg(vcpu, 0, context_id);
118118
vcpu->arch.power_off = false;
119119
smp_mb(); /* Make sure the above is visible */
120120

@@ -134,8 +134,8 @@ static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
134134
struct kvm *kvm = vcpu->kvm;
135135
struct kvm_vcpu *tmp;
136136

137-
target_affinity = *vcpu_reg(vcpu, 1);
138-
lowest_affinity_level = *vcpu_reg(vcpu, 2);
137+
target_affinity = vcpu_get_reg(vcpu, 1);
138+
lowest_affinity_level = vcpu_get_reg(vcpu, 2);
139139

140140
/* Determine target affinity mask */
141141
target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
@@ -209,7 +209,7 @@ int kvm_psci_version(struct kvm_vcpu *vcpu)
209209
static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
210210
{
211211
int ret = 1;
212-
unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
212+
unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0);
213213
unsigned long val;
214214

215215
switch (psci_fn) {
@@ -273,13 +273,13 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
273273
break;
274274
}
275275

276-
*vcpu_reg(vcpu, 0) = val;
276+
vcpu_set_reg(vcpu, 0, val);
277277
return ret;
278278
}
279279

280280
static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
281281
{
282-
unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
282+
unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0);
283283
unsigned long val;
284284

285285
switch (psci_fn) {
@@ -295,7 +295,7 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
295295
break;
296296
}
297297

298-
*vcpu_reg(vcpu, 0) = val;
298+
vcpu_set_reg(vcpu, 0, val);
299299
return 1;
300300
}
301301

arch/arm64/include/asm/kvm_emulate.h

Lines changed: 13 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -100,13 +100,21 @@ static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu)
100100
}
101101

102102
/*
103-
* vcpu_reg should always be passed a register number coming from a
104-
* read of ESR_EL2. Otherwise, it may give the wrong result on AArch32
105-
* with banked registers.
103+
* vcpu_get_reg and vcpu_set_reg should always be passed a register number
104+
* coming from a read of ESR_EL2. Otherwise, it may give the wrong result on
105+
* AArch32 with banked registers.
106106
*/
107-
static inline unsigned long *vcpu_reg(const struct kvm_vcpu *vcpu, u8 reg_num)
107+
static inline unsigned long vcpu_get_reg(const struct kvm_vcpu *vcpu,
108+
u8 reg_num)
108109
{
109-
return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.regs[reg_num];
110+
return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs.regs[reg_num];
111+
}
112+
113+
static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num,
114+
unsigned long val)
115+
{
116+
if (reg_num != 31)
117+
vcpu_gp_regs(vcpu)->regs.regs[reg_num] = val;
110118
}
111119

112120
/* Get vcpu SPSR for current mode */

arch/arm64/kvm/handle_exit.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@ static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run)
3737
{
3838
int ret;
3939

40-
trace_kvm_hvc_arm64(*vcpu_pc(vcpu), *vcpu_reg(vcpu, 0),
40+
trace_kvm_hvc_arm64(*vcpu_pc(vcpu), vcpu_get_reg(vcpu, 0),
4141
kvm_vcpu_hvc_get_imm(vcpu));
4242

4343
ret = kvm_psci_call(vcpu);

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