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torvaldstorvalds
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Merge tag 'arc-4.4-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC fixes from Vineet Gupta: "Found a couple of brown paper bag bugs with the prev pull request (including a SMP build breakage report from Guenter). Since these are urgent I also decided to send over a bunch of other pending fixes which could have otherwise waited an rc or two. Summary: - A bunch of brown paper bag bugs (MAINTAINERS list email, SMP build failure) - cpu_relax() now compiler barrier for UP as well - handling of userspace Bus Errors for ARCompact builds" * tag 'arc-4.4-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: Fix silly typo in MAINTAINERS file ARC: cpu_relax() to be compiler barrier even for UP ARC: use ASL assembler mnemonic ARC: [arcompact] Handle bus error from userspace as Interrupt not exception ARC: remove extraneous header include ARCv2: lib: memcpy: use local symbols
2 parents 63f4f7e + 30b9dbe commit b3a0d9a

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‎MAINTAINERS

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10300,7 +10300,7 @@ F: include/net/switchdev.h
1030010300

1030110301
SYNOPSYS ARC ARCHITECTURE
1030210302
M: Vineet Gupta <vgupta@synopsys.com>
10303-
L: linux-snps-arc@lists.infraded.org
10303+
L: linux-snps-arc@lists.infradead.org
1030410304
S: Supported
1030510305
F: arch/arc/
1030610306
F: Documentation/devicetree/bindings/arc/*

‎arch/arc/include/asm/processor.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -57,11 +57,7 @@ struct task_struct;
5757
* A lot of busy-wait loops in SMP are based off of non-volatile data otherwise
5858
* get optimised away by gcc
5959
*/
60-
#ifdef CONFIG_SMP
6160
#define cpu_relax() __asm__ __volatile__ ("" : : : "memory")
62-
#else
63-
#define cpu_relax() do { } while (0)
64-
#endif
6561

6662
#define cpu_relax_lowlatency() cpu_relax()
6763

‎arch/arc/kernel/entry-arcv2.S

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,25 @@ ENTRY(EV_DCError)
9191
flag 1
9292
END(EV_DCError)
9393

94+
; ---------------------------------------------
95+
; Memory Error Exception Handler
96+
; - Unlike ARCompact, handles Bus errors for both User/Kernel mode,
97+
; Instruction fetch or Data access, under a single Exception Vector
98+
; ---------------------------------------------
99+
100+
ENTRY(mem_service)
101+
102+
EXCEPTION_PROLOGUE
103+
104+
lr r0, [efa]
105+
mov r1, sp
106+
107+
FAKE_RET_FROM_EXCPN
108+
109+
bl do_memory_error
110+
b ret_from_exception
111+
END(mem_service)
112+
94113
ENTRY(EV_Misaligned)
95114

96115
EXCEPTION_PROLOGUE

‎arch/arc/kernel/entry-compact.S

Lines changed: 25 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -142,16 +142,12 @@ int1_saved_reg:
142142
.zero 4
143143

144144
/* Each Interrupt level needs its own scratch */
145-
#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
146-
147145
ARCFP_DATA int2_saved_reg
148146
.type int2_saved_reg, @object
149147
.size int2_saved_reg, 4
150148
int2_saved_reg:
151149
.zero 4
152150

153-
#endif
154-
155151
; ---------------------------------------------
156152
.section .text, "ax",@progbits
157153

@@ -215,6 +211,31 @@ END(handle_interrupt_level2)
215211

216212
#endif
217213

214+
; ---------------------------------------------
215+
; User Mode Memory Bus Error Interrupt Handler
216+
; (Kernel mode memory errors handled via seperate exception vectors)
217+
; ---------------------------------------------
218+
ENTRY(mem_service)
219+
220+
INTERRUPT_PROLOGUE 2
221+
222+
mov r0, ilink2
223+
mov r1, sp
224+
225+
; User process needs to be killed with SIGBUS, but first need to get
226+
; out of the L2 interrupt context (drop to pure kernel mode) and jump
227+
; off to "C" code where SIGBUS in enqueued
228+
lr r3, [status32]
229+
bclr r3, r3, STATUS_A2_BIT
230+
or r3, r3, (STATUS_E1_MASK|STATUS_E2_MASK)
231+
sr r3, [status32_l2]
232+
mov ilink2, 1f
233+
rtie
234+
1:
235+
bl do_memory_error
236+
b ret_from_exception
237+
END(mem_service)
238+
218239
; ---------------------------------------------
219240
; Level 1 ISR
220241
; ---------------------------------------------

‎arch/arc/kernel/entry.S

Lines changed: 0 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -92,23 +92,6 @@ ENTRY(instr_service)
9292
b ret_from_exception
9393
END(instr_service)
9494

95-
; ---------------------------------------------
96-
; Memory Error Exception Handler
97-
; ---------------------------------------------
98-
99-
ENTRY(mem_service)
100-
101-
EXCEPTION_PROLOGUE
102-
103-
lr r0, [efa]
104-
mov r1, sp
105-
106-
FAKE_RET_FROM_EXCPN
107-
108-
bl do_memory_error
109-
b ret_from_exception
110-
END(mem_service)
111-
11295
; ---------------------------------------------
11396
; Machine Check Exception Handler
11497
; ---------------------------------------------

‎arch/arc/lib/memcpy-archs.S

Lines changed: 26 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -50,26 +50,26 @@ ENTRY(memcpy)
5050

5151
;;; if size <= 8
5252
cmp r2, 8
53-
bls.d @smallchunk
53+
bls.d @.Lsmallchunk
5454
mov.f lp_count, r2
5555

5656
and.f r4, r0, 0x03
5757
rsub lp_count, r4, 4
58-
lpnz @aligndestination
58+
lpnz @.Laligndestination
5959
;; LOOP BEGIN
6060
ldb.ab r5, [r1,1]
6161
sub r2, r2, 1
6262
stb.ab r5, [r3,1]
63-
aligndestination:
63+
.Laligndestination:
6464

6565
;;; Check the alignment of the source
6666
and.f r4, r1, 0x03
67-
bnz.d @sourceunaligned
67+
bnz.d @.Lsourceunaligned
6868

6969
;;; CASE 0: Both source and destination are 32bit aligned
7070
;;; Convert len to Dwords, unfold x4
7171
lsr.f lp_count, r2, ZOLSHFT
72-
lpnz @copy32_64bytes
72+
lpnz @.Lcopy32_64bytes
7373
;; LOOP START
7474
LOADX (r6, r1)
7575
PREFETCH_READ (r1)
@@ -81,25 +81,25 @@ aligndestination:
8181
STOREX (r8, r3)
8282
STOREX (r10, r3)
8383
STOREX (r4, r3)
84-
copy32_64bytes:
84+
.Lcopy32_64bytes:
8585

8686
and.f lp_count, r2, ZOLAND ;Last remaining 31 bytes
87-
smallchunk:
88-
lpnz @copyremainingbytes
87+
.Lsmallchunk:
88+
lpnz @.Lcopyremainingbytes
8989
;; LOOP START
9090
ldb.ab r5, [r1,1]
9191
stb.ab r5, [r3,1]
92-
copyremainingbytes:
92+
.Lcopyremainingbytes:
9393

9494
j [blink]
9595
;;; END CASE 0
9696

97-
sourceunaligned:
97+
.Lsourceunaligned:
9898
cmp r4, 2
99-
beq.d @unalignedOffby2
99+
beq.d @.LunalignedOffby2
100100
sub r2, r2, 1
101101

102-
bhi.d @unalignedOffby3
102+
bhi.d @.LunalignedOffby3
103103
ldb.ab r5, [r1, 1]
104104

105105
;;; CASE 1: The source is unaligned, off by 1
@@ -114,7 +114,7 @@ sourceunaligned:
114114
or r5, r5, r6
115115

116116
;; Both src and dst are aligned
117-
lpnz @copy8bytes_1
117+
lpnz @.Lcopy8bytes_1
118118
;; LOOP START
119119
ld.ab r6, [r1, 4]
120120
prefetch [r1, 28] ;Prefetch the next read location
@@ -131,7 +131,7 @@ sourceunaligned:
131131

132132
st.ab r7, [r3, 4]
133133
st.ab r9, [r3, 4]
134-
copy8bytes_1:
134+
.Lcopy8bytes_1:
135135

136136
;; Write back the remaining 16bits
137137
EXTRACT_1 (r6, r5, 16)
@@ -141,14 +141,14 @@ copy8bytes_1:
141141
stb.ab r5, [r3, 1]
142142

143143
and.f lp_count, r2, 0x07 ;Last 8bytes
144-
lpnz @copybytewise_1
144+
lpnz @.Lcopybytewise_1
145145
;; LOOP START
146146
ldb.ab r6, [r1,1]
147147
stb.ab r6, [r3,1]
148-
copybytewise_1:
148+
.Lcopybytewise_1:
149149
j [blink]
150150

151-
unalignedOffby2:
151+
.LunalignedOffby2:
152152
;;; CASE 2: The source is unaligned, off by 2
153153
ldh.ab r5, [r1, 2]
154154
sub r2, r2, 1
@@ -159,7 +159,7 @@ unalignedOffby2:
159159
#ifdef __BIG_ENDIAN__
160160
asl.nz r5, r5, 16
161161
#endif
162-
lpnz @copy8bytes_2
162+
lpnz @.Lcopy8bytes_2
163163
;; LOOP START
164164
ld.ab r6, [r1, 4]
165165
prefetch [r1, 28] ;Prefetch the next read location
@@ -176,22 +176,22 @@ unalignedOffby2:
176176

177177
st.ab r7, [r3, 4]
178178
st.ab r9, [r3, 4]
179-
copy8bytes_2:
179+
.Lcopy8bytes_2:
180180

181181
#ifdef __BIG_ENDIAN__
182182
lsr.nz r5, r5, 16
183183
#endif
184184
sth.ab r5, [r3, 2]
185185

186186
and.f lp_count, r2, 0x07 ;Last 8bytes
187-
lpnz @copybytewise_2
187+
lpnz @.Lcopybytewise_2
188188
;; LOOP START
189189
ldb.ab r6, [r1,1]
190190
stb.ab r6, [r3,1]
191-
copybytewise_2:
191+
.Lcopybytewise_2:
192192
j [blink]
193193

194-
unalignedOffby3:
194+
.LunalignedOffby3:
195195
;;; CASE 3: The source is unaligned, off by 3
196196
;;; Hence, I need to read 1byte for achieve the 32bit alignment
197197

@@ -201,7 +201,7 @@ unalignedOffby3:
201201
#ifdef __BIG_ENDIAN__
202202
asl.ne r5, r5, 24
203203
#endif
204-
lpnz @copy8bytes_3
204+
lpnz @.Lcopy8bytes_3
205205
;; LOOP START
206206
ld.ab r6, [r1, 4]
207207
prefetch [r1, 28] ;Prefetch the next read location
@@ -218,19 +218,19 @@ unalignedOffby3:
218218

219219
st.ab r7, [r3, 4]
220220
st.ab r9, [r3, 4]
221-
copy8bytes_3:
221+
.Lcopy8bytes_3:
222222

223223
#ifdef __BIG_ENDIAN__
224224
lsr.nz r5, r5, 24
225225
#endif
226226
stb.ab r5, [r3, 1]
227227

228228
and.f lp_count, r2, 0x07 ;Last 8bytes
229-
lpnz @copybytewise_3
229+
lpnz @.Lcopybytewise_3
230230
;; LOOP START
231231
ldb.ab r6, [r1,1]
232232
stb.ab r6, [r3,1]
233-
copybytewise_3:
233+
.Lcopybytewise_3:
234234
j [blink]
235235

236236
END(memcpy)

‎arch/arc/mm/tlbex.S

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ ex_saved_reg1:
8888
#ifdef CONFIG_SMP
8989
sr r0, [ARC_REG_SCRATCH_DATA0] ; freeup r0 to code with
9090
GET_CPU_ID r0 ; get to per cpu scratch mem,
91-
lsl r0, r0, L1_CACHE_SHIFT ; cache line wide per cpu
91+
asl r0, r0, L1_CACHE_SHIFT ; cache line wide per cpu
9292
add r0, @ex_saved_reg1, r0
9393
#else
9494
st r0, [@ex_saved_reg1]
@@ -107,7 +107,7 @@ ex_saved_reg1:
107107
.macro TLBMISS_RESTORE_REGS
108108
#ifdef CONFIG_SMP
109109
GET_CPU_ID r0 ; get to per cpu scratch mem
110-
lsl r0, r0, L1_CACHE_SHIFT ; each is cache line wide
110+
asl r0, r0, L1_CACHE_SHIFT ; each is cache line wide
111111
add r0, @ex_saved_reg1, r0
112112
ld_s r3, [r0,12]
113113
ld_s r2, [r0, 8]
@@ -256,7 +256,7 @@ ex_saved_reg1:
256256

257257
.macro CONV_PTE_TO_TLB
258258
and r3, r0, PTE_BITS_RWX ; r w x
259-
lsl r2, r3, 3 ; Kr Kw Kx 0 0 0 (GLOBAL, kernel only)
259+
asl r2, r3, 3 ; Kr Kw Kx 0 0 0 (GLOBAL, kernel only)
260260
and.f 0, r0, _PAGE_GLOBAL
261261
or.z r2, r2, r3 ; Kr Kw Kx Ur Uw Ux (!GLOBAL, user page)
262262

‎arch/arc/plat-sim/platform.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,6 @@
1010

1111
#include <linux/init.h>
1212
#include <asm/mach_desc.h>
13-
#include <asm/mcip.h>
1413

1514
/*----------------------- Machine Descriptions ------------------------------
1615
*

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