A fully integrated active sub-harmonic mixer (SHM) located in two Marchand baluns is presented. T... more A fully integrated active sub-harmonic mixer (SHM) located in two Marchand baluns is presented. The proposed circuit was designed at 24 GHz for industrial, scientific and medical (ISM) band applications and fabricated in a 0.13 μm complementary metal-oxide-semiconductor (CMOS) process. The proposed circuit layout is based on allocating the active SHM into square passive baluns to reduce the chip area without degrading performance. Two design approaches, one using a multi-layer and the other using compensated capacitors, were adopted in the CMOS Marchand baluns process to increase the coupling coefficient sufficiently and to minimise the required balun size. Additionally, the conversion gain was increased by using the current-bleeding scheme in the SHM. Moreover, a conversion gain of 3.8 dB was achieved in the designed circuit at a local oscillator (LO) input power of 5 dBm. Both radio frequency-intermediate frequency (IF) and LO-IF isolations were better than 28 dB. The proposed circuit not only has a higher conversion gain than other published mixers that are operated at millimetre-wave frequencies, but also has an innovative circuit layout.
2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008
A low phase-noise Ka-band CMOS voltage-controlled oscillator is proposed in this paper. The CMOS ... more A low phase-noise Ka-band CMOS voltage-controlled oscillator is proposed in this paper. The CMOS VCO core adopts a new complementary Colpitts structure in a 0.18- mum CMOS technology to achieve the differential-ended outputs with low phase-noise performance, as well as operate at much higher frequency. The VCO oscillates from 29.8 to 30 GHz with 200 MHz tuning range. The measured
2008 IEEE International Symposium on Circuits and Systems, 2008
A 24 GHz low-power CMOS RF receivers for indoor wireless application is developed in this paper. ... more A 24 GHz low-power CMOS RF receivers for indoor wireless application is developed in this paper. This paper presents a novel approach to integrate the RF front-end circuits, and realizes the manufacture of SoC (System on a Chip) design. The proposed RF IC includes a low-noise amplifier (LNA), a down-conversion mixer, a voltage-controlled oscillator (VCO) and a variable gain amplifier
2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference, 2009
... Chien-Cheng Wei, Chin-Ta Fan, Ta-Hsiang Chiang, Ming-Kuen Chiu and Shao-Pin Ru ... [1] Ivy We... more ... Chien-Cheng Wei, Chin-Ta Fan, Ta-Hsiang Chiang, Ming-Kuen Chiu and Shao-Pin Ru ... [1] Ivy Wei Qin, Paul Reid, Robert E. Werner, and David Doerr, Automatic Wedge Bonding with Ribbon Wire For High Frequency Applications, in IEEE IEMT Dig., pp.97-104, 2002. ...
This paper presents the designs and measurement results of the monolithic coplanar waveguide (CPW... more This paper presents the designs and measurement results of the monolithic coplanar waveguide (CPW) Kaband millimeter wave integrated circuits, including low noise amplifier, single-balance mixer, power amplifier, and oscillator. The millimeter wave ICs were fabricated with a 0.15 μm T-shape gate GaAs pseudomorphic HEMTs technology, carried out by commercially available foundry. The CPW process was applied in this work to avoid backside process and various impedances can also be adjusted by line width and gap. Therefore, these sub-circuits can be integrated using CPW technology easily and no via-hole process was involved to reduce the process cost.
An improved BSIM4 large-signal model for 0.13-µm gate-length high linearity CMOS RF transistors i... more An improved BSIM4 large-signal model for 0.13-µm gate-length high linearity CMOS RF transistors is presented in this paper. The field-plate technology functions the improvements in linearity and 1/f noise of 0.13-µm CMOS devices was in our past investigation. To accurately accomplish the CMOS field-plate device model, an improved BSIM4 model with RLC networks representing the parasitic effects of transmission line and lossy substrate has been adopted for microwave applications up to 40 GHz. Good agreement has been realized between the measured and modeled results in terms of device's DC curves, S-parameters, 1/f noise, and power performance.
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006, 2006
High linearity performance of 0.13 mum CMOS devices using field-plate technology is presented in ... more High linearity performance of 0.13 mum CMOS devices using field-plate technology is presented in this paper. The field-plate technology functions for reducing the electric field between gate and drain terminals, which provides a field-plate induced depletion region and decreases the leakage current to greatly improve the linearity and power performance of CMOS devices. The third-order inter-modulation product (IM3) of 0.13 mum NMOS devices with and without field-plate technology are -41.8 dBm and -32.4 dBm for input power is -10 dBm, respectively. The experimental results show that the field-plate architecture is more effective to exhibit high linearity and power for CMOS RFIC applications
We have systematically studied the microwave noise, power, and linearity characteristics of field... more We have systematically studied the microwave noise, power, and linearity characteristics of field-plate (FP) 0.13-mum CMOS transistors in which the field-plate are separately connected to the gate and source terminals. The gate-terminated FP NMOS (FP-G NMOS) provided the best minimum noise figure (NFmin) at 6 GHz compared to standard device and source- terminated FP device (FP-S NMOS) owing to the lowest gate resistance (Rg) can be obtained in this structure. By adopting FP metal in NMOS, both FP-S and FP-G devices achieved higher current density at high gate bias voltages; besides, they also demonstrated higher efficiency under high drain-to-source voltages at high input power swing. The third-order inter- modulation product (IM3) is -39.4 dB for FP-S NMOS for Pin=-20 dBm; the corresponding values for FP-G and standard devices are -34.9 and -37.3 dB, respectively. These experimental results indicated that the FP-G architecture is suitable for low noise applications and FP-S is more effective at high power and high linearity operation. Finally, a 24 GHz T/R switch was designed and fabricated by using FP-S NMOSs for achieving good ability of isolation and harmonics rejection ratio.
2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks, 2005
An ultra-wideband CMOS voltage-controlled oscillator (VCO) with 3-5GHz tuning range is presented ... more An ultra-wideband CMOS voltage-controlled oscillator (VCO) with 3-5GHz tuning range is presented in this paper. The circuit was designed and fabricated by using TSMC 0.18-pm CMOS process. The proposed VCO is using the tunable active inductor to replace the passive spiral inductor. The active inductor can vary the inductance between 1.5-7nH with qualityfactor > 30 by a feedback tunable resistor. Comparisons of this topology with conventional VCO show that this topology achieves better performance with very wide tuning range and compact chip size. The tuning range is approximately from 3 to 5GHz for ultra-wideband system applications.
The 2010 International Conference on Green Circuits and Systems, 2010
In the near decade, following the advances in CMOS technology, RF CMOS circuits have been extensi... more In the near decade, following the advances in CMOS technology, RF CMOS circuits have been extensively applied in consumer products and wireless communication systems. Meanwhile, the demand of green design mechanism is becoming more and more important for circuit designs. This paper proposes the green design strategies for RF circuits, such as P A, LNA, mixer, and VCO. The design strategies focus on not only the low power consumption with reused bias current but also the small chip area for low spurious environment contamination. For the low-power design, some published literatures have been adopted the operation voltage from 3V down to only O.2V, to save the dissipated dc power from tens mW to several hundreds of pW. Additionally, many design strategies and green figures of merit (GFOM) are also presented and proposed in this paper, for the future green RF circuit design.
This paper presents an novel configuration of balanced frequency InGaAs pseudomorphic high electr... more This paper presents an novel configuration of balanced frequency InGaAs pseudomorphic high electron mobility transistor (PHEMT) monolithic microwave integrated circuit (MMIC) tripler with Ka-band output frequency (39 GHz). A resonant LC filter is used to eliminate the fundamental frequency and a phase delay line is employed to suppress the second harmonic. By using a class B transistor bias point and
A high isolation GaAs microwave switch has been successfully developed using field-plate technolo... more A high isolation GaAs microwave switch has been successfully developed using field-plate technology, which is effective to improve the isolation. The developed wideband SPDT switch shows a greater than 40 dB isolation before 10 GHz and also achieves good performance at higher frequency. A GaAs-based pseudomorphic high electron mobility transistors (pHEMTs) in which the field-plate (FP) metal is supplied with
2010 IEEE Radio Frequency Integrated Circuits Symposium, 2010
This paper presents a low-profile low-parasitic RF package by using the high-density build-up (HD... more This paper presents a low-profile low-parasitic RF package by using the high-density build-up (HD-BU) technology. This package achieves much thinner, fine pitch, and exposed design pattern feature for outstanding electrical and thermal performance. The packaging fabrication is simple and only needs several processes. This HD-BU package provides lower parasitic than other lead-frame types due to the use of very thin bonding pads. Additionally, a capacitor chip is assembled using the proposed technology for packaging demonstration and electrical performance evaluation. Based on the experimental results, the measured capacitances at 1-GHz are quite similar before and after packaging. It indicates that the HD-BU package has low parasitic capacitance even at high-frequency operation, and does not affect the electrical performance for the packaged chip. Therefore, these packages are good candidates for applications requiring low profile, low parasitic and low cost.
A novel low phase-noise differential Colpitts VCO by using transformer feedback technology is pre... more A novel low phase-noise differential Colpitts VCO by using transformer feedback technology is presented in this paper. This work demonstrates a simple differential topology with dual-transformer approach to reduce phase-noise at low DC power consumption. A symmetrical circuit layout can be realized easily by transformers and a commonly cross-coupled structure is not adopted herein because cross couple feedback path is also a serious parasitic effect more at 10 GHz operation. Therefore, dual-transformers provide a compact feedback path and DC feed path simultaneously. Consuming a DC power of 8 mW in the VCO core, the circuit exhibits a phase-noise of À115 dBc/Hz at offset frequency of 1-MHz and the figure of merit value is À184.1 dBc.
Si-based field-plate 0.13 lm gate length metal-oxide-semiconductor field effect transistor (Si MO... more Si-based field-plate 0.13 lm gate length metal-oxide-semiconductor field effect transistor (Si MOSFET) with field-plate (FP) lengths of 0.1 lm, 0.2 lm, and 0.3 lm have been fabricated and investigated. The field-plate metals were connected to gate electrode in this study to improve device gate resistance (R g) resulting in the better microwave performance. By increasing the length of field-plate metal extension (L FPE), the off-state drain-to-source surface leakage current can be suppressed. Besides, low surface traps in FP NMOS also leads to a higher drain-to-source current (I ds) especially at high current regime compared to standard device. The power added efficiency (PAE) was 56.3% for L FPE of 0.3 lm device, and these values where 54.7% and 53.8% for L FPE of 0.2 lm and 0.1 lm devices, respectively. Wider field-plate metal extension exhibits highly potential for low noise amplifier and high efficiency power amplifier applications.
... Hsien-Chin Chiu, Chia-Shih Cheng and Chien-Cheng Wei ... Electron Devices 52 168992 [2] Chin... more ... Hsien-Chin Chiu, Chia-Shih Cheng and Chien-Cheng Wei ... Electron Devices 52 168992 [2] Chini A, Buttari D, Coffie R, Shen L, Heikman S, Chakraborty A, Keller S and Mishra UK 2004 Power and linearity characteristics of field-plated recessed-gate AlGaN-GaN HEMTs IEEE ...
A fully integrated active sub-harmonic mixer (SHM) located in two Marchand baluns is presented. T... more A fully integrated active sub-harmonic mixer (SHM) located in two Marchand baluns is presented. The proposed circuit was designed at 24 GHz for industrial, scientific and medical (ISM) band applications and fabricated in a 0.13 μm complementary metal-oxide-semiconductor (CMOS) process. The proposed circuit layout is based on allocating the active SHM into square passive baluns to reduce the chip area without degrading performance. Two design approaches, one using a multi-layer and the other using compensated capacitors, were adopted in the CMOS Marchand baluns process to increase the coupling coefficient sufficiently and to minimise the required balun size. Additionally, the conversion gain was increased by using the current-bleeding scheme in the SHM. Moreover, a conversion gain of 3.8 dB was achieved in the designed circuit at a local oscillator (LO) input power of 5 dBm. Both radio frequency-intermediate frequency (IF) and LO-IF isolations were better than 28 dB. The proposed circuit not only has a higher conversion gain than other published mixers that are operated at millimetre-wave frequencies, but also has an innovative circuit layout.
2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008
A low phase-noise Ka-band CMOS voltage-controlled oscillator is proposed in this paper. The CMOS ... more A low phase-noise Ka-band CMOS voltage-controlled oscillator is proposed in this paper. The CMOS VCO core adopts a new complementary Colpitts structure in a 0.18- mum CMOS technology to achieve the differential-ended outputs with low phase-noise performance, as well as operate at much higher frequency. The VCO oscillates from 29.8 to 30 GHz with 200 MHz tuning range. The measured
2008 IEEE International Symposium on Circuits and Systems, 2008
A 24 GHz low-power CMOS RF receivers for indoor wireless application is developed in this paper. ... more A 24 GHz low-power CMOS RF receivers for indoor wireless application is developed in this paper. This paper presents a novel approach to integrate the RF front-end circuits, and realizes the manufacture of SoC (System on a Chip) design. The proposed RF IC includes a low-noise amplifier (LNA), a down-conversion mixer, a voltage-controlled oscillator (VCO) and a variable gain amplifier
2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference, 2009
... Chien-Cheng Wei, Chin-Ta Fan, Ta-Hsiang Chiang, Ming-Kuen Chiu and Shao-Pin Ru ... [1] Ivy We... more ... Chien-Cheng Wei, Chin-Ta Fan, Ta-Hsiang Chiang, Ming-Kuen Chiu and Shao-Pin Ru ... [1] Ivy Wei Qin, Paul Reid, Robert E. Werner, and David Doerr, Automatic Wedge Bonding with Ribbon Wire For High Frequency Applications, in IEEE IEMT Dig., pp.97-104, 2002. ...
This paper presents the designs and measurement results of the monolithic coplanar waveguide (CPW... more This paper presents the designs and measurement results of the monolithic coplanar waveguide (CPW) Kaband millimeter wave integrated circuits, including low noise amplifier, single-balance mixer, power amplifier, and oscillator. The millimeter wave ICs were fabricated with a 0.15 μm T-shape gate GaAs pseudomorphic HEMTs technology, carried out by commercially available foundry. The CPW process was applied in this work to avoid backside process and various impedances can also be adjusted by line width and gap. Therefore, these sub-circuits can be integrated using CPW technology easily and no via-hole process was involved to reduce the process cost.
An improved BSIM4 large-signal model for 0.13-µm gate-length high linearity CMOS RF transistors i... more An improved BSIM4 large-signal model for 0.13-µm gate-length high linearity CMOS RF transistors is presented in this paper. The field-plate technology functions the improvements in linearity and 1/f noise of 0.13-µm CMOS devices was in our past investigation. To accurately accomplish the CMOS field-plate device model, an improved BSIM4 model with RLC networks representing the parasitic effects of transmission line and lossy substrate has been adopted for microwave applications up to 40 GHz. Good agreement has been realized between the measured and modeled results in terms of device's DC curves, S-parameters, 1/f noise, and power performance.
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006, 2006
High linearity performance of 0.13 mum CMOS devices using field-plate technology is presented in ... more High linearity performance of 0.13 mum CMOS devices using field-plate technology is presented in this paper. The field-plate technology functions for reducing the electric field between gate and drain terminals, which provides a field-plate induced depletion region and decreases the leakage current to greatly improve the linearity and power performance of CMOS devices. The third-order inter-modulation product (IM3) of 0.13 mum NMOS devices with and without field-plate technology are -41.8 dBm and -32.4 dBm for input power is -10 dBm, respectively. The experimental results show that the field-plate architecture is more effective to exhibit high linearity and power for CMOS RFIC applications
We have systematically studied the microwave noise, power, and linearity characteristics of field... more We have systematically studied the microwave noise, power, and linearity characteristics of field-plate (FP) 0.13-mum CMOS transistors in which the field-plate are separately connected to the gate and source terminals. The gate-terminated FP NMOS (FP-G NMOS) provided the best minimum noise figure (NFmin) at 6 GHz compared to standard device and source- terminated FP device (FP-S NMOS) owing to the lowest gate resistance (Rg) can be obtained in this structure. By adopting FP metal in NMOS, both FP-S and FP-G devices achieved higher current density at high gate bias voltages; besides, they also demonstrated higher efficiency under high drain-to-source voltages at high input power swing. The third-order inter- modulation product (IM3) is -39.4 dB for FP-S NMOS for Pin=-20 dBm; the corresponding values for FP-G and standard devices are -34.9 and -37.3 dB, respectively. These experimental results indicated that the FP-G architecture is suitable for low noise applications and FP-S is more effective at high power and high linearity operation. Finally, a 24 GHz T/R switch was designed and fabricated by using FP-S NMOSs for achieving good ability of isolation and harmonics rejection ratio.
2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks, 2005
An ultra-wideband CMOS voltage-controlled oscillator (VCO) with 3-5GHz tuning range is presented ... more An ultra-wideband CMOS voltage-controlled oscillator (VCO) with 3-5GHz tuning range is presented in this paper. The circuit was designed and fabricated by using TSMC 0.18-pm CMOS process. The proposed VCO is using the tunable active inductor to replace the passive spiral inductor. The active inductor can vary the inductance between 1.5-7nH with qualityfactor > 30 by a feedback tunable resistor. Comparisons of this topology with conventional VCO show that this topology achieves better performance with very wide tuning range and compact chip size. The tuning range is approximately from 3 to 5GHz for ultra-wideband system applications.
The 2010 International Conference on Green Circuits and Systems, 2010
In the near decade, following the advances in CMOS technology, RF CMOS circuits have been extensi... more In the near decade, following the advances in CMOS technology, RF CMOS circuits have been extensively applied in consumer products and wireless communication systems. Meanwhile, the demand of green design mechanism is becoming more and more important for circuit designs. This paper proposes the green design strategies for RF circuits, such as P A, LNA, mixer, and VCO. The design strategies focus on not only the low power consumption with reused bias current but also the small chip area for low spurious environment contamination. For the low-power design, some published literatures have been adopted the operation voltage from 3V down to only O.2V, to save the dissipated dc power from tens mW to several hundreds of pW. Additionally, many design strategies and green figures of merit (GFOM) are also presented and proposed in this paper, for the future green RF circuit design.
This paper presents an novel configuration of balanced frequency InGaAs pseudomorphic high electr... more This paper presents an novel configuration of balanced frequency InGaAs pseudomorphic high electron mobility transistor (PHEMT) monolithic microwave integrated circuit (MMIC) tripler with Ka-band output frequency (39 GHz). A resonant LC filter is used to eliminate the fundamental frequency and a phase delay line is employed to suppress the second harmonic. By using a class B transistor bias point and
A high isolation GaAs microwave switch has been successfully developed using field-plate technolo... more A high isolation GaAs microwave switch has been successfully developed using field-plate technology, which is effective to improve the isolation. The developed wideband SPDT switch shows a greater than 40 dB isolation before 10 GHz and also achieves good performance at higher frequency. A GaAs-based pseudomorphic high electron mobility transistors (pHEMTs) in which the field-plate (FP) metal is supplied with
2010 IEEE Radio Frequency Integrated Circuits Symposium, 2010
This paper presents a low-profile low-parasitic RF package by using the high-density build-up (HD... more This paper presents a low-profile low-parasitic RF package by using the high-density build-up (HD-BU) technology. This package achieves much thinner, fine pitch, and exposed design pattern feature for outstanding electrical and thermal performance. The packaging fabrication is simple and only needs several processes. This HD-BU package provides lower parasitic than other lead-frame types due to the use of very thin bonding pads. Additionally, a capacitor chip is assembled using the proposed technology for packaging demonstration and electrical performance evaluation. Based on the experimental results, the measured capacitances at 1-GHz are quite similar before and after packaging. It indicates that the HD-BU package has low parasitic capacitance even at high-frequency operation, and does not affect the electrical performance for the packaged chip. Therefore, these packages are good candidates for applications requiring low profile, low parasitic and low cost.
A novel low phase-noise differential Colpitts VCO by using transformer feedback technology is pre... more A novel low phase-noise differential Colpitts VCO by using transformer feedback technology is presented in this paper. This work demonstrates a simple differential topology with dual-transformer approach to reduce phase-noise at low DC power consumption. A symmetrical circuit layout can be realized easily by transformers and a commonly cross-coupled structure is not adopted herein because cross couple feedback path is also a serious parasitic effect more at 10 GHz operation. Therefore, dual-transformers provide a compact feedback path and DC feed path simultaneously. Consuming a DC power of 8 mW in the VCO core, the circuit exhibits a phase-noise of À115 dBc/Hz at offset frequency of 1-MHz and the figure of merit value is À184.1 dBc.
Si-based field-plate 0.13 lm gate length metal-oxide-semiconductor field effect transistor (Si MO... more Si-based field-plate 0.13 lm gate length metal-oxide-semiconductor field effect transistor (Si MOSFET) with field-plate (FP) lengths of 0.1 lm, 0.2 lm, and 0.3 lm have been fabricated and investigated. The field-plate metals were connected to gate electrode in this study to improve device gate resistance (R g) resulting in the better microwave performance. By increasing the length of field-plate metal extension (L FPE), the off-state drain-to-source surface leakage current can be suppressed. Besides, low surface traps in FP NMOS also leads to a higher drain-to-source current (I ds) especially at high current regime compared to standard device. The power added efficiency (PAE) was 56.3% for L FPE of 0.3 lm device, and these values where 54.7% and 53.8% for L FPE of 0.2 lm and 0.1 lm devices, respectively. Wider field-plate metal extension exhibits highly potential for low noise amplifier and high efficiency power amplifier applications.
... Hsien-Chin Chiu, Chia-Shih Cheng and Chien-Cheng Wei ... Electron Devices 52 168992 [2] Chin... more ... Hsien-Chin Chiu, Chia-Shih Cheng and Chien-Cheng Wei ... Electron Devices 52 168992 [2] Chini A, Buttari D, Coffie R, Shen L, Heikman S, Chakraborty A, Keller S and Mishra UK 2004 Power and linearity characteristics of field-plated recessed-gate AlGaN-GaN HEMTs IEEE ...
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