Papers by dr.rashmi mahajan
2012 15th Euromicro Conference on Digital System Design, 2012
Research article "Real time signal processing" Sheetal et al. Indian Society for Education and E... more Research article "Real time signal processing" Sheetal et al. Indian Society for Education and Environment (iSee) http://www.indjst.org Indian J.Sci.Technol.
International Journal of Engineering and Advanced Technology, 2020
In a close combat situation several types of non-verbal communication are available. However thes... more In a close combat situation several types of non-verbal communication are available. However these signals have limits of range and reliability, particularly when line of sight is disrupted. This paper proposes the system for troops to interpret hand and arm military gestures applicable in close combat scenario. In the proposed system, signals are transmitted through secured Bluetooth connections and interpreted at the receiver end. k-NN algorithm, Lookup Table (LuT) and Decision Tree algorithm are used to determine the exact classification of the gestures. This paper presents a system keeping only one fellow trooper in picture and reported 94.6 percent accuracy of the military gestures interpretation.
Detection of intruders and predicting their activities are the first and foremost needs of survei... more Detection of intruders and predicting their activities are the first and foremost needs of surveillance needs of surveillance. An embedded system exploring geophone, adaptive event extraction, and robust machine learning algorithms have made it possible not only to detect the presence of a potentially harmful intruder but also to predict to a high degree of accuracy, his state of motion, and to take counter action at the earliest. Perimeter protection system has become very crucial to the protection of military assets. Detecting threats prior to the intrusion is obviously the first step for protection. In order to detect the threats approaching toward military assets without being exposed, a few things should be considered. Sensors should be no noticeable or detectable intruders, for obvious reason that sensors can be easily disturbed or interrupted by intruders. In addition, sensors should not generate an electromagnetic field or audio/visual signals which makes it exposed to the i...
International Journal of Advanced Research in Electrical, Electronics and Instrumentation Energy, 2014
This work reports Partial Reconfiguration (PR) by which FPGA can dynamically reconfigure. The con... more This work reports Partial Reconfiguration (PR) by which FPGA can dynamically reconfigure. The concept of self-reconfiguration is tried to explain under the control of embedded microprocessor like microblaze. Here PR could be useful to reduce area requirements and upsurge systems versatility. Partial Reconfiguration is supported on high end FPGAs like Sparten III, Virtex series. Today cryptographic algorithms are not safe also embedded cryptographic hardware is costly. Hence to make it cost effective and to provide more secureness reconfigurable hardware such as FPGA can be used. In this project AES (Advanced Encryption Standard) algorithm has been selected for PR implementation to achieve the goal of secureness in cryptography. This work gives briefings about the method of hardware implementation for AES encryption algorithm with Dynamic Partial Reconfigurable keys. This implementation could be a good solution to preserve confidentiality and convenience to the information in the num...
Nowadays our garages needs to secure the cars and entrance of the residences for the
Indian Journal of Science and Technology
Research article "Real time signal processing" Sheetal et al. Indian Society for Education and E... more Research article "Real time signal processing" Sheetal et al. Indian Society for Education and Environment (iSee) http://www.indjst.org Indian J.Sci.Technol.
Silicon
The paper reports the analytical model for the analysis of the effects of channel doping on the t... more The paper reports the analytical model for the analysis of the effects of channel doping on the threshold voltage. A silicon germanium p-MOSFET with high-k dielectric material along with a metal gate is used for the analysis. The presented model considers the short channel effects, junction depth, doping of the layers and metal gate work function. Results are validated with the 22 nm device geometry. The MOSFET with reduced channel doping reflects the corresponding reduction in the threshold voltage. The model can effectively analyze the SiGe p-MOSFET for device designing in the nanometer regime.
SSRN Electronic Journal
Nowadays, libraries contain hundreds of books that need to be handled properly by the librarian a... more Nowadays, libraries contain hundreds of books that need to be handled properly by the librarian alone. So, this becomes a time consuming process and a lot of manual work is required. Also, keeping count of the books becomes tedious. To overcome this issue, we have automated the library management system using RFID technology which will make the handling of a large number of books simple. Not only does this technology help in easing the work at library but also has made tracking of assets, inventory management and material handling easy in other fields. In this project, we have used RFID as a continuous scanner to keep a count of the books. This will keep the librarian updated about the number of books available at the start and end of the day through a database. Another reader is used to scan the user’s library card and the book. The books contain RFID tags that are continuously monitored by the reader and if there’s been an issuing error the RFID scanner at the entrance sounds an alarm to notify of the unissued book, this is where the security aspect of RFID comes into play. The project revolves around the use of a microcontroller ATMEGA 328p, to control the RFID system. The microcontroller is interfaced with the RFID system, LCD and buzzer. LCD displays the details of the issuing/reissuing of the books (and the details of the user membership). This project is mainly implemented keeping in mind the reduction of the human efforts needed otherwise through a fully automated library guided by the RFID technology to aid in fast transaction.
Silicon, 2016
The present paper proposes a novel concept which can successfully reduce threshold voltage and in... more The present paper proposes a novel concept which can successfully reduce threshold voltage and increase switching speed of a conventional MOSFET. The proposed structures have been incorporated with a silicon germanium (SiGe) layer as a channel at the 22 nm technology node. Also, extensive analyses have been done to study the effects of replacing conventional polysilicon by graded dopent profile polysilicon, use of a high-k/silicon dioxide stack as a dielectric with graded dopent profile polysilicon and by using a high-k/silicon dioxide stack as a dielectric with a metal gate. Hafnium dioxide is used as a high-k material. Silvaco Athena and Atlas simulators are used for simulation as well as for finding electrical characteristics of the structures. For all the proposed structures two important parameters are studied in detail, threshold voltage and subthreshold slope. Comparing the three structures, it can be seen that using the high-k/silicon dioxide stack as a dielectric with a metal gate yields the best threshold voltage as well as good subthreshold slope which is directly related to the switching behaviour of the device. The required fabrication aspects of the modelled structures are also elaborated in detail.
International Conference for Convergence for Technology-2014, 2014
Dynamics of threshold voltage for pseudomorphic SiGe structure is presented in this paper. Poisso... more Dynamics of threshold voltage for pseudomorphic SiGe structure is presented in this paper. Poisson's equation has been solved analytically considering short channel effects. Simulation obtained from analytical are in good agreement with the results from Silvaco TCAD. Validation of model for specific range of substrate concentration has been done. Analytical model developed can be extended for the use of high-k material structure as well. This work presenting as a compact solution for high-k SiGe MOSFET structure.
2009 International Conference on Signal Processing Systems, 2009
... Sheetal U. Bhandari International Institute of Information Technology Pune, India e-mail: she... more ... Sheetal U. Bhandari International Institute of Information Technology Pune, India e-mail: sheetalb@isquareit.ac.in Shashank S. Pujari International Institute of Information Technology Pune, India e-mail: shashankp@isquareit.ac.in ...
International Journal of Computer Applications, 2014
The use of Vedic mathematics lies in the fact that it reduces the typical calculation in the conv... more The use of Vedic mathematics lies in the fact that it reduces the typical calculation in the conventional mathematics to very simple once. This is so because the Vedic formulae have claimed to be building on the natural principles on which the human mind works. Vedic mathematics is a several effective algorithms, which has spread over to various branches of engineering such as computing. In computers, typical central processing unit devotes a considerable amount of processing time in implementing arithmetic operations, particularly multiplication operation. In this work, I have studied different multipliers, which give low power requirement and high speed, also give information of "urdhva-Tiryabhyam" algorithm of ancient Indian Vedic mathematics, which has utilized for multiplication to improve speed of multipliers. The proposed algorithm has modeled using VHDL, a hardware descriptive language. In a work I have simulated and synthesized 32-bit multiplier, the result shows that multiplier implemented using Vedic multiplication is efficient in terms of speed.
International Journal of Computer Applications, 2014
This work reports Partial Reconfiguration (PR) by which selected areas of an FPGA can be reconfig... more This work reports Partial Reconfiguration (PR) by which selected areas of an FPGA can be reconfigured during runtime. Today cryptographic algorithms are not safe also embedded cryptographic hardware is costly. Hence to make it cost effective and to provide more secureness reconfigurable hardware such as FPGA is used with the concept of partial reconfiguration. This work gives briefings about the method of hardware implementation for AES encryption algorithm with Dynamic reconfigurable keys. Our implementation reaches very good efficiencies than the compared one as we have adopted our own methodology for key expansion. With the combination of adopted methodology & used FPGA this paper shows better agreement as compared to previous work. This implementation could be a good solution to preserve confidentiality and convenience to the information in the numeric communication.
Indian Journal of …, 2010
Research article "Real time signal processing" Sheetal et al. Indian Society for Education and E... more Research article "Real time signal processing" Sheetal et al. Indian Society for Education and Environment (iSee) http://www.indjst.org Indian J.Sci.Technol.
Uploads
Papers by dr.rashmi mahajan