Traditional Approach and New Configuration for Digital IF

2017

This paper presents ASIC design of digital down converter using 90nm technology for software defined applications. Computationally efficient multistage design technique is used to provide optimized solution for Third Generation Mobile Communications. Parks McClellan algorithm is used to minimize the filter order along with efficient polyphase decomposition technique. Multiplier based partially serial algorithm is used to enhance the performance in terms of area and power consumption. Multipliers and adders are optimally placed and routed to reduce the silicon area. The proposed Digital Down Converter ASIC has consumed 601 mm 2 area by consuming 3169.607 nW power to provide high performance optimized solution to software defined radios.

2008

Digital Up Converters (DUC) and Digital Down Converters (DDC) are key components of RF systems in communications, sensing, and imaging. This application note demonstrates how efficient DUC/DDC implementations can be created by leveraging Xilinx® DSP tools and IP portfolio for increased productivity and reduced development time. While previous application notes [Ref 1] have provided examples of DUC and DDC implementation in wideband communications systems, this document concentrates on narrowband systems and the building block components available to meet the particular requirements of such designs. Step-by-step guidance is provided on how to perform simulation of narrowband DUC/DDC systems in MATLAB®, how to map functions onto building blocks and IP cores for Xilinx® FPGAs in System Generator software, and how to verify the implementation against the simulation model. Two examples are provided: a multi-carrier GSM system (both DUC and DDC) and a multi-channel MRI receiver (DDC only)...

International Journal of Engineering Research and Technology (IJERT), 2014

https://www.ijert.org/efficient-design-of-digital-up-converter-using-xilinx-system-generator https://www.ijert.org/research/efficient-design-of-digital-up-converter-using-xilinx-system-generator-IJERTV3IS052174.pdf Digital Signal Processing has become essential to the design and implementation of high performance audio, video, multi-media, and communication systems signal processing. An essential component of cost effective DSP algorithms is multirate signal processing. Digital Up Converter (DUC) is key component of RF systems in communications, sensing, and imaging. Transmit/receive functionality has become an area of focus as designers attempt to address the need to move data from very high frequency sample rates to chip processing rates. Digital Up Converter is used as sample rate converter. This is the important block in every digital communication system; hence there is a need for effective implementation of digital up converter so that cost can be reduced. In this paper the design of digital up converter is proposed using Xilinx System Generator in order to shorten the design cycle and increase the design productivity. DUC mainly consists of FIR filter, upsampler and DDS blocks.

International journal of engineering research and technology, 2014

Digital Signal Processing has become essential to the design and implementation of high performance audio, video, multi-media, and communication systems signal processing. An essential component of cost effective DSP algorithms is multirate signal processing. Digital Up Converter (DUC) is key component of RF systems in communications, sensing, and imaging. Transmit/receive functionality has become an area of focus as designers attempt to address the need to move data from very high frequency sample rates to chip processing rates. Digital Up Converter is used as sample rate converter. This is the important block in every digital communication system; hence there is a need for effective implementation of digital up converter so that cost can be reduced. In this paper the design of digital up converter is proposed using Xilinx System Generator in order to shorten the design cycle and increase the design productivity. DUC mainly consists of FIR filter, upsampler and DDS blocks. Keywords...

Adaptive wave pipelining is the methodology used for improving the overall performance of Software Defined Radio (SDR). This method is a functional combination of wave pipelining and hybrid technique. Wave pipelining is the methodology used for improving the performance without using the intermediate latches, at the same time it performs the same operation as pipelining. Hybrid technique is the mechanism that is used for introducing registers for achieving the timing constrain. This technique is implemented in the Direct Digital Synthesizer (DDS) which is the integral part of a Digital Down Converter (DDC) in the Digital Front End (DFE)/ Intermediate Frequency (IF) of Software Defined Radio (SDR). This paper presents the principles of wave pipelining and the method for executing the computer algorithm named Coordinate Digital Rotation Digital Computer (CORDIC) using wave pipelining. Xilinx ISE 14.75 design suite is used as the software for simulation of the proposed system.

In our world, communication systems play an important role in day to day life. In wireless and wired communication systems, signals are to be upsampled at the transmitter. Digital up converter (DUC) is a sample rate conversion technique which is widely used to increase the sampling rate of an input signal. The digital up converter converts low sampled digital baseband signal to a pass band signal. In this paper, we are going to design and implement a low noise digital up converter on a FPGA (Field Programmable Gate Array). In digital up converter, the input signal is filtered and converted to higher sampling rate and then it is modulated with the carrier signal generated from the direct digital synthesizer (DDS). This system consists of a cascaded integrator comb (CIC) interpolation filter, cascaded integrator comb compensation filter, multiplier and a direct digital synthesizer. The cascaded integrator comb interpolation filter performs upsampling of the input signal and the cascaded integrator comb compensation filter is used to compensate the losses of CIC filter by filtering the input signal. The multiplier is used for multiplying the upsampled signal from CIC filter with the carrier signal generated from DDS and gives the DUC output. In this DUC, the input signal is upsampled at the rate of eight. Here, two digital up converters are used and connected with an adder in order to obtain a low noise output signal. The coding of this work is done in VHDL. The simulation and functional verification is carried out using Xilinx ISE and FPGA implementation is carried out using Virtex 5.

Simón Bolívar nació de un hogar aristócrata por lo cual tuvo una excelente educación, a pesar de la muerte de sus padres, cuando tenía 9 años. Uno de sus tutores fue Simón Rodríguez, quien lo introdujo al movimiento filosófico de aquella época. En 1799 viaja a España, para proseguir con su educación. Allí se casa en 1802 con María Teresa Rodríguez del Toro y Alayza, pero esta muere de fiebre amarilla al año siguiente, después de volver a Venezuela.

Quellen und Darstellungen zur hansischen Geschichte, 2023

Medieval towns were vibrant and complex social environments where diverse groups and lifestyles encountered and influenced each other. Surprisingly, in the study of urban archaeology, the aristocracy, one of the leading and most influential groups in medieval society, has so far been neglected. This book puts “aristocracy in towns” on the archaeological research agenda. The interdisciplinary and comparative study explores the significance and representation of aristocrats and their interaction with civic elites in sea-trading towns of the southwestern Baltic from the 12th to the 14th centuries. Essentially, however, the analysis of urban elite culture leads to discussion of a much more fundamental issue: the informative value of material culture for the investigation of social conditions. The book provides new archaeological approaches to the study of social differentiation in towns, and contributes to a deeper understanding of the complexity of urban social structures.