Iv - Semester, Ece List of Experiments

DEPARTMENT OF ELECTRONICS AND COMMUNICATION
ENGINEERING
EC 2258 LINEAR INTEGRATED CIRCUITS LAB
IV SEMESTER, ECE
LIST OF EXPERIMENTS:
DESIGN AND TESTING OF
1.
OPERATIONAL AMPLIFIER CHARACTERISTICS USING OP-AMP IC

LM/NE/A741
2.
INTEGRATOR AND DIFFERENTIATOR CIRCUITS USING OP-AMP IC

LM/NE/A741
3.
ACTIVE LOW PASS FILTER USING OP-AMP IC LM/NE/A741
4.
ACTIVE HIGH PASS FILTER USING OP-AMP IC LM/NE/A741
5.
ACTIVE BAND PASS FILTER USING OP-AMP IC LM/NE/A741
6.
ASTABLE MULTIVIBRATORS USING OP-AMP IC LM/NE/A741
7.
SCHMITT TRIGGER USING OP-AMP IC LM/NE/A741
8.
INSTRUMENTATION AMPLIFIER USING OP-AMP IC LM/NE/A741
9.
PHASE SHIFT OSCILLATOR USING OP-AMP IC LM/NE/A741
10.
WIEN BRIDGE OSCILLATOR USING OP-AMP IC LM/NE/A741
11.
MONOSTABLE USING OP-AMP IC LM/NE/A741
12.
PRECISION FULL WAVE RECTIFIER USING OP-AMP IC LM/NE/A741
13.
ASTABLE USING LM/NE/A555 TIMER IC
14.
MONOSTABLE USING LM/NE/A555 TIMER IC
15.
PLL CHARACTERISTICS USING PLL IC NE/LM565
16.
FREQUENCY MULTIPLIER USING PLL IC NE/LM565
17.
DC POWER SUPPLY USING REGULATOR IC LM317
18.
DC POWER SUPPLY USING REGULATOR IC LM723 (LOW VOLTAGE &

HIGH VOLTAGE TYPE)
Linear Integrated Circuits Lab
1 / 117
19.
STUDY OF SMPS (PULSE WIDTH MODULATION & LINEAR TYPE)
20.
STUDY OF FUNCTION GENERATOR IC 8038
21.
SIMULATION OF INSTRUMENTATION AMPLIFIER CIRCUIT BY USING

OP-AMP IN PSPICE NETLIST
22.
SIMULATION OF LOW PASS, HIGH PASS AND BAND PASS FILTER

CIRCUITS BY USING OP-AMP IN PSPICE NETLIST
23.
SIMULATION OF ASTABLE MULTIVIBRARTOR, MONOSTABLE

MULTIVIBRATOR AND SCHMITT TRIGGER CIRCUITS BY USING OPAMP IN PSPICE NETLIST
24.
SIMULATION OF WIEN BRIDGE AND RC PHASE SHIFT OSCILLATOR

CIRCUITS BY USING OP-AMP IN PSPICE NETLIST
25.
SIMULATION OF ASTABLE AND MONOSTABLE MULTIVIBRATOR

CIRCUITS BY USING TIMER CHIPS IN PSPICE NETLIST
2 / 117
OPERATIONAL AMPLIFIER CHARACTERISTICS

Exp. No
:1
Date
AIM:
To design and find the characteristics of operational amplifier circuits
i)
Inverting Amplifier
ii)
Non-inverting Amplifier
iii)
Input Offset Voltage
iv)
Input Offset Current
v)
Voltage Follower
vi)
Slew Rate
APPARATUS REQUIRED:
Sl. No:
Apparatus Name
Range
Qty.
1
2
Operational Amplifier
Resistors
IC 741
1 K
1
1
3
4
5
6
7
Bread Board
Regulated Power Supply
Function Generator
Cathode Ray Oscilloscope
Connecting Wires & CRO Probes
+ 15V, Dual
(1Hz 1MHz.)
20 / 40MHz, Dual Trace
1
1
1
1
THEORY:
Inverting Amplifier:
If the signal is applied to the inverting input terminal and the circuit is
shown in fig. This is most widely used of all the Op-amp circuits. The output voltage (V o) is fed
back to the inverting input terminal through the R f - R1 network where Rf is feedback resistor.
Input signal (Vi) is applied to the inverting input terminal through R 1 and the non-inverting input
terminal is grounded.
The gain of the inverting amplifier is
Gain (Av) = Vo / Vi =
- Rf
/ R1
Negative Sign indicates a phase shift of 180 between Vi and Vo.
3 / 117
Therefore Vo is equal to
Vo =
-(Rf
/ R1 )Vi
Non-inverting Amplifier:
If the signal is applied to the Non-inverting input terminal and the feedback is given shown in fig.
The circuit amplifies without inverting the input signal. Such a circuit is called Non-inverting
amplifier. It is also called as negative feedback system as output is being fed back to the inverting
terminal. The gain of the inverting amplifier is
Gain Av = Vo / Vi = 1 + (Rf / R1)
The gain can be adjusted to unity or more, by proper selection of resistors R f and R1. Therefore
Vo is equal to
Vo = [1
+ (Rf
/ R1)] Vi
Compared to the inverting amplifier, the input resistance of the Non-inverting amplifier
is high as the op-amp draws negligible current from the signal source.
Input Offset Voltage and Input Bias Current:

The input offset voltage can range from micro volts to milli volts and can be either
polarity. The Input Offset Voltages across R 1 and R2 should be same Voltages VR1= VR2. Bipolar
Op amps have lower offset voltages than JFET or CMOS types. The offset voltage is modeled in
series with one of the Op amp input terminals.
Depending on the type of input transistor, the bias current can flow in or out of the input
terminals. The input current is modeled as current sources, Ib1 and Ib2, in parallel with the
negative and positive input terminals respectively. The magnitudes can range from A down to
pA. Generally speaking, JFET or CMOS op amps have smaller bias currents than BJT types.
Although Ib1 and Ib2 are similar in magnitude, there not exactly the same. This average, called
the Average Input Bias current, is described by
Ib1= Input Offset Voltage across R1 / R1
2= Input Offset Voltage across R2 / R2
The average of theIbcurrent
entering in to the (-) input and (+) input is referred to as input bias
current. It is 200na maximum for IC 741.

Average Input Bias Current = [(Ib1) + (Ib2)] / 2
4 / 117
Voltage Follower:
Used as a buffer amplifier, to eliminate loading effects or to interface impedances
(connecting a device with a high source impedance to a device with a low input impedance)
Vo = Vi
Zin = infinitive. (Realistically, the differential input impedance of the op-amp itself, 1 M to 1 T)
In voltage follower, the output voltage is equal to input voltage both in magnitude and
phase. It is also defined as that the output voltage follows the input voltage exactly. It is also
referred as unity gain amplifier. If Rf = 0 and R1 = in the non inverting amplifier, we get the
modified circuit of voltage follower. It is used as buffer for impedance matching.
Slew Rate:
Slew rate is defined as the maximum rate of change of output voltage caused by a step
input voltage. Slew rate limits the response speed of all large signal wave shapes. Slew rate
causes remarkable distortion for non sinusoidal waveform of higher frequencies. Limitations in
slew rate capability can give rise to non linear effects in electronic amplifiers. It is usually
specified in V/ s.
SLEW RATE = 2fV (V/ s)
Where, f is frequency and V is amplitude of the signal.
PIN DIAGRAM:
Offset Null
No Connection
Inv. Input
+Vcc
Output
Offset Null
LM 741
Non Inv. Input
-Vcc
DESIGN & CALCULATIONS IF ANY:

Inverting Amplifier:
Non-inverting Amplifier:
5 / 117
For Gain of
For Gain of
Let, Ri = 1K
Let, Ri = 1K
Av = - (Rf / Ri)
Av = 1 + (Rf / Ri)
Rf =
Rf =
CIRCUIT DIAGRAM:
INVERTING AMPLIFIER
Rf =
+12V
Ri = 1K
2 LM741
3
+
4
FG, 1KHz
1V (p-p)
Sine I/P
Output
CRO
-12V
NON-INVERTING AMPLIFIER
Rf =
2 3 LM741
+
FG, 1KHz
1V (p-p)
Sine I/P
Output
CRO
Ri = 1K
+12V
-12V
6 / 117
INPUT OFFSET VOLTAGE & BIAS CURRENT
+12V
2
10K
Output
10K
VR1
LM741
VR2
-12V
VOLTAGE FOLLOWER
+12V
2 LM741
3 +
Output
CRO
FG, 1KHz
1V (p-p)
Sine I/P
-12V
SLEW RATE
3
100KHz & Above
1V (p-p)
Square I/P
+12V
LM741
Output
+
-12V
CRO
7 / 117
MODEL GRAPH:
1. Inverting Amplifier
2. Non-inverting Amplifier
Input Signal
Input Signal
Amplitude
(Volts)
Amplitude
(Volts)
Time (ms)
Time (ms)
Output Signal (amplified and out of phase)
Output Signal (amplified and in phase)
Amplitude
(Volts)
Amplitude
(Volts)
Time (ms)
Time (ms)
8 / 117
MODEL GRAPH:
4. Slew Rate
Input Signal
3. Voltage Follower
Amplitude
(Volts)
Input Signal
Amplitude
(Volts)
Time (ms)
Time (ms)
Output Signal (around 100 KHz Freq.)
Amplitude
(Volts)
Output Signal
(in phase and same magnitude)
Time (ms)
Time (ms)
Output Signal (above 100 KHz Freq.)

Amplitude
(Volts)
Time (ms)
9 / 117
TABULAR COLOUMN:
1. Inverting Amplifier:
Input Voltage (V)
Output Voltage (V)
Gain = - (Rf /Ri) Vin
Output Voltage (V)
Gain =[ 1 + (Rf /Ri)] Vin
2. Non-inverting Amplifier:
Input Voltage (V)
3. Input Offset Voltages and Input Offset Current:

Offset
Voltage
across R1
Offset Voltage
across R2
Input Bias
Current
(Ib1 / Ib-)
Input Bias
Current
(Ib2 / Ib+)
Avg. Bias Current =

[(Ib1) + (Ib2)] / 2
4. Voltage Follower:
Input Voltage (V)
Output Voltage (V)
Gain = Vout / Vin
Output Voltage (V)
Slew Rate = 2fV (V/ s)
5. Slew Rate:
Input Voltage (V)
10 / 117
PROCEDURE:
1. Inverting Amplifier:
i)
Connections are made as per circuit diagram.
ii)
Set sine wave input voltage at any fixed voltage and fixed frequency say, 1V (pp) and 1 KHz respectively.
iii)
Observe the input and output waveform simultaneously using Dual Trace CRO.
iv)
Tabulate the readings and verify it using theoretical calculations.
v)
Draw the input and output waveforms in Graph sheet.
2. Non-inverting Amplifier:
i)
ii)
Set sine wave input voltage at any fixed voltage and fixed frequency say, 1V
(p-p) and 1 KHz respectively.
iii)
iv)
Tabulate the readings and verify it using theoretical calculations.
v)
3. Input Offset Voltage and Input Offset Current:
i)
ii)
Measure the Input offset Voltages across the input resistance R1 and R2, which
are connected in input terminals of the Op-amplifier IC using DMM.
iii)
The Voltages across R1 and R2 are in range of some milli volts or microvolts.
iv)
Find the Input Bias Current using the Formula and tabulate the readings.
4.
Voltage Follower:
i)
ii)
Set sine wave input voltage at any fixed voltage and fixed frequency say, 1V
iii)
(Both input and output waveforms are should be same phase and same
magnitude)
iv)
5. Slew Rate:
i)
ii)
Set square wave input voltage at any fixed voltage and fixed frequency say, 1V
iii)
Vary the Frequency, at high frequency (around 100KHz and above) square wave
get change to Trapezoidal and further increase of frequency it change to triangle
waveform.
iv)
Calculate the Slew Rate from the waveform and verify it using theoretical
formula.
v)
RESULT:
11 / 117
VIVA VOCE:
1. What do you mean by input offset current and input offset voltage?
Input offset current:
The algebraic difference between the current into the inverting and non-inverting
terminals is referred to as input offset current Iio. Mathematically it is represented as Iio =
|IB+- IB-|
Where IB+ is the current into the non-inverting input terminals.
IB- is the current into the inverting input terminals.
Input offset voltage:
This is the voltage required to be amplified at the input for making output voltage
to zero volts.
2. For the difference amplifier shown in fig. Calculate Vc1 and Vc2 if V1 = V2 = 0V.Assume
Vbe = 0V.
Vcc=10V
1K
500
Ohm
1K
Vc1
Vc2
50 Ohm
V1
FG
V2
10K
Vee
-10V
3. In response to square wave input, the output of an op-amp changed from 3V to +3V over a
time interval of 0.25s. Determine the slew rate of the op-amp.
(May 06/08)
Slew rate = dvc/dt / max
= Vo/t
= 6V / 0.25S
= 24 V/S
4. What is an operational amplifier?
The operational amplifier is a multi-terminal device, which is quite complex
internally. An operational amplifier is a direct coupled high gain amplifier usually
consisting of one or more differential amplifiers and usually followed by a level translator
and an output stage. An operational amplifier is available as a single integrated circuit
package. It is a versatile device that can be used to amplify dc as well as ac input signals
and was originally designed for computing such mathematical functions.
5. Define CMRR of an operational amplifier?
The common mode rejection ratio (CMRR) can be defined as the ratio of differential
gain to common mode gain.
CMRR = |Ad/Ac|
12 / 117
6. Write down the characteristics of ideal operational amplifier?

a. Open loop voltage gain, (AOL) =
b. Input impedance (Ri) =
c. Output impedance (Ro) = 0
d. Bandwidth (BW) =
e. Zero offset Vo = 0, when V1 = V2 = 0
7. Define slew rate?
Slew rate can be defined as the maximum rate of change of output voltage of opamp with respect to time. It is expressed as S = (dVo / dt) max in V/Sec.
Where slew rate S = 2 f Vm in V/Sec.
8. What is the cause for slew rate and how it can be made faster?
There is a capacitor within or outside an op-amp to prevent oscillation. It is this
capacitor which prevents the output voltage from responding immediately to a fast
changing input .The slew rate can be made faster by having a higher current or a small
compensating capacitor.
9. What are the methods to improve slew rate?
The slew rate can be improved with higher closed-loop gain and dc supply
voltage. But the slew rate also varies with temperature. i.e., slew rate decreases with
increase in temperature.
Another method for improving slew rate is, the rate at which voltage across the capacitor
increases is gain by,dVc/dt = I / C.
Where, I is the maximum current furnished by the op-amp to the capacitor C.
From the equation it is clear that for a higher slew rate, op-amp should have either a
higher current or a small value of capacitor.
10. What are the AC characteristics of an op-amp?
i.
Frequency response
ii.
Slew rate
11. What are the DC characteristics of an op-amp? Give the typical values for an
IC741?
i.
ii.
iii.
iv.
Input bias current : 500 nA

Input offset current : 200 nA
Input offset voltage : 6mV
Thermal drift
13 / 117
INTEGRATOR AND DIFFERENTIATOR USING OP-AMP.
:2
Exp. No
Date
AIM:
To construct the Integrator and Differentiator circuits using Op-amp. IC and study
the output waveforms.
APPARATUS REQUIRED:
Sl. No:
1
2
3
4
5
6
7
8
Apparatus Name
Resistors
Capacitor
Bread Board
Function Generator
Range
IC 741
1 K
10 K
0.1F
+ 15V, Dual
(1Hz 1MHz.)
Qty.
1
2
1
1
1
1
1
THEORY:
Integrator produces a voltage output proportional to the product (multiplication) of
the input voltage and time; and the differentiator (not to be confused with differential)
produces a voltage output proportional to the input voltage's rate of change.
Differentiator:
Capacitance can be defined as the measure of a capacitor's opposition to changes in
voltage. The greater the capacitance, the more the opposition. Capacitors oppose voltage
change by creating current in the circuit: that is, they either charge or discharge in
response to a change in applied voltage. So, the more capacitance a capacitor has, the
greater its charge or discharge current will be for any given rate of voltage change across it.
The equation for this is quite simple:
i = C (dv/dt)
14 / 117
The dv/dt fraction is a calculus expression representing the rate of voltage changes
over time.
Capacitor current moves through the feedback resistor, producing a drop across it,
which is the same as the output voltage. A linear, positive rate of input voltage change will
result in a steady negative voltage at the output of the Op-amp. Conversely, a linear,
negative rate of input voltage change will result in a steady positive voltage at the output of
the op-amp. The faster the rate of voltage changes at the input (either positive or negative),
the greater the voltage at the output.
The formula for determining voltage output for the differentiator is as follows:
Vout = -RC d/dt (Vin)
Integrator:
Here, the op-amp circuit would generate an output voltage proportional to the
magnitude and duration that an input voltage signal has deviated from 0 volts. Stated
differently, a constant input signal would generate a certain rate of change in the output
voltage: differentiation in reverse. To do this, all we have to do is swap the capacitor and
resistor in the previous circuit:
A simple low pass RC circuit can also work as an Integrator when time constant is
very large. This requires very large values of R and C. The components R and C cannot be
made infinitely large because of practical limitations. However in the op-amp integrator by
Millers theorem, the effective input capacitance becomes Cf (1-Av), where Av is the gain of
the Op-amp. The Gain (Av) is the infinite for an ideal Op-amp, so the effective time
constant of the Op-amp Integrator becomes very large which results perfect integration.
The integrator produces a voltage output proportional to the product (multiplication) of the
input voltage and time
However, if we apply a constant, positive voltage to the input, the Op-amp output
will fall negative at a linear rate, in an attempt to produce the changing voltage across the
15 / 117
capacitor necessary to maintain the current established by the voltage difference across the
resistor. Conversely, a constant, negative voltage at the input results in a linear, rising
(positive) voltage at the output. The output voltage rate-of-change will be proportional to
the value of the input voltage.
The formula for determining voltage output for the integrator is as follows:

Integrator:
Differentiator:
CIRCUIT DIAGRAM:
16 / 117
IN T E G R A T O R C IR C U IT
0 .1 F
1 0 K
1 K
3
FG , 1 K H z
1 V (p -p )
S q u a r e I /P
+1 2 V
L M 7 4 1
O u tp u t
+
C R O
-1 2 V
1 K
DIFFE R E N T IA T O R C IR C U IT
10K
0 .1 F
2
3
FG , 1 K H z
1 V (p -p )
S q u a r e I /P
+12V
L M 741
O u tp u t
+
C R O
-1 2 V
1K
MODEL GRAPH:
17 / 117
Integrator
Differentiator
Input Signal (1 KHz Freq.)
Input Signal (1 KHz Freq.)
Amplitude
(Volts)
Amplitude
(Volts)
Time (ms)
Time (ms)
Output Signal (1 KHz Freq.)
Output Signal (1 KHz Freq.)
Amplitude
(Volts)
Amplitude
(Volts)
Time (ms)
Time (ms)
TABULAR COLOUMN:
INTEGRATOR
DIFFERENTIATOR
Input Signal
Output Signal
Amplitude
Time Period
Frequency
PROCEDURE:
18 / 117
1. Construct the circuit as per Circuit diagram shown in figure.

2. Select the Square waveform in Function Generator and set fixed amplitude and
fixed frequency say 1V (p-p) and 1 KHz respectively.
3. The resistance Rcomp is also connected to the Non-inverting input terminal to
minimize the effect of the input bias current.
4. Note the corresponding input and output signals (refer model graph) for both
Circuits.
5. Note the gain of the integrator decreases with increasing frequency.
6. Tabulate the noted readings and draw the input and output waveforms in Graph
sheet.
RESULT:
VIVA VOCE:
19 / 117
1. What are the main drawbacks of ideal differentiator?

At high frequency, differentiators may become unstable and break into oscillation. The
input impedance i.e. (1/C1) decreases with increase in frequency, thereby making the
circuit sensitive to high frequency noise.
2. What are the steps to be followed while designing a good differentiator?
Choose fa equal to highest frequency of the input signal. Assume a practical value of C1
(<1F) and then calculate Rf.
Choose fb=10fa (Say). Now calculate the values of R1 and C1.
R1C1 = RfCf.
3. What are the main drawbacks of ideal integrator circuit?
At low frequencies such as dc ( 0) the gain becomes infinite.
When the op-amp saturates i.e. the capacitor is fully charged it behaves like an open
circuit.
SECOND ORDER ACTIVE LOW PASS FILTER.

20 / 117
Exp. No
:3
Date
AIM:
To Design and Construct a second order low pass filter having upper cut off
frequency 1 KHz using Op-amp. IC and also determine its frequency response.
APPARATUS REQUIRED:
Sl. No:
1
2
Apparatus Name
Resistors
Range
IC 741
10 K
1.5 K
3
4
5
6
7
8
Capacitor
Bread Board
Function Generator
5.6 K
0.1F
+ 15V, Dual
(1Hz 1MHz.)
Qty.
1
1
2
1
2
1
1
1
1
THEORY:
An improved filter response can be obtained by using a Second order Active
Filter. A second order filter consists of two RC pairs and has a roll-off rate of -40
dB/decade. A general second order filter (Sallen Kay filter) is used to analyze
different LP, HP, BP and BSF. A first order filter can be converted to second order
type using an additional RC network as shown in circuit diagram. The cut off
frequency fH for the filter is now decided by R and C. The gain of the filter is usual
decided by op-amp i.e. the resistance R3 and Rf.

Given: fH = 1 KHz = 1/ (2RC)
Let C = 0.1 F, R = 1.6 K
For n = 2, (damping factor) = 1.414,
21 / 117
Pass Band Gain = Ao = 3 - =3 1.414 = 1.586.

Transfer function of second order Butter worth LPF as:
1.586
H(s) = -------------------------------------S2 + 1.414 s + 1
Now
Ao = 1 + (Rf / R1) = 1.586 = 1 + 0.586
Let Ri = 10 K, then Rf = 5.86 K
CIRCUIT DIAGRAM:
SECOND ORDER ACTIVE LOW PASS FILTER
Rf = 5.6 K
R1= 10 K
2
R = 1.5K
Ri = 1.5K
+12V
LM741
Output
+
-12V
4
(1Hz - 100 KHz)

1V (p-p)
Sine I/P
0.1F
CRO
0.1F
MODEL GRAPH:
Gain in dB
3dB
22 / 117
(fH = Cut off Freq.) Log Frequencies in Hz.
TABULAR COLOUMN:
Sl.No.
1
Frequency (Hz)
Vin
Vout (V)
Gain = Vo / Vin
Gain in dB = 20 log Gain
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PROCEDURE:
2. Select the Sine waveform in Function Generator and set fixed amplitude and fixed
frequency say 1V (p-p) and 1 KHz respectively.
23 / 117
3. Observe the output waveform for different frequency ranges (start from 50 Hz to
beyond some value of cut of frequency)
4. Note the readings observed on CRO and find its gain for different frequency ranges.
5. Draw the graph for its Gain in dB Vs. Frequency and find its Cut off frequency.
RESULT:
VIVA VOCE:
1. What are the main drawbacks of ideal differentiator?
At high frequency, differentiators may become unstable and break into oscillation. The
input impedance i.e. (1/C1) decreases with increase in frequency, thereby making the
circuit sensitive to high frequency noise.
24 / 117
2. What are the steps to be followed while designing a good differentiator?

Choose fa equal to highest frequency of the input signal. Assume a practical value of C1
(<1F) and then calculate Rf.
Choose fb=10fa (Say). Now calculate the values of R1 and C1.
R1C1 = RfCf.
3. What are the main drawbacks of ideal integrator circuit?
At low frequencies such as dc ( 0) the gain becomes infinite.
When the op-amp saturates i.e. the capacitor is fully charged it behaves like an open
circuit.
SECOND ORDER ACTIVE HIGH PASS FILTER.

Exp. No
:4
25 / 117
Date
AIM:
frequency 1 KHz using Op-amp. IC and also determine its frequency response.
APPARATUS REQUIRED:
Sl. No:
1
2
Apparatus Name
Resistors
3
4
5
6
7
8
Capacitor
Bread Board
Function Generator
Range
IC 741
0.1F
+ 15V, Dual
(1Hz 1MHz.)
Qty.
1
2
1
1
1
1
THEORY:
different LP, HP, BP and BSF. A first order filter can be converted to second order
type using an additional RC network as shown in circuit diagram. The cut off
frequency fL for the filter is now decided by R and C. The gain of the filter is usual
decided by op-amp i.e. the resistance R3 and Rf.

Given: fL = 1 KHz = 1/ (2RC)
Let C = 0.1 F, R = 1.6 K
For n = 2, (damping factor) = 1.414,
Pass Band Gain = Ao = 3 - =3 1.414 = 1.586.
26 / 117
Transfer function of second order Butter worth HPF as:

1.586
H(s) = -------------------------------------S2 + 1.414 s + 1
Now
Ao = 1 + (Rf / R1) = 1.586 = 1 + 0.586
Let Ri = 10 K, then Rf = 5.86 K
CIRCUIT DIAGRAM:
SECOND ORDER ACTIVE HIGHPASS FILTER CIRCUIT DIAGRAM
R 3=1K
R f=10K
+12V
+Vcc
INV 2
C=0.1F
NI
741
O/P
C=0.1F
FG
R =
(1Hz-1MHz)
R =
-Vcc
-12V
CRO
MODEL GRAPH:
Gain in dB
3dB
27 / 117
(fL = Cut off Freq.)
Log Frequencies in Hz.
TABULAR COLOUMN:
Sl.No.
1
Frequency (Hz)
Vin
Vout (V)
Gain = Vo / Vin
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PROCEDURE:
beyond some value of cut of frequency, observe the output signal which pass beyond
the higher cut of frequency)
28 / 117
RESULT:
ACTIVE BAND PASS FILTER.

Exp. No
:5
Date
AIM:
frequency 400 Hz and lower cut of frequency for 2 KHz using Op-amp. IC and also
determine its frequency response.
APPARATUS REQUIRED:
29 / 117
Sl. No:
1
2
Apparatus Name
Resistors
Range
3
4
5
6
7
8
Capacitor
Bread Board
Function Generator
IC 741
0.1F
+ 15V, Dual
(1Hz 1MHz.)
Qty.
1
2
1
1
1
1
THEORY:
different LP, HP, BP and BSF. Band pass filter is a combination of High pass and
Low pass filter. A Band pass filter is basically a frequency selector. It allows one
particular band of frequencies to pass. Its pass band between two cut off frequencies
fH and fL. The pass band which is between fH and fL is called Bandwidth of the filter
denoted as BW.
DESIGN &
ANY:
Bandwidth = fH - fL
CALCULATIONS IF
Given: fH = 400Hz = 1/ (2RC)

Let C = 0.1 F, R =
Similarly, for LPF
fL = 2KHz = 1/ (2RC)
Let C = 0.1 F, R =
30 / 117
CIRCUIT DIAGRAM:
ACTIVE BANDPASS FILTER CIRCUIT DIAGRAM
R 3=1K
R 4=1K
R f=10K
R f=10K
+12V
+Vcc
7
+12V
+Vcc
741
R 2=
INV 2
O/P
NI 3
4
NI 3
INV 2
C1=0.1F
FG
R 1=
C2=0.1F
(1Hz-1MHz)
-Vcc
-12V
MODEL GRAPH:
Gain in dB
3 dB
Pass Band
(fL = Cut off Freq.)
(fH = Cut off Freq.)
O/P
-Vcc
-12V
741
Log Freq. in Hz.
31 / 117
CRO
TABULAR COLOUMN:
Sl.No.
1
Frequency (Hz)
Vin
Vout (V)
Gain = Vo / Vin
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PROCEDURE:
beyond some value of cut of frequency, observe the output signal which pass beyond
the higher cut of frequency and it attenuates from lower cut of frequency)
32 / 117
RESULT:
VIVA VOCE:
1. State the disadvantages of passive filters?
At audio frequencies inductors becomes problematic, as the inductors become
large, heavy and expensive. For low frequency application, more number of turns of
wire must be used which in turn adds to the series resistance degrading inductors
performance.
2. Derive the expression for voltage gain of an inverting operational amplifier?
ACL = Vo/Vi = -Rf / R1
ASTABLE MULTIVIBRATOR USING OP-AMP IC

Exp. No
:6
Date
AIM:
To Design and Construct an Astable Multivibrator using Op-amp 741 IC.
APPARATUS REQUIRED:
Sl. No:
1
2
Apparatus Name
Resistors
IC 741
1 K
Range
Qty.
1
2
4.7 K
33 / 117
Capacitor
4
5
6
7
Bread Board
0.1 F
+ 15V, Dual
1
1
1
THEORY:
A simple op-Amp square wave generator is also called as free running oscillator; the
principle of generation of square wave output is to force an op-amp to operate in the
saturation region. A fraction =R2/(R1+R2) of the output is fed back to the (+) input
terminal. The output is also fed to the (-) terminal after integrating by means of a low pass
RC combination in Astable Multivibrator both the states are quasi stables.
The frequency is determined by the time taken by the capacitor to charge from -Vsat to
+Vsat.
CIRCUIT DIAGRAM:
SQUARE WAVE GENERATOR
Rf = 4.7 K
2
3
+12V
LM741
Output
+
-12V
1K
0.1F
CRO
1K
34 / 117
MODEL GRAPH:
+ Vsat
+ Vsat
Amplitude
(V)
Time (ms)
- Vsat
- Vsat
Time

Let R1=R2=1K then,
= R2 / (R1+R2)
= 1K / (1K+1K)
= 0.5
Given, Frequency say 1KHz then T = 1ms.
Let C = 0.1F.
T = 2RC ln[(1+) / (1-)]
1ms = 2*R*0.1* ln[(1+0.5) / (1-0.5)]
R = 4.7 K
35 / 117
TABULAR COLOUMN:
OUTPUT WAVEFORM AT PIN NO: 6
Square wave Signal
WAVEFORM ACROSS CAPACITOR

Ramp wave Signal
Amplitude (V)
Amplitude (V)
Time Period
(Ton+Toff)
Time Period
(Ton+Toff)
Frequency (1/T)
Frequency (1/T)
PROCEDURE:
2. Switch ON the RPS and CRO.
3. Observe the Square waveform at output pin of the IC and Ramp waveform across
the capacitor.
4. Note the readings and draw the waveforms in Graph Sheet.
5. Verify the observed frequency with our calculated frequency.
36 / 117
RESULT:
SCHMITT TRIGGER
Exp. No
:7
Date
AIM:
To Construct Schmitt Trigger Circuit using Operational Amplifier 741 IC and
determine its Upper and Lower Threshold Voltages.
APPARATUS REQUIRED:
Sl. No:
1
2
3
4
Apparatus Name
Resistors
Function Generator
Bread Board
Range
IC 741
2.2 K
Qty.
1
1
220
(1Hz 1MHz.)
1
1
37 / 117
5
6
7

+ 15V, Dual
1
1
THEORY:
Schmitt trigger is useful in squaring of slowly varying i/p waveforms. Vin is
applied to inverting terminal of Op-amp. Feedback voltage is applied to the noninverting terminal. LTP is the point at which output changes from high level to low
level. This is highly useful in triangular waveform generation, wave shape pulse
generator, A/D converter etc.
CIRCUIT DIAGRAM:
SCHMITT TRIGGER CIRCUIT
2
3
FG, 1KHz
4V (p-p)
SineI/P
+12V
LM741
Output
+
-12V
2.2K
CRO
220
220

38 / 117
VUT = (R1 / (R1+R2)) * (+Vsat)

VLT = (R1 / (R1+R2)) * (-Vsat)
+Vsat = +Vcc = +15V and -Vsat = -Vcc = -15V
Let R1 = 2.2 K and R2=220 then
VUT = (2.2K / (2.2K+220)) * (+15)
VLT = (2.2K / (2.2K+220)) * (-15)
MODEL GRAPH:
Input Waveform:
Amplitude
VUT
Time (ms)
VLT
Vsat
Amplitude
39 / 117
Time (ms)
Vsat
TABULAR COLOUMN:
INPUT WAVEFORM
OUTPUT WAVEFORM
Sine wave Signal
Square wave Signal
Amplitude (V)
Amplitude (V)
Time Period (ms)
Time Period (ms)
Theoretically
VUT =
VLT =
Practically
VUT =
VLT =
PROCEDURE:
2. Switch ON the Equipments and set 4V (p-p), 1 KHz sine wave in Function
Generator.
40 / 117
3. Observe the Input and Output waveforms and find its Upper Threshold and Lower
Threshold Voltages and verify its values with theoretical calculation.
RESULT:
VIVA VOCE:
1. Mention two linear and two non- linear operations performed by an operational amplifier?
Linear operations: Adder, Subtractor, Voltage to current converter, Current to voltage
converter, Instrumentation amplifier, Analog computation, and Power amplifier.
Non-linear operations: Rectifier, Peak detector, Clipper, Clamper, Sample and hold
circuits, Log and antilog amplifier and Multiplier.
2. Mention two application of Schmitt trigger?
For eliminating comparator chatter.
In ON/ OFF controller.
Square wave generation
41 / 117
INSTRUMENTATION AMPLIFIER
Exp. No
:8
Date
AIM:
To design and construct Instrumentation Amplifier Circuit using Op-amp IC.
APPARATUS REQUIRED:
Sl. No:
1
2
Apparatus Name
Resistors
3
4
5
6
Bread Board
Regulated Power Supply (Variable)
Multimeter
Range
IC 741
10 K
+ 15V, Dual
Qty.
3
7
1
4
1
THEORY:
42 / 117
An instrumentation amplifier is a type of differential amplifier that has been

specifically designed to have characteristics suitable for use in measurement and test
equipment. These characteristics include very low DC offset, low drift, low noise, very high
open-loop gain, very high common-mode rejection ratio, and very high input impedances.
They are used where great accuracy and stability of the circuit both short- and long-term
are required.
The most commonly used instrumentation amplifier circuit is shown in the figure. The gain
of the circuit is
The ideal common-mode gain of an instrumentation amplifier is zero. In the circuit shown,
common-mode gain is caused by mismatches in the values of the equally numbered resistors
and by the non-zero common mode gains of the two input op-amps. Obtaining very closely
matched resistors is a significant difficulty in fabricating these circuits, as is optimizing the
common mode performance of the input op-amps.
Let R1= R2 = R3 = Rgain = 10 K then

Vout = (1+2) (V2-V1)
Vout = 3 (V2-V1)
43 / 117
CIRCUIT DIAGRAM:
INSTRUMENTATION AMPLIFIER USING 741 IC.
10K
+12V
10K
7
2
LM74 1
10K
+12V
10K
2
-12V
LM741
10K
Output
10K
-12V
+12V
10K
DMM
LM74 1
+
4
-12V
44 / 117
TABULAR COLOUMN:
INPUTS
OUTPUT
SL.NO.
V1 (V)
V2 (V)
Theoretically (V)
Practically (V)
1
2
3
4
5
6
7
PROCEDURE:
2. Switch ON IC Power Supplies and apply the Input Voltages at Non-inverting input
terminals.
3. Observe the Output Voltage using Digital Multimeter for different input voltages.
4. Note the readings and verify its values with theoretical calculation.
RESULT:
45 / 117
RC PHASE SHIFT OSCILLATOR USING OP-AMP 741 IC.

Exp. No
:9
Date
AIM:
To Design and construct RC Phase Shift Oscillator Circuit using IC 741 and observe
its output waveform.
APPARATUS REQUIRED:
Sl. No:
1
2
Apparatus Name
Resistors
3
4
5
6
7
Capacitor
Bread Board
Range
IC 741
0.1F
+ 15V, Dual
Qty.
1
3
1
1
1
THEORY:
A phase shift oscillator is a simple sine wave electronic oscillator. It contains an
inverting amplifier, and a feedback filter, which 'shifts' the phase by 180 degrees at the
oscillation frequency.
The filter must be designed so that at frequencies above and below the oscillation
frequency, either more or less than 180 degrees shifts the signal. This results in constructive
superposition for signals at the oscillation frequencies, and destructive superposition for all
other frequencies.
The mathematics for calculating the oscillation frequency and oscillation criteria for this
circuit are surprisingly complex, due to each R-C stage loading the previous ones. The
46 / 117
calculations are greatly simplified by setting all the resistors (except the negative feedback
resistor) and all the capacitors to
Given Frequency = 1 KHz

Let C = 0.1F and
R = 1 / (2 * 0.1 * (6) 1/2 * 1K)
R1 = 10R and
Rf = 29R1 or greater.
CIRCUIT DIAGRAM:
47 / 117
RC PHASE SHIFT OSCILLATOR CIRCUIT
Rf > 29 R1
2
3
+12V
LM741
Output
+
CRO
-12V
R1 = 10 R
C = 0.1F
R=
C = 0.1F
R=
C = 0.1F
R=
MODEL GRAPH:
Amplitude
(V)
Time (ms)
TABULAR COLOUMN:
48 / 117
Output signal is
Sine wave form
AMPLITUDE (V)
TIME PERIOD (ms)
FREQUENCY (Hz)
Theoretical
Observed value
PROCEDURE:
2. Switch On the Equipments and observe the Output waveform on CRO.
3. Note the readings and verify its frequency with theoretical frequency.
4. Draw the waveform on Graph Sheet.
RESULT:
WIEN BRIDGE OSCILLATOR USING OP-AMP 741 IC.
49 / 117
Exp. No
: 10
Date
AIM:
To Design and construct Wien Bridge Oscillator Circuit using IC 741 and observe its
output waveform.
APPARATUS REQUIRED:
Sl. No:
1
2
Apparatus Name
Resistors
3
4
5
6
7
Capacitor
Bread Board
Range
IC 741
0.1F
+ 15V, Dual
Qty.
1
2
1
1
1
THEORY:
A Wien bridge oscillator is a type of electronic oscillator that generates sine waves
without having any input source. It can output a large range of frequencies. The bridge
comprises four resistors and two capacitors. The circuit is based on a network originally
developed by Max Wien in 1891.
In Wien bridge oscillator, wien bridge circuit is connected between the amplifier
input terminals and output terminals. The bridge has a series RC network in one arm and
parallel network in the adjoining arm. In the remaining 2 arms of the bridge resistors
R1and Rf are connected. To maintain oscillations total phase shift around the circuit must
be zero and loop gain unity. First condition occurs only when the bridge is balanced.
Assuming that the resistors and capacitors are equal in value, the resonant frequency of
balanced bridge is given by / the frequency of oscillation is given by:
50 / 117

Given Frequency = 1 KHz
Let C = 0.1F and
R = 1 / (2 * 0.1 * 1K)
R1 = 10R and
Rf = 2R1 or greater.
CIRCUIT DIAGRAM:
51 / 117
WEIN BRIDGE OSCILLATOR CIRCUIT

Rf = 2 R1
R1 = 10 R
2
3
+12V
LM741
Output
+
-12V
4
CRO
R=
R=
C = 0.1F
C = 0.1F
MODEL GRAPH:
Amplitude
(V)
Time (ms)
TABULAR COLOUMN:
Input signal is
Sine wave form
AMPLITUDE (V)
TIME PERIOD (ms)
FREQUENCY (Hz)
52 / 117
Theoretical
Observed value
PROCEDURE:
3. Note the readings and verify its frequency with theoretical frequency.
4. Draw the waveform on Graph Sheet.
RESULT:
VIVA VOCE:
1. What are the conditions to be satisfied for sustained oscillation?

The magnitude conditions are |AV| = 1
53 / 117
AV = 0o or 360o
2. Why there is no phase shift provided in the feedback network in Wein-Bridge oscillator?
(Apr 2005)
In Wein-bridge oscillator, the feedback signal is connected to the (+) input terminal so
that, the op-amp is working as a non-inverting amplifier, which produces 0 degree or 360
degree phase shift.. Therefore the feedback network need not provide any phase shift.
MONOSTABLE MULTIVIBRATOR USING OP-AMP IC

Exp. No
: 11
Date
AIM:
54 / 117
To Design and Construct a Monostable Multivibrator using Op-amp 741 IC. Draw
its input and output signals.
APPARATUS REQUIRED:
Sl. No:
1
2
Apparatus Name
Resistors
Capacitor
4
5
6
7
8
Diode
Bread Board
Range
IC 741
0.1 F
1N 4007
+ 15V, Dual
Qty.
1
1
2
1
1
1
THEORY:
Monostable multivibrator (MMV) has one stable state and one quasi-stable state.
The circuit remains in its stable state till an external triggering pulse causes a transition to
the quasi-stable state. The circuit comes back to its stable state after a time period T. Thus
it generates a single output pulse in response to an input pulse and is referred to as a oneshot or single shot.
Monostable multivibrator circuit illustrated in figure is obtained by modifying
the astable multivibrator circuit by connecting a diode D1 across capacitor C so as to
clamp vc at vd during positive excursion.
Under steady-state condition, this circuit will remain in its stable state with the
output VOUT = +VOUT or +Vz and the capacitor C is clamped at the voltage VD(on-voltage of
diode VD = 0.7 V). The voltage V D must be less than VOUT for Vin < 0. The circuit can be
switched to the other state by applying a negative pulse with amplitude greater than
VOUT VD to the non-inverting (+) input terminal.
When a trigger pulse with amplitude greater than V OUT VD is applied, Vin goes
positive causing a transition in the state of the circuit to -Vout. The capacitor C now
charges exponentially with a time constant = RfC toward V OUT (diode Dl being reversebiased). When capacitor voltage Vc becomes more negative than VOUT, Vin becomes
negative and, therefore, output swings back to + VOUT (steady- state output). The capacitor
now charges towards + VOUT till Vc attain VD and capacitor C becomes clamped at VD. The
55 / 117
trigger pulse, capacitor voltage waveform and output voltage waveform are shown in
figures respectively.
The width of the trigger pulse T must be much smaller than the duration of the
output pulse generated i.e. TP T. For reliable operation the circuit should not be triggered
again before T.
CIRCUIT DIAGRAM:
MONOSTABLE MULTIVIBRATOR USING OP-AMP IC CIRCUIT DIAGRAM
D 1
R 3=2K2
C1=0.1F1
+12V
+Vcc
D 2
INV 2
NI
741
O/P
C2=10nF
R 4=1K
FG
-Vcc
-12V
R 1=10K
CRO
(1Hz-1MHz)
R 2=10K

During the quasi-stable state, the capacitor voltage is given as
Vc = VOUT + (VOUT + VD)e-t/
At instant t = T,
Vc = VOUT
So - VOUT =- VOUT + (VOUT + VD) e-T/ or

T = RfC loge (1 + VD/VOUT)/ 1-
56 / 117
Usually VD << VOUT and if R2 = R3 so that if = R3/(R2+R3) = then,

T = RfC loge 2 = 0.693 Rf C
MODEL GRAPH:
Input
Amplitude
(V)
Time (ms)
Output
Tp
Time (ms)
TABULAR COLOUMN:
Square wave Signal
WAVEFORM ACROSS CAPACITOR C1

Sweep wave Signal
Amplitude (V)
Amplitude (V)
Time Period
(Ton+Toff)
Time Period
(Ton+Toff)
57 / 117
Time Constant (TP)
Time Constant (TP)
PROCEDURE:
2. Switch ON the RPS and CRO.
3. Observe the Square waveform at output pin of the IC and Ramp waveform across
the capacitor.
5. Verify the observed frequency with our calculated frequency.
RESULT:
VIVA VOCE:
1. Why is the monostable multivibrator circuit called time delay circuit and gating circuit?
Monostable multivibrator circuit called time delay circuit because it generates a fast
transition at a predetermined time T after the application of input trigger. It is called as a
gating circuit because it generates rectangular waveform at a definite time and could be used
as gate parts of a system.
58 / 117
PRECISION FULL WAVE RECTIFIER USING OP-AMP.

Exp. No
: 12
Date
AIM:
To Construct a Precision Full wave Rectifier using Op-amp IC. Draw its input and
output waveforms.
APPARATUS REQUIRED:
59 / 117
Sl. No:
1
2
Apparatus Name
Resistors
3
4
5
6
7
Bread Board
Function Generator
IC 741
10 K
Range
Qty.
2
1
+ 15V, Dual
(1Hz 1MHz.)
1
1
1
1
THEORY:
The super diode or precision rectifier is a configuration obtained with an
operational amplifier in order to have a circuit behaving like an ideal diode or
rectifier. It can be useful for high-precision signal processing.
In this case, when the input is greater than zero, D2 is ON and D1 is OFF, so
the output is zero. When the input is less than zero, D2 is OFF and D1 is ON, and the
output is like the input with an amplification of R2 / R1.
CIRCUIT DIAGRAM:
60 / 117
PRECISION FULL WAVE RECTIFIER CIRCUIT
D1
1N4007
+12V
7
2
3
LM741
4
FG, 1KHz
1V (p-p)
Sine I/P
6
3
+
-12V
10 K
D2
1N4007
+12V
LM741
Output
-12V
4
10 K
10 K
10 K
CRO
10 K
MODEL GRAPH:
Input Waveform:
Amplitude
(V)
Time (ms)
Time
61 / 117
Output waveform:
Amplitude
(V)
Time (ms)
Time
TABULAR COLOUMN:
INPUT WAVEFORM
OUTPUT WAVEFORM
Sine wave Signal
Consecutive Positive Cycles
Amplitude (V)
Amplitude (V)
Time Period (ms)
Time Period (ms)
PROCEDURE:
2. Switch On the Equipments and Set the Sine wave input signal for 1KHz
and 1V(p-p).
3. Observe the input and output waveforms on CRO.
4. Draw the waveforms on Graph Sheet.
62 / 117
RESULT:
VIVA VOCE:
1. Give the output voltage when Vi is positive and negative in a precision diode.
When Vi is positive, diode D1 conducts causing V0 to negative by one diode drop
(Vr =0.6v). Hence, diode D2 is reverse biased. The output voltage V0 is zero.
When Vi is negative ie Vi < 0, diode D2 conducts D1 is off. The negative input V i
forces the op-amp circuit VON positive and causes D2 to conduct. Output V0 becomes
positive.
2. What is Precision rectifier?
It is a rectifier circuit which utilities precision diode instead of usual diodes for
rectification purpose in order to operate them for cut-in voltages in the order of microvolt.
3. Define precision half wave rectifier with diagram?
It is defined as a circuit, which utilizes two precision diodes instead of usual
diodes for rectification purpose in order to operate them for, cut in voltages in the order of
micro volts.
63 / 117
Rf
D1
1
Rl
Rl
7
R comp
2
3
V1
4. Give the output voltage when Vi is positive and negative in a precision diode.
When Vi is positive, diode D1 conducts causing V0 to negative by one diode drop
(Vr =0.6v). Hence, diode D2 is reverse biased. The output voltage V0 is zero.
When Vi is negative ie Vi < 0, diode D2 conducts D1 is off. The negative input V i
forces the op-amp circuit VON positive and causes D2 to conduct. Output V0 becomes
positive.
ASTABLE MULTIVIBRATOR USING 555 TIMER IC.

Exp. No
: 13
Date
AIM:
To Design and construct Astable Multivibrator using 555 IC. Draw its output
waveforms.
APPARATUS REQUIRED:
Sl. No:
1
2
Apparatus Name
555 Timer IC
Resistors
Range
NE 555
Qty.
1
64 / 117
3
4
5
6
7
Bread Board
Capacitor
+ 15V, Dual
0.1 F, 0.01 F
1
1
1
1
THEORY:
The IC555 timer is an 8 pin IC that can be connected to external components for Astable
operation. The simplified block diagram is drawn. The OP-AMP has threshold and control
inputs. Whenever the threshold voltage exceeds the control voltage, the high output from
the OP AMP will set the flip-flop. The collector of discharge transistor goes to pin 7. When
this pin is connected to an external trimming capacitor, a high Q output from the flip flop
will saturate the transistor and discharge the capacitor. When Q is low the transistor opens
and the capacitor charges.
The complementary signal out of the flip-flop goes to pin 3 and output. When
external reset pin is grounded it inhibits the device. The on off feature is useful in many
application. The lower OP- AMP inverting terminal input is called the trigger because of
the voltage divider. The non-inverting input has a voltage of +Vcc/3, the OP-Amp output
goes high and resets the flip flop.

Frequency of Oscillation = 1 / [(Ra+2Rb)*C)]
Let C= 0.1 F and say Frequency = 1KHz.
65 / 117
PIN DIAGRAM:
Ground
+Vcc
Trigger
Discharge
NE 555
Output
Threshold
Reset
Control Input
CIRCUIT DIAGRAM:
66 / 117
ASTABLE MULTIVIBRATOR USING 555 IC.

+VCC = 10V
Ra
OUTPUT
IC 555
Rb
CRO
6
C = 0.1F
5
1
0.1F
MODEL GRAPH:
+ Vsat
+ Vsat
Amplitude
(V)
Time (ms)
- Vsat
- Vsat
Time
67 / 117
TABULAR COLOUMN:
Square wave Signal
WAVEFORM ACROSS TIMING

CAPACITOR
Ramp wave Signal
Amplitude (V)
Amplitude (V)
Time Period
(Ton+Toff)
Time Period
(Ton+Toff)
Frequency (1/T)
Frequency (1/T)
PROCEDURE:
RESULT:
VIV VOCE:
68 / 117
1. List the application of 555 Timer?

A 555 timer IC is a circuit capable of producing timing intervals therefore it finds
application where timing intervals are required if basic application are as follows
iii.
Monostable multivibrator.
iv.
Astable multivibrator
v.
Bistable multivibrator
vi.
Schmitt trigger
vii.
Voltage controlled oscillator.
2. What is the frequency of the output wave form of an astable multivibrator using timer
555?
f = 1.45 / (RA+RB) C
where RA and RB are timing resistors and C is timing capacitor.
MONOSTABLE MULTIVIBRATOR USING 555 IC.

69 / 117
Exp. No
: 14
Date
AIM:
To Construct Monostable Multivibrator using 555 IC. Draw its input and output
waveforms.
APPARATUS REQUIRED:
Sl. No:
Apparatus Name
1
555 Timer IC
2
Resistors
3
4
5
6
7
8
Capacitor
Bread Board
Function Generator
Range
Qty.
NE 555
10K
0.1 F, 0.01 F
1 each
1
1
1
1
+ 15V, Dual
(1Hz 1MHz.)
THEORY:
A Monostable Multivibrator has one stable state and a quasistable state. When it is
triggered by an external agency it switches from the stable state to quasistable state and
returns back to stable state.
The time during which it states in quasistable state is
determined from the time constant RC. When a continuous pulse triggers it it generates a
square wave. A pair of regeneratively coupled active devices, resistance devices and opamps can realize Monostable Multi vibrator.

Tp = Stable Pulse width = 1.1 *R*C
Let C = 0.1F and R= 10K
70 / 117
Then, Tp =
MODEL GRAPH:
Input
Amplitude
(V)
Time (ms)
Output
Tp
Time (ms)
CIRCUIT DIAGRAM:
71 / 117
MONOSTABLE MULTIVIBRATOR USING 555 IC.

+VCC = 10V
OUTPUT
IC 555
CRO
5
2
C = 0.1F
0.01F
Square I/P
TABULAR COLOUMN:
INPUT WAVEFORM
OUTPUT WAVEFORM
Square wave Signal
Tp =
Amplitude
Output Pin No. 3
Time Period
Across Capacitor
PROCEDURE:
72 / 117

and 1V(p-p).
RESULT:
CHARACTERISTICS OF PLL.
73 / 117
Exp. No
: 15
Date
AIM:
To construct and study the operation of PLL IC 565 and determine its
Characteristics.
Apparatus Required:
S.No
1
2
3
4
5
6
Components
IC 565
Resistors
Capacitors
Function Generator
C.R.O
Dual Power Supply
Range
6.8 K
0.001 F
0.1 F, 1 F
(1Hz 1MHz.)
0- 30 V
Quantity
1
1
1 each
1
1
1
Circuit Diagram:
74 / 117
PLL CHARACTERISTICS USING LM565 IC CIRCUIT DIAGRAM
Rt=6.8K
C2=1F
+6V
C1=0.01F
10
FG
LM565
(1Hz-1MHz)
6
5
Reference O/P
VCO O/P (Fo)
9
Ct=0.001F
Demodulated O/P
-6V
Pin Diagram (IC 565 - PLL)
75 / 117
-Vcc
14 No Connection
Input
13 No Connection
Input
12 No Connection
VCO Output 4
NE 565
11 No Connection
Phase Comparator VCO Input
10 +Vcc
Reference Output
External Capacitor for VCO
Demodulated Output
External Resistor for VCO
Procedure:
The connections are given as per the circuit diagram.
Measure the free running frequency of VCO at pin 4, with the input signal Vi set equal
to zero. Compare it with the calculated value = 0.25 / (RT CT).
Now apply the input signal of 1 VPP square wave at a 1 KHz to pin 2. Connect one
channel of the scope to pin 2 and display this signal on the scope.
Gradually increase the input frequency till the PLL is locked to the input frequency.
This frequency f1 gives the lower end of the capture range. Go on increasing the input
frequency, till PLL tracks the input signal, say, to a frequency f2.This frequency f2 gives
the upper end of the lock range. If input frequency is increased further, the loop will get
unlocked.
Now gradually decrease the input frequency till the PLL is again locked. This is the
frequency f3, the upper end of the capture range. Keep on decreasing the input frequency
until the loop is unlocked. This frequency f4 gives the lower end of the lock range.
The lock range fL = (f2 f4). Compare it with the calculated value of 7.8 fo /12.
Also the capture range is fc = (f3 f1).Compare it with the calculated value of capture
range.
fc = (fL / (2)(3.6)(103) C)1/
TABULAR COLOUMN:
76 / 117
INPUT WAVEFORM
OUTPUT WAVEFORM
Square wave Signal
Square wave Signal with Multiple Freq.
Amplitude (V)
Amplitude (V)
Time (ms)
Time (ms)
Frequency (Hz)
Frequency (Hz)
Model Graph
Vc
Slope =1/Kv
fo- fL
fo- fc
fo
fo+ fc
fo+fL IB
2fc = Capture range
2fL = Lock- in range
Result :
FREQUENCY MULTIPLIER USING PLL.

77 / 117
Exp. No
: 16
Date
AIM:
To construct and study the operation of frequency multiplier using IC 565.
Apparatus Required:
S.No
Components
1
2
IC 565,IC 7490,2N2222
Resistors
Capacitors
4
5
6
7.
FunctionGenerator (Digital)
C.R.O
Dual Power Supply
Range
20 K, 2k,
4.7k,10k
0.001 F
10 F
1 Hz 2 MHz
0- 30 V
Quantity
1
1
1 each
1
1
1
THEORY:
The circuit diagram of a Frequency multiplier using PLL is shown in Figure. A
divide by N network is inserted between VCO Output and Phase comparator input. In
the locked stste, the VCO output frequency fO is given by,
fO = N f S
The multiplication factor can be obtained by selecting a proper scaling factor N of
the counter. Frequency multiplication can also be obtained by using PLL in its
harmonic locing mode.
The output of VCO is given by,
f O = fS / m
CIRCUIT DIAGRAM:
78 / 117
FREQUENCY MULTIPLIER USING PLL IC LM565 CIRCUIT DIAGRAM

+6V
R t1
C2=1F
Rt=Rt1+Rt2
R t2
C1=0.01F
10
2
FG
LM565
(1Hz-1MHz)
Demodulated O/P
Reference O/P
VCO O/P (Fo)
4
9
11
O/P (Fout = 5Fin)
+6V
7490
Ct=0.001F
4 .7 K
10
1
BC 107
-6V
MODEL GRAPH:
Input Signal
Amplitude (V)
Time (sec)
Output Signal
Amplitude (V)
Time (sec)
TABULAR COLOUMN:
79 / 117
10K
INPUT WAVEFORM
OUTPUT WAVEFORM
Square wave Signal
Square wave Signal (Multiples of input freq)
Amplitude (V)
Amplitude (V)
Time Period (ms)
Time Period (ms)
Procedure:
1. The connections are given as per the circuit diagram.
2. The circuit uses a 4- bit binary counter 7490 used as a divide-by-5 circuit.
3. Measure the free running frequency of VCO at pin 4, with the input signal Vi set
equal to zero. Compare it with the calculated value = 0.25 / (RT CT).
4. Now apply the input signal of 1 Vpp square wave at 500 Hz to pin 2.
5. Vary the VCO frequency by adjusting the 20k potentiometer till the PLL is locked.
Measure the output frequency. It should be 5 times the input frequency.
6. Repeat steps 4, 5 for input frequency of 1 kHz and 1.5 kHz.
RESULT :
VIVA VOCE :
80 / 117
1. Define voltage to frequency conversion factor kv?

It is given as
Kv = fo / vc
Here Kv is the modulation voltage required to produce the frequency shift fo for a VCO.
2. Give two application of PLL?
i.
Frequency multiplication and division
ii.
Frequency translation.
iii.
AM detection.
iv.
FM demodulation
3. What is a voltage-controlled oscillator?
A voltage controlled oscillator is an oscillator circuit in which the frequency of
oscillation can be controlled by an externally applied voltage. It provides the linear
relationship between the applied voltage and the oscillation frequency.
VCO is a free running multivibrator and operates at a set of frequency fo called free
running frequency. This frequency is determined by an external timing capacitor and an
external resistor. It can also be shifted to either side by applying a dc control voltage Vc to
an appropriate terminal of the IC.The frequency deviation is directly proportional to the dc
control voltage and hence it is called a Voltage Controlled Oscillator.
4. Define capture range of a PLL?
The range of frequency over which the PLL can acquire lock with an input signal is
called capture range. The PLL cannot acquire a signal outside the capture range, but once
captured, it will hold on till the signal frequency goes beyond the lock-in range, larger capture
range is required.
5. Why an amplifier is also called an error amplifier?
An amplifier also called an error amplifier in control theory, which accepts the signal
Xd and yields the output signal X0=a.Xd, where a is the forward gain of the amplifier is called
the open-loop gain of the circuit.
3. Explain how frequency doublers can be realized using analog multiplier.
The multiplication of two sine waves of the same frequency, but of possibly
different amplitude and phase allows to double frequency and to directly measure real
power.
A PLL with a free running frequency of 1KHzis connected to a variable
frequency oscillator. The frequency of oscillator is gradually increased and when its
frequency was 850 Hz the PLL got locked. The frequency of oscillator was decreased and
it went out of lock for the oscillator frequency of 800 Hz.
4. Calculate the lock range and the capture range of the PLL.
81 / 117
Lock in range fL = +/- 7.8 fo / V

fo is free running frequency
Capture range = +/- = [fL / (2**R*C)] 1/2
5. The lock range of a certain general purpose PLL with a free running frequency of 50MHz is
specified to be +/- 10% what is its lock range?
Lock in range fL = +/- 7.8 fo / V
6. What are the essential building blocks of a PLL?
a. The essential building blocks of PLL are
b. Phase detector
c. Lowpass filter
d. Amplifier
e. Voltage Controlled Oscillator
7. What is a four-quadrant multiplier? Draw the circuit diagram of a squaring circuit using
multiplier.
It is a multiplier circuit with two inputs being both positive and both negative, then the
multiplier is called as four-quadrant multiplier
8. What is a two quadrant multiplier?
It is a multiplier one input must be held positive and other can change to positive
or negative it is called two quadrant multiplier.
9. What is compander?
The signal is compressed at the transmitter and expanded at the receiver. This is called
as companding. The combination of a compressor and expander is called a compander.
DC POWER SUPPLY USING REGULATOR IC LM317

82 / 117
Exp. No
: 17
Date
AIM:
To Construct and Design the Regulator circuits for Voltage and Current regulation
using regulator IC LM317. Tabulates its regulation readings and draw its response curves.
APPARATUS REQUIRED:
Sl. No:
Apparatus Name
1
Regulator IC
2
Resistors
3
4
5
6
7
Range
Qty.
LM317
240
1
1
Variable Resistor
100 - 10K
Capacitor
Bread Board
DC Voltmeter or Multimeter
DC Ammeter or Multimeter
0.1 F, 1 F
1 each
1
1
1
1
(0-30)V, 2A
(0-30)V
(0-100)mA
THEORY:
LM317 is the standard part number for an integrated three-terminal
adjustable linear voltage regulator. LM317 is a positive voltage regulator supporting
input voltage of 3V to 40V and output voltage between 1.25V and 37V. A typical current
rating is 1.5A although several lower and higher current models are available. Variable
output voltage is achieved by using a potentiometer or a variable voltage from another
source to apply a control voltage to the control terminal. LM317 also has a built-in current
limiter to prevent the output current from exceeding the rated current, and LM317 will
automatically reduce its output current if an overheat condition occurs under load. LM317
is manufactured by many companies, including National Semiconductor, Fairchild
Semiconductor, and STMicroelectronics.
Although LM317 is an adjustable regulator, it is sometimes preferred for highprecision fixed voltage applications instead of the similar LM78xx devices because the
LM317 is designed with superior output tolerances. For a fixed voltage application, the
control pin will typically be biased with a fixed resistor network, a Zener diode network, or
a fixed control voltage from another source. Manufacturer datasheets provide standard
83 / 117
configurations for achieving various design applications, including the use of a

pass transistor to achieve regulated output currents in excess of what the LM317 alone can
provide.
LM317 is available in a wide range of package forms for different applications including
heatsink mounting and surface-mount applications. Common form factors for high-current
applications include TO-220 with part number LM317T and TO-3 with part number
LM317K. LM317 is capable of dissipating a large amount of heat at medium to high
current loads and the use of a heatsink is recommended to maximize the lifespan and
power-handling capability.
LM337 is the negative voltage complement to LM317 and the specifications and function
are essentially identical, except that the regulator must receive a control voltage and act on
an input voltage that are below the ground reference point instead of above it.
LM317 / LM338 / LM350 Voltage Regulator Calculator

You can use this Voltage Regulator Calculator to vary the value of the program resistor
(R1) and output set resistor (R2) and calculate the output voltage for the LM317 / LM338 /
LM350 family of three terminal adjustable regulators. This Voltage Regulator Calculator
will work for most voltage regulators with a reference voltage (VREF) of 1.25. Typically, the
program resistor (R1) is 240 ohms for the LM117, LM317, LM138 and LM150 regulators.
For the LM338 and LM350 regulators, 120 ohms is typically used for R1. However, other
values such as 150 or 220 ohms can also be used for R1. Refer to the adjustable regulator
data sheets below for more information about these voltage regulators.
To determine the output voltage, enter values for the program (R1) and set (R2) resistors
and hit the "Calculate" button.
LM317 / LM338 / LM350 Current Regulator Calculator
You can use this Current Regulator Calculator to vary the value of the program resistor
(R1) and calculate the output current from the LM317 / LM338 / LM350 family of three
terminal adjustable regulators. This Current Regulator Calculator will work for adjustable
regulators with a reference voltage (VREF) of 1.25.
84 / 117
To determine the output current from the regulator, enter a value for the program
resistor (R1) in ohms and press the "Calculate" button. This will calculate the Output
Current in Amperes and the amount of Power Dissipated across R1 in Watts.
Pin Diagram:

Vout = 1.25V (1+(R2 /R1)) + I ADJ (R2)
Iout = VRef / R1
VRef = 1.25V for LM317
CIRCUIT DIAGRAM:
85 / 117
LM 317 VOLTAGE REGULATOR CIRCUIT DIAGRAM

3
VIN
VOUT
ADJ
R1=240
C2=1F
C1=0.1F
LM317
R2
LM 317 CURRENT REGULATOR CIRCUIT DIAGRAM

3
1
V IN
VO U T
AD J
R 1=240
C1=0.1F
LM 317
R 2
TABULAR COLOUMN:
Voltage Regulation:
86 / 117
Sl.No
Input Voltage (V)
Output Voltage (V)
1
2
3
4
5
6
7
8
9
10
Current Regulation:
Sl.No
Input Voltage (V)
Output Current (mA)
Power Dissipated (mW)
1
2
3
4
5
6
7
8
9
10
PROCEDURE:
87 / 117
and 1V(p-p).
RESULT:
VOLTAGE REGULATOR LM723.

Exp. No
: 18
88 / 117
Date
AIM:
To Construct and Design the Regulator circuits for low Voltage and high Voltage
regulation types using regulator IC LM723. Tabulates its Line and Load regulation
readings for both types and draw its response curves.
Apparatus Required:
S.No.
1
2
3
3
4
5
ITEM
SPECIFICATION
QTY
IC 723
Resistors
560, 680, 2.2k
1
1
100 F / 25 V
(0- 30) V, 1 mA
(0-350 ), 1.5 A
2
1
1
Capacitors
R. P. S
Rheostat
Bread Board and
Connecting Wires
Theory:
The three terminal regulator discussed on previous experiment have the limitations
are,
1. No short circuit protection
2. Output Voltage (positive or negative) is fixed.
These limitations have been overcome in the 723 general purpose regulators
which can be adjusted over a wide range of both positive and negative regulated
voltage. This IC is inherently low current device, but can be boosted to provide 5
amps or more current by connecting external components.
89 / 117
Low Voltage Type:

A simple positive Low voltage (2V-7V) regulator can be made using 723 as shown
in Circuit diagram. The voltage at the NI terminal of the error amplifier due to
R1R2 divider is,
VNI = VOUT = VREF (R2 / (R1+R2)
VREF = 7V, VOUT = VNI = 7 R2 / (R1+R2), V+ = +Vcc, R3 = R1||R2, V- = Gnd.
High Voltage Type:

A simple positive Low voltage (7V-30V) regulator can be made using 723 as
shown in Circuit diagram. The voltage at the NI terminal of the error amplifier due
to R1R2 divider is,
VOUT = VREF (1 + (R1 / R2))
VREF = 7V, VOUT = 7 (1+ (R1 / R2)), V+ = +Vcc, R3 = R1R2, V- = Gnd.
90 / 117
Circuit Diagram:
VOLTAGE REGULATOR USING IC LM723 (LOW VOLTAGE TYPE)

+Vcc = Unregulated DC Supply
12
11
10
R1 =
R3 =
LM 723
6
4
R2=
13
100 pF
VOLTAGE REGULATOR USING IC LM723 CIRCUIT DIAGRAM (HIGH VOLTAGE TYPE)

Unregulated DC Voltage
12
11
10
Rsc
LM723
3
R1
Regulated Output
4
7
DC Volt Meter
13
R2
C=100pF
91 / 117
PIN DIAGRAM: (IC 723):
LM 723 IC Pin Diagram (Dual-in-line Package)

No Connection
14 No Connection
Current Limit
13 Freq. Compensation
Current Sense
12 V+
Inverting Input
Non Inv. Input
10 Vout
Vref
Vz
V-
No Connection
LM 723
11 Vc
TABULAR COLOUMN:
Low Voltage Type:
Line Regulation: RLoad =
Sl.No
Input Voltage (V)
(fixed value)
Output Voltage (V)
1
2
3
4
5
6
7
92 / 117
8
9
10
Load Regulation:
Sl.No
Load Resistance ()
Vin =
(fixed value)
Output Voltage (V)
1
2
3
4
5
6
7
8
9
10
High Voltage Type:

Line Regulation: RLoad =
Sl.No
Input Voltage (V)
(fixed value)
Output Voltage (V)
1
2
3
4
5
6
7
8
9
93 / 117
10
Load Regulation:
Sl.No
Load Resistance ()
Vin =
(fixed value)
Output Voltage (V)
1
2
3
4
5
6
7
8
9
10
RESULT:
94 / 117
VIVA VOCE:
1. Draw the internal block diagram of an IC voltage regulator.
1
IN
MC7BXXC
C1
GND
3
OUT
CO
2. Define line regulation and load regulation?

i. Line regulation: It is defined as the percentage change in the output voltage for a
change in input voltage.
ii. Load regulation: It is defined as the change in the output voltage for a change in
load current.
3. Why is it that a switching regulator has a higher efficiency than a series regulator?
Switching regulators, operate the power transistor as a high frequency on/off switch,
so that the power transistor does not conduct current continuously. This gives improved
efficiency over series regulator.
95 / 117
SIMULATION EXPERIMENTS
1.INSTRUMENTATION AMPLIFIER
AIM:
To perform simulation of instrumentation amplifier using PSPICE software
APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
1.Call symbol from library
2.create new simulation profile and edit simulation setting
3.Place marker and making suitable profile active
4.Running the simulated circuit.
INSTRUMENTATION AMPLIFIER CIRCUIT
96 / 117
0
V3
15Vdc
U 1
+
V+
3
V
O S2
O U T
V-
O S1
5
6
1
R 5
AD 741
4
100k
15Vdc
VO F F = 0
VAM PL = 3v
F R EQ = 30hz
15Vdc
V4
V9
R 7
1k
1k
1k
AD 741
2
-
R 2
R 4
1k
1k
R 3
V-
R 1
O S1
O U T
V+
V7
O S2
U 3
V5
V+
O S2
U 2
0
1
R 6
6
5
100k
V6
4
V-
O S1
O U T
15Vdc
AD 741
2
-
V8
7
15Vdc
15Vdc
VO F F = 0
VAM PL = 5v
F R EQ = 30hz
V10
0
0
INSTRUMENTATION AMPLIFIER OUTPUT
97 / 117
RESULT:
Thus the simulation is performed for instrumentation amplifier
2.ACTIVE LOW PASS FILTER

AIM:
To perform simulation of active low pass filter using PSPICE software
98 / 117
APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
ACTIVE LOW PASS FILTER CIRCUIT

R 2
R 1
10k
40k
V4
V-
uA741
2
12Vdc
O S1
O U T
3
1 5 .9 k
V+
R 3
O S2
1
6
5
U 1
1Vac
0Vdc
V1
V2
C 1
12Vdc
0 .0 1 u
ACTIVE LOW PASS FILTER OUTPUT
99 / 117
RESULT:
Thus the simulation is performed for active low pass filter
3.ACTIVE HIGH PASS FILTER

AIM:
100 / 117
To perform simulation of active high pass filter using PSPICE software

APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
ACTIVE HIGH PASS FILTER CIRCUIT

R 2
R 1
10k
10k
0
V1
15v dc
V-
O U T
C 1
+
V+
3
0 .0 1 u
1Vac
0Vdc
O S1
O S2
V2
15v dc
R 3
1 5 .9 k
6
5
AD 741
U 1
V3
ACTIVE HIGH PASS FILTER OUTPUT
101 / 117
RESULT:
Thus the simulation is performed for active high pass filter
4.ACTIVE BAND PASS FILTER

AIM:
102 / 117
To perform simulation of activeband pass filter using PSPICE software

APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
RESULT:
Thus the simulation is performed for active band pass filter
5.RC PHASE SHIFT OSCILLATOR
103 / 117
AIM:
To perform simulation of RC phase shift oscillator using PSPICE software
APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
RC PHASE SHIFT OSCILLATOR CIRCUIT

R 2
10k
15k
V+
15v
U 5
R 13
V1
O S2
O U T
-
V-
O S1
5
6
1
uA741
15v
V2
R 10
C 6
C 5
C 4
0 .1 u
0 .1 u
0 .1 u
R 14
6 .4 9 k
6 .9 k
R 12
RC PHASE SHIFT OSCILLATOR OUTPUT

104 / 117
RESULT:
Thus the simulation is performed for RC phase shift oscillator
6. WEIN BRIDGE OSCILLATOR

105 / 117
AIM:
To perform simulation of wein bridge oscillator using PSPICE software
APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
WEIN BRIDGE OSCILLATOR USING IC 741 CIRCUIT

R 1
R 6
10K
4 .7 k
V-
uA741
2
-1 5 v
O S1
+
U 2
15v
O S2
6
5
R 3
V+
O U T
3 .3 k
C 2
0 .0 1 u
R 4
C 1
3 .3 k
0 .0 1 u
WEIN BRIDGE OSCILLATOR USING IC 741 OUTPUT

106 / 117
RESULT:
Thus the simulation is performed for wein bridge oscillator
7. ASTABLE MUTIVIBRATOR USING IC 741

107 / 117
AIM:
To perform simulation of astable multivibrator using IC741 using PSPICE software
APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
ASTABLE MULTIVIBRATOR USING IC741 CIRCUIT

R 1
1 .5 5 k
0
V1
V-
uA741
2
12Vdc
O S1
O U T
C 1
0 .0 5 u f
V+
+
U 1
12Vdc
O S2
V2
6
5
R 2
1 .8 5 k
R 3
10k
108 / 117
ASTABLE MULTIVIBRATOR USING IC741 OUTPUT
RESULT:
Thus the simulation is performed for astable multivibrator using IC741
109 / 117
8. MONOSTABLE MUTIVIBRATOR USING IC 741

AIM:
To perform simulation of monostable multivibrator using IC741 using PSPICE software
APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
MONOSTABLE USING IC741 CIRCUIT

R 1
289k
0
V3
D 1N 4001
O S1
O U T
3
D 1
V+
C 2V
0 .0 1 u
15v
V-
AD 741
2
-
U 2
V5
R 6
6
5
1 .5 k
R 2
100k
O S2
15v dc
C 1
1 0 .0 1 u
0
D 1N 4001
R 4
10k
V1 =
V2 =
TD =
TR =
TF =
PW = 0
PER
4v
0
0
0
0
.5 m s
= 1m s
R 3
10k
V1
110 / 117
MONOSTABLE USING IC741 OUTPUT
RESULT:
Thus the simulation is performed for monostable multivibrator using IC741
111 / 117
9.SCHMITT TRIGGER
AIM:
To perform simulation of Schmitt trigger using PSPICE software
APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
SCHMITT TRIGGER CIRCUIT

0
V1
1k
AD 741
2
-
V-
R 2
15V
O S1
O U T
3
VO F F = 0
VAM PL = 1V
F R EQ = 1KH Z
V3
O S2
V2
6
5
U 1
15V
V+
R 1
23K
R 3
1k
SCHMITT TRIGGER OUTPUT

112 / 117
RESULT:
Thus the simulation is performed for Schmitt trigger
113 / 117
10. ASTABLE MUTIVIBRATOR USING IC NE555 TIMER

AIM:
To perform simulation of astable multivibrator using NE555 timer using PSPICE software
APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
ASTABLE MULTIVIBRATOR USING NE 555 TIMER CIRCUIT

12v
R 4
2k
C 4
0 .1 u
U 2
5 5 5 a lt
R 5
10k
7
6
5
VC C
R ESET
D IS C H A R G E
2
T R IG G E R
TH R E S H O LD
C O N TR O L
G N OD U T P U T
C 3
3
V
0 .0 1 u
114 / 117
ASTABLE MULTIVIBRATOR USING NE 555 TIMER OUTPUT
RESULT:
Thus the simulation is performed for astable multivibrator using NE555 timer
115 / 117
11. MONOSTABLE MUTIVIBRATOR USING IC NE555 TIMER

AIM:
To perform simulation of monostable multivibrator using NE555 timer using PSPICE
software
APPARATUS REQUIRED:
PS ICE 9.1 student
PROCEDURE :
MONOSTABLE MULTIVIBRATOR NE555 CIRCUIT

0
5Vdc
2
V2
D 2
R 1
10k
1k
1N 4500
R 2
U 1
R ESET
VC C
D IS C H A R G E
2
T R IG G E R
TH R ESH O LD
C 2
0 .0 1 u
V1 = 0
V 2 = -5 v
TD = 0
TR = 0
TF = 0
P W = 0 .5
P ER = 10
V1
V
7
6
C O N TR O L
O U TP U T G N D
5 5 5 a lt
1
C 1
1u
C 3
0 .0 1 u
116 / 117
MONOSTABLE MULTIVIBRATOR NE555 OUTPUT
RESULT:
Thus the simulation is performed for monostable multivibrator using NE555 timer
117 / 117

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Iv - Semester, Ece List of Experiments

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DEPARTMENT OF ELECTRONICS AND COMMUNICATION

OPERATIONAL AMPLIFIER CHARACTERISTICS USING OP-AMP IC

INTEGRATOR AND DIFFERENTIATOR CIRCUITS USING OP-AMP IC

ACTIVE LOW PASS FILTER USING OP-AMP IC LM/NE/A741

ACTIVE HIGH PASS FILTER USING OP-AMP IC LM/NE/A741

ACTIVE BAND PASS FILTER USING OP-AMP IC LM/NE/A741

ASTABLE MULTIVIBRATORS USING OP-AMP IC LM/NE/A741

SCHMITT TRIGGER USING OP-AMP IC LM/NE/A741

INSTRUMENTATION AMPLIFIER USING OP-AMP IC LM/NE/A741

PHASE SHIFT OSCILLATOR USING OP-AMP IC LM/NE/A741

WIEN BRIDGE OSCILLATOR USING OP-AMP IC LM/NE/A741

MONOSTABLE USING OP-AMP IC LM/NE/A741

PRECISION FULL WAVE RECTIFIER USING OP-AMP IC LM/NE/A741

ASTABLE USING LM/NE/A555 TIMER IC

MONOSTABLE USING LM/NE/A555 TIMER IC

PLL CHARACTERISTICS USING PLL IC NE/LM565

FREQUENCY MULTIPLIER USING PLL IC NE/LM565

DC POWER SUPPLY USING REGULATOR IC LM317

DC POWER SUPPLY USING REGULATOR IC LM723 (LOW VOLTAGE &

Linear Integrated Circuits Lab

STUDY OF SMPS (PULSE WIDTH MODULATION & LINEAR TYPE)

STUDY OF FUNCTION GENERATOR IC 8038

SIMULATION OF INSTRUMENTATION AMPLIFIER CIRCUIT BY USING

SIMULATION OF LOW PASS, HIGH PASS AND BAND PASS FILTER

SIMULATION OF ASTABLE MULTIVIBRARTOR, MONOSTABLE

SIMULATION OF WIEN BRIDGE AND RC PHASE SHIFT OSCILLATOR

SIMULATION OF ASTABLE AND MONOSTABLE MULTIVIBRATOR

Linear Integrated Circuits Lab

OPERATIONAL AMPLIFIER CHARACTERISTICS

Input Offset Voltage

Input Offset Current

Negative Sign indicates a phase shift of 180 between Vi and Vo.

Linear Integrated Circuits Lab

Input Offset Voltage and Input Bias Current:

current. It is 200na maximum for IC 741.

DESIGN & CALCULATIONS IF ANY:

Linear Integrated Circuits Lab

Linear Integrated Circuits Lab

INPUT OFFSET VOLTAGE & BIAS CURRENT

Linear Integrated Circuits Lab

Output Signal (amplified and out of phase)

Output Signal (amplified and in phase)

Linear Integrated Circuits Lab

Output Signal (above 100 KHz Freq.)

Linear Integrated Circuits Lab

Output Voltage (V)

Gain = - (Rf /Ri) Vin

Output Voltage (V)

Gain =[ 1 + (Rf /Ri)] Vin

3. Input Offset Voltages and Input Offset Current:

Avg. Bias Current =

Output Voltage (V)

Gain = Vout / Vin

Output Voltage (V)

Slew Rate = 2fV (V/ s)

Linear Integrated Circuits Lab

Linear Integrated Circuits Lab

Linear Integrated Circuits Lab