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    Resume 1

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    This curriculum vitae summarizes the qualifications of Muralikrishna Appani, who is currently pursuing a B.Tech in ECE from S.R Engineering College. Some key details include: - He is seeking an entry-level position to utilize his analytical, technical and organizational skills. - He has technical skills in operating systems, software packages, and programming languages like C, Verilog HDL and Assembly. - His achievements include being topper in class 7 and intermediate, and participating in technical events. - He completed a mini project on AHB Arbiter design using Verilog HDL for arbitration between bus masters and slaves.

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    Resume 1

    Uploaded by

    Webhosting Inindia
    30 views2 pages
    This curriculum vitae summarizes the qualifications of Muralikrishna Appani, who is currently pursuing a B.Tech in ECE from S.R Engineering College. Some key details include: - He is seeking an entry-level position to utilize his analytical, technical and organizational skills. - He has technical skills in operating systems, software packages, and programming languages like C, Verilog HDL and Assembly. - His achievements include being topper in class 7 and intermediate, and participating in technical events. - He completed a mini project on AHB Arbiter design using Verilog HDL for arbitration between bus masters and slaves.

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    This curriculum vitae summarizes the qualifications of Muralikrishna Appani, who is currently pursuing a B.Tech in ECE from S.R Engineering College. Some key details include: - He is seeking an entry-level position to utilize his analytical, technical and organizational skills. - He has technical skills in operating systems, software packages, and programming languages like C, Verilog HDL and Assembly. - His achievements include being topper in class 7 and intermediate, and participating in technical events. - He completed a mini project on AHB Arbiter design using Verilog HDL for arbitration between bus masters and slaves.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Download as doc, pdf, or txt
    30 views2 pages

    Resume 1

    Uploaded by

    Webhosting Inindia
    This curriculum vitae summarizes the qualifications of Muralikrishna Appani, who is currently pursuing a B.Tech in ECE from S.R Engineering College. Some key details include: - He is seeking an entry-level position to utilize his analytical, technical and organizational skills. - He has technical skills in operating systems, software packages, and programming languages like C, Verilog HDL and Assembly. - His achievements include being topper in class 7 and intermediate, and participating in technical events. - He completed a mini project on AHB Arbiter design using Verilog HDL for arbitration between bus masters and slaves.

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    CURRICULUM VITAE

    #22-4-231
    Deshaipet
    Warangal – 506006 Email: bcmkaa12345@gmail.com
    Andhra Pradesh. Mobile No: + 91 9493182783

    OBJECTIVE

    Seeking an entry level position where my analytical, technical and organizational


    skills will be utilized to the at most level in serving the organization.

    EDUCATION

    Degree Institute Year Percentage

    S.R ENGINEERING COLLEGE,


    Pursuing B.Tech- 69.26%
    Ananthasagar.
    ECE (IV year) 2007-2011 (till Date)
    (Affiliated to JNTU Hyderabad).

    Krishnaveni Junior College, 94.50%


    Intermediate Kothagudem. 2005-2007

    St.Alphonse High School,


    85.33%
    S.S.C Karimnagar. 2005

    TECHNICAL SKILLS

    • Operating System : Win 2000, XP


    • Software Packages : MS-Office
    • Programming Languages : C, Verilog HDL and Assembly Language
    Programming in 8086

    ACHIEVEMENTS

    • I was topper in the 7th class.


    • I was topper in the class of intermediate.
    • Participated and stood second in two technical events as a part of ULTRIVA, a
    national level symposium conducted at S.R ENGINEERING COLLEGE.
    MINI PROJECT

    Title: AHB Arbiter design using Verilog HDL.


    Description: This project describes a design of “AHB ARBITER USING VERILOG HDL”
    which provides a facility to select one of the masters in the system and route it to any one of
    the slaves by using a prioritization scheme (i.e., either fixed priority or Round Robin priority)
    to decide which bus master is currently the highest priority master requesting the bus.

    PERSONAL DETAILS

    Name : Muralikrishna Appani

    Father’s name : Mr. Rajaiah

    Date of Birth : 13th August 1989

    Gender : Male

    Languages known : English and Telugu

    Nationality : Indian

    Interests & Activities : Collecting Quotes

    Qualities : Self Motivation, Hard Working & Honesty

    DECLARATION

    I hereby declare that the information furnished above is true to the best of my knowledge and
    belief.

    Date:
    Place: Warangal. (MURALIKRISHNA APPANI)

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