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Verilog Basics 9 FSMD Basics and Example

This document discusses two implementations of a greatest common divisor (GCD) algorithm using a finite state machine with datapath (FSMD) design approach in Verilog. The first implementation uses state diagrams to design an FSMD with separate datapath and control modules. The second starts with a behavioral model in C, then derives a register transfer level (RTL) implementation by defining port interfaces, datapath functional units, and a control unit finite state machine. The document provides examples and code snippets to illustrate both approaches.

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Ahmad Shdifat
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1K views26 pages

Verilog Basics 9 FSMD Basics and Example

This document discusses two implementations of a greatest common divisor (GCD) algorithm using a finite state machine with datapath (FSMD) design approach in Verilog. The first implementation uses state diagrams to design an FSMD with separate datapath and control modules. The second starts with a behavioral model in C, then derives a register transfer level (RTL) implementation by defining port interfaces, datapath functional units, and a control unit finite state machine. The document provides examples and code snippets to illustrate both approaches.

Uploaded by

Ahmad Shdifat
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Digital System Design Verilog: FSMD Concepts and Example

Dr. Bassam Jamil

FSMD
FSMD

is Finite State Machine (FSM) with datapath


is computational blocks

Datapath

Adders/Subtractors

Shifters/Rotators Multipliers Dividers etc

FSDM
In

the design process, start first with algorithm in high level language
convert the algorithm to FSDM

Then

Sometimes, a behavioral model substitute FSDM\

Then

Implement the design in Verilog

Example
We

will consider two implementations of GCD

Both are correct Just learn how different approaches lead to different implementations.

First

Implementation uses state diagrams implementations start with behavioral

Second

model
Now

to the FIRST

IMPLEMTATION

Greatest Common Divisor (GCD)

Inputs :

ld : load
m and n : numbers

Output

gcd: great common divisor result


done: operation is complete
5

GCD Example: FSM and Datapath

GCD Example: FSM and Datapath

CGD Example: I/O and State

GCD Example: Single-case Design

end

GCD Design
SECOND

IMPLEMETNATION

10

GCD In C

11

Behavioral Model for GCD

12

Testing Behavioral Model

13

Deriving RTL

14

RTL Design- Step 1: Define Port Interface

15

RTL Design- Step 2: Define Datapath Functional Units

16

RTL Design- Step 2: Define Control Unit

17

Datapath Module Interface

18

Connect The Modules

19

Connect the Modules

20

Control Block

21

Control Unit: FSM Implementation

22

FSM Implementation

23

FSM Implementation: Outputs

24

Testing: Design the Testbench

25

Testing: Checking the RTL

26

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