A3423 Datasheet PDF
A3423 Datasheet PDF
A3423 Datasheet PDF
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For existing customer transition, and for new customers or new applications, refer to the A1230.
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Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A3423
Dual Channel Hall Effect Direction Detection Sensor IC
Features and Benefits
Precisely aligned dual Hall elements Tightly matched magnetic switchpoints Speed and direction outputs Individual Hall element outputs (L package) Fast power-on time Output short circuit protection Operation from an unregulated power supply Wide operating temperature range Wide operating voltage range Integrated EMC-ESD protection
Description
The A3423 is a dual-channel Hall-effect sensor IC ideal for use in speed and direction sensing applications incorporating encoder ring-magnet targets. The A3423 provides various output signals that indicate speed and direction of target rotation. The Hall elements are both photolithographically aligned to better than 1 m. Maintaining accurate displacement between the two active Hall elements eliminates the major manufacturing hurdle encountered in fine-pitch detection applications. The A3423 is a highly sensitive, temperature-stable magnetic device ideal for use in harsh automotive and industrial environments. The Hall elements of the A3423 are spaced 1.63 mm apart, which provides excellent speed and direction information for small-geometry targets. Extremely low-drift amplifiers guarantee symmetry between the switches to maintain signal quadrature. An on-chip regulator allows the use of this device over a wide operating voltage range of 3.8 to 24 V. End-of-line trimming of the Hall element switchpoints provides tight matching capability. The continuous-time nature of the Hall elements delivers a fast start-up of the device and low noise. The A3423 has integrated protection against transients on the supply and output pins and short-circuit protection on all outputs. The A3423 is available in a 4-pin SIP and a plastic 8-pin SOIC surface mount package (the SOIC version is currently in development). Both packages are lead (Pb) free, with 100% matte tin leadframe plating.
Packages
8-pin SOIC (suffix L) 4-pin SIP (suffix K)
Not to scale
E1
Direction Logic
DIR
Trim
OUTB
GND
L package only
A3423-DS, Rev. 5
A3423
Selection Guide
Part Number A3423EK-T A3423ELTR-T A3423LK-T Package 4-pin through hole SIP 8-pin surface mount SOIC2 4-pin through hole SIP Packing1 Bulk bag, 500 pieces/bag Tape and reel, 3000 pieces/reel Bulk bag, 500 pieces/bag Tape and reel, 3000 pieces/reel TA (C) 40 to 85 40 to 150
A3423LLTR-T 8-pin surface mount SOIC2 1Contact Allegro for additional packing options. 2SOIC package currently in development.
Pin-out Diagrams
Name
Description
1 2 3 4
8 GND 7 NC 6 NC 5 OUTB
1 VCC
2 DIR
3 SPD
L Package
K Package
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A3423
OPERATING CHARACTERISTICS valid at TA = 40C to 150C, TJ TJ (max), through full operating air gap range, unless otherwise noted Characteristics Electrical Characteristics Supply Voltage Output Leakage Current Undervoltage Lockout Undervoltage Hysteresis Output Rise Time Output Fall Time Supply Current Low Output Voltage Output Current Limit Speed Output Delay* Power-on Time Transient Protection Characteristics Supply Zener Voltage Output Zener Voltage Supply Zener Current Output Zener Current Reverse Battery Current Magnetic Characteristics Operate Point (Channel A and Channel B) Release Point (Channel A and Channel B) Hysteresis (Channel A and Channel B) Operate Symmetry Release Symmetry BOP BRP Bhys SYMOP(AB) SYMRP(AB) B(A) > BOP(A), B(B) > BOP(B) B(A) < BOP(A), B(B) < BOP(B) BOP BRP BOP(A) BOP(B) BRP(A) BRP(B) 35 55 10 50 50 15 15 30 55 35 60 50 50 G G G G G VZ(sup) VZ(out) IZ(sup) IZ(out) IRCC ICC = 17 mA, TA = 25C IOUT = 3 mA, TA = 25C Vsupply = 30 V, TA = 25C VOUT = 30 V, TA = 25C VRCC = 28 V, TA = 25C 30 30 17 3 15 V V mA mA mA VCC IOFF VCC(UV) VCC(hys) tr tf ICC Vsat IOM td tON All outputs; IOUT = 15 mA; B > BOP(A), B > BOP(B) All outputs Delay between direction changing and speed output transition B > BOP + 5 G Lockout (VCC(UV)) Shutdown CLOAD = 20 pF, RLOAD = 1 k CLOAD = 20 pF, RLOAD = 1 k Operating, TJ 165C All outputs VOUT VCC(max) 3.8 3.4 30 0.5 <1 0.4 200 300 8.2 210 2.5 2 24 10 3.7 14 500 60 5 5 V A V V ns ns mA mV mA s s Symbol Test Conditions Min. Typ. Max. Units
* Valid only after the first speed (SPD pin) signal transition. First speed signal transition has no delay.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A3423
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Package Thermal Resistance Symbol RJA Test Conditions* Package K, 1-layer PCB with copper limited to solder pads Package L, 1-layer PCB with copper limited to solder pads Package L, 4-layer PCB *Additional thermal information available on Allegro website. Value Units 177 140 80 C/W C/W C/W
VCC(max)
1-layer PCB, Package L (R JA = 140 C/W) 4-layer PCB, Package L (R JA = 80 C/W) VCC(min)
40 60 80 100 120 140 160 180
Temperature (C)
4 (R -lay
JA
er = PC 80 B C , Pa /W ck ) ag
C/
W)
40
60
140
160
180
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A3423
Performance Characteristics
13
10
12
3 outputs on, Vcc=8V 3 outputs off, Vcc=8V 3 outputs on, Vcc=12V 3 outputs off, Vcc=12V
55 45 35 25
BOP (G)
250 200 150 100 50 0 -50 0 50 TA (C) 100 150 Iout = 20mA Iout = 15mA
35 25 15 5
BRP (G)
Hysteresis (G)
60 55 50
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A3423
The integrated circuit contains an internal voltage regulator that powers the Hall elements and both the analog and digital circuitry. This regulator allows operation over a wide supply voltage range and provides some immunity to supply noise. The device also contains logic circuitry that decodes the direction of rotation of the ring magnet.
Quadrature/Direction Detection Internal logic circuitry provides outputs representing the speed and direction of the magnetic field across the face of the package. For the direction signal to be appropriately updated, a quadrature relationship must be maintained between the target magnetic pole width, the pitch between the two Hall elements (E1 and E2) in the device, and, to a lesser extent, the magnetic switchpoints.
The response of the device to the magnetic field produced by a rotating ring magnet is shown in the Performance Characteristics section. Note the phase shift between the two integrated Hall elements.
Outputs The device provides up to four saturated outputs: target
direction (DIR pin), E1 element output (OUTA pin), E2 element output (OUTB pin), and target speed (SPD pin). DIR provides the direction output of the device and is defined as off (high) for targets moving in the direction from E1 to E2 and on (low) for the direction E2 to E1. SPD provides an XORed output of the two Hall elements (see figure 1). Because of internal delays, DIR is always updated before SPD and is updated at every transition of OUTA and OUTB (internal) allowing the use of up-down counters without the loss of pulses.
Power-on State At power on, the logic circuitry is reset to pro-
For optimal design, the device should be actuated by a ring magnet that presents to the front of the device a field with a pole width two times the Hall element-to-element spacing. This will produce a sinusoidal magnetic field whose period (denoted as ) is then four times the element-to-element spacing. A quadrature relationship can also be maintained for a ring magnet with fields having a period that satisfies the relationship: n/4 = 1.63 mm , where n is any odd integer. Therefore, ring magnets with polepair spacing equal to 6.52 mm (n = 1), 2.17 mm (n = 3), 1.3 mm (n = 5), and so forth, are permitted.
vide an off (high) state for all the outputs. If any of the channels is subjected to a field greater than BOP, the internal logic will set accordingly, and the outputs will switch to the expected state.
Power-on Time This characteristic, tON, is the elapsed time from
when the supply voltage reaches the device supply minimum until the device output becomes valid (see figure 2).
OUTA
td
Figure 1
Figure 2
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A3423
cular pitch of less than 4 mm, a performance improvement can be observed by rotating the front face of the device (see below). This rotation decreases the effective Hall element-to-element spacing, provided that the Hall elements are not rotated beyond the width of the target.
Applications. It is strongly recommended that an external
reduce both external noise and noise generated by the internal logic. The simplest form of magnet that will operate these devices is a ring magnet. Other methods of operation, such as linear magnets, are possible. Extensive applications information on magnets and Hall-effect sensor ICs is also available in the Hall-Effect IC Applications Guide which can be found in the latest issue of Application Note 27701, at www.allegromicro.com/techpub2/an/ an27701.pdf.
0.01 F bypass capacitor be connected (in close proximity to the device) between the supply and ground of the device to
Rotated Alignment
D cos
E1 E1 E2 E2
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A3423
1.63
1.79
D
1.55 0.05 NNNN Mold Ejector Pin Indent Branded Face 45 0.84 REF 1
D Standard Branding Reference View
YYWW
N = Device part number Y = Last two digits of year of manufacture W = Week of manufacture For Reference Only; not for tooling use (reference DWG-9010) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A
B
1 14.73 0.51
Dambar removal protrusion (8X) Gate and tie bar burr area Branding scale and appearance at supplier discretion
1.27 NOM
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
A3423
8 0 0.25 0.17
0.65 1.75
1.27
E1
A
1.95 E 3.90 0.10 E2 2 1.27 0.40 0.25 BSC SEATING PLANE GAUGE PLANE C NNNNNNN YYWW LLLLL 1
C
6.00 0.20
1.04 REF
5.60
1
E 1.09
Branded Face 8X 0.10 C 0.51 0.31 1.27 BSC SEATING PLANE 1.75 MAX 0.25 0.10
For Reference Only; not for tooling use (reference MS-012AA) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Branding scale and appearance at supplier discretion
C
B Standard Branding Reference View N = Device part number = Supplier emblem Y = Last two digits of year of manufacture W = Week of manufacture L = Lot number
Reference land pattern layout (reference IPC7351 SOIC127P600X175-8M); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances Active Area Depth 0.40 NOM Hall elements (E1 and E2); not to scale
D E
Copyright 2007-2008, Allegro MicroSystems, Inc. The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegros products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com