XPT2046
XPT2046
XPT2046
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XPT2046
CONTENTS
GENERAL DESCRIPTION .............................................................................................................3 FEATURES.........................................................................................................................................3 APPLICATIONS................................................................................................................................3 BLOCK DIAGRAM ..........................................................................................................................4 ABSOLUTE MAXIMUM RATINGS ..............................................................................................4 ELECTRICAL CHARACTERISTICS ...........................................................................................5 PIN CONFIGURATION ...................................................................................................................8 PIN LAYOUT ......................................................................................................................................8 PIN DESCRIPTION...............................................................................................................................9 TYPICAL CHARACTERISTICS ..................................................................................................10 THEORY OF OPRATION..............................................................................................................13 BASIC OPERATION OF THE XPT2046...............................................................................................13 ANALOG INPUT ................................................................................................................................14 INTERNAL REFERENCE.....................................................................................................................15 REFERENCE INPUT ...........................................................................................................................16 SIMPLIFIED DIAGRAM OF SINGLE-ENDED REFERENCE ....................................................................16 SIMPLIFIED DIAGRAM OF DIFFERENTIAL REFERENCE ......................................................................17 TOUCH SCREEN SETTLING ...............................................................................................................17 TEMPERATURE MEASUREMENT .......................................................................................................18 BATTERY MEASUREMENT ...............................................................................................................19 PRESSURE MEASUREMEN ................................................................................................................20 DIGITAL INTERFACE...................................................................................................................21 PENIRQ OUTPUT ..........................................................................................................................24 PER-CONVERSION .......................................................................................................................26 16 CLOCKS-PER-CONVERSION .........................................................................................................26 DIGITAL TIMING ..............................................................................................................................26 15 CLOCKS-PER-CONVERSION .........................................................................................................28 DATA FORMAT ................................................................................................................................28 8-BIT CONVERSION .........................................................................................................................29 POWER DISSIPATION ..................................................................................................................29 DEMO ...............................................................................................................................................30
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XPT2046
General Description
The XPT2046 is a 4-wire resistive touch screen controller that incorporates a 12-bit 125 kHz sampling SAR type A/D converter. The XPT2046 operates down to 2.2V supply voltage and supports digital I/O interface voltage from 1.5V to VCC in order to connect low voltage uP. The XPT2046 can detect the pressed screen location by performing two A/D conversions. In addition to location, the XPT2046 also measures touch screen pressure.On-chip VREF can be utilized for analog auxiliary input, temperature measurement and battery monitoring withthe ability to measure voltage from 0V to 5V. The XPT2046 also has an on-chip temperature sensor The XPT2046 is available in 16pin QFN thin package(0.75mm in height) and has the operating temperature range of -40C to +85C
Features
12 bit SAR type A/D converter with S/H circuit Low voltage operation (VCC = 2.2V 3.6V) Low voltage digital I/F (1.5V VCC) 4-wire I/F Sampling frequency: 125 kHz (max) On-Chip voltage reference (2.5V) Pen pressure measurement On-chip thermo sensor Direct battery masurement Low power consumption (260A) Package 16pin QFN
Applications
Personal digital assistants Portable instruments Point -of-sale terminals Pagers Touch screen monitors Cellular phones
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XPT2046
Block Diagram
+VCC and IOVDD to GND Analog Inputs to GND Digital Inputs to GND Power Dissipation Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (soldering, 10s)
0.3V to +6V 0.3V to +VCC + 0.3V 0.3V to IOVDD + 0.3V . 250mW +150C . 40C to +85C 65C to +150C +300C
for xtended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
Copyright2007, SHENZHEN XPTEK TECHNOLOGY CO.,LTD
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XPT2046
PARAMETER ANALOG INPUT Full-Scale Input Span Absolute Input Range Capacitance Leakage Current SYSTEM PERFORMANCE Resolution No Missing Codes Integral Linearity Error Offset Error Gain Error Noise Power-Supply Rejection SAMPLING DYNAMICS Conversion Time Acquisition Time Throughput Rate Multiplexer Settling Time Aperture Delay Aperture Jitter Channel-to-Channel Isolation
CONDITION
V V V pF A
SWITCH DRIVERS On-Resistance YPXP YNXN Drive Current(2) REFERENCE OUTPUT Internal Reference Voltage Internal Reference Drift Quiescent Current Copyright2007, SHENZHEN XPTEK TECHNOLOGY CO.,LTD 2.45 2.50 15 500 2.55 V ppm/ A 5/30 Duration 100ms 5 6 50 mA
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XPT2046
REFERENCE INPUT Range Input Impedance SER/ DFR0PD10 Internal Reference Off Internal Reference On BATTERY MONITOR Input Voltage Range Input Impedance Sampling Battery Battery Monitor Off Accuracy VBAT=0.5V~5.5V, ExternalVREF=2.5V VBAT=0.5V~5.5V, Internal Reference
TEMPERATURE ASUREMENT
1.0 1 250
VCC
V G
0.5 10 1 -2 -3 -40 Differential Method(3) TEMP0(4) Differential Method(3) TEMP0(4) 1.6 0.3 2 3
6.0
V K G
+2 +3 +85
% %
DIGITAL INPUT/OUTPUT Logic Family Capacitance VIH VIL VOH VOL Data Format All Digital Control Input Pins | IIH |+5A | IIL |+5A IOH=-250A IOL=250A Straight Binary IOVDD*0.7 -0.3 IOVDD*0.8 0.4 CMOS 5 15 IOVDD+0.3 0.3*IOVDD pF V V V V
POWER-SUPPLYREQUIREMENTS
Specified Performance Operating Range Internal Reference Off Internal Reference On fSAMPLE = 12.5kHz Power-Down Mode with (CS=DCLK=DIN=IOVDD)
V V V A A A
3 1.8
A mW
Power Dissipation
VCC=+2.7V
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XPT2046
-40
+85
Table 2. Electrical Characteristics (1) LSB means Least Significant Bit. With VREF = +2.5V, one LSB is 610V. (2) Assured by design, but not tested. Exceeding 50mA source current may result in device degradation. (3) Difference between TEMP0 and TEMP1 measurement, no calibration necessary. (4) Temperature drift is 2.1mV/C. (5) XPT2046 operates down to 2.2V. (6) IOVDD must be (+VCC). (7) Combined supply current from +VCC and IOVDD. Typical values obtained from conversions on AUX input with PD0 = 0.
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XPT2046
Pin Configuration
Pin Layout
QFN-16
TSSOP16
VFBGA-16
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XPT2046
Pin Description
QFN PIN # TSSOP PIN# VFBGA PIN # A5 A4 A3 A2 B1C1 D1 E1 G2 G3 G4G5 G6 E7 D7 C7 B7 NAME DESCRIPTION Busy Output. This output is high impedance when CS is high. Serial Data Input. If CS is low, data is latched on the rising edge of DCLK. Chip Select Input. Controls conversion timing and enables the serial input/output External Clock Input. This clock runs the SAR conversion process and synchronizes Power Supply XP Position Input YP Position Input XN Position Input YN Position Input Ground Battery Monitor Input Auxiliary Input to ADC Voltage Reference Input/Output Digital I/O Power Supply Pen Interrupt Serial Data Output. Data is shifted on the falling edge of DCLK. This output is high
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
13 14 15 16 1 2 3 4 5 6 7 8 9 10 11
BUSY DIN
CS
16
12
A6
DOUT
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XPT2046
Typical Characteristics
At TA = +25C, +VCC = +2.7V, IOVDD = +1.8V, VREF = External +2.5V, 12-bit mode, PD0 = 0, fSAMPLE = 125kHz, and fCLK = 16 fSAMPLE = 2MHz,
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XPT2046
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XPT2046
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XPT2046
Theory Of Opration
The XPT2046 is a classic successive approximation register (SAR) analog-to-digital converter (ADC). The architecture is based on capacitive redistribution, which inherently includes a sample-and-hold function. The converter is fabricated on a 0.6m CMOS process. The basic operation of the XPT2046 is shown in Figure 4 The device features an internal 2.5V reference and uses an external clock. Operation is maintained from a single supply of 2.7V to 5.25V. The internal reference can be overdriven with an external, low-impedance source between 1V and +VCC. The value of the reference voltage directly sets the input range of the converter. The analog input (X-, Y-, and Z-Position coordinates, auxiliary input, battery voltage, and chip temperature) to the converter is provided via a multiplexer. A unique configuration of low on-resistance touch panel driver switches allows an unselected ADC input channel to provide power and the accompanying pin to provide ground for an external device, such as a touch screen. By maintaining a differential input to the converter and a differential reference architecture, it is possible to negate the error from each touch panel driver switchs on-resistance (if this is a source of error for theparticular measurement).
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XPT2046
Analog Input
Figure 5 hows a block diagram of the input multiplexer on the XPT2046, the differential input of the ADC, andt he differential reference of the converter. Table 4 and Table 5 show the relationship between the A2, A1, A0, and SER/DFR control bits and the configuration of the XPT2046.The control bits are provided serially via the DIN pinsee theDigital Interface section of this data sheet for more details.
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XPT2046
A2 A1 A0 VBAT AUXIN TEMP +IN (TEMP0) +IN +IN +IN +IN YN XP
YP
POSITIO
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1 +IN
+IN
Off
0 0 1 1
0 1 0 0
1 1 0 1
YP YP YP XP
YN XN XN XN +IN
+IN +IN
M M M
+IN
Internal Reference
The XPT2046 has an internal 2.5V voltage reference that can be turned on or off with the control bit, PD1 (see Table 8 and Figure 6. Typically, the internal reference voltage is onlyused in the single-ended mode for battery monitoring, temperature measurement, and for using the auxiliary input.Optimal touch screen performance is achieved when using the differential mode. The internal reference voltage of the XPT2046 must be commanded to be off to maintain compatibility with the ADS7843. Therefore, after power-up,a write of PD1 = 0 is required to insure the reference is off (see the Typical Characteristics for power-up time of the reference from power-down).
Figure 6. Simplified Diagram of the Internal Reference Copyright2007, SHENZHEN XPTEK TECHNOLOGY CO.,LTD http://www.xptek.com.cn
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XPT2046
Reference Input
The voltage difference between +REF and REF (see Figure 5 sets the analog input range. The XPT2046 perates with a reference in the range of 1V to +VCC. There are several critical items concerning the reference input and its wide voltage range. As the reference voltage is reduced, the analog voltage weight of each digital output code is also reduced. This is often referred to as the LSB (least significant bit) size and is equal to the reference voltage divided by 4096 in 12-bit mode. Any offset or gain error inherent in the ADC appears to increase, in terms of LSB size, as the reference voltage is reduced. With a ower reference voltage, more care mustbe taken to provide a clean layout including adequate bypassing, a clean (low-noise, low-ripple) power supply, alow-noise reference (if an external reference is used), and a low-noise input signal.The voltage into the VREF input directly drives the capacitor digital-to-analog converter (CDAC) portion of the XPT2046. Therefore, the input current is very low (typically< 13A).
Figure 7. Simplified Diagram of Single-Ended Reference (SER/DFR high, Y switches enabled,X+ is analog input)
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XPT2046
YP
XP
IN + IN-
REF + REF -
Converter YN
GND
Figure 8. Simplified Diagram of Differential Reference (SER/DFR low, Y switches enabled,X+ is analog input)
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XPT2046
the differential mode only for the touch screen measurements and command the XPT2046 to remain on (touch screen drivers ON) and not go into power-down (PD0 = 1). Several conversions are made depending on thes ettling time required and the XPT2046 data rate. Once the required number of conversions have been made, the processor commands the XPT2046 to go into its power-down state on the last measurement. This process isr equired for X-Position,Y-Position, and Z-Position measurements. Option 3 is to operate in the 15 Clock-per-Conversion mode, which overlaps the analog-to-digital conversions and maintains the touch screen drivers on until commanded to stop by the processor (see Figure 16).
Temperature Measurement
In some applications, such as battery recharging, a measurement of ambient temperature is required. The temperature measurement technique used in the XPT2046 relies on the characteristics of a semiconductor junction operating at a fixed current level. The forward diode voltage (VBE) has a well-defined characteristic versus temperature. The ambient temperature can be predicted in applications by knowing the +25C value of the VBE voltage and then monitoring the delta of that voltage as the temperature changes. The XPT2046 offers two modes of operation. The first mode requires calibration at a known temperature, but only requires a single reading to predict the ambient temperature. A diode is used (turned on) during this measurement cycle. The voltage across the diode is connected through the MUX for digitizing the forward bias voltage by the ADC with an address of A2 = 0, A1 = 0, and A0 = 0 (see Table 1 and Figure 6 for details). This voltage is typically 600mV at +25C with a 20A current through the diode. The absolute value of this diode voltage can vary a few millivolts.However, the TC of this voltage is very consistent at 2.1mV/C. During the final test of the end product, the diode voltage would be stored at a known room temperature, in memory, for calibration purposes by the user. The result is an equivalent temperature measurement resolution of 0.3C/LSB (in 12-bit mode).
VCC
TEMP1
TEMP0
MUX
ADC
Figure 9. Functional Block Diagram of Temperature Measurement The second mode does not require a test temperature calibration, but uses a two-measurement method to eliminate the need for absolute temperature calibration and for achieving 2C accuracy. This mode requires a second conversion with an address of A2 = 1, A1 = 1, and A0 = 1, with a 91 times larger current. The voltage difference between the first and second conversion using 91 times the bias current is represented by Equation (1):
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XPT2046
where: N is the current ratio = 91. k = Boltzmanns constant (1.38054 1023 electron volts/ degrees Kelvin). q = the electron charge (1.602189 1019 C). T = the temperature in degrees Kelvin. This method can provide improved absolute temperature measurement over the first mode at the cost of less resolution (1.6C/LSB). The equation for solving for K is:
K = q
V 2 (k ln( N ))
where: V = V (I91) V (I1) (in mV) K = 2.573 K/mV V C = 2.573 V(mV) 273K NOTE: The bias current for each diode temperature measurement is only on for 3 clock cycles (during the acquisition mode) and, therefore, does not add any noticeable increase in power, especially if the temperature measurement only occurs occasionally.
Battery Measurement
An added feature of the XPT2046 is the ability to monitor the battery voltage on the other side of the voltage regulator(DC/DC converter), as shown in Figure 10. The battery voltage can vary from 0V to 6V, while maintaining the voltage to the XPT2046 at 2.7V, 3.3V, etc. The input voltage (VBAT)is divided down by 4 so that a 5.5V battery voltage is represented as 1.375V to the ADC. This simplifies the multiplexer and control logic. In order to minimize the power consumption, the divider is only on during the sampling period when A2 = 0, A1 = 1, and A0 = 0 (see Table 1 for the relationship between the control bits and configuration of the XPT2046).
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XPT2046
Pressure Measurement
Measuring touch pressure can also be done with the XPT2046. To determine pen or finger touch, the pressure of the touch needs to be determined. Generally, it is not necessary to have very high performance for this test; therefore, the 8-bit resolution mode is recommended(however, calculations will be shown here in the 12-bit resolution mode). There are several different ways of performing this measurement. The XPT2046 supports two methods. The first method requires knowing the X-plate resistance, measurement of the X-Position, and two additional cross panel measurements (Z1 and Z2) of the touch screen, as shown in Figure 11. Using Equation (3) calculates the touch resistance: R RX
XPosition Z 2 1 3 4096 Z1
The second method requires knowing both the X-plate and Y-plate resistance, measurement of X-Position and Y-Position, and Z1. Using Equation (4) also calculates the touch resistance:
Y -Position X-Position 4096 Rtouch RX-Plate4096 1 RY Plate 1 Z1 4 4096
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XPT2046
MEASURE X-POSITION XP YP MEASURE Z1-POSITION
XP
YP
XP
YP
TOUCH
TOUCH Z1-POSITION
TOUCH Z2-POSITION
X-POSITION
XN
YN
XN
YN
XN
YN MEASURE Z2-POSITION
Digital Interface
See Figure 12 for the typical operation of the XPT2046 digital interface. This diagram assumes that the source of the digital signals is a microcontroller or digital signal processor with a basic serial interface.Each communication between the processor and the converter,such as SPI, SSI, or Microwire_ synchronous serial interface, consists of eight clock cycles. One complete conversion can be accomplished with three serial communications for a total of 24 clock cycles on the DCLK input. The first eight clock cycles are used to provide the control byte via the DIN pin. When the converter has enough information about the following conversion to set the input multiplexer and reference inputs appropriately, the converter enters the acquisition (sample) mode and, if needed, the touch panel drivers are turned on. After three more clock cycles, the control byte is complete and the converter enters the conversion mode. At this point, the input sample-and-hold goes into the hold mode and the touch panel drivers turn off (in single-ended mode). The next 12 clock cycles accomplish the actual analogto-digital conversion. If the conversion is ratiometric(SER/DFR = 0), the drivers are on during the conversion and a 13th clock cycle is needed for the last bit of the conversionr esult. Three more clock cycles are needed to complete the last byte (DOUT will be low), which are ignored by the converter. Control Byte The control byte (on DIN), as shown in Table 3, provides the start conversion, addressing, ADC resolution, configuration,and power-down of the XPT2046. Figure 12, Table 3 and Table 4 give detailed information regarding the order and description of these control bits within the control byte. Initiate STARTThe first bit, the S bit, must always be high and initiates the start of the control byte. The XPT2046 ignores inputs on the DIN pin until the start bit is detected. AddressingThe next three bits (A2, A1, and A0) select the active input channel(s) of the input multiplexer (see Table 1, Table 2, and Figure 5), touch screen drivers, and the reference inputs. MODEThe mode bit sets the resolution of the ADC. With this bit low, the next conversion has 12 bits ofr esolution,whereas with this bit high, the next conversion has eight bits of resolution.
Copyright2007, SHENZHEN XPTEK TECHNOLOGY CO.,LTD
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XPT2046
SER/DFRThe SER/DFR bit controls the reference mode, either single-ended (high) or differential (low). The differential mode is also referred to as the ratiometric conversion mode and is preferred for X-Position,Y-Position, and Pressure-Touch measurements for optimum performance. The reference is derived from the voltage at the switch drivers, which is almost the same as the voltage to the touch screen. In this case, a reference voltage is not needed as the reference voltage to the ADC is the voltage across the touch screen. In the single-ended mode, the converter reference voltage is always the difference between the VREF and GND pins (see Table 1 and Table 2, and Figure 5 through Figure 8, for further information).
BIT7(MSB) S
BIT 6 A2
BIT 5 A1
BIT 4 A0
BIT 3 MODE
BIT2 SER/DFR
BIT 1 PD1
Table 6. Order of the Control Bits in the Control Byte BIT 7 NAME S DESCRIPTION Start bit. Control byte starts with first high bit on DIN.A new control byte can start every 15th clock cycle in 12-bit conversion mode or every 11th clock cycle in 8-bit conversion mode (see Figure 16). Channel Select bits. Along with the SER/DFR bit,these bits control the setting of the multiplexer input,touch driver switches, and reference inputs (seeTable 1 and Figure 16). 12-Bit/8-Bit Conversion Select bit. This bit controls the number of bits for the next conversion: 12-bits(low) or 8-bits (high). Single-Ended/Differential Reference Select bit. Along with bits A2-A0, this bit controls the setting of the multiplexer input, touch driver switches, and reference inputs (see Table 1 and Table 2). Power-Down Mode Select bits. Refer to Table 5 fordetails.
6-4
A2-A0
MODE
SER/ DFR
1-0
PD1-PD0
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XPT2046
CS
tACQ
DCLK DIN
8
PD1 PD0
Acquire 11 10 9
Conversion 8 7 6 5 4 3 2 1 0
Idle
Zero Filled...
BUSY DOUT
Drivers 1 and 2 (SER/DFR High)
Off Off
On On
Off Off
CS
tACQ
DCLK DIN
8
PD1 PD0
Acquire 11 10 9
Conversion 8 7 6 5 4 3 2 1 0
Idle
Zero Filled...
BUSY DOUT
Drivers 1 and 2 (SER/DFR High)
Off Off
On On
Off Off
Figure 12. Conversion Timing, 24 Clocks-per-Conversion, 8-Bit Bus Interface. No DCLK delay required with dedicated serial port If X-Position, Y-Position, and Pressure-Touch are measured in the single-ended mode, an external reference voltage is needed. The XPT2046 must also be powered from the external reference. Caution should be observed when using the single-ended mode such that the input voltage to the ADC does not exceed the internal reference voltage, especially if the supply voltage is greater than 2.7V. NOTE: The differential mode can only be used for X-Position, Y-Position, and Pressure-Touch measurements. All other measurements require the single-ended mode. PD0 and PD1Table 5 describes the power-down and the internal reference voltage configurations. The internal reference voltage can be turned on or off independently of the ADC. This can allow extra time for the internal reference voltage to settle to the final value prior to making a conversion. Make sure to also allow this extra
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XPT2046
wake-up time if the internal reference is powered down. The ADC requires no wake-up time and can be instantaneously used. Also note that the status of the internal reference power-down is latched into the part (internally) with BUSY going high. In order to turn the reference off, an additional write to the XPT2046 is required after the channel has been converted. PD1 0 PD0 0 PEN IRQ Enabled DESCRIPTION Power-Down Between Conversions. When each conversion is finished, the converter enters a low-power mode. At the start of the next conversion, the device instantly powers up to full power. There is no need for additional delays to ensure full operation, and the very first conversion is valid. The Y switch is on when in power-down. Reference is off and ADC is on. Reference is on and ADC is off. Device is always powered. Reference is on and ADC is on.
0 1 1
1 0 1
PENIRQ Output
The pen-interrupt output function is shown in Figure 13.While in power-down mode with PD0 = 0, the Y-driver is on and connects the Y-plane of the touch screen to GND. The PENIRQ output is connected to the X+ input through two transmission gates. When the screen is touched, the X+ input is pulled to ground through the touch screen.In most of the XPT2046 models, the internal pullup resistor value is nominally 50k, but this may vary between 36k and 67kgiven process and temperature variations. In order to assure a logic low of 0.35 _ (+VCC) is presented to the PENIRQ circuitry, the total resistance between the X+ and Y terminals must be less than 21k.
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XPT2046
Figure 13. PENIRQ Functional Block Diagram The 90 version of the XPT2046 uses a nominal 90k pullup resistor, which allows the total resistance between the X+ and Y terminals to be as high as 30kNote that the higher pullup resistance will cause a slower response time of the PENIRQ to a screen touch, so user software should take this into account. The PENIRQ output goes low due to the current path through the touch screen to ground, which initiates an interrupt to the processor. During the measurement cycle for X-, Y-, and Z-Position, the X+ input is disconnected from the PENIRQ internal pull-up resistor. This is done to eliminate any leakage current from the internal pull-up resistor through the touch screen, thus causing no errors. Furthermore, the PENIRQ output is disabled and low during the measurement cycle for X-, Y-, and Z-Position. The PENIRQ output is disabled and high during the measurement cycle for battery monitor, auxiliary input, and chip temperature. If the last control byte written to the XPT2046 contains PD0 = 1, the pen-interrupt output function is disabled and is not able to detect when the screen is touched. In order to re-enable the pen-interrupt output function under these circumstances, a control byte needs to be written to the XPT2046 with PD0 = 0. If the last control byte written to the XPT2046 contains PD0 = 0, the pen-interrupt output function is enabled at the end of the conversion. The end of the conversion occurs on the falling edge of DCLK after bit 1 of the converted data is clocked out of the XPT2046. It is recommended that the processor mask the interrupt PENIRQ is associated with whenever the processor sends a control byte to the XPT2046. This prevents false triggering of interrupts when the PENIRQ output is disabled in the cases discussed in this section.
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XPT2046
per-Conversion
16 Clocks-per-Conversion
The control bits for conversion n + 1 can be overlapped with conversion n to allow for a conversion every 16 clock cycles, as shown in Figure 14. This figure also shows possible serial communication occurring with other serial peripherals between each byte transfer from the processor to the converter. This is possible, provided that each conversion completes within 1.6ms of starting. Otherwise, the signal that is captured on the input sample-and-hold may droop enough to affect the conversion result. Note that the XPT2046 is fully powered while other serial communications are taking place during a conversion.
Figure 14. Conversion Timing, 16 Clocks-per-Conversion, 8-Bit Bus Interface. No DCLK delay required with dedicated serial port
Digital Timing
Figure 12, Figure 15 and Table 6 provide detailed timing for the digital interface of the XPT2046.
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XPT2046
SYMBOL
DESCRIPTION
+VCC 2.7V, +VCC IOVDD1.5V, CLOAD = 50pF MIN TYP MAX 1.5 100 50 200 200
UNITS
Acquisition Time DIN Valid Prior to DCLK Rising DIN Hold After DCLK High DCLK Falling to DOUT Valid Falling to DOUT Enabled CS
s ns ns ns ns
tTR
200
ns
tCSS
100
ns
tCSH
Rising to DCLK Ignored CS DCLK High DCLK Low DCLK Falling to BUSY Rising/Falling Falling to BUSY Enabled CS
10
ns
ns ns ns
tBDV
200
ns
tBTR
200
ns
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XPT2046
15 Clocks-per-Conversion
Figure 16 provides the fastest way to clock the XPT2046.This method does not work with the serial interface of most microcontrollers and digital signal processors, as they are generally not capable of providing 15 clock cycles per serial transfer. However, this method can be used with field-programmable gate arrays (FPGAs) or applicationspecific integrated circuits (ASICs). Note that this effectively increases the maximum conversion rate of the converter beyond the values given in the specification tables, which assume 16 clock cycles per conversion.
Data Format
The XPT2046 output data is in Straight Binary format, as shown in Figure 17. This figure shows the ideal output code for the given input voltage and does not include the ffects of offset, gain, or noise.
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XPT2046
8-Bit Conversion
The XPT2046 provides an 8-bit conversion mode that can be used when faster throughput is needed and the digital result is not as critical. By switching to the 8-bit mode, a conversion is complete four clock cycles earlier. Not only does this shorten each conversion by four bits (25% faster throughput), but each conversion can actually occur at afaster clock rate. This is because the internal settling time of the XPT2046 is not as criticalsettling to better than 8 bits is all that is needed. The clock rate can be as much as 50% faster. The faster clock rate and fewer clock cycles combine to provide a 2x increase in conversion rate.
Power Dissipation
There are two major power modes for the XPT2046: full-power (PD0 = 1) and auto power-down (PD0 = 0). When operating at full speed and 16 clocks-per-conversion (see Figure 14), theXPT2046 spends most of the time acquiring or converting. There is little time for auto power-down, assuming that this mode is active. Therefore, the difference between full-power mode and auto power-down is negligible. If the conversion rate is decreased by slowing the frequency of the DCLK input, the two modes remain approximately equal. However, if the DCLK frequency is kept at the maximum rate during a conversion but conversions are done less often, the difference between the two modes is dramatic. Figure 18 shows the difference between reducing the DCLK frequency (scaling DCLK to match the conversion rate) or maintaining DCLK at the highest frequency and reducing the number of conversions per second. In the latter case, the converter spends an increasing percentage of time in power-down mode (assuming the auto power-down mode is active).
Figure 18. Supply Current versus Directly Scaling the Frequency of DCLK with Sample Rate or Maintaining DCLK at the Maximum Possible Frequency
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XPT2046
Another important consideration for power dissipation is the reference mode of the converter. In the single-ended reference mode, the touch panel drivers are ON only when the analog input voltage is being acquired (see Figure 12 and Table 1). The external device (e.g., a resistive touch screen), therefore, is only powered during the acquisition period. In the differential reference mode, the external device must be powered throughout the acquisition and conversion periods (see Figure 12). If the conversion rate is high, this could substantially increase power dissipation.CS also puts the XPT2046 into power-down mode. When CS goes high, the XPT2046 immediately goes into power-down mode and does not complete the current conversion. The internal reference, however, does not turn off with CS going high. To turn the reference off, an additional write is required before CS goes high (PD1 = 0).When the XPT2046 first powers up, the device draws about 20A of current until a control byte is written to it with PD0 = 0 to put it into power-down mode. This can be avoided if the XPT2046 is powered up with CS = 0 and DCLK = IOVDD.
Demo
IOVCC R1 R2 R3 R4 J1 J3 Socket IOVCC P5 Header 4 4 3 2 1 P4 ax+ ay+ axayR13 R15 R16 R17 0 0 0 0 1 2 3 4 5 6 Socket Header 6 DCLK CS DIN DOUT BUSY PENIRQ AUX GND 4 DCLK R6 3 CS R8 2 DIN R10 16 DOUT R11 1 BUSY R12 pen 15 12 AUX 10 R14 51 51 51 51 51 51 47K 47K47K 47K OE1 OE2 A1 A2 A3 A4 A5 A6 A7 A8 GND SN74LVC244ADB Socket 1 P6 IOVCC 1K L1 100uH C12 104 C13 106 D2 LED3 J9 Socket +VCC U4 5 +VCC VBAT 11 VBAT VREF 13 VREF
IOVCC14
P1
+VCC U1 5 +VCC VBAT 11 VBAT 13 VREF VREF 14 IOVCC X+ Y+ XY6 7 8 9 IOVDD X+ Y+ XY-
IOVCC U2 20 VCC 18 16 14 12 9 7 5 3 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
1 19 2 4 6 8 11 13 15 17 10
R5 R7 R9
51 51 51
J2 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 27 26
J4 U3A
J6 Socket
M74HC07M1R 2
1 2 3 Header 3
C8 104 3
U3B 4 9 M74HC07M1R U3C 5 6 11 M74HC07M1R J7 Socket R25 R26 R27 1K 1K 1K 13 U3D 8 M74HC07M1R U3E 10 M74HC07M1R U3F 12 M74HC07M1R
D Connector 25
IOVDD X+ Y+ XY-
4 3 2 16 1 15 12 10
IOVCC
X+ Y+ XY-
6 7 8 9
pen
AUX
TSC2046IRGVR
http://www.xptek.com.cn
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