UMN CMXC c800 - 1 - 7619
UMN CMXC c800 - 1 - 7619
UMN CMXC c800 - 1 - 7619
7)
7)
8)
7)
15)
7)
Extern
LOLSI
(n)
6)
7)
7)
8)
7)
15)
7)
System
LOCC
4)
LOCCR
4)
E1
(CAS)
AISk (n)
9)
14)
SYNk (n)
9)
14)
Dk-Bit (n)
14)
Nk-Bit (n)
14)
ECC-
Port
Dan
2)
Extern
passive
QD2-
Bus
LOQD2 Ser-
vice
12)
) The measure is being implemented (as soon as possible)
1) Making PCI interfaces passive is only possible for the interface which is being connected to the terminal panel (external PCI interface).
2) The alarm monitor can be configured at Din (ECC port). The basic setting is switched on.
3) The alarm criterion only applies if the partner unit is available. The partner unit is considered available if no LOCC and no LOCCR alarm
are being signaled. If the unit is in standby mode then the partner unit must be available (received CCUR signal is active)
4) The alarm criterion does not trigger an alarm on the active unit.
5) This criterion is only evaluated for PCI links configured as active.
(for PCI links 1 to 8 the PCI links are active, for which a PU16 is inserted;
for PCI links 9 to 12 active/passive switching is carried out via QD2)
6) Only clock sources are monitored which have been registered in the clock priority list.
7) Is executed if the clock source is active and no guide clocks of lower priority are available.
8) Is executed if the clock source is not active or there are more guide clocks of a lower priority available.
9) AIS is injected into the shared signaling channels.
10) If the PLL is idle, the T3out driver becomes passive.
11) Switching is only executed on an alternative route if an alternative route has been configured for the connection which is affected by the
failure of the PCI signal.
12) The service LED goes out if there is no connection to the master TMN system via the QD2 interface.
13) The On LED goes out at the same time.
14) The TMN alarm is signaled via the PU16 unit.
15) Is executed if the clock source is active and there are more guide clocks of lower priority are available.
16) This action is used to insert a 1 into the shared sub time slots.
Z) High-impedance output (tri state)
Tab. 3.10 CUC Alarm Table (active)
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UMN CMXC
W-
Bus
LOSVB System
LOSTSB
3)
System
Unit A(n)
S(n)
B(n)
Inter-
nal
LOFTSI_1 Internal
LOFTSI_2 Z16) Internal
FWE Internal
Startup Z Z Internal
13)
STE Z Z Internal
13)
Criterion Alarm AIS Idle
on
Change TMN
alarm
LED
A S B PCID
(n)
PCMU
(n)
SUBU
(n)
CASU
(n)
CASD
(n)
Dout
(n)
Dk
(n)
PLL
10)
Sync
Sour
ce
Trunk Stand
by
) The measure is being implemented (as soon as possible)
1) Making PCI interfaces passive is only possible for the interface which is being connected to the terminal panel (external PCI interface).
2) The alarm monitor can be configured at Din (ECC port). The basic setting is switched on.
3) The alarm criterion only applies if the partner unit is available. The partner unit is considered available if no LOCC and no LOCCR alarm
are being signaled. If the unit is in standby mode then the partner unit must be available (received CCUR signal is active)
4) The alarm criterion does not trigger an alarm on the active unit.
5) This criterion is only evaluated for PCI links configured as active.
(for PCI links 1 to 8 the PCI links are active, for which a PU16 is inserted;
for PCI links 9 to 12 active/passive switching is carried out via QD2)
6) Only clock sources are monitored which have been registered in the clock priority list.
7) Is executed if the clock source is active and no guide clocks of lower priority are available.
8) Is executed if the clock source is not active or there are more guide clocks of a lower priority available.
9) AIS is injected into the shared signaling channels.
10) If the PLL is idle, the T3out driver becomes passive.
11) Switching is only executed on an alternative route if an alternative route has been configured for the connection which is affected by the
failure of the PCI signal.
12) The service LED goes out if there is no connection to the master TMN system via the QD2 interface.
13) The On LED goes out at the same time.
14) The TMN alarm is signaled via the PU16 unit.
15) Is executed if the clock source is active and there are more guide clocks of lower priority are available.
16) This action is used to insert a 1 into the shared sub time slots.
Z) High-impedance output (tri state)
Tab. 3.10 CUC Alarm Table (active) (Cont.)
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Criterion Alarm AIS Idle
on
Change TMN
alarm
LED
A S B PCID
(n)
PCMU
(n)
SUBU
(n)
CASU
(n)
CASD
(n)
Dout
(n)
Dk
(n)
PLL
10)
Sync
Sour
ce
Trunk Stand
by
PCI LOPU
(n)
5)
System
passive
1)
Sync
Sourc
e
LOESI
6)
8)
Extern
LOLSI
(n)
6)
LOCC
LOCCR
E1
(CAS)
AISk (n)
9)
14)
SYNk (n)
9)
14)
Dk-Bit (n)
14)
Nk-Bit (n)
14)
ECC-
Port
Dan
2)
Extern
passive
QD2-
Bus
LOQD2
) The measure is being implemented (as soon as possible)
1) Making PCI interfaces passive is only possible for the interface which is being connected to the terminal panel (external PCI interface).
2) The alarm monitor can be configured at Din (ECC port). The basic setting is switched on.
3) The alarmcriterion only applies if the partner unit is available. The partner unit is considered available if no LOCC and no LOCCR alarm
are being signaled. If the unit is in standby mode then the partner unit must be available (received CCUR signal is active)
4) The alarm criterion does not trigger an alarm on the active unit.
5) This criterion is only evaluated for PCI links configured as active.
(for PCI links 1 to 8 the PCI links are active, for which a PU16 is inserted;
for PCI links 9 to 12 active/passive switching is carried out via QD2)
6) Only clock sources are monitored which have been registered in the clock priority list.
7) Is executed if the clock source is active and no guide clocks of lower priority are available.
8) Is executed if the clock source is not active or there are more guide clocks of a lower priority available.
9) AIS is injected into the shared signaling channels.
10) If the PLL is idle, the T3out driver becomes passive.
11) Switching is only executed on an alternative route if an alternative route has been configured for the connection which is affected by the
failure of the PCI signal.
12) The service LED goes out if there is no connection to the master TMN system via the QD2 interface.
13) The On LED goes out at the same time.
14) The TMN alarm is signaled via the PU16 unit.
15) Is executed if the clock source is active and there are more guide clocks of lower priority are available.
16) This action is used to insert a 1 into the shared sub time slots.
Z) High-impedance output (tri state)
Tab. 3.11 CUC Alarm Table (standby)
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UMN CMXC
W-
Bus
LOSVB
LOSTSB
3)
System
Unit A(n)
S(n)
B(n)
Intern LOFTSI_1 Intern
LOFTSI_2 Z
16)
Intern
FWE Intern
Startup Z Z In-
tern
13)
STE Z Z In-
tern
13)
Criterion Alarm AIS Idle
on
Change TMN
alarm
LED
A S B PCID
(n)
PCMU
(n)
SUBU
(n)
CASU
(n)
CASD
(n)
Dout
(n)
Dk
(n)
PLL
10)
Sync
Sour
ce
Trunk Stand
by
) The measure is being implemented (as soon as possible)
1) Making PCI interfaces passive is only possible for the interface which is being connected to the terminal panel (external PCI interface).
2) The alarm monitor can be configured at Din (ECC port). The basic setting is switched on.
3) The alarmcriterion only applies if the partner unit is available. The partner unit is considered available if no LOCC and no LOCCR alarm
are being signaled. If the unit is in standby mode then the partner unit must be available (received CCUR signal is active)
4) The alarm criterion does not trigger an alarm on the active unit.
5) This criterion is only evaluated for PCI links configured as active.
(for PCI links 1 to 8 the PCI links are active, for which a PU16 is inserted;
for PCI links 9 to 12 active/passive switching is carried out via QD2)
6) Only clock sources are monitored which have been registered in the clock priority list.
7) Is executed if the clock source is active and no guide clocks of lower priority are available.
8) Is executed if the clock source is not active or there are more guide clocks of a lower priority available.
9) AIS is injected into the shared signaling channels.
10) If the PLL is idle, the T3out driver becomes passive.
11) Switching is only executed on an alternative route if an alternative route has been configured for the connection which is affected by the
failure of the PCI signal.
12) The service LED goes out if there is no connection to the master TMN system via the QD2 interface.
13) The On LED goes out at the same time.
14) The TMN alarm is signaled via the PU16 unit.
15) Is executed if the clock source is active and there are more guide clocks of lower priority are available.
16) This action is used to insert a 1 into the shared sub time slots.
Z) High-impedance output (tri state)
Tab. 3.11 CUC Alarm Table (standby) (Cont.)
Alarm criteria
LOPU(n) Loss of PCI upstream, PCI link n
PCI signals fail at the PCI receiving port of the PCIC, detected by:
- Parity error rate
- Loss of frame synchronization
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LOESI Loss of external synchronization input
Loss of T3in (background clock monitor in the PCIC).
LOLSI(n) Loss of line synchronization input
Loss of the guide clock from the E1 port (background clock monitor in the
PCIC).
LOCC Loss of cross coupling
Loss of the guide clock of the standby module (background clock monitor
in the PCIC),
Alarm criterion triggers an alarm on the standby module.
LOCCR Loss of Cross Coupling PCI frame
Loss of PCI frame guide clock in the standby module (background clock
monitor in the PCOC),
Alarm criterion triggers an alarm on the standby module.
AISK Received AIS signal in the multiframe
The incoming signals are controlled at the interfaces if they contain the AIS
signal. Evaluation is carried out according to G.796.
SYNk Detects a failure of the multiframe synchronization at E1.
Dk bit Bit 6 of time slot 16 (bits 1 to 8) in frame 0 of the received E1 signal
D bit = "L" normal status
D bit = "H" display of the distant end (the multiframe signal in the
preceding equipment fails)
Nk bit Bit 7 of time slot 16 (bits 1 to 8) in frame 0 of the received E1 signal
Nk bit = "H" bit is not being used
Nk bit = "L" display
Din Signal failure at ECC port (Din)
LOQD2 Signal failure on QD2
LOSVB Signal failure on SVB
LOSTSB Signal failure on STSB
A(n) Urgent alarm of module n
S(n) Service alarm of module n
B(n) Non-urgent alarm of module n
LOFTSI_1 Failure or faulty frame synchronization impulse at the ICTTSI2K32_1 cross
connect
LOFTSI_2 Failure or faulty frame synchronization impulse at the IC TTSI2K32_2 sub
rate cross connect
FWE Flash write error
STE Self test error
Start-up Startup phase of the module
Responses
A alarm Urgent unit alarm, service is not available. Initiate immediate ac-
tion to rectify the fault. If the A alarm is configured as a switch
criterion for the AZ contact, this is activated immediately until the
A alarm disappears.
B alarm Non-urgent unit alarm, service is impaired.
Initiate maintenance action.
Immediate activation of the BZ contact until the B alarm disap-
pears.
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S alarm Service unit alarm, service is not available.
Initiate maintenance action. Fault must be rectified at another lo-
cation if possible. If the S alarm is configured as a switch criteri-
on for the AZ contact, this is activated immediately before the S
AIS Send continuous H signal.
Z Tri state switching of the interface transmitter
Dk bit Send bit 6 (Dk bit) of the multiframe in the E1 signal.
AIS PCID Use AIS in the relevant time slots of the PCI downstream links
AIS PCMU Use AIS in the relevant time slots of the PCI upstream links
AIS SUBU Use AIS in the subrate upstream links
AIS CASU Use AIS in the shared signals
AIS CASD Use AIS in the signals of the CAS downstream links
AIS Dout Send AIS at the ECC port affected
Idle PLL Switch PLL for 8.192 MHz system clock in idle circuit
Change sync source Change active synchronization clock source
Change trunk Switch to the alternative route
TMN alarm Display alarm via the TMN system
PNA Protection not available (switch to standby CUC blocked)
LED The specified SMD LED of the unit switches on.
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3.3.3 Operating Elements
The positions of the connectors and the LEDs are shown in Fig. 3.8.
Fig. 3.8 CUC Operating Elements
Fig. 3.9 Position of the Jumpers on the Pin Strips X401
10
11
Amber1)
Red1)
Red1)
Red1)
Green1)
10 Internal connector
11 External connector
1) Only visible if front panel is removed
Red
Green
X401
2 1
Pin strips X401 to configure the terminating resistors of the T3 interfaces at 75 /120 or high
impedance
120 /75 high impedance
1 2
1 2
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Assignment of the Connectors
Pin A row B row C row
1 GND GND GND (A0)...(A4) = 12 slot address of backplane
(ADR0)...(ADR4) = 13 is QD2 address.
of backplane (for both CUC = 13)
P5V (Pin C9) = 5V output with
low power for terminating resistor on the
backplane
CC_T / CC_R = Clock synchronization
CCR_T / CCR_R = Frame
and multiframe synchronization
SVB:
(I) = CUC input
(O) = CUC output
CCUR_T = H ----> PCI active
(unsymm. switching signal from CUC/1,
i.e. CUC/2 in standby)
2 (ADR0) GND (A0) PUP
3 GND (ADR1) GND (A1)
4 (ADR2) (A2) MUP2
5 (ADR3) (A3)
6 GND (ADR4) GND (A4) CCUR_ (O)
7 GND GND CCUR_ (I)
8 GND_S GND_S GND_S
9 LED_R LED_G P5V
10 GND GND GND
11 LSI1_P LSI1_N T3AN-A1
12 GND GND T3AN_B1
13 LSI2_P LSI2_N
14 GND GND T3AB_A1
15 LSI3_P LSI3_N T3AB_B1
16 GND GND GND
17 LSI4_P LSI4_N
18 GND GND STSB (O)
19 LSI5_P LSI5_N STSB (O)
20 GND GND GND
21 LSI6_P LSI6_N STSB (I)
22 GND GND STSB (I)
23 LSI7_P LSI7_N PM
24 GND GND GND
25 LSIFR_P LSIFR_N PE
26 GND GND GND
27 SVB_D_P (O) TXD RXD
28 SVB_D_N (O) CC (O)
29 GND GND CCR (O)
30 SVB_U_P (I) CCR (I)
31 SVB_U_N (I) REF_FR CC (I)
32 GND GND GND
Tab. 3.12 CUC Connector (bottom)
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Pin A row B row C row
1 GND GND ZAA6 (7) Table applies to X211
The following apply to X212:
PCIS_ instead of PCI_ and CCURS_
instead of CCUR_
and also ZAA7 and ZAB7
EAN_A/B1, EAB_A/B1, ET_A/B1 =
ECC interface 1with clock signal
(likewise interface 2)
EAN_A/B3, EAB_A/B3 =
ECC interface 3 without
carried clock signal
(likewise interface 4)
Explanations on the PCI signals:
(likewise signal PCIS_... for X212)
..._D_... = Downstream
..._U_... = Upstream
..._P... = Positive
..._N... = Negative
(I) = CUC input
(O) = CUC output
CCUR_A/B = symm. switching signal
for external interfaces
2 GND_S GND_S ZAB6 (7)
3 PCI_D_P9 (O) PCI_D_N9 (O) PCI_D_P11 (O)
4 PCI_U_P9 (I) GND PCI_D_N11 (O)
5 PCI_U_N9 (I) PCI_U_P11 (I) PCI_U_N11 (I)
6 PCI_D_P10 (O) PCI_D_N10 (O) PCI_D_P12 (O)
7 PCI_U_P10 (I) GND PCI_D_N12 (O)
8 PCI_U_N10 (I) PCI_U_P12 (I) PCI_U_N12 (I)
9 GND CCUR_B CCUR_A
10 EAN_A1 EAN_B1 EAN_A3
11 EAB_A1 EAB_B1 EAN_B3
12 ET_A1 ET_B1 EAB_A3
13 EAN_A2 EAN_B2 EAB_B3
14 EAB_A2 EAB_B2 EAN_A4
15 ET_A2 ET_B2 EAN_B4
16 QD2SAB_B (O) QD2SAB_A (O) EAB_A4
17 QD2SAN_B (I) QD2SAN_A (I) EAB_B4
18 GND GND GND
19 PCI_D_P1 (O) PCI_D_P5 (O) PCI_D_N5 (O)
20 PCI_D_N1 (O) GND PCI_U_P5 (I)
21 PCI_U_P1 (I) PCI_U_N1 (I) PCI_U_N5 (I)
22 GND GND GND
23 PCI_D_P2 (O) PCI_D_P6 (O) PCI_D_N6 (O)
24 PCI_D_N2 (O) PCI_U_P6 (I) PCI_U_N6 (I)
25 PCI_U_P2 (I) PCI_D_P7 (O) PCI_D_N7 (O)
26 PCI_U_N2 (I) PCI_U_P7 (I) PCI_U_N7 (I)
27 GND GND GND
28 PCI_D_P3 (O) PCI_D_N3 (O) PCI_D_P8 (O)
29 PCI_U_P3 (I) PCI_U_N3 (I) PCI_D_N8 (O)
30 PCI_D_P4 (O) PCI_D_N4 (O) PCI_U_P8 (I)
31 PCI_U_P4 (I) PCI_U_N4 (I) PCI_U_N8 (I)
32 GND GND GND
Tab. 3.13 CUC Connector (top)
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3.3.4 Technical Data
T3 Interface
PCI Interface
QD2 Slave Interface
Frequency 2048 kHz (1 50 ppm)
T3in
Impedance, high-impedance 1.6 k II < 120 pF
Input voltage 0.5 V
0S
to 1.9 V
0S
Cable attenuation at 2048 kHz 6 dB
Reflection attenuation at 2048 kHz 15 dB
T3out
Impedance 120 , symmetrical or
75 , unsymmetrical
Level
120
75
1.0 V
0S
to 1.9 V
0S
0.75 V
0S
to 1.5 V
0S
Inherent jitter (at 20 Hz to 100 kHz) 0.05 UIpp
Bit rate 12.96 Mbit/s
Coding NRZ
Frame duration 125 s
Frame length 1620 bit
Level for symmetrical digital interfaces according to EIA RS422
Maximum difference voltage at input 250 mV
Equal level at input 0.5 V to (Vcc - 0.5 V)
Difference voltage at output 2 V
Equal level at output 0.4 V to 2.5 V
Configuration serial bus system according
to EIA RS 485
Bus user 1 master and
up to 30 slaves
Transmission lines symmetrical, 4-wire
Impedance bus termination high-impedance
Bit rate (automatic identification) 1.2 kbit/s, 9.6 kbit/s
or 64 kbit/s
Transmission mode plesiochronous
Line code NRZI
permissible line length 500 m
Protocol
Initiator of the data connection
Addresses of secondaries
HDLC (NRM, polling)
primary
1 to 30
Address setting, via rear panel 5 bit
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ECC Interface
Alarm Contacts
CCUR Interface
Power Supply
3.4 Interface Unit PU16
3.4.1 Overview
Interface unit PU16 receives 16 plesiochronous, HDB3-coded, 2-Mbit/s signals (E1in),
synchronizes all the data streams, converts the data into PCI signals and sends four PCI
upstreams to the CUC.
Unit PU16 receives four PCI downstreams from the CUC in the reverse direction, gen-
erates the appropriate frames and converts them into 16 x 2 Mbit/s (E1out).
One central CUC can process the data streams of two PU16s.
Level according to ITU-T V.11
Bit rate
asynchronous operation
synchronous operation with clock CLK64
9.6 kbit/s
64 kbit/s
Permissible external voltage, surge pulse 1.2/50 s 500 V
Max. permissible load current 2 A
The driver connection is designed short-circuit proof.
Type according to EIA RS485,
symmetrical
Signaling the active CUC unit H level
Input voltage 36 V to 72 V
Power consumption of the unit 8 W
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Fig. 3.10 PU16 Block Diagram
PU16 performs the following functions:
Connecting 16 E1 interfaces (2-Mbit/s ports)
Frame and multiframe synchronization of the received signal
Establishing the supervision and alarm signaling function for 16 2-Mbit/s interfac-
es
Transmitting the guide clock to the CUC via the LSI interface
selecting 7 from 16 clock sources controlled by the CUC,
transmitting frame synchronous information for the selected clock source
Multiplexing 16 2-Mbit/s data streams in four PCI links and symmetrical transmis-
sion of the PCI signals to the CUC
Providing four PCIS interfaces for redundant signal transmission
Signaling PCI transmission via the CCUR/CCURS interface between the active
CUC and the standby CUC and PU16 (via an unsymmetrical line)
Communication between the CUC and the PU16 via SVB in the master slave mode
Providing the time
Storing the initial programloader, the conguration, crash data, error manager data
and the type label data (writable part): Storage area of ash EEPROM 512 kBytes
Storing the xed type label data in the serial EEPROM (size 256 bytes).
Unit PU16 has the following interfaces:
Data
16 E1 interfaces (according to G.703/6) to connect 16 x 2-Mbit/s ports
8 PCI interfaces (four active and four standby) as system-internal interfaces to
transmit the PCM payload to the active and standby CUC units
Clock pulses: 7 x LSI interfaces to transmit the guide clock to the CUC
Synchron. 2-Mbit/s
interface
E1in(16)
E1out(16)
PCI
interface
LSI1
LSI7
ADR
5
(0 to 4)
SVB
G.703/6
CCUR
ON
EXTERNAL
SYSTEM
INTERNAL
SERVICE
4
4
HDLC
controller Computer
EEPROM
RAM
PCI1
PCIS4
E1in(1)
E1out(1)
Synchron. 2-Mbit/s
interface
4
PCI4
4
PCIS1
PUP
MUP
+5 V
+3.3 V
GND
CCURS
1
16
1
16
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Supervision
SVB interface to communicate between the CUC and PU16 units
Rear panel contacts for slot identication
Debug interface for commissioning and software development
Control signals CCUR and CCURS to select the PCI bus switched to active or
standby
Power supply with 48 V.
3.4.2 Supervision and Alarm Signaling
The PU16 mode can be diagnosed with reference to alarmmessages, see alarmtable.
5 SMD-LEDs are located on the front panel of the unit which can only be seen when the
front panel of the shelf is removed. They show the operating mode of the PU16.
Checking the transmission quality at E1in
PCM signals received at the E1 ports are analyzed continuously according to ITU-T
G.821 and the values determined are stored in quality data records. Both the current
quality counter and any stored record can be displayed.
In addition, the frame slips are counted in a counter. The counter can be requested via
the user interface.
Loop connections
Loop connections can be established for maintenance work which locate the fault in
case of malfunctioning. The loops can be controlled individually for each 2-Mbit/s port.
The following loops can be connected:
Local loop (LL)
The signal at the send port of the 2-Mbit/s interface is connected to the receive port.
The AIS signal is sent in the E1out direction. In this way, faults can be located within
the CMXC system module.
Remote loop (RL)
The signal at the receive port of the 2-Mbit/s interface is connected to the send port.
In the PCI upstreamdirection, AIS is put into the corresponding time slots instead of
the useful load. In this way, malfunctioning of the external connecting lines can be
located.
LED Color Mode Meaning
ON green on Unit in order
flashes SW download
off No power supply or failure of the unit
EXTERNAL red on Alarm mode of E1 interfaces
SYSTEM red on Alarm mode of system-internal interfaces (PCI link, SVB)
INTERNAL red on Unit error, power supply error
flashes Unit was not yet loaded with software after power-up
SERVICE yel-
low
on Active service mode on the unit
(SW download, loop switched)
Tab. 3.14 PU16 Signaling the Operating Mode
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Fig. 3.11 Local Loop and Remote Loop Test Loops
The loop connection is released and split by SISA commands via the LCT or the OS.
The loop mode is not stored in the EEPROM. The current loop mode can be displayed
via SISA requests. Moreover, the SERVICE-LED indicates an activated loop connection
on the unit. The resulting reactions for activated test loops are specified in the alarm ta-
ble.
The follow-up actions for activated test loops are given in the alarm table.
LL RL
E1out
E1in
PCI
downstream
PCI
upstream
2-Mbit/s
interface
PCI
interface
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Criterion Action
Alarm E1out E1out
(CAS)
PCIup
A S B D
bit
AIS HighZ Dk-
bit
7)
AISk
7)
AIS HighZ Change
sync
source
Change
trunk
5)
TMN
alarm
LED
E1in
(unframed)
LOS
3)
4)
EXTERNAL
AIS
3)
4)
EXTERNAL
E1in/
(framed)
LOS
3)
4)
EXTERNAL
AIS
3)
4)
EXTERNAL
SYN
3)
4)
EXTERNAL
BER-3
3)
4)
EXTERNAL
BER-5/6
1)
9)
6)
EXTERNAL
D-Bit EXTERNAL
N-Bit
8)
EXTERNAL
AISk
2)
EXTERNAL
SYNk
2)
EXTERNAL
Dk-Bit
2)
EXTERNAL
Nk-Bit
2)8)
EXTERNAL
TSB
10)
4)11)
E1 passive
3)
PCI down LOF(n)
12)
SYSTEM
PER(n)
12)
SYSTEM
BOVD(n)
13)
INTERNAL
The action is to be implemented (as soon as possible).
1) The basic setting for the alarm criterion (if delivered) is BER-6.
2) The alarm evaluation is only executed for the E1 ports for which CAS signaling has been configured.
3) The AIS PCIup action only applies to time slots of the PCI links which are relevant to the corresponding E1 port.
4) The switching action is carried out on another clock source if the current clock synchronization is carried out by the clock source that
has just failed. If the internal oscillator clock source is activated, then the T3out signal is also blocked.
5) The alarm is triggered for connections in the cross connect for which an alternative route has been configured.
6) The alarm action is configurable.
7) The alarm is triggered by the CUC module.
8) The alarm criterion is configurable.
9) The alarm action is configurable. BER-5/6 leads to the B alarm.
10) The QD2 configures the clock control bit. An Sa bit (Sa bits 4 to 8) can be configured for each E1 port as a clock control bit. Regardless
of whether the Sa bit is low or high active, it is configured by QD2.
11) The clock source is only configured if the clock control bit is received for the E1 port and is used as an active clock source and
configuration of the clock control bit is carried out by QD2.
12) The alarm action only applies to the E1 ports which are assigned to the PCI receiver that signals the fault.
13) The alarm action only applies to the E1 or PCI ports which are assigned to the PCIPG that signals the fault.
14) Action AIS to E1out applies to all 16 E1 ports.
15) Alarm actions only apply to versions without V5.x signaling.
Tab. 3.15 PU16 Alarm Table
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Internal BOVU(n)
13)
INTERNAL
LOC25(n) INTERNAL
LOC8(n)
14)
INTERNAL
LOSVB SYSTEM
LOFTSI
15)
INTERNAL
STE INTERNAL
Start-Up - INTERNAL
Service LL
4)
SERVICE
RL
3)
SERVICE
Criterion Action
Alarm E1out E1out
(CAS)
PCIup
A S B D
bit
AIS HighZ Dk-
bit
7)
AISk
7)
AIS HighZ Change
sync
source
Change
trunk
5)
TMN
alarm
LED
The action is to be implemented (as soon as possible).
1) The basic setting for the alarm criterion (if delivered) is BER-6.
2) The alarm evaluation is only executed for the E1 ports for which CAS signaling has been configured.
3) The AIS PCIup action only applies to time slots of the PCI links which are relevant to the corresponding E1 port.
4) The switching action is carried out on another clock source if the current clock synchronization is carried out by the clock source that
has just failed. If the internal oscillator clock source is activated, then the T3out signal is also blocked.
5) The alarm is triggered for connections in the cross connect for which an alternative route has been configured.
6) The alarm action is configurable.
7) The alarm is triggered by the CUC module.
8) The alarm criterion is configurable.
9) The alarm action is configurable. BER-5/6 leads to the B alarm.
10) The QD2 configures the clock control bit. An Sa bit (Sa bits 4 to 8) can be configured for each E1 port as a clock control bit. Regardless
of whether the Sa bit is low or high active, it is configured by QD2.
11) The clock source is only configured if the clock control bit is received for the E1 port and is used as an active clock source and
configuration of the clock control bit is carried out by QD2.
12) The alarm action only applies to the E1 ports which are assigned to the PCI receiver that signals the fault.
13) The alarm action only applies to the E1 or PCI ports which are assigned to the PCIPG that signals the fault.
14) Action AIS to E1out applies to all 16 E1 ports.
15) Alarm actions only apply to versions without V5.x signaling.
Tab. 3.15 PU16 Alarm Table (Cont.)
Alarm criterion
LOS Signal failure to E1 or Din
AIS Receive the AIS signal
AIS Receive the AIS signal
The incoming signals are controlled at the interfaces if they contain
the AIS signal.
SYN Detects a failure of the frame synchronization for E1 (failure of the
PCMframe; its failure is displayed for selected CRC4 frames of the 2
Mbit/s signal)
BER-3 The error rate at E1 is greater than or equal to 10-3.
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BER-5/6 The error rate of the received PCM signal at E1 is greater than or
equal to:
for active CRC4 frames : 10-6
for switched-off CRC4 frames : 10-5
D bit Bit 3 of the received service word in the E1 signal
D bit = "L" normal status
D bit = "H" display (the received signal in the
preceding equipment fails)
N bit Sa4, bit 4 of the received service word in the E1 signal
N bit = "H" bit is not being used
N bit = "L" display
AISk Receive the AIS signal in the multiframe
The incoming signals are controlled at the interfaces if they contain
the AIS signal. Analysis is carried out according to G.796.
SYNk Detect a failure of the multiframe synchronization at E1.
Dk bit Bit 6 of time slot 16 (bits 1 to 8) in frame 0 of the received E1 signal
D bit = "L" normal status
D bit = "H" display (the multiframe signal in the
preceding equipment fails)
Nk bit Bit 7 of time slot 16 (bits 1 to 8) in frame 0 of the received E1 signal
Nk bit = "H" bit is not being used
Nk bit = "L" display
TSB Receive the clock control bit
LOF Loss of frame synchronization in the PCI downstream
PER Parity error rate in the PCI downstream
BOVD Buffer overflow in the PCI downstream
BOVU Buffer overflow in the PCI upstream
LOC25 Failure of the VCXO in the PCI receiver (25.92 MHz)
LOC8 Failure of the user PLL (8.192 MHz)
LOFTSI Failure of or fault with the frame synchronization impulses at the TTSI
STE Self test error
Start-up Startup phase of the module
LL Local loop (close to loop at an E1 port)
RL Remote loop (remote loop at an E1 port)
Responses
A alarm Urgent unit alarm, service is not available.
Initiate immediate action to rectify the fault. If the A alarm is config-
ured as a switching criterion for the AZ contact, this is activated im-
mediately until the A alarm disappears.
B alarm Non-urgent unit alarm, service is impaired. Initiate service action.
Immediate activation of the BZ contact until the B alarm disappears.
S alarm Service unit alarm, service is not available.
Fault must be rectified at another location if possible. If the S alarmis
configured as a switching criterion for the AZ contact, this is activated
immediately until the S alarm disappears.
Dk bit Send bit 3 (D bit) of the service word in the E1 signal.
AIS Send continuous H signal.
High Z High sender Z switching of the E1 interface.
D bit Send bit 6 (Dk bit) of the multiframe in the E1 signal.
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3.4.3 Operating Elements
The operating elements and the positions of the connectors and the LEDs are shown in
Fig. 3.12.
Fig. 3.12 PU16 Operating Elements
Position of the jumpers on the pin strips:
The jumpers are to be used to configure the terminating resistors of the sixteen E1 in-
terfaces of 75 or 120 for the 6-pin strips. The jumpers must be inserted according
to the required input Impedance, see Fig. 3.13.
AISk Send continuous H signal in the multiframe.
AIS PCI up Use AIS in the relevant time slots of the PCI upstream links.
High Z PCI up High sender Z switching of the PCI interface.
Change sync Change the active synchronization clock source.
Source change
trunk
Switch to the alternative route.
TMN alarm Alarm display via the TMN system.
LED The specified SMD LED of the unit switches on.
10
11
Amber1)
Red1)
Red1)
Red1)
Green1)
10 Internal connector
11 External connector
1) Only visible if the front panel is removed Front pan-
Pin strips X101 to X104, X201 to X204, X301 to X304 and X401 to X404 to configure the
terminating resistors of the sixteen E1 interfaces at 75 or 120
X101
X104
...
X201
X204
...
X301
X304
...
X401
X404
...
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Fig. 3.13 Position of the Jumpers on the Pin Strips
Pin A row B row C row
1 GND GND GND
2 (A0) GND
3 GND (A1) MUP1
4 (A2) GND MUP2
5 (A3) CCUR (I) GND_S
6 GND (A4) CCUR (I) GND_S
7 GND GND GND
8 PU_AN PCI_D_P (I)
9 TYP PCI_D_N (I)
10 GND GND PCI_U_P (O)
11 LSI1_P LSI1_N PCI_U_N (O)
12 GND GND GND
13 LSI2_P LSI2_N PCI_D_P (I)
14 GND GND PCI_D_N (I)
15 LSI3_P LSI3_N PCI_U_P (O)
16 GND GND PCI_U_N (O)
17 LSI4_P LSI4_N
18 GND GND GND
19 LSI5_P LSI5_N PCIS_D_P (I)
20 GND GND PCIS_D_N (I)
21 LSI6_P LSI6_N PCIS_U_P (O)
22 GND GND PCIS_U_N (O)
23 LSI7_P LSI7_N PM
24 GND GND GND
25 LSIFR_P LSIFR_N PCIS_D_P (I)
26 GND GND PCIS_D_N (I)
27 SVB_D_P (I) RXD PCIS_U_P (O)
28 SVB_D_N (I) TXD PCIS_U_N (O)
Tab. 3.16 PU16 Connector (bottom)
120 75 Jumper settings for the following
6-pin strips:
X101 to X104
X201 to X204
X301 to X304
X401 to X404
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29 GND GND
30 SVB_U_P (O) PE
31 SVB_U_N (O) REF_FR
32 GND GND
Pin A row B row C row
1 GND GND F1out_A9 (O)
2 F1out_B9 (O)
3 F1out_A1 (O) F1out_B1 (O) F1in_A9 (I)
4 F1in_A1 (I) F1in_B1 (I) F1in_B9 (I)
5 F1in_A2 (I) F1in_B2 (I) F1in_A10 (I)
6 F1out_A2 (O) F1out_B2 (O) F1in_B10 (I)
7 F1out_A3 (O) F1out_B3 (O) F1out_A10 (O)
8 F1in_A3 (I) F1in_B3 (I) F1out_B10 (O)
9 F1in_A4 (I) F1in_B4 (I) F1out_A11 (O)
10 F1out_A4 (O) F1out_B4 (O) F1out_B11 (O)
11 F1out_A5 (O) F1out_B5 (O) F1in_A11 (I)
12 F1in_A5 (I) F1in_B5 (I) F1in_B11 (I)
13 F1in_A6 (I) F1in_B6 (I) F1in_A12 (I)
14 F1out_A6 (O) F1out_B6 (O) F1in_B12 (I)
15 F1out_A7 (O) F1out_B7 (O) F1out_A12 (O)
16 F1in_A7 (I) F1in_B7 (I) F1out_B12 (O)
17 F1in_A8 (I) F1in_B8 (I) F1out_A13 (O)
18 F1out_A8 (O) F1out_B8 (O) F1out_B13 (O)
19 F1in_A13 (I)
20 F1in_B13 (I)
21 F1in_A14 (I)
22 F1in_B14 (I)
23 F1out_A14 (O)
24 PCI_D_P1 (I) PCI_D_N1 (I) F1out_B14 (O)
25 PCI_U_P1 (O) PCI_U_N1 (O) F1out_A15 (O)
26 PCI_D_P2 (I) PCI_D_N2 (I) F1out_B15 (O)
27 PCI_U_P2 (O) PCI_U_N2 (O) F1in_A15 (I)
28 PCIS_D_P1 (I) PCIS_D_N1 (I) F1in_B15 (I)
29 PCIS_U_P1 (O) PCIS_U_N1 (O) F1in_A16 (I)
30 PCIS_D_P2 (I) PCIS_D_N2 (I) F1in_B16 (I)
Tab. 3.17 PU16 Connector (top)
Pin A row B row C row
Tab. 3.16 PU16 Connector (bottom) (Cont.)
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3.4.4 Technical Data
E1 Interface
According to ITU-T G.703/6
Power Supply
3.5 Supervision Unit SUE
3.5.1 Overview
Supervision unit SUE forms the access of the network management system to the net-
work elements in shelf UMXLS.
In standalone operation of shelf SNUS, the SUE also takes over the TMN access to the
FMX2R3.1, CMXC, OMX16 and SMX1/4c System Modules.
31 PCIS_U_P2 (O) PCIS_U_N2 (O) F1out_A16 (O)
32 GND GND F1out_B16 (O)
Pin A row B row C row
Tab. 3.17 PU16 Connector (top) (Cont.)
Impedance, switchable
symmetrical, ungrounded
and shielded connections
coaxial connections
120
75
Bit rate 2048 kbit/s (1 50 ppm)
Coding HDB3
Nominal voltage
coaxial connections
symmetrical connections
2.37 V
3 V
Nominal value of the pulse width 244 ns
Pulse form from E1out according to ITU-T G.703,
Fig. 15
Frame structure unframed or
according to ITU-T G.704/5
Jitter characteristics according to ETS 300324,
TBR 12
Cable attenuation at E1in at 1024 kHz 6 dB
Reflection attenuation
51 Hz to 102 kHz
102 kHz to 2048 kHz
2048 kHz to 3072 kHz
12 dB
18 dB
14 dB
Operating voltage 36 V to 72 V
Power consumption 8 W
Short-circuit protection for 3.3 V Safety fuse 1 A
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Fig. 3.14 Operation and Supervision of the System Modules in
Standalone Operation Mode with the SUE (Example)
The SUE performs the following functions:
Creating a virtual concentrator (SISA-V, LMX/V2)
The SUE establishes an SISA-V, LMX/V2 which manages the ASA32 network ele-
ment as being continuously present in its polling list.
Protocol conversion of layer 7 according to SISA into a system-internal SVB protocol
Duplicating the QD2 slave interface to provide additional system access
Establishing the T functionality of both QD2 slave interfaces to set up multipoint net-
work structures
Providing the EDS-A interface for Q2 access to adapt to the
ID network (IDN) of the Deutsche Telekom AG
Operation of a local F interface
Evaluating up to 8 external alarms.
SISA-V is designated as top of station (TOS) if SISA-V is the highest network element
in the OS hierarchy within the network elements of a station. A database is managed via
the network elements grouped together in the station and via connections to other sta-
tions connected to the addressed station (in descending direction).
During the boot phase, the unit performs self tests and an interface analysis. In case of
faults, the SUE terminates the start and is no longer available.
QD2-M1 64 kbit/s QD2-S1
QD2-S2
F-SST
OS
LCT
SUE
NE
QD2-S
QD2-M2
T
T
CMXC
SMX1/4c
QD2-S QD2-S QD2-S
LE2
FMX2R3.1
QD2-S
OMX16/
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Fig. 3.15 SUE Interfaces
The SUE has the following interfaces (see Fig. 3.15):
2 QD2 slave interfaces
QD2 slave 1 with control line (SE) and transparent operating mode (T)
QD2 slave 2 with transparent operating mode (T)
EDS A interface (not used for CMXC),
F interface,
2 QD2 master interfaces (QD2-M 2 in SNUS and FMX2S not used),
SVB interface (not used for CMXC),
8 alarm inputs (A1+ to A8+ and negative reference potential A),
ECC interface (not used in UMXLS),
Rear panel coding (K0 to K4),
Switch in the rear panel of the shelf to set the SISA address (5 bits),
6-pin switch for bus termination with 120 per QD2 slave port and for the T ports,
6-pin switch to select the time slot for the ECC channel and to set the operating
mode of the QD2 slave port,
2 8-pin switches to switch over the conguration of the QD2 interfaces either ac-
cording to RS232 or RS485
Power supply.
QD2 Slave Interfaces
The QD2 slave interfaces form the TMN access to the virtual concentrator of the SUE
and to the hierarchically downstream network elements. QD2 slave interface 1 repre-
sents the primary network access. It can either be configured as a point-to-point connec-
tion according to RS232 or as a serial bus system according to RS485. It also has a
control line for remote QD2 bus termination. QD2 slave interface 2 is designed accord-
ing to RS485 and can be used as an additional network access, e.g. to transmit control
information within the overhead channel of line termination units
LTCOH/LT12CM/LT22CM/LTO.
To set up line network structures, the TMN data can also be switched further transpar-
ently at both QD2 slave interfaces.
Slave
Port 1
48 V/60 V
Internal interfaces
Rear panel
coding
QD2 master 1
External interfaces
F
ASA32
SISA-V
QD2 slave 1
Master
Port
QD2 master 2
A1+ to A8+
Q2
Proxy
EDS-A
Port
EDS-A
ECC
Alarm inputs
Access
for IDN
Local
operation
and A
ECC channel
Power
supply
To NEs
in the shelf
Slave
Port 2
QD2 slave 2
Primary
TMN access
Redundant
TMN access
SVB
T
T
SE
(not used
for CMXC)
To NEs
FMX2 V2
in system
SUE
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Fig. 3.16 SUE in a Line Network Structure
EDS A Interface
The EDS A interface forms the Q2 access to the management network of the Deutsche
TelekomAG. It is an asynchronous interface for bit rates up to 9.6 kbit/s. Q2 proxy must
be set and a valid Q2 address configured via the F interface and the user data file so
that the SUE can communicate in the Q2 mode with the TMN network.
QD2 master Interfaces
QD2 master interfaces 1 and 2 form a logical unit which establish an AND link in the re-
ceive direction. The drivers are duplicated in the transmit direction. Electrically, the two
interfaces operate mutually independent. QD2 master interface 1 provides a serial bus
systemto connect other network elements. It can either be configured as a point-to-point
connection (EIA RS232) or as a serial bus system (EIA RS485). QD2 master interface
2 can be used as an extension of the serial bus system to connect e.g. a nonbus-com-
patible interface of the system-internal SISA transport channels (OH channel). It con-
forms to EIA RS485.
SVB Interface
The SVB interface is used in system FMX2 V2 and specially connects the line termina-
tion units (LUC, LUCP, LUCT and LUOT) of a shelf to the SUE via a system-internal bus
system.
F Interface
The local craft terminal accesses the virtual concentrator of the unit and the underlying
network elements via the F interface.
The F interface can be accessed as a 9-pin plug connector on the front panel of the
shelf. It conforms to ITU-T V.28.
Alarm Inputs A1+ to A8+ and A-
There are 8 floating alarm inputs A1+ to A8+ and negative reference potential A. The
active mode generates a spontaneous message in OS.
3.5.2 Supervision and Alarm Signaling
For local supervision, the SUE has a red and a green LED on the front panel and a re-
cessed yellow LED on the unit, see Tab. 3.18.
QD2-S
QD2-M SVB
T
QD2-M SVB
SUE SUE
QD2-S
T
Transmission network
downstream upstream
QD2 master
downstream upstream
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3.5.3 Operating Elements
Fig. 3.17 SUE Operating Elements
LED (green) LED (red) LED (yellow)
1)
Mode
off off off No operating voltage
on off off Interference-free operation, no communication with net-
work management
on off on Interference-free operation, connection to the next higher
hierarchical order set up in the OS
off on off SUE in error condition or self test
off on on Error condition, connection still exists
flashes
momentarily
on off SUE has reset
1) can only be seen when the front panel of the shelf is removed
Tab. 3.18 SUE LED Displays
S3
View from
front:
S2
S1
10
11
grn
rot
gelb
ON
3
8
1
6
8
1
ON
1
ON
S4
6
1
ON
F2 F1
12
1
4
2
X4
3
1
4
2
X5
D3
10 Internal connector
11 External connector
12 Connector for LCT (F-Inter-
face)
X4 Test jack
X5 Test jack
F1 Solder-in fuse for 48 V/60 V
(2,5 A)
F2 Solder-in fuse for 48 V/60 V
(2,5 A)
D3 Initial program loader
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Switch S1 Switch S2
Position of Position of
Slides
1 to 4
Slides
5 to 8
Slides
1 to 4
Slides
5 to 8
Function Setting
OFF1) ON1) Interface settings at master- port 1 RS485 interface
ON OFF Interface settings at master- port 1 RS232
OFF1) ON1) Interface settings at slave-Port 1 RS485 interface
ON OFF Interface settings at slave-Port 1 RS232
1) Delivery state
Tab. 3.19 Settings on Switches S1 and S2
Slide Position Operation Function
1
OFF1)
ON
Interface termination for QD2 slave port 1 (transmit direction)
High-impedance
120
2
OFF1)
ON
Interface termination for QD2 slave port 1 (receive direction)
High-impedance
120
3
OFF1)
ON
Interface termination for QD2 slave port 2 (transmit direction)
High-impedance
120
4
OFF1)
ON
Interface termination for QD2 slave port 2 (receive direction)
High-impedance
120
5
OFF1)
ON
Interface termination for T-Port on slave 1 (transmit direction)
High-impedance
120
6
OFF1)
ON
Interface termination for T-Port on slave 2 (transmit direction)
High-impedance
120
1) As delivered state
Tab. 3.20 Settings on Switch S3
Slide Position Operation Function
4
OFF1)
ON
T port operation mode for slave port 1
9.6 kbit/s signal regeneration switched off
9,6 kbit/s signal regeneration possible
1) As delivered state
Tab. 3.21 Conguration of the T Interfaces (Switch S4)
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ECC Configuration:
For ECC configuration, an even-numbered or an uneven-numbered time slot should be
set, see Tab. 3.22. Conferences are available in ECC mode.
The following list shows the operation mode for which even-numbered and uneven-
numbered time slots must be set. (DIL-Switch S4 on the unit SUE).
Uneven-numbered time slot for:
CUA-CAS
CUD Port A
CUD conference:
full mode
Port A to multipoint
Port A to multipoint broadcast
Even-numbered time slot for:
CUD Port B
CUD conference:
Port B to multipoint
ECC to multipoint
Port B to multipoint broadcast
ECC to multipoint broadcast
Assignments to the Test Bus Lines:
5
OFF1)
ON
T port operation mode for slave port 2
9.6 kbit/s signalregeneration switched off
9,6 kbit/s signalregeneration possible
Slide Position Operation Function
1) As delivered state
Tab. 3.21 Conguration of the T Interfaces (Switch S4) (Cont.)
Position of
Slide 1
Position of
Slide 2
Position of
Slide 3
Bus time slot
(BZL 0...63) Time slot (1...32)
OFF1) OFF1) OFF1) ECC is inactive
ON OFF OFF 29 15 uneven
OFF ON OFF 41 21 uneven
ON OFF ON 30 15 even
OFF ON ON 42 21 even
All other codes ECC is inactive
1) As delivered state
Tab. 3.22 ECC Conguration (Switch S4)
Position Assignment to test bus line
1 PB3
Tab. 3.23 Assignment on Test Jack X4
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Fig. 3.18 SUE Terminal Assignment 12 (F Interface)
2 PB2
3 PB1
4 PB0
Position Assignment to test bus line
1 PB7
2 PB6
3 PB5
4 PB4
Tab. 3.24 Assignment on Test Jack X5
Position Assignment to test bus line
Tab. 3.23 Assignment on Test Jack X4 (Cont.)
1
5
6
9
12
No. Assignment No. Assignment
1 6
2 RXD 7
3 TXD 8
4 9
5 GND
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Fig. 3.19 SUE Connector Assignment 11
Row
No. c b a
2 QD2Tin_a1 QD2Sin_a1 QD2Sin_b1
4 QD2Tin_b1 QD2Sout_a1 QD2Sout_b1
6 QD2Tout_a1 QD2Sin_a2 QD2Sin_b2
8 QD2Tout_b1 QD2Sout_a2 QD2Sout_b2
10 QD2Tin_a2 SESout_a SESout_b
12 QD2Tin_b2 QD2Min_a1 QD2Min_b1
QD2_MCLK_b QD2_MCLK_a
14 QD2Tout_a2 QD2Mout_a1 QD2Mout_b1
CTXD
1)
CRXD
1)
16 QD2Tout_b2 S0in_a S0in_b
T1
1)
18 A1P AM
L1
1)
RESET
1)
20 A2P A0out_a S0out_b
22 A3P QD2Min_a2 QD2Min_b2
24 A4P QD2Mout_a2 QD2Mout_b2
L3
1)
L2
1)
26 A5P EAN_a EAN_b
EAN_a EAN_b
28 A6P EAB_a EAB_b
30 A7P EDS_out EDS_in
32 A8P GND
1) Pins are used only for test purposes
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Fig. 3.20 Connector Assignment 10 of the SUE
Row
No. c b a
GND_S GND_S GND_S
2 GND/PUP GND
GND K4
4 MUP_2 MUP_1 ZA
6 O3 I7 O2
O4 PB4 PB7
8 PB0 PB3
GND PB6 PB5
10 PE
1)
PB2 PB1
P5V_EEP GND GND
12 GND GND
SCL GND GND
14 TXDSVB RXDSVB
SDA
16 RTSSVB CLKSVB
GND
18 K2 K1
20 K3 K0
22 GND I2 I1
24 GND
26 I3 GND
GND GND SYN_E
28 I0 I4
PCM_E CLK_4M
30 GND O1
SYN_S PCM_S
32 GND GND GND
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Signal Abbreviations
A1P to A8P Alarm inputs
AM Negative reference potential
CLK_4M 4-MHz synchronous clock PCM bus (CUA-LC)
CLKSVB SVB clock
CRXD PC monitor interface (receive direction)
CTXD PC monitor interface (transmit direction)
EDS_in EDS interface in
EDS_out EDS interface out
EAN_a/b V11 interface of the ECC in, a and b wire
EAN_a/b V11 interface of the ECC out, a and b wire
GND Internal ground
GND_S ESD ground
GND/PUP Positive primary voltage
I0 to I4, I7 Input ports for SISA address
K0 to K4 Backplane coding for plug-in unit detection by SUE
L1 to L3 LED outputs (only for test purposes)
MUP_1, MUP_2 Negative primary voltage 48 V/60 V
O1 to O4 Output ports
PB0 to PB7 Test bus wire 0 to 7
PCM_E PCM bus receive direction
PCM_S PCM bus transmit direction
PE Only for test purposes
QD2_MCLK_a/b Synchronous clock receive signal
QD2Min_a/b Receive signal master port, a and b wire
QD2Mout_a/b Transmit signal master port, a and b wire
QD2Sin_a/b Receive signal slave port, a and b wire
QD2Sout_a/b Transmit signal slave port, a and b wire
QD2Tin_a/b Transmit QD2 T port, a and b wire
QD2Tout_a/b Receive QD2 T port, a and b wire
RTSSVB Request to send
RXDSVB SVB receive direction
S0in_a/b S0 receiving side, a and b wire
S0out_a/b S0 transmit side, a and b wire
SESout_a/b Send enable signal output, a and b wire
SYN_E Frame pulse receive direction for synchronization
SYN_S Frame pulse transmit direction for synchronization
T1 Only for test purposes
TXDSVB SVB transmit direction
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3.5.4 Technical Data
QD2 Slave Interfaces
EDS A Interface
Configuration
QD2 slave 1, can be selected
When using the T function
QD2 slave 2
Serial bus system according
to EIA RS485 or point-to-
point according to EIA RS232
Point-to-point according to
ITU-T V.11
Serial bus system according
to EIA RS485
Design mirrored structure
Additional SE option, for QD2 slave 1 only Point-to-point connection ac-
cording to EIA RS422
Bus users 1 master and
up to 30 slaves
Transmission lines,
transmit and receive lines separated
QD2 slave 1 including T and SE lines
QD2 slave 2 including T lines
Symmetrical, 10 wire
Symmetrical, 8 wire
Bit rate, autodetect 0.6/1.2/9.6/64 kbit/s
Bit rate, T port functionality 9.6 kbit/s
Transmission mode Plesiochronous
Line code NRZI
Permissible length 500 m
Protocol
Data connection initiator
Addresses of secondaries, can be set via
5-pin switch at shelf
HDLC (NRM, polling)
Primary (NCT, LCT)
1 to 30
TXD idle mode High-impedance
RXD expected idle mode Continuous flags
Termination, can be switched 121
Design Compatible with IDN
of DTAG
Transmission lines,
transmit and receive lines separated Unsymmetrical, 2 wire
Bitrate, autodetect 2.4/4.8/9.6 kbit/s
Transmission mode,
transmit and receive lines separated Asynchronous
Line code NRZ
Input stage
Start polarity (log. 0)
Stop polarity (log. 1)
1.2 V
2.8 V
Input impedance 390
Output stage
Start polarity (log. 0)
Stop polarity (log. 1)
0.5 V
4.5 V
Output impedance 100 (1 10%)
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QD2 Master Interface
SVB Interface
F Interface
Configuration
QD2 master 1
QD2 master 2
Serial bus system according
to EIA RS485 or
point-to-point connection ac-
cording to EIA RS232
Serial bus system according
to EIA RS485
Bus users 1 master and
up to 30 slaves
Transmission lines,
transmit and receive lines separated Symmetrical, 4 wire
Bit rate, configurable 1.2/9.6/64 kbit/s
Transmission mode Plesiochronous
Line code NRZI
Permissible length 500 m
Protocol
Data connection initiator
Addresses of secondaries
HDLC (NRM, polling)
primary (SUE)
1 to 30
TXD idle mode Continuous flags
RXD expected idle mode log. 1 (high-impedance)
Termination 121
Configuration Serial bus system
CMOS output and
TTL input level
Bus users 1 master and
up to 16 slaves
Transmission lines,
transmit and receive lines separated Unsymmetrical, 4 wire
Bit rate 384 kbit/s
Transmission mode Asynchronous, half duplex
Line code NRZ
Permissible length Length of shelf
Protocol
Data connection initiator
Addresses of secondaries
System-inherent
Primary (TMN direction)
0 to 15
Configuration Point-to-point according to
V.28
Transmission lines Shielded, unsymmetrical
Bit rate, autodetect 9.6/19.2/38.4 kbit/s
Transmission mode Asynchronous
Line code NRZ
Permissible length 20 m
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Alarm Inputs A1+ to A8+ and A
Rear Panel Identification
Power Supply
Protocol
Frame structure
Address and control byte
Data connection initiator
Address of the secondary
IEC TC57
HDLC (NRM, polling)
primary (LCT)
1
Data format 8 data bits, even parity
1 stop bit
Plug connector Plug 9-pin SUB-D
according to IEC 807-2
(TXD: pin 3, RXD: pin 2)
Konfiguration Direct current interfaces,
floating
Transmission lines, one per input Unsymmetrical
Input voltage (floating)
In the active mode 20 V to 60 V
Passive mode 0 V
Configuration TTL input stage,
internal pull-up
Contacts 5, unsymmetrical
Input voltage 36 V to 72 V
Power consumption (at 60 V) 3 W
Current consumption (at 60 V) 50 mA
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4 Commissioning
4.1 Introduction
4.1.1 Scope of the ITMN
The ITMN presents the installation procedures for all network elements (NEs) including
the following information:
Hardware settings
Commissioning procedures for NEs or parts thereof
Electrical interface conguration settings.
Configuration of country or customer-specific Linecard parameters.
For path management operations, only standard configurations according to the engi-
neering rules are covered, since these cases are supported by LCTs. The subscriber
administration, which is only supported by the TMN, is not described.
4.1.2 Error Reports on the Installation Test Manual
Incorrect or unclear sections of this Section should be described in detail in a document
error report.
The error report should be sent to the Technical Assistance Center TAC3 in Munich.
4.1.3 Dealing with Defective Modules
If a module is really defective, it should be carefully repacked and returned to the repair
center along with the correct documentation.
For details, please see the Guidelines for the Repair and Replacement Service RUAD2
(Ordering No. A30100-R4050-A1-*-7635).
4.1.4 Procedure in the Event of Faults
Faults occurring during on-line operation should be identified and rectified in accordance
with the instructions in the Section 6 "Maintenance".
4.1.5 Procedure in the Event of Serious Faults
Serious faults are not dealt with in the MMN. First, the installation technician should try
to clear the fault. If the installation technician is not qualified to eliminate serious faults,
a fault report must be completed, providing the following information in detail (TAC2
Tool, FMERF):
Description of the test step attempted
Description of the system response
Description of any parallel system activities, e.g. work done by other testers during
modication of hardware or software.
The fault report must be sent to TAC2/TAC3.
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4.2 Prerequisites
4.2.1 Hardware
1. Local Craft Terminal (LCT):
A Local Craft Terminal (LCT) is required for the conguration, administration and
software download of the Network Elements. The LCT has to be congured at least
in such a way as described in the User manual AccessIntegrator, UMN:IMN
(see 1.3 "Additional Documentation").
2. Connecting Cable (for the F ports):
An LCT universal cable will be needed to connect the LCT to the F interface of a SUE
(product code number of the universal cable: S42023-A877-S100, length = 3m).
This universal cable has a number of different connectors.
9-pin sub-D jack for the connection to the LCT:
(Labeling on the jack: LCT) Pin Connections:
The SUE needs a 1:1 connection:
9-pin Sub-D jack (Labeling on the jack: FMX, Flex MuxV2
3. Digital multimeter (e.g. for measuring the battery voltage).
4.2.2 Software
Installation of the ACI-Software:
The SW-prerequisites for the LCT are described in the UMN:IMN of the User Manual
AccessIntegrator ACI (see 1.3 "Additional Documentation").
Scope of supply: 1 CD-ROM
APS of the CMXC System Module:
The APS (application programsoftware) includes all load files for the Network Elements
(NEs) of the CMXC.
The System APS (S-APS) includes:
1 stocklist
1 complete set of load les (P-APS)
The load files for the software download are listed in Tab. 5.5.
Number Assignment Number Assignment
1 6
2 RXD 7
3 TXD 8
4 9
5 GND
Tab. 4.1 Pin Connections
i
It is vital to install the ACI software according to the instructions given in the IMN of the
ACI!
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4.3 Procedures
4.3.1 Sequences for Commissioning
For commissioning the CMXC the following sequence should be used:
4.3.2 Visually Inspection (Check List)
The following tasks must be performed for every systemcomponent before/during com-
missioning:
1. All Deliverables were supplied and the Installation Work is completed
The shelves SNUS are assembled.
Using the parts list, check that all deliverables were supplied.
The cabling and positioning of the modules should be checked with the installa-
tion instructions for the individual system components.
The modules are not plugged-in.
Both all internal and external cables were correctly routed and connected.
The shelves and cables are labeled correctly.
Visual check of the complete installation (particularly the protection devices, e.g.
overvoltage and lightning protection).
2. The Hardware Modules are in delivery Condition
The copper interfaces and the multiplexer section can remain in their delivery con-
dition.
The hardware settings of modules must be checked.
The modules are equipped with the current rmware and hardware (compare
for this the existing FW and HW with the Release Note of the current SW-APS
baggage)
The power supply is connected and constantly available
(the emergency power supply system is operational) but
The circuit breakers for the power supply must be switched off.
For installation in the ONU/ODT, the battery connector must be unplugged from
the power supply.
Cables to other SISA partners may not be connected (the QD2 connections
should be removed to prevent the SISA network from being affected.).
3. The CMXC documentation is available on Site.
Procedure see Section
1. Visually Inspection (general Requirements/Check
list)
4.3.2
2. Commissioning of the SNUS 4.3.4
3. Commissioning of the SUE 4.3.5
4. Commissioning of the CUC 4.3.6
5. Commissioning of the PU16 4.3.7
6. Creating Crossconnections 4.3.8
7. Backup of the Configuration data
Please use the Backup function of the ACI
User Manual AccessIntegrator,
UMN:OMN ACI DM V8.2 (see
1.3 "Additional Documentation")
Tab. 4.2 Sequence of the Commissioning
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4. The required Tooling/Test Equipment is available.
5. The LCT is installed and ready for Service.
4.3.3 Starting the LCT
So you can start the LCT:
1. Login in Windows NT (user name + keyword)
2. Start the ACI-proceedings via the start-menu
in the following order:
DCN server
ACI LCT server
ACI LCT client.
4.3.4 Commissioning of the SNUS
4.3.4.1 Hardware Settings
SISA Address
The SISA addresses of all units of the CMXC are assigned to the backplane. The QD2
address setting for the SUE occurs via the DIL switch S101 (see section 3.2.2).
Clock Supply
The SNUS has a number of symmetrical clock inputs and clock outputs. The following
connections are accessible at the external connectors:
T3in1, external guide clock for synchronizing the CMXC
T3out1, clock output from the CMXC for synchronizing downstream modules
If required, the clock inputs are terminated directly in the units (CUD, CUC, ADM) in the
shelf. It is not possible to synchronize the LT22CM(slot 209) on the T3 in the SNUS (no
level converter is available on the backplane).
Shelf Equipment
The possible equipment variants of the SNUS are shown in the Tab. 3.1. SUE and units
for CMXC must be plug-in in the following slots of the Shelf:
QD2 Structure
If the stand-alone operation mode of the SNUS, the SUE monitors all modules in the
shelf. The internal QD2 bus is switched using DIL switches S103 (all slider units on
OFF) and S104 (all slider units on ON) on the SUE master port (see Section 3.2.3).
Modules Slot
SUE 201
PU16 210
CUC(1) 211
CUC(2) 212
PU16 213
Tab. 4.3 Shelf Equipping with SUE and Units for CMXC
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Testing the Power Supply in the SNUS and Installing the Units
1. Please switch on the power supply.
2. Measure the SNUS systemvoltage and test the correct polarity of the power supply.
If the voltage or the polarity is not correct, test the power supply and connections to
the SNUS and rectify the fault.
3. Please plug-in the modules in the slots of the SNUS.
4.3.5 Commissioning of the SUE
4.3.5.1 Hardware Settings
Set the operating mode of the QD2 port of the SUE (DIL switch S1, S2 and S3 on the
module) according your planning documentation (see 3.5.3 and Tab. 3.19 and
Tab. 3.20).
Configure the operating mode of the T ports (DIL switch S4 sliders 4 and 5 on the mod-
ule) according your planning documentation (see Tab. 3.21).
Configure the ECC (DIL switch S4 sliders 1 through 3 on the module) according your
planning documentation (see Tab. 3.22).
4.3.5.2 Software Settings
Please connect the LCT to the F port of the SUE and start the LCT (see 4.3.3).
If the SUE is working with F-port protection please see the description in User Manual
AccessIntegrator, UMN ACI (Section 1.3 "Additional Documentation").
Software Download
1. In DCN view, please click on the icon for SISA-V/LMXV2 of the SUE with the right
mouse button.
Choose in the main menu the menu itemSoftware Management APS Manage-
ment.... The dialog Software download will be opened.
Fig. 4.1 SUE Dialog Software Download
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2. Select the appropriate load (see Section 5) for SW download and start it with the
"Download" button.
3. Reset the SUE after successful downloading.
4. Now the SISA-V of the of the equipped CMXC must appear under the SISA-
V/LMXV2 of the SUE.
Setting the desired Bit Rate of the Master Port
The slave port sets itself automatically to the bit rate of the higher-level SISA hierarchy
(only relevant, if the higher-level Network Element exist).
1. In the DCN View use the left mouse button to select the icon of the NE SISA
V/LMXV2 for the SUE.
Choose in the main menu the menu item NE Conguration General NE
Parameters.... The dialog General NE Parameters - SISA-V/LMXV2#... will be
opened.
Set the corresponding bit rate for the master port.
The slave port sets itself automatically to the corresponding bit rate.
2. The fact that the higher-level station has access to the SUE is shown by the yellow
LED located on the side of the SUE (only relevant when a higher-level network ele-
ment exists).
3. Check the loaded software
Choose in the main menu the menu itemUtilities Inventory Data Retrieval...
Equipment Data.... The dialog Equipment data SISA-V/LMXV2#... will be
opened.
Fig. 4.2 SUE Dialog Equipment Data
Check for Existing Alarms (SUE)
1. Choose in the main menu the menu itemFault Alarmlist.... The dialog Alarms
of SISA-V/LMXV#... will be opened.
Check for existing alarms and, if necessary, correct these in accordance with the
Section 6.
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Fig. 4.3 SUE Dialog Alarms of SISA-V/LMXV2#...
2. Close the alarm window with "Close.
4.3.6 Commissioning the CUC
4.3.6.1 Prerequisites
The following prerequisites are necessary for commissioning a CUC:
The CUCis commissioned after the SUE, i.e. after the associated SISAconcentrator
has been provided.
The associated PU16 must be inserted and initialized to congure the port.
4.3.6.2 Hardware Settings
No hardware settings are necessary on the CUC module.
The first operational CUC is the one that is active. The software configuration switches
it to standby mode.
4.3.6.3 Software Settings
Please connect the LCT to the F port of the SUE and start the LCT (see 4.3.3).
If the SUE is working with F-port protection please see the description in User Manual
AccessIntegrator, UMN ACI (Section 1.3 "Additional Documentation").
SW Download
1. In the DCN View, select the icon for the NE SISA-V/LMX for the CMXC using the left
mouse button.
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2. Choose in the main menu the menu itemConguration Software Management
APS Management.... The dialog Software-Download will be opened.
Select the le number 2 for the CUC in the eld File Number.
Select the matching le in the eld File used for SWDownload (selection with the
button Browse)
Conrm with Download.
3. After the SW download has ended with the message Download Completed Suc-
cessfully, this is conrmed by clicking on the Close button.
4. To activate the new software, the CUC has to be reset (only necessary if the reset
has not been performed automatically).
5. Reset the CUC
In the DCN View, select icon for the NE SISA-V/LMX for the CMXC using the left
mouse button.
Open the Equipment View via menu item View Equipment View.
Select the module CUC.
Choose in the main menu the menu item Conguration NE Conguration
NE Status...
Click on the Reset Equipment button.
6. Check the loaded Software
In the DCN View, select the icon for the NE SISA-V/LMX for the CMXC using the left
mouse button.
Choose in the main menu the menu item Utilities Inventory Data Retrieval
Equipment Data...
Compare the loaded software with the APS list.
Set Date and Time of the System
1. In the DCN View, select the icon for the NE SISA-V/LMX for the CMXC using the left
mouse button.
2. Choose in the main menu the menu item Conguration NE Conguration
NE Status .... The dialog Status - ... with register cards Time and date and Op-
erating mode is opened.
3. Set date and time.
Click on the Synchronise button to send time and date settings to the module.
Conrm your settings with Apply.
Close the dialog with Close
Configuration
1. In the DCN View, select the icon for the NE SISA-V/LMX for the CMXC and open the
dialog General NE-Parameters - CMXC#...:CUC#... (see Section 5.3.2 "CUC".
2. Clock Setting
Open the Clock Sync register card.
Select the corresponding clock source according to your planning documentation
and conrm with Apply (see "Conguring the Central Unit CUC", Register Card
Clock sync.).
i
No commands or requestions must be sent to he system before the process software
download is not ended.
i
For loading the software the first time (no SW is loaded on CUC) after successfully
download, no reset is necessary.
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3. Conguring the Frame Structure and the Initialization
Open the Frame register card.
Perform the corresponding project-specic port settings according to your planning
documentation and conrm with Apply (see "Conguring the Central Unit CUC",
Register Card Frame).
4. Conguring the ECC-Mode
Open the ECC-Mode register card.:
Perform the corresponding project-specic port settings according to your planning
documentation and conrm with Apply (see "Conguring the Central Unit CUC",
Register Card ECC Mode).
5. Port Initialization
Open the General register card.
Performthe corresponding project-specic port settings according your planning do-
cumentation and conrm with Apply (see "Conguring the Central Unit CUC",
Register Card General).
6. Conguration Backup
The set conguration data should be backed up via the backup function of the ACI
(see the User Manual AccessIntegrator ACI DM version V8.2, UMN:ADMN).
4.3.7 Commissioning the PU16
4.3.7.1 Hardware Settings
The 6-pin jumpers are to be used to configure the 75 or 120 terminating resistors
in the 16 E1 interfaces. The correct jumper setting should be taken from the
Section 3.4.3.
All other configurations are made using the AccessIntegrator operating system.
4.3.7.2 Software Settings
Please connect the LCT to the F port of the SUE and start the LCT (see 4.3.3).
If the SUE is working with F-port protection please see the description in User Manual
AccessIntegrator, UMN ACI (Section 1.3 "Additional Documentation").
SW Download
1. In the DCN View, select the icon for the NE SISA-V/LMX for the CMXC using the left
mouse button.
2. Choose in the main menu the menu itemConfiguration Software management
APS Management.... The dialog Software-Download will be opened.
Select the le number 3 for the PU16 in the eld File Number.
Select the matching le in the eld File used for SWDownload (selection with the
button Browse)
Conrm with Download.
3. After the SW download has ended with the message Download Completed Suc-
cessfully, this is conrmed by clicking on the Close button.
i
No commands or requestions must be sent to he system before the process software
download is not ended.
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4. To activate the new software, the PU16 has to be reset (only necessary if the reset
has not been performed automatically).
5. Reset the PU16
In the DCN View, select the icon for NE SISA-V/LMX for the CMXC using the left
mouse button.
Open the Equipment View via menu item View Equipment View.
Select the module PU16.
Choose in the main menu the menu item Conguration NE Conguration
NE Status....
Click on the Reset Equipment button.
6. Check the loaded Software
In the DCN View, select the icon for NE SISA-V/LMX for the CMXC using the left
mouse button.
Choose in the main menu the menu item Utilities Inventory Data Retrieval
Equipment Data...
Compare the loaded software with the APS list.
Configuration
1. In the DCN View, select the icon for NE SISA-V/LMX for the CMXC and open the
dialog General NE-Parameters - CMXC#...:PU16#... (see Section 5.3.3 "PU16".
2. Control Functions and Maintenance Functions
Open the Loops register card.
Set No loop. Conrmyour settings with Apply (see Section 5.3.3 "PU16",Register
Card Loops).
3. Frame Structure and Signaling
Open the Frame register card.
Congure the necessary ports according to the planning documentation and conrm
with Apply see Section 5.3.3 "PU16",Register Card Frame).
4. Alarm Criteria
Open the Alarm Criteria register card.
Make the settings according to the planning documentation and conrmwith Apply
(see Section 5.3.3 "PU16",Register Card Alarm Criteria).
5. Synchronization and Sa-Bit Control
Open the Clock Control register card.
Make the settings according to the planning documentation and conrmwith Apply
(see Section 5.3.3 "PU16",Register Card Clock Control).
6. Port Initialization
Open the General register card.
Set State to Active and conrm with Apply (see Section 5.3.3 "PU16",Register
Card General).
7. Conguration Backup
The set conguration data should be backed up via the backup function of the ACI
(see the User Manual AccessIntegrator ACI DM version V8.2, UMN:ADMN).
4.3.8 Creating the Connections
The creating of cross connection is described in detail on Section 5.4. In this section only
the sequence of the procedures and the associated settings are described in form of a
i
For loading the software the first time no SWis loaded on CUC) after successfully down-
load, no reset is necessary.
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table.
You will find the procedures for opening any dialog in Section 5.4.
4.3.8.1 General
Through connection of an unframed 2Mbit/s connection is only possible between EPP2
or EPPM2/8 functional units which have been congured as unframed beforehand.
A framed 2Mbit/s connection is only possible between EPP2 or EPPM2/8 functional unit
which have been congured as framed beforehand.
Unidirectional connections can only be set up between TPs which have been configured
as such. The same applies to bidirectional connections. Here the associated TPs must
be congured as bidirectional TPs.
Connections at the 64kbit/s level can only be switched by the BPX64. Here it is neces-
sary that a connection between the EPP2 functional unit and the IPMB64/2 functional
unit of a 2Mbit/s port is set up via the BPX2 cross connect. This connection must always
be a bidirectional connection.
Path segment protection can be set up for connections at the 2Mbit/s level (unidirection-
al or bidirectional) and connections for the transition to the BPX64 cross connect. If a
connection is set up between a EPP2 and a IPM64/2 with path segment protection, then
the TP(A) must always be the IPMB64/2 and the TP(B) the EPP2. The TP(B) can be an
arbitrary EPP2 functional unit. The selection of termination points TP(A), TP(B) and
TP(B) for connections at the 2Mbit/s level must be based on the application.
Path segment protection for 2Mbit/s connections cannot be set up via the external PCI
interface (EPPM2/8).
A time slot cannot be switched if the PU16 module associated with the TP is not
equipped. Conversely, deleting connections is not possible if the associated PU16 is not
inserted.
A summary of switchable connections on BPX2 you will find in Section 5.4.1.1.
4.3.8.2 Creating the Cross Connection
2 Mbit/s
Sequence Operating Task required Settings see Section
1. Configuring the required PU16 ports Frame: framed
State: active
5.3.3 and
5.4.1.1
2. Filter setting All and FG-FE or Module-Port-TS 5.4.1.1
3. Creating the 2-Mbit/s connection FG-FE or Module-Port-TS according to your
planning documentation
5.4.1.1
4. Activating the 2-Mbit/s connection Selecting the connection and activating via button
Connect or via a time schedule.
5.4.1.1
5. Creating a protection path (option) Path protection points, path protection mode and
switchover criteria according to your planning
documentation
5.4.1.1
Tab. 4.4 Sequence for Creating 2-Mbit/s Cross Connections
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64 kbit/s
8 kbit/s
6. Activating the protection path Selecting the connection and activating via button
Connect or via a time schedule
5.4.1.1
7. Backup of the configuration data according to the Backup function of the ACI UMN:ADMN ACI DM
V8.2 (see Section 1.3)
Sequence Operating Task required Settings see Section
Tab. 4.4 Sequence for Creating 2-Mbit/s Cross Connections (Cont.)
Sequence Operating Task required Settings see Section
1. Configuring the required PU16 ports Frame: framed
State: active
5.3.3 and
5.4.2.1
2. Filter setting All and FG-FE or Module-Port-TS 5.4.2.1
3. Creating the 2-Mbit/s connection FG-FE or Module-Port-TS according to your
planning documentation
5.4.2.1
4. Activating the 2-Mbit/s connection Selecting the connection and activating via button
Connect
5.4.2.1
5. Creating the 64-kbit/s connection FG-FE or Module-Port-TS according to your
planning documentation
5.4.2.1
6. Activating the 64-kbit/s connection Selecting the connection and activating via button
Connect or via a time schedule
5.4.2.1
7. Backup of the configuration data according to the Backup function of the ACI UMN:ADMN ACI DM
V8.2 (see Section 1.3)
Tab. 4.5 Sequence for Creating 64-kbit/s Cross Connections
Sequence Operating Task required Settings see Section
1. Configuring the required PU16 ports Frame: framed
State: active
5.3.3 and
5.4.3.1
2. Filter setting All and FG-FE or Module-Port-TS 5.4.3.1
3. Creating the 2-Mbit/s connection FG-FE or Module-Port-TS according to your
planning documentation
5.4.3.1
4. Activating the 2-Mbit/s connection Selecting the connection and activating via button
Connect
5.4.3.1
5. Creating the 64-kbit/s connection FG-FE or Module-Port-TS according to your
planning documentation
5.4.3.1
6. Activating the 64-kbit/s connection Selecting the connection and activating via button
Connect
5.4.3.1
7. Creating the 8-kbit/s connection FG-FE or Module-Port-TS according to your
planning documentation
5.4.3.1
8. Activating the 8-kbit/s connection Selecting the connection and activating via button
Connect or via a time schedule
5.4.3.1
Tab. 4.6 Sequence for Creating 8-kbit/s Cross Connections
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Conferences
9. Backup of the configuration data according to the Backup function of the ACI UMN:ADMN ACI DM
V8.2 (see Section 1.3)
Sequence Operating Task required Settings see Section
Tab. 4.6 Sequence for Creating 8-kbit/s Cross Connections (Cont.)
Sequence Operating Task required Settings see Section
1. Configuring the required PU16 ports Frame: framed
State: active
5.3.3 and
5.4.4.1
2. Filter setting All and FG-FE or Module-Port-TS 5.4.4.1
3. Creating the 2-Mbit/s connection FG-FE or Module-Port-TS according to your
planning documentation
5.4.4.1
4. Activating the 2-Mbit/s connection Selecting the connection and activating via button
Connect
5.4.4.1
5. Creating the conferences Conference type, port, subscriber and time slot
according to your planning documentation
5.4.4.1
6. Backup of the configuration data according to the Backup function of the ACI UMN:ADMN ACI DM
V8.2 (see Section 1.3)
Tab. 4.7 Sequence for Creating Conferences
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5 Operation
5.1 Introduction
5.1.1 Notes for Working
Each operating task for the system module CMXC is described in a separate main sec-
tion or in the Operating Manual of the Access Integrator (ACI), see Tab. 5.1. The first
information given in the main sections is that required for a general understanding of the
operating task. The operating tasks are then described in subsections. These contain
the required operating procedure in the form of a numbered list to be worked through
step-by-step. For each operating task a dialog window is shown as an example. Tables
explain the setting options for the individual parameters and relate these to the network
elements.
The requirement for all operating procedures is that the AccessIntegrator or the Local
Craft Terminal (LCT) and the CMXC are already installed, connected and proceeds
without errors. Procedures for rectifying errors are described in Section Maintenance
(see Section 6).
Inside the operation procedure, starting the ACI functions or opening the dialog are de-
scribed via the main menu, because this task always can be used. The menu bar, con-
text sensitive menus or key combinations can be used alternatively. For example for
this, see User Manual AccessIntegrator, UMN:OMN (see Section 1.3 "Additional Docu-
mentation").
This manual describes the operation tasks for AccessIntegrator ACI DM software up
version 8.2.
5.1.2 Overview of Operating Functions
This chapter provides an overview of all functions that can be performed in AccessInte-
grator. The table below lists the individual functions available under the ACI main menu.
In the case of NE-specific functions you find a reference to the section in which they are
described in detail. For all other tasks you are referred to the ACI manual OMN.
The LCT column indicates whether the function can also be performed using an LCT.
i
A general knowledge of the structure and functioning of the CMXC, plus the use and
functions of the AccessIntegrators graphical user interface, are prerequisites for work-
ing with this manual.
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AccessIntegrator Main Menu LCT Function Manual/ection
File Print Preview yes Print preview for active window
Print... yes Opening printer dialog (NT)
Network Editor
yes
Starting a SW download:
For a complete AN
For NEs/modules in single mode
For NEs in broadcast mode
For a new NE
As a time-scheduled job
SW Download with LCT
UMN:OMN/4.3.5
Parameter Download... Not relevant to ACI DM V8.2 not relevant
NE Backup...
NE Restore...
yes
yes
NE configuration data:
Backup (NE ACI)
Restore (ACI NE)
UMN:ADMN
Network Configuration Route Management...
yes
for service
personal only!
Trace Error Log...
Diagnostic Information...
UMN:OMN
Migration Export
Import