ELGC03 Digital Signal Processing

Laborary exercises
Teo Jrln
November 18, 2010

Minor updates made by Roshanak Mirmiran, September 23, 2011

Assignment 5 added by Roshanak Mirmiran, September 19, 2012

Preparations:

Read these instructions carefully.

Before sessions 3, 4, and 5, carry out the preparation exercises in Sections 4.3, 4.4, and 4.5,
respectively.

Deadlines for the report:

Deadline for the rst submission is the last session for your group.

Deadline for the second submission is November 2, 2012, at 17:00.

Failing to follow any of these deadlines means that you fail the laboratory sessions.

Contents
1 Introduction

2 Equipment

3 General instructions

3.1

Setting up the equipment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2

Getting started with Code Composer Studio . . . . . . . . . . . . . . . . . . . . .

3.3

Designing FIR lters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.4

Designing IIR lters

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4 Assignments

4.1

Assignment 1: FIR lters

4.2

Assignment 2: IIR lters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.3

Assignment 3: Function generator

4.4

Assignment 4: Convolution

4.5

Assignment 5: Sampling Theorem

5 Examination

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4
5

Introduction

The laboratory work aims at illustrating the possibilities given by a digital signal processor.
Concepts from digital signal processing theory is implemented and tested using a Texas Instruments TMS320C5416-160 chip. With this chip comes Code Composer Studio, a software used
to develop code for the TMS320C5416-160 DSP chip. The focus of the laboratory work is not to
develop code, but to get a basic understanding of what can be done with DSP chips in practice.
MATLAB is used to design the lters and an oscilloscope and a function generator is used to
verify the lter properties. The assignments are:

Theory
1. The eect of the sampling frequency.
2. The connection between convolution and amplitude modulation.
3. Distance measurement using correlation analysis in the DSP chip.

Practical
1. FIR lters are examined.
2. IIR lters are examined.
3. A function generator is implemented.
4. Convolution is implemented.

Equipment

To do these assignments you need:

A PC running Windows XP with Code Composer Studio installed and a USB interface.

TSM320C5416-160 laboratory board.

Oscilloscope.

Function generator.

General instructions

3.1 Setting up the equipment.

Make sure that all equipment is switched o before connecting anything. The DSP board is sensitive to disturbances and if connections are made when the board is powered up, the connection
to the computer may be lost.

Connect the function generator to oscilloscope channel 1. Make sure that the function generator output does not have an amplitude greater than 500 mV peak to peak. If necessary
pull the

AMP

knob on the function generator out to get a -20 dB attenuation.

Move the function generator output to the channel 2 line input on the DSP board. Also
connect the channel 2 line input to the oscilloscope to get a clear view of what input signal
is used.

Connect channel 2 line output to oscilloscope channel 2.

Now connect the USB interface of the DSP board to the computer and the power to the
DSP board.

3.2 Getting started with Code Composer Studio

J:/Elektro/ELGC03/DSP_Lab

First copy the content in

When the connections in the previous section is done, it is time to start Code Composer

and put it on your home drive.

Studio. Choose: FileWorkspaceLoad Workspace and select the workspace le in the
folder you just downloaded.

This will load all the projects used for all the laboratory

assignments.

Right-click on the project corresponding to the assignment to be done and select Make
active project.

To automatically load the program to the DSP board after a successful build, choose:




OptionCustomizeProgram Load Option

tick the Load program after build check-box.

Now select ProjectRebuild all, if successful the program is loaded onto the DSP board.

For the interested student there is a substantial help library for Code Composer Studio as well
as several guides for the DSP board available through the help menu.

3.3 Designing FIR lters

The m-les needed are included in each of the project folders in the

In MATLAB, use

sptool

DSP Lab

folder.

to design your lter. The DSP board has a sampling frequency

of 8 kHz.

Export the lter to the MATLAB workspace.

Run

convTOdspFIR.m

to convert the lter into hexadecimal numbers compatible with the

assembler code for the DSP board. Note that the lter have to be named
for

convTOdspFIR.m

The lter coecients are now stored in

place in

filt1

in order

to work.

FIR_filter.asm

coeff.dat. Copy the coecients

FILTERLENGTH variable.

and update the

Rebuild the project in Code Composer Studio.

The lter is now loaded onto the DSP board.

to the indicated

3.4 Designing IIR lters

In MATLAB, use

sptool to design your lter, the DSP board has a sampling frequency of

8 kHz.

Export the lter to the MATLAB workspace.

Run

convTOdspIIR.m

to convert the lter into coecients compatible with the assem-

bler code for the DSP board.

convTOdspIIR.m

The le

filt1

Note that the lter have to be named

in order for

to work.

coeff.dat

now contains four lines,

x-

and

y -coecients,

where

corresponds to

the numerator coecients and

Copy the lter coecients into

IIR_filter.asm on the indicated lines and update the two

to the denominator of the IIR lter.

lter length variables.

Rebuild the project in Code Composer Studio.

The lter is now loaded onto the DSP board.

Assignments

Theory question: Correlation, measuring distance

How is it possible to use the functions in these laboratory assignments to measure distance?
Describe the theory and what functions that have to be implemented on the DSP board. Describe
the ideal noise free case rst, then suggest what could be done to mitigate noise in a practical
application.

4.1 Assignment 1: FIR lters

In this assignment a closer look at the properties and possibilities for FIR lters are investigated.
Filters are often identied as high-pass, low-pass, band-pass or band-stop.
common to give some additional information further specifying the lter.

In addition it is
For example, the

cuto frequency, the slope in dB/decade or possibly, if in connection to musical applications

dB/octave. The phase shift of a lter is one other common specication. Use the instructions in
Section 3.3 to design the lters below.
1. Design a 3rd order low-pass equiripple lter with a cuto frequency

fc =

600 Hz using

MATLAB, implement the lter and verify the 3 dB cuto frequency.

2. Design a 5th order equiripple high-pass lter with a cuto frequency

fc =

900 Hz and

determine the lter slope in dB/decade.

3. Design a 7th order band-pass lter with a cuto frequency

fc = 1.2 kHz and determine the

phase shift in the passband.

4. Try to design a single frequency band-stop lter,
It is not suitable to implement lters of order

200

fc =

or more.

1 kHz.

4.2 Assignment 2: IIR lters

In this assignment, the properties of IIR lters are compared with FIR lters. Investigate the
main dierences between the lter types. Use the instructions in Section 3.4 to design the lters.
Verify that the lters work as intended; a to high lter order might cause failure in the DSP.
1. Design a low-pass lter of minimum order with a cuto frequency

fc =

600 Hz with the

same characteristics as the low-pass lter in the previous assignment.

2. Design a high-pass lter with the same slope as the FIR high-pass lter and note the
dierence in lter order.
3. Design a 7th order band-pass lter with a cuto frequency

fc = 1.2 kHz and determine the

phase shift in the passband.

4. Try to design a single frequency band-stop lter,

fc =

1 kHz.

4.3 Assignment 3: Function generator

A function generator is implemented by loading sample values from a table. The table contain
values from a sinus function sampled at 8000 data points. At each sample interval one value is
fetched and sent to the output. The

step_size

variable determines how large steps to make in

the sine table and in that way it aects the output frequency. There is no need to have an input
connected to the DSP board during this exercise.

Preparation exercise
How does the sampling frequency aect the frequencies that can be generated in the DSP board?

Laboratory work
Altering the

step_size

variable in

Func_gen.asm

changes the frequency generated.

1. Generate a sinusoid of frequency 2kHz.

2. What are the lowest and highest frequencies that are possible to generate? Why is it not
possible to generate a higher frequency?
3. Describe in theory how it would be possible to generate a square wave?

4.4 Assignment 4: Convolution

In this assignment we implement the convolution between a generated signal from the DSP board
and a signal from the function generator.

The DSP board generated signal is to be regarded

as the carrier and the function generator supply the information signal. Convolution could be
regarded as digitally implemented amplitude modulation.

Preparation exercise
Describe how convolution is connected to amplitude modulation, especially in the frequency
domain.

Laboratory work
Load the program onto the board and use a sinusoidal input from 50Hz to 2kHz on the channel
2 line input on the DSP board.
1. What is the relation between the function generator frequency and the DSP board output
frequency? Plot how the input frequency relate to the output frequency.
2. We only see one frequency component.

What other frequencies would you expect if the

output signal was not ltered? Remove the output lter to verify your answer.
3. Use a square wave as input. Describe what happens and why.
4. Collaborate with another group and connect the output of one DSP board to the input of
another DSP board. Describe what happens.

4.5 Assignment 5: Sampling Theorem

For our implementations and tests, we need discrete time signals. In order to transfer data such
as music, speech and video over media, digital communication is utilized.

These signals can

easily be generated by computers. With aim of Matlab/Simulink, you are able to simulate the
Sampling and Reconstruction process. By completing this assignment, you will understand the
concept of sampling, aliasing and reconstruction.

Preparation exercise
1. Explain the sampling operation by sketching an appropriate diagram.
2. Explain aliasing and how to avoid it.

Laboratory work
Propose and demonstrate the process of Sampling and Reconstruction of a sine wave with
Matlab/Simulink.

Optional: Modulation
Modulation is the process of merging two signals to form a third signal with desirable characteristics of both. Amplitude modulation is one form of analog modulation. The implementation of
amplitude modulation is performed by multiplying two signals, while one of them is a sine-wave
or any other simple wave forms.

Preparation exercise
1. Describe modulation and demodulation.
2. What is the relation between the modulation and convolution?

Laboratory work
Demonstrate Amplitude Modulation and Demodulation by Matlab/Simulink.

Examination

In addition to carrying out the assignments, an individual full technical report for the laboratory
exercises is required to pass the course.

The report should carefully describe execution and

results. The cover page of the report must clearly state your full name and identication code.
The report should be an independent document possible for a person with similar background
as yours to read and understand without having to look elsewhere. It should also be possible to
reproduce similar results by using only the information given in the report. A computer written,

L TEX/MS Word/etc. . . , hard copy of the report is to be handed in on the last laboratory session
for your group. If you need to correct something in the report you will get the report back in
your postbox. You will be notied via e-mail. If your report is approved, you will be notied
via e-mail and the report will be returned in your postbox after the nal deadline for the second
submission. The nal deadline for the second submission is November 2, 2012 at 17:00, meaning
that the postbox for lab reports marked Reports for ELGC03 and ELAD08 in the 21E (oor 3)
corridor will be checked at this time. If you fail to hand in the report before this date and time
you are referred to the next time the course is given.