An Arduino-based EIS with a Logarithmic

Amplifier for Corrosion Monitoring

Emma Angelini , Simone Corbellini , Marco Parvis , Franco Ferraris , Sabrina Grassini
Dipartimento

di elettronica
Politecnico di Torino,
Email: simone.corbellini@polito.it, franco.ferraris@polito.it, marco.parvis@polito.it
Dipartimento di Scienza Applicata e Tecnologia
Politecnico di Torino,
Email: emma.angelini@polito.it, sabrina.grassini@polito.it

Abstract Electrochemical Impedance Spectroscopy (EIS) is an

interesting non-invasive technique to study the corrosion layer of
metallic artifacts as well as to test the integrity of protective coatings,
however commercial EIS systems are rather expensive devices. This
paper describes an extremely low cost realization of an EIS system
that is based on a simple commercial Arduino Board whose cost is
below 50$. The instrument is able to perform impedance measurements in the range 1 k to 1 G, thanks to a specifically designed
front end based on a logarithmic amplifier, and in the frequency
range of 0.01 Hz to 100 kHz. The instrument can work as a
stand-alone device or connected to a PC. The required current is
of about 100 mA, thus, the USB port of a common laptop can
power the instrument for several hours without external supply. It
is also possible to employ several instruments at the same time for a
massive parallel measurement campaign with a negligible cost. The
instrument accuracy is of about 2% for impedances in the range of
1 k to 100 M with uncertainty on the phase of about 2 .
Index Terms Impedance measurement, Corrosion, Electrochemical Impedance Spectroscopy.

I. I NTRODUCTION
The EIS is an interesting non-invasive technique that permits
to analyze both the effectiveness of protective coatings and
the corrosion rate of metallic objects by means of electrical
measurements [1] [2]. The analysis is performed by measuring
amplitude and phase of the coatings electrical impedance at
different frequencies. The impedance is usually measured by
means of an electrochemical cell that relies on an electrolyte to
establish a suitable connection with the coating surface and,
at the same time, to create a desired corrosive environment
[3]. Since the solution usually exhibits a non negligible
electrical resistance, as shown in the scheme of Fig. 1, the
electrochemical cell often exploits three electrodes rather than
two [4], namely: Counter electrode (C), Reference electrode
(R) and Working electrode (W). The R-C pair is used to
stimulate the coating surface compensating the voltage drop
across the solution; the Working electrode, which is directly
connected to the metallic object is used instead to measure the
current that flows through the structure as a consequence of
the stimulus. The impedance of interest is thus obtained as the
ratio between the voltage established at the R electrode and
the current flowing from C to W. In order to avoid perturbing
the electrochemical equilibrium of the solution-coating-metal
structure, however, the applied stimulus has to be quite small.

978-1-4673-6386-0/14/$31.00 2014 IEEE

In addition, the stimulus might need to be superimposed to

the electrochemical open circuit potential (EOC) that builds
up when the electrolyte reaches the metallic substrate through
pores or defects of the coating. If the superimposition is
not correctly performed, a DC current might take place with
the risk of greatly accelerating the corrosion process or even
irreversibly damaging the structure under investigation.
The typical frequency range of an EIS analysis spans from
1 mHz to 100 kHz, while the expected impedance magnitude
mainly depends on the coating condition and on the area
exposed to the solution, which is often referred to as electrode
surface. In case of a typical surface of 1 cm2 the amplitude
can be in the range from 1 k, for severely damaged coatings,
up to 1 10 G, for high protective coatings measured at
low frequency. These very wide ranges combined with the
electrochemical EOC potential usually make it difficult to
realize EIS systems. Despite nowadays many portable EIS
devices are available on the market, their cost remains rather
high, preventing the massive exploitation of the EIS technique.
In this work we propose an extremely cheap solution
specifically conceived to realize an EIS system that still retains
a suitable accuracy. Moreover, the final cost of the system is
so low that it is even possible to parallelize the use of many
instruments to carry out massive campaigns of analysis.
In section II, the architecture of the instrument is described
along with a detailed discussion on the logarithmic front-end.
Whereas in section III some experimental results are presented
with a preliminary estimation of the system accuracy.

Fig. 1.

Electrochemical cell and Electrodes.

A. The logarithmic front-end

The proposed front-end to cover up to 6 decades is based on
the logarithmic transimpedance amplifier AD8304 (by Analog
Device). Such amplifier converts the input current into a
voltage according to the following transfer function:
VOU T = k log10 (IL /IZ )

Fig. 2. Block diagram of the proposed instrument based on an Arduino Due

board and on a simple analog front-end that exploits a logarithmic amplifier
to extend the measurement range up to 6 decades.

II. T HE

PROPOSED ARCHITECTURE

The proposed system is based on a low-cost Arduino Due

board embedding a 32 bit microcontroller (SAM3X8E), and
on a specifically designed shield that implements a suitable
analog front-end.
The block diagram of the proposed system is shown in
Fig. 2: the on-board microcontroller, which represents the
core of the system, embeds a dual channel 12-bit digital to
analog converter (DAC), a 12-bit analog to digital converter
(ADC) and enough memory to accommodate a rather complex
firmware and to store an adequate amount of data. In particular,
the data memory consists of 96 kB of static RAM, which is
adequate for this specific purpose. The on-chip availability
of both the DAC and ADC permits to simultaneously carry
out the generation of the sinusoidal stimulus and the coherent
acquisition of the current, which represents an important
element to allow an ordinary sin-fit algorithm to be efficiently
employed to provide accurate values of amplitude and phase
of the desired impedance.
Unfortunately, the resolution of the ADC converter is not
adequate to cover the extremely wide dynamic required in this
specific application (i.e. from 1 k to 1 G). Hence, a suitable
front-end has to be designed to extend the ADC range over
at least 5 or 6 decades. A typical approach could be the use
of a programmable gain amplifier to switch over a suitable
set of gains, depending on the amplitude of the current to
measure. However, from the measurement point of view, this
solution would introduce a series of issues connected with the
piecewise gain, such as: discontinuities in the calibration curve
dependent on the value of the measured impedance, which
are difficult to model, settling times and complex algorithms
to control the gain selection. All these issues increase the
complexity and cost, and make the system difficult to be
characterized. For these reasons, the authors propose to use
an innovative approach based on a logarithmic amplifier as
described hereafter.

(1)

where IL is the input current, k is the amplifier scale factor, which is internally trimmed to 200 mV/decade (i.e.
10 mV/dB), and IZ is the current for which the output
becomes zero, which is often called intercept. The selected
amplifier is very suitable for this application since it exhibits
an overall dynamic of 160 dB and an intercept of 100 pA,
permitting to measure currents in the range from 100 pA to
10 mA with a single stage.
One should note, however, that, if from the one hand the
logarithmic font-end greatly simplifies the instrument hardware, on the other hand, special care and non conventional
algorithms have to be employed to implement the sin-fit on
the acquired current samples, which now follow a logarithmic
relationship with the input current. In addition, it is important
to note that the logarithmic amplifier, by definition, can deal
only with positive currents (in this case greater than the
intercept), thus a suitable bias has to be superimposed to
permit the measurement of bipolar signals. The block diagram
of the measurement chain shown in Fig.3 helps to analyze the
overall behavior of the system.

Fig. 3.

Block diagram of the measurement chain.

The DAC generates a sinusoidal stimulus superimposed to

the DC voltage required to balance the electrochemical open
circuit potential, VEOC . After a suitable low-pass filtering
(not shown in the diagram for simplicitys sake), the voltage
is applied to the unknown impedance, ZX . The consequent
current, IX (t), which should not contain a DC component1, is
directly applied to the transimpedance input. Then, the second
channel of the DAC is used to bias the amplifier input in order
to make the measured current, iL (t), unipolar. The correct
choice of the bias current, Ibias , is crucial to achieve valid
results: if the bias is too low, the amplifier output saturates at
the lowest limit, while if the bias is too high the measurement
resolution becomes tremendously impaired. It is also important
to note that the bias current should swing over 6 decades
1 the DC component of the voltage stimulus, which is generated by the
DAC, has to be equal to the electrochemical open circuit potential so that no
DC current flows through the circuit.

as well in order to assure the polarization over the whole

measurement range: to achieve this a diode is used as visible in
the overall block diagram of Fig. 2. The output of the amplifier
is directly applied to the ADC, however, a constant voltage
offset, VOf f , which may arise at the amplifier output or in the
ADC, is taken into account as well in the measurement chain.
Combining all the elements, the relationship between the
input current and the acquired voltage VA (t) can be described
by the following equation:
vA (t) = VOf f + k log10 ((Ibias + iX (t))/IZ )

(2)

where ideally k is the nominal scale factor of the amplifier

(200 mV/decade) and IZ the nominal intercept (100 pA).
Eventually, after the analog to digital conversion, the results
consist in a sequence of numbers connected to the acquired
samples of voltage vA (t) through the converters reference
voltage VREF and resolution, as follow:
NLSB = vA /VREF 4096

(3)

where VREF for Arduino Due board is 3.3 V. From the

obtained number, NLSB , is thus possible to compute the input
current by inverting equations (2) and (3):



NLSB
V
V
/k
iX + Ibias = IZ 10 4096 REF Of f
= ko 10NLSB /kG
(4)
where the coefficient kG represents the overall acquisition
gain, whose nominal value is 248.24 LSB/decade, and ko =
IZ 10( VOf f /k) is a coefficient that depends on the voltage
offset and on the intercept. From equation (4) is thus evident
that: a constant bias current Ibias still does not affect directly
the sin-fit algorithm; the voltage offset VOf f introduces a
gain error in the measurement chain that has to be evaluated
during the system calibration; either changes in the reference
voltage or amplifier gain, which might due for example to the
attenuation of the amplifier low-pass filter, introduce a signal
distortion on the set of data processed by the sin-fit algorithm.
This distortion assumes a crucial role in the accuracy of the
whole system, as evident from the sensitivity of the current
iX with respect to this parameter:
iX =

NLSB ln(10)
kG 0.01 NLSB kG
kG

Fig. 4. This figure shows the effects of changes in the acquisition gain kG
on the computed impedance . If the coefficient kG increases from its nominal
value of 3%, the system underestimates the impedance magnitude up to about
40%. However, when the gain deviates, a second harmonic appears in the
linearized signal and its amplitude and phase can help to detect the problem.
If the gain decreases, the second harmonic has the same phase of the main
component, while if the gain increases. the second harmonic rotates by 180 .

(5)

in particular, it has to be highlighted that changes in the

acquisition gain kG are amplified by the value of the absolute
current: as an example, when the ADC is working near to
its half range the NLSB is about 2000 LSB, which means
an error of 1% in kG leads to an error of 20% in the
impedance magnitude. Fig. 4 shows the effect of the distortion
on the final estimation of the impedance magnitude for an
impedance of 10 k, a stimulus of 1 V and a bias current
equal to 150% of the sinusoidal component. However, the
problem can be mitigated by an initial calibration consisting
in the measurement of an external standard resistor, when
the metrological chain is enough stable over a measurement
session.

Fig. 5.
Photograph of the Arduino Due board and of the home-made
prototypal shield which can be plugged on top of Arduino to add the analog
front-end with the logarithmic amplifier.

III. E XPERIMENTAL RESULTS

A fully operational prototype containing all the elements
shown in the block diagram of Fig. 2 has been mounted on
a prototypal board. Fig. 5 shows a photograph of the realized
shield along with the employed Arduino Due board.
A series of preliminary tests has been performed measuring
the impedance of capacitors and resistors with the main aim of
verifying the stability of the acquisition gain and to estimate

Fig. 6. Bode diagram of a R-C network measured in the range from 1 Hz

to 100 kHz. The plot reports the magnitude of the measured impedance and
the expected curve obtained by fitting the network model.

Fig. 8. Magnitude deviations between the measured R-C network and the
expected values obtained by fitting the network model. All over the frequency
range the deviations are almost within 2%.

Fig. 7. Bode diagram of a R-C network measured in the range from 1 Hz

to 100 kHz. The plot reports the phase of the measured impedance and the
expected curve obtained by fitting the network model.

Fig. 9. Phase deviations between the measured R-C network and the expected
values obtained by fitting the network model. All over the frequency range
the deviations are within 0.8 .

the achievable accuracy. During these tests the best value of the
acquisition gain kG has been estimated finding the minimum
of the amplitude of the residuals second harmonic, and it
resulted of 242.32.
Fig. 6 and 7 show amplitude and phase, respectively, obtained during the measurement of a R1 + R2 //C network,
with R1 = 470 k, R2 = 100 M and C = 330 pF, from
1 Hz to 100 kHz. Fig. 8 and 9 show instead the deviations
between measurements and the expected values obtained from
the fitted model of the measured network: the phase deviations
are within 0.8 over the whole frequency band. The magnitude
deviations instead are within 2 3%. Some peaks appear at
center band where the magnitude changed and the bias current
had to be changed as well.

To investigate the system over a wider range, a single

capacitor of 330 pF has been measured from 0.1 Hz to
100 kHz. Fig. 11 to Fig. 12 show the results: the magnitude
changed over 6 decades, from 5 k up to 5 G. Despite
this huge dynamic the deviations are still quite low: for the
phase 2 over almost the whole band, and 3 4% for the
magnitude. Only for frequencies higher than 40 kHz the
deviation increased up to 8%.
Main technical specifications of the realized prototype are
summarized in Table I. The stimulus generation is performed
by means of the internal DA converter, thus, the frequency
accuracy of the instrument depends mainly on the accuracy
of the crystal mounted on the Arduino board; a negligible
uncertainty, of the order of 100 ppm, can be expected in most

Fig. 10. Bode diagram of a capacitor of 330 pF measured in the range

from 0.1 Hz to 100 kHz. The plot reports the magnitude of the measured
impedance and the expected curve obtained by fitting the capacitor model.
The magnitude spans over six decades, from 5 k up to 5 G

Fig. 12. Magnitude deviations between the measured capacitors impedance

and the expected values obtained by fitting the capacitor model. In the range
from 10 k to 100 M the deviations are almost all within 2%. For
frequencies higher than 40 kHz a systematic error appears in the residuals
up to 8%.
TABLE I
S YSTEM S PECIFICATIONS
Impedance range
Frequency range
Stimulus amplitude
Current consumption
Magnitude uncertainty
Phase uncertainty
Meas. Time* (0.1 Hz - 1 Hz)
Meas. Time* (1 Hz - 10 Hz)
Meas. Time* (10 Hz - 1 kHz)
Meas. Time* (1 kHz - 100 kHz)
* with 15 points per decade

Fig. 11. Bode diagram of a capacitor of 330 pF measured in the range from
0.1 Hz to 100 kHz. The plot reports the phase of the measured impedance
and the expected curve obtained by fitting the capacitor model.

of the cases.

1 k 5 G
0.01 Hz 100 kHz
50 mVpp 2 Vpp
100 mA
better than 5%
better than 3
180 s
80 s
100 s
30 s

The realized prototype exhibited in most of the cases accuracy

of 23% for the magnitude and about 1 for the phase. A more
detailed characterization is being performed and the possibility
to reduce the effect connected with the amplifier gain, by
means of an auto-calibration procedure, is under investigation
as well. The final cost of the system could be even less than
100$, which would actually permit a massive exploitation of
the EIS technique.
R EFERENCES

IV. C ONCLUSIONS
In this paper a very low-cost EIS system has been presented
and described. The system is based on a low-cost Arduino
Due board and on a specifically designed analog font-end
that makes use of a logarithmic amplifier to achieve the
required dynamic without substantially increasing the system complexity and cost. A preliminary investigation on the
achievable accuracy has been carried out measuring electrical
components. The obtained results are very promising and
already confirmed the capability of the instrument to measure
with acceptable accuracy impedances over 6 decades of range.

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