Note 6 Microcontrollers
Note 6 Microcontrollers
Note 6 Microcontrollers
Microcontrollers
The term
chip
microprocessor and many I/O device interfaces such as A/D and D/A converters. In
microcontroller applications, the amount of memory typically needed is in the order of
tens of kilobytes, as opposed to the hundreds of megabytes memory commonly available
in desktop applications. As result, the cost of microcontrollers is less compared to
general-purpose computers, which makes them good candidates for embedded controller
applications.
In modern processors, numbers are stored and represented in binary forms made up of
between 8 to 64 bits (1 to 8 bytes) this is referred to as a Word. The data bus is used to
transport a word (consisting of 1 to 8 bytes depending on the processor) to or from the
CPU and the memory or the I/O interfaces. Buses transport information in a parallel
binary form. They consist of a number of wires, each transporting 1 binary digit or bit. To
transport this word, fast processor could use a data bus that would have 64 lines for each
bit of the word. Alternatively, this word may be transported in parts, e.g. in 2 parts using
a 32 bit bus.
Data are stored in memory locations (wide enough to store in a binary form, all bits
associated with a word). Each memory location is identified through an address which is
essentially a binary number. When a memory location is accessed by the processor, the
address of this location is placed on the address bus. Thus, the address bus carries signals
which indicate where data is to be found and so the selection of certain memory locations
or input or output ports. When a particular address is selected by its address being placed
on the address bus, only that location is open to the communications from the CPU. The
CPU is thus able to communicate with just one location at a time. A computer with an 8bit data bus has typically a 16-bit wide address bus, i.e. 16 wires. This size of address
bus enables 216 locations to be addressed. 216 is 65 536 locations and is usually written as
64 K, where K is equal to 1024. The more memory that can be addressed the greater the
volume of data that can be stored and the larger and more sophisticated the programs that
can be used.
The control bus is the means by which signals are sent to synchronize the separate
elements. The system clock signals are carried by the control bus. These signals
generate time intervals during which system operations can take place, The CPU sends
some control signals to other elements to indicate the type of operation being performed,
e.g. whether it needs to READ (receive) a signal or WRITE (send) a signal.
There are a number of types of register; the number, the size, and types of register vary
from one microprocessor to another. The following are common of registers.
1) Accumulator or Working Register. The accumulator register (in PIC it is referred to
as W) is where data for an input to the arithmetic and logic unit is temporarily stored. In
order for the CPU to be able to access, i.e. read, instructions or data in the memory it has
to supply the address of the required memory word using the address bus. When this has
been done, the required instructions or data can be read into the CPU using the data bus.
Since only one memory location can be addressed at once, temporary storage has to be
used when, for example, numbers are combined. For example, in an addition of two
numbers, one of the numbers is fetched from one address and placed in the accumulator
register while the CPU fetches the other number from the other memory address. Then
the two numbers can be processed by the arithmetic and logic section of the CPU. The
result is then transferred back into the accumulator register. The accumulator register is
thus a temporary holding register for data to be operated on by the arithmetic and logic
unit and also, after the operation, the register for holding the results. It is thus involved in
all data transfers associated with the execution of arithmetic and logic operations.
2) Status register, or condition code register or flag register. This contains
information concerning the result of the latest process carried out in the arithmetic and
logic unit. It contains individual bits with each bit having special significance. The bits
are called flags. The status of the latest operation is indicated by each flag with each flag
being set or reset to indicate a specific status. For example, they can be used to indicate
whether the last operation resulted in a negative result, a zero result, a carry output occurs
(e.g. the sum of two binary numbers such as 101 and 110 has resulted in a result (1) 011
which for example is bigger than the microprocessor's word size and carries a 1
overflow), an overflow occurs or the program is to be allowed to be interrupted to allow
an external event to occur. The following are common flags.
3) Program counter register (PC) or instruction pointer (IP). This is the register used
to allow the CPU to keep track of its position in a program. This register contains the
address of the memory location that contains the next program instruction. As each
instruction is executed the program counter register is updated so that it contains the
address of the memory location where the next instruction to be executed is stored. The
program counter is incremented each time so that the CPU executes instructions
sequentially unless an instruction, such as a JUMP or a BRANCH, changes the program
counter out of that sequence.
4) Memory address register (MAR). This contains the address of data. Thus, for
example, in the summing of two numbers the memory address register is loaded with the
address of the first number. The data at the address is then moved to the accumulator.
The memory address of the second number is then loaded into the memory address
register. The data at this address is then added to the data in the accumulator. The result
is then stored in a memory location addressed by the memory address register.
5) Instruction register (IR). This stores an instruction. After fetching an instruction
from the memory, the CPU stores it in the instruction register. It can then be decoded
and used to execute an operation.
6) General-purpose registers. These may serve as temporary storage for data or
addresses and be used in operations involving transfers between various other registers.
7) Stack pointer register (SP). The stack is a set of memory locations that can be used
for data storage by programmers. For example, a programmer or an operation may
choose or involve placing a number of values or address locations sequentially within the
stack. These values may then be sequentially retrieved in a first-in-first-out or a last-infirst-out basis. The contents of the stack pointer register is an address which defines the
top of the stack in RAM.
1.3 Memory
The memory unit stores binary data and takes the form of one or more integrated circuits.
The data may be program instruction codes or numbers being operated on. The size of
the memory is determined by the number of wires in the address bus. The memory
elements in a unit consist essentially of large numbers storage cells with each cell capable
of storing either a 0 or a 1 bit. The storage cells are grouped in locations with each
location capable of storing one word. In order to access the stored word, each location is
identified by a unique address. Using a 4 address bus, for example, we can have 16
different addresses with each capable of storing one byte, i.e. a group of eight bits. The
size of a memory unit is specified in terms of the number of storage locations available.
For example, 1 K memory has 210 (= 1024) locations.
There are a number of forms of memory unit as follows.
1) ROM. For data that is stored permanently a memory device called a read-only
memory (ROM) is used. ROMs are programmed with the required contents during the
manufacture of the integrated circuit. No data can then be written into this memory while
the memory chip is in the computer. The data can only be read and is used for fixed
programs such as the computer operating systems and programs for dedicated
microprocessor applications. They do not lose their content when power is removed.
2) PROM. The term programmable ROM (PROM) is used for ROM chips that can be
programmed by the user. Once the PROM has been programmed, it cannot be changed.
3) EPROM. The term erasable and programmable ROM (EPROM) is used for ROMs
that can be programmed and their contents later altered. A typical EPROM chip contains
a series of small electronic circuits, cells, which can store charge. The program is stored
by applying voltages to the integrated circuit connection pins and producing a pattern of
charged and uncharged cells. The pattern remains permanently in the chip until erased
by shining ultraviolet light through a quartz window on the top of the device. This
causes all the cells to become discharged. The chip can then be reprogrammed.
4) EEPROM. Electrically erasable PROM (EEPROM) is similar to EPROM. Erasure is
by applying a relatively high voltage rather than using ultraviolet light.
5) RAM. Temporary data, i.e. data currently being operated on, is stored in a read/write
memory referred to as a random-access memory (RAM). Such a memory can be read or
written to.
When ROM is used for program storage, then the program is available and ready for use
when the system is switched on. Programs stored in ROM are termed firmware. Some
firmware must always be present. When RAM is used for program storage then such
programs are referred to as software. When the system is switched on, software may be
loaded into RAM from some other peripheral equipment such as a keyboard or hard disk
or floppy disk.
1.4 Input/output
The input/output operation is defined as the transfer of data between the microprocessor
and the external world. The term peripheral device is used for pieces of equipment that
exchange data with a microprocessor system. Because the speed and characteristics of
peripheral devices can differ significantly from those of the microprocessor, they are
connected via interface chips. A major function of an interface chip is thus to
synchronize data transfers between the microprocessor and peripheral device. In input
operations the input device places the data in the data register of the interface chip; this
holds the data until it is read by the microprocessor. In output operations the
microprocessor places the data in the register until it is read by the peripheral.
For the microprocessor to input valid data from an input device, it needs to be certain that
the interface chip has correctly latched the input data. It can do this by polling an
interrupt. With polling, the interface chip uses a status bit set to 1 to indicate when it has
valid data. The microprocessor keeps on checking the interface chip until it detects the
status bit as 1. The problem with this method is that the microprocessor is having to wait
for this status bit to show, With the interrupt method, the interface chip sends an interrupt
signal to the microprocessor when it has valid data; the microprocessor then suspends
execution of its main program and executes the routine associated with the interrupt in
order to read the data.
2.1 Overview
The PIC 16G877 microcontroller uses what is called a Harvard architecture to
achieve a fast execution speed for a given clock rate. As shown in Figure 3, instructions
are fetched from program memory using buses that are distinct from the buses used for
accessing variables in
data memory, I/O ports
and other sub-circuits.
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Every
instruction
is
coded as a single 14-bit
word which determines
the operation of the CPU,
and fetched over a 14-bit
wide bus.
Figure 3: Harvard architecture.
The pin diagram and the block diagram of the PIC 16F877 are shown in Figure 4 and 5,
respectively. The PIC 16F877 has five bidirectional input-output ports, named Ports A to
E. Port A is 6-bit-wide port while
Port E is 3 bits wide. The other parts
B, C, and D are all 8-bit ports. Hence
the total number of pins is
6+8+8+8+3 = 33 out of 44 pins DIP
package of PIC 16F877 chip. The
remaining pins are used for VDD (two
pins), VSS(two pins), etc. Most of the
pins are software configurable for
one of multiple functions between
general-purpose I/O and peripheral
I/O. Using the register in the chip,
one function is selected for each pin
under software control.
Two addresses in the program memory address space are treated in a special way by the
CPU. When the CPU starts up from its reset state, its program counter is automatically
cleared to zero. This is illustrated in Figure 7 with the content of address 0000 Hex being
a goto Mainline instruction. The second special address, 0004, is automatically loaded
into the program counter when an interrupt occurs. As shown in Figure 7, a goto
IntService instruction is assigned to this address, to cause the CPU to jump to the
beginning of the interrupt service routine, located elsewhere in the memory space.
W, the working register, is used as an intermediary storage source for data storage by
many instructions (the source of an operand). It may also serve as the destination for the
result of the instruction execution. It serves a function similar to that of the accumulator
in many other microcontrollers.
STATUS Register
The state of results from execution of each instruction is captured by the STATUS
register. The contents of the STATUS register are summarized in Figure 9.
Its information content includes the C, or carry, bit. When two 8-bit numbers (operands)
are added together, a 9-bit result can occur. The ninth bit is placed in the carry bit.
The DC, or digit carry, bit signals that a carry from the lower 4 bits occurred during an 8bit addition. This digit carry bit is useful when adding binary-coded-decimal (BCD).
The Z, or zero, bit is affected by the execution of many (but not all) arithmetic and logic
instructions. Before testing the Z bit following an instruction, it should be ascertained
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whether the instruction is indeed one of the group that affects the Z bit. For example, the
instruction DECF can be used to decrement a variable in RAM, setting the Z bit if the
result is zero and clearing it otherwise.
The reset status bits, NOT-TO and NOT-PD, are used in conjunction with the PIC's sleep
mode. The microcontroller can put itself to sleep to save power during intervals when it
has nothing to do. It can be awakened by the occurrence of any of three kinds of events.
Upon wakeup, the CPU can check these two reset status bits to determine which kind of
event awakened it and then respond accordingly.
In direct addressing, the selection of data memory page is performed through RP0 and
RP1 as indicated by Figures 8. Similarly, the bit IRP is issued for memory access in
indirect addressing. The role of IRP, RP0 and RP1 are further discussed in the following
section.
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In direct addressing, seven bits from the instruction and the RP0 and RP1 bits of the
STATUS register are used for selection of the memory bank and to indicate the address
of memory locations within each bank. Some registers are considered to be so important
they are replicated in all banks and may be addressed by using only 7 bits, irrespective of
the setting of RP0 and RP1 as shown in Figure 10.
Every instruction that can employ the direct addressing mode can, as an alternative,
employ the indirect addressing mode. In this alternative mode, the 8 bits of the full
address is first written into File Select Register (FSR), and a bit associated with the
memory banks used is written into the bit IRP of the STATUS registered. In indirect
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addressing, then the contents of IRP and the FSR are subsequently loaded into a register
referred to as INDF. A subsequent direct access of INDF will actually access the register
file. The indirect and direct addressing operations are shown in Figure 11.
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The program counter is supported by an eight-level stack. When an interrupt occurs, the
program counter is automatically pushed onto the stack. Since PIC microcontroller
programs are normally designed so further interrupts remain disabled while any interrupt
source is being serviced, only one of the eight stack locations is needed to deal with the
interrupt return address. The other seven levels can be divided between nested
subroutines within the interrupt service routine and nested subroutines within the
mainline program. Each time a subroutine is called by a call instruction located at address
n in the program memory, the return address (i.e., n + l) is pushed onto the stack. If from
within this subroutine another subroutine is called, its return address is pushed onto the
stack. This can be repeated as this subroutine calls another, which calls another, which
calls another, etc. As each subroutine terminates, its return address is popped off the
stack and loaded into the program counter. The return addresses that were pushed onto
the stack are popped off of the stack in reverse order.
PCLATCH
The final feature of the CPU registers to be discussed is the role of PCLATH. Note that
some instructions such as CALL, contain allow specification of 11 bits for moving to a
new address. The program counter however needs 13-bits. Bits from a special register
referred to as Program Counter Latch (PCLATCH) are used to indicate the remaining two
bits of the full 13 bit address.
Other Special Function Registers
The PIC microcontroller has number of built in peripheral devices that provide special
functionalities such as timers, A/D converters, and generators of signals referred to as
PWM that can be used for driving electrical motors. Associated with each of these
perieral devices are special registers through which a user can set and specify their mode
of operation. For more information on these peripheral functions and their registers refer
to the PIC manual.
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16
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Instruction descriptions:
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19
20
21
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The mainline program begins execution when the PIC comes out of reset. It continues
running until one of the PIC's interrupt sources requests service. At that point the
execution of the mainline code is temporarily suspended. The CPU begins the execution
of the interrupt service routine by automatically loading the program counter with 0004
Hex. At the completion of the interrupt service routine, the CPU returns to where it left
off in the mainline program.
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btfss
Status, Z;
(Opcode) (Operand)
In addition, the opcode field may contain directives to the assembler. These are termed
pseudo-operations since they appear in the op-code field but are not translated into
instructions in machine code. They may define symbols, assign programs and data to
certain areas of memory, generate fixed tables and data, indicate the end of the program,
etc. Common assembly directives are
ORG
EQU
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The following is an example of PIC 16F877 program, which is used to toggle all the bits
on port D on and off.
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26
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