74HC4066

Download as pdf or txt
Download as pdf or txt
You are on page 1of 10

MM74HC4066 Quad Analog Switch

August 1984
Revised January 2005

MM74HC4066
Quad Analog Switch
General Description Features
The MM74HC4066 devices are digitally controlled analog Typical switch enable time: 15 ns
switches utilizing advanced silicon-gate CMOS technology. Wide analog input voltage range: 012V
These switches have low ON resistance and low OFF
Low ON resistance: 30 typ. (MM74HC4066)
leakages. They are bidirectional switches, thus any analog
input may be used as an output and visa-versa. Also the Low quiescent current: 80 A maximum (74HC)
MM74HC4066 switches contain linearization circuitry Matched switch characteristics
which lowers the ON resistance and increases switch lin- Individual switch controls
earity. The MM74HC4066 devices allow control of up to
12V (peak) analog signals with digital control signals of the
same range. Each switch has its own control input which
disables each switch when LOW. All analog inputs and out-
puts and digital inputs are protected from electrostatic
damage by diodes to VCC and ground.

Ordering Code:
Package
Package Description
Order Number Number
MM74HC4066M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC4066MX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC4066SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC4066MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC4066N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.
Pb-Free package per JEDEC J-STD-020B.

Schematic Diagram Connection Diagram

Truth Table
Top View
Input Switch
CTL I/OO/I
L OFF
H ON

2005 Fairchild Semiconductor Corporation DS005355 www.fairchildsemi.com


MM74HC4066
Absolute Maximum Ratings(Note 1) Recommended Operating
(Note 2) Conditions
Supply Voltage (VCC) 0.5 to +15V Min Max Units
DC Control Input Voltage (VIN) 1.5 to VCC +1.5V Supply Voltage (VCC) 2 12 V
DC Switch I/O Voltage (VIO) VEE0.5 to VCC +0.5V DC Input or Output Voltage
Clamp Diode Current (IIK, IOK) 20 mA (VIN, VOUT) 0 VCC V
DC Output Current, per pin (IOUT) 25 mA Operating Temperature Range (TA) 40 +85 C
DC VCC or GND Current, per pin (ICC ) 50 mA Input Rise or Fall Times
Storage Temperature Range (TSTG) 65C to +150C (tr, tf) VCC = 2.0V 1000 ns
Power Dissipation (PD) VCC = 4.5V 500 ns
(Note 3) 600 mW VCC = 9.0V 400 ns
S.O. Package only 500 mW Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Lead Temperature (TL)
Note 2: Unless otherwise specified all voltages are referenced to ground.
(Soldering 10 seconds) 260C
Note 3: Power Dissipation temperature derating plastic N package:
12 mW/C from 65C to 85C.

DC Electrical Characteristics (Note 4)

TA = 25C TA = 40 to 85C TA = 55 to 125C


Symbol Parameter Conditions VCC Units
Typ Guaranteed Limits
VIH Minimum HIGH Level 2.0V 1.5 1.5 1.5 V
Input Voltage 4.5V 3.15 3.15 3.15 V
9.0V 6.3 5.3 6.3 V
12.0V 8.4 8.4 8.4 V
VIL Maximum LOW Level 2.0V 0.5 0.5 0.5 V
Input Voltage 4.5V 1.35 1.35 1.35 V
9.0V 2.7 2.7 2.7 V
12.0V 3.6 3.6 3.6 V
RON Maximum ON Resistance VCTL = VIH, IS = 2.0 mA 4.5V 100 170 200 220
(Note 5) VIS = VCC to GND 9.0V 50 85 105 110
(Figure 1) 12.0 30 70 85 90
2.0V 120 180 215 240
VCTL = VIH, IS = 2.0 mA 4.5V 50 80 100 120
VIS = VCCor GND 9.0V 35 60 75 80
(Figure 1) 12.0V 20 40 60 70
RON Maximum ON Resistance VCTL = VIH 4.5V 10 15 20 20
Matching VIS = VCC to GND 9.0V 5 10 15 15
12.0V 5 10 15 15
IIN Maximum Control VIN = VCC or GND 0.1 1.0 1.0 A
Input Current VCC = 26V
IIZ Maximum Switch OFF VOS = VCC or GND 6.0V 10 60 600 600 nA
Leakage Current VIS = GND or VCC 9.0V 15 80 800 800 nA
VCTL = VIL (Figure 3) 12.0V 20 100 1000 1000 nA
IIZ Maximum Switch ON VIS = VCC to GND 6.0V 10 40 150 150 nA
Leakage Current VCTL = VIH 9.0V 15 50 200 200 nA
VOS = OPEN (Figure 2) 12.0V 20 60 300 300 nA
ICC Maximum Quiescent VIN = VCC or GND 6.0V 2.0 20 40 A
Supply Current IOUT = 0 A 9.0V 4.0 40 80 A
12.0V 8.0 80 160 A
Note 4: For a power supply of 5V 10% the worst case on resistance (RON) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing with
this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current occurs for
CMOS at the higher voltage and so the 5.5V values should be used.
Note 5: At supply voltages (VCCGND) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that
these devices be used to transmit digital only when using these supply voltages.

www.fairchildsemi.com 2
MM74HC4066
AC Electrical Characteristics
VCC = 2.0V6.0V VEE = 0V12V, CL = 50 pF (unless otherwise specified)
TA = 25C TA = 40 to 85C TA = 55 to 125C
Symbol Parameter Conditions VCC Units
Typ Guaranteed Limits
tPHL, tPLH Maximum Propagation 2.0V 25 50 30 75 ns
Delay Switch In to Out 4.5V 5 10 13 15 ns
9.0V 4 8 10 12 ns
12.0V 3 7 11 13 ns
tPZL, tPZH Maximum Switch Turn RL = 1 k 2.0V 30 100 125 150 ns
ON Delay 4.5V 12 20 25 30 ns
9.0V 6 12 15 18 ns
12.0V 5 10 13 15 ns
tPHZ, tPLZ Maximum Switch Turn RL = 1 k 2.0V 60 168 210 252 ns
OFF Delay 4.5V 25 36 45 54 ns
9.0V 20 32 40 48 ns
12.0V 15 30 38 45
fMAX Minimum Frequency RL = 600 4.5V 40 MHz
Response (Figure 7) VIS = 2 VPP at (VCC/2) 9.0V 100 MHz
20 log (VO/VI) = 3 dB (Note 6) (Note 7)
Crosstalk Between RL = 600, F = 1 MHz
any Two Switches (Note 7) (Note 8) 4.5V 52 dB
(Figure 8) 9.0V 50 dB
Peak Control to Switch RL = 600, F = 1 MHz 4.5V 100 mV
Feedthrough Noise (Figure 9) CL = 50 pF 9.0V 250 mV
Switch OFF Signal RL = 600, F = 1 MHz
Feedthrough V(CT)VIL
Isolation (Note 7) (Note 8) 4.5V 42 dB
(Figure 10) 9.0V 44 dB
THD Total Harmonic RL = 10 k, CL = 50 pF,
Distortion F = 1 kHz
(Figure 11) VIS = 4 VPP 4.5V .013 %
VIS = 8 VPP 9.0V .008 %
CIN Maximum Control 5 10 10 10 pF
Input Capacitance
CIN Maximum Switch 20 pF
Input Capacitance
CIN Maximum Feedthrough VCTL = GND 0.5 pF
Capacitance
CPD Power Dissipation 15 pF
Capacitance
Note 6: Adjust 0 dBm for F = 1 kHz (Null RL/RON Attenuation).
Note 7: VIS is centered at VCC/2.
Note 8: Adjust input for 0 dBm.

3 www.fairchildsemi.com
MM74HC4066
AC Test Circuits and Switching Time Waveforms

FIGURE 1. ON Resistance FIGURE 2. ON Channel Leakage Current

FIGURE 3. OFF Channel Leakage Current

FIGURE 4. tPHL, tPLH Propagation Delay Time Signal Input to Signal Output

FIGURE 5. tPZL, tPLZ Propagation Delay Time Control to Signal Output

FIGURE 6. tPZH, tPHZ Propagation Delay Time Control to Signal Output

www.fairchildsemi.com 4
MM74HC4066
AC Test Circuits and Switching Time Waveforms (Continued)

FIGURE 7. Frequency Response

FIGURE 8. Crosstalk: Control Input to Signal Output

FIGURE 9. Crosstalk Between Any Two Switches

FIGURE 10. Switch OFF Signal Feedthrough Isolation

FIGURE 11. Sinewave Distortion

5 www.fairchildsemi.com
MM74HC4066
Typical Performance Characteristics

Typical ON Resistance Typical Crosstalk Between


Any Two Switches

Typical Frequency Response

Special Considerations
In certain applications the external load-resistor current the analog switch input pins, the voltage drop across the
may include both VCC and signal line components. To switch must not exceed 0.6V (calculated from the ON resis-
avoid drawing VCC current when switch current flows into tance).

www.fairchildsemi.com 6
MM74HC4066
Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A

7 www.fairchildsemi.com
MM74HC4066
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D

www.fairchildsemi.com 8
MM74HC4066
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14

9 www.fairchildsemi.com
MM74HC4066 Quad Analog Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide


Package Number N14A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea-
body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support
to perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the www.fairchildsemi.com
user.

www.fairchildsemi.com 10

You might also like