LD7535/LD7535A

12/11/2007

Green-Mode PWM Controller with Integrated Protections

Rev. 01c

General Description Features

The LD7535/LD7535A are low cost, low startup current, z High-Voltage CMOS Process with Excellent ESD
current mode PWM controllers with green-mode power- protection
saving operation. The integrated functions include the z Very Low Startup Current (<20A)
leading-edge blanking of the current sensing, internal slope z Current Mode Control
compensation and the tiny package of SOT-26. They z Non-audible-noise Green Mode Control
provide the users a superior AC/DC power application of z UVLO (Under Voltage Lockout)
higher efficiency, low external component counts, and lower z LEB (Leading-Edge Blanking) on CS Pin
cost solution. z Programmable Switching Frequency
z Internal Slope Compensation
Furthermore, LD7535/LD7535A features more protections
z OVP (Over Voltage Protection) on Vcc Pin
like OLP (Over Load Protection) and OVP (Over Voltage
z OLP (Over Load Protection)
Protection) to eliminate the external protection circuits. And
z 300mA Driving Capability
to satisfy different designs, 2 versions of OVP levels are
implemented as --- Applications
z LD7535 --- 28.0V 1.5V. z Switching AC/DC Adaptor and Battery Charger
z Open Frame Switching Power Supply
z LD7535A --- 21.0V 1.5V.
z 384X Replacement

Typical Application

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LD7535&LD7535A-DS-01c December 2007
 LD7535/LD7535A
Pin Configuration (LD7535)
DIP-8 (TOP VIEW) SOT-26 (TOP VIEW)

COMP
GND

NC

RT
8 7 6 5

6 5 4
TOP MARK Y WP 35
YYWW## 1 2 3

1 2 3 4
Y The PB free package is identified
VCC
NC
OUT

CS

in embossed font while green

package in regular font.
YY, Y : Year code (D: 2004, E: 2005..)
WW, W: Week code
P : LD75..
(Product family code)
## : Production code

Pin Configuration (LD7535A)

DIP-8 (TOP VIEW) SOT-26 (TOP VIEW)
COMP
GND

NC

RT

8 7 6 5

6 5 4
TOP MARK Y WP 35A
YYWW## 1 2 3

1 2 3 4
Y The PB free package is identified
VCC
NC
OUT

CS

in embossed font while green

package in regular font.

YY, Y : Year code (D: 2004, E: 2005..)

WW, W: Week code
P : LD75..
(Product family code)
## : Production code

Ordering Information
Part number Package TOP MARK Shipping
LD7535 BL SOT-26 PB Free YWP/35 3000 /tape & reel
LD7535 GL SOT-26 Green Package YWP/35 3000 /tape & reel
LD7535 BN DIP-8 PB Free LD7535BN 3600 /tube /Carton
LD7535A BL SOT-26 PB Free YWP/35A 3000 /tape & reel
LD7535A GL SOT-26 Green Package YWP/35A 3000 /tape & reel
LD7535A BN DIP-8 PB Free LD7535ABN 3600 /tube /Carton
The LD7535/ LD7535A are ROHS Complaint/ Green Package.

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 LD7535/LD7535A
Pin Descriptions

PIN NAME FUNCTION

1 GND Ground
Voltage feedback pin (same as the COMP pin in UC384X), By connecting
2 COMP
a photo-coupler to close the control loop and achieve the regulation.
This pin is to program the switching frequency. By connecting a resistor
3 RT
to ground to set the switching frequency.
4 CS Current sense pin, connect to sense the MOSFET current
5 VCC Supply voltage pin
6 OUT Gate drive output to drive the external MOSFET

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 LD7535/LD7535A
Block Diagram

* Note: OLP delay is 60mS when the switching frequency is set as 65KHz.
The OLP delay time is proportional to the period of switching cycle.

1
That is, TOLP _ delay Ts = .
fs

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 LD7535/LD7535A
Absolute Maximum Ratings
Supply Voltage VCC 30V
COMP, RT, CS -0.3 ~7V
Junction Temperature 150C
Operating Ambient Temperature -40C to 85C
Storage Temperature Range -65C to 150C
Package Thermal Resistance (SOT-26) 250C/W
Package Thermal Resistance (DIP-8) 100C/W
Power Dissipation (SOT-26, at Ambient Temperature = 85C) 250mW
Power Dissipation (DIP-8, at Ambient Temperature = 85C) 650mW
Lead temperature (Soldering, 10sec) 260C
ESD Voltage Protection, Human Body Model 3KV
ESD Voltage Protection, Machine Model 250V
Gate Output Current 300mA

Caution:
Stresses beyond the ratings specified in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not
implied.

Recommended Operating Conditions

Item Min. Max. Unit

Supply Voltage Vcc (LD7535) 11 25 V
Supply Voltage Vcc (LD7535A) 11 18 V
Switching Frequency 50 130 KHz
Startup Resistor Value 1.2 4.4 M

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 LD7535/LD7535A
Electrical Characteristics
o
(TA = +25 C unless otherwise stated, VCC=15.0V)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Voltage (Vcc Pin)
Startup Current 8 20 A
VCOMP=0V 2.0 3.0 mA
Operating Current
VCOMP=3V 2.5 mA
(with 1nF load on OUT pin)
Protection tripped (OLP, OVP) 0.5 mA
UVLO (off) 9.0 10.0 11.0 V
UVLO (on) 15.0 16.0 17.0 V
LD7535 26.5 28.0 29.5 V
OVP Level
LD7535A 19.5 21.0 22.5 V
Voltage Feedback (Comp Pin)
Short Circuit Current VCOMP=0V 1.5 2.2 mA
Open Loop Voltage COMP pin open 6.0 V
Green Mode Threshold VCOMP 2.35 V
Current Sensing (CS Pin)
Maximum Input Voltage, Vcs(off) 0.80 0.85 0.90 V
Leading Edge Blanking Time 350 nS
Input impedance 1 M
Delay to Output 100 nS
Oscillator (RT pin)
Frequency RT=100K 60 65 70 KHz
Green Mode Frequency Fs=65KHz 20 KHz
Temp. Stability (-40C ~105C) 3 %
Voltage Stability (VCC=11V-25V) 1 %
Gate Drive Output (OUT Pin)
Output Low Level VCC=15V, Io=20mA 1 V
Output High Level VCC=15V, Io=20mA 8 V
Rising Time Load Capacitance=1000pF 50 200 nS
Falling Time Load Capacitance=1000pF 30 100 nS
OLP (Over Load Protection)
OLP Trip Level VCOMP(OLP) 5.0 V
OLP Delay Time (note) Fs=65KHz 60 mS

Note: The OLP delay time is proportional to the period of switching cycle. So that, the lower RT value will set the higher switching
frequency and the shorter OLP delay time.

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Typical Performance Characteristics

18.0 12

17.2 11.2
UVLO (on) (V)

UVLO (off) (V)

16.4 10.4

15.6 9.6

14.8 8.8

8
14.0
-40 0 40 80 120 125 -40 0 40 80 120 125
Temperature (C) Temperature (C)
Fig. 1 UVLO (on) vs. Temperature Fig. 2 UVLO (off ) vs. Temperature

70 26
Green Mode Frequency (KHz)

68 24
Frequency (KHz)

66 22

64 20

62 18

60 16
-40 0 40 80 120 125 -40 0 40 80 120 125

Temperature (C) Temperature (C)

Fig. 3 Frequency vs. Temperature Fig. 4 Green Mode Frequency vs. Temperature

25
70
Green Mode Frequency (KHz)

68 23
Frequency (KHz)

66
21

64
19

62 17

60 15
11 12 14 16 18 20 22 24 25 11 12 14 16 18 20 22 24 25
Vcc (V) Vcc (V)
Fig. 5 Frequency vs. Vcc Fig. 6 Green Mode Frequency vs. Vcc

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85
0.90

80
0.88
Max Duty (%)

VCS (off) (V)

75
0.86

70
0.84

65
0.82

60
-40 0 40 80 120 125 0.80
-40 0 40 80 120 125
Temperature (C) Temperature (C)
Fig. 7 Max Duty vs. Temperature Fig. 8 VCS (off) vs. Temperature

12 35

10
30
LD7535
8
VCC OVP (V)
Istartup (A)

25
6
LD7535A
20
4

15
2

0 10
-40 0 40 80 120 125 -40 0 40 80 120 125
Temperature (C) Temperature (C)
Fig. 9 Startup Current (Istartup) vs. Temperature Fig. 10 VCC OVP vs. Temperature

7.0 6.0

6.5 5.5

6.0 5.0
VCOMP (V)

OLP (V)

5.5 4.5

5.0 4.0

4.5 3.5
-40 0 40 80 120 125
-40 0 40 80 120 125
Temperature (C)
Temperature (C)
Fig. 11 VCOMP open loop voltage vs. Temperature Fig. 12 OLP-Trip Level vs. Temperature

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 LD7535/LD7535A
Application Information
PWM controller will help to increase the value of R1 and
Operation Overview
then reduce the power consumption on R1. By using CMOS
The LD7535/LD7535A meet the green-power requirement
process and the special circuit design, the maximum startup
and are intended for the use in those modern switching
current of LD7535/LD7535A is only 20A.
power suppliers and adaptors which demand higher power
efficiency and power-saving. They integrated more functions If a higher resistance value of the R1 is chosen, it usually
to reduce the external component counts and the size. Their takes more time to start up. To carefully select the value of
major features are described as below. R1 and C1 will optimize the power consumption and startup
time.
Under Voltage Lockout (UVLO)
An UVLO comparator is implemented in it to detect the
voltage on the VCC pin. It would assure the supply voltage
enough to turn on the LD7535/LD7535A PWM controller
and further to drive the power MOSFET. As shown in Fig.
13, a hysteresis is built in to prevent the shutdown from the
voltage dip during startup. The turn-on and turn-off
threshold level are set at 16.0V and 10.0V, respectively.

Vcc

UVLO(on)

UVLO(off)

t
Fig. 14
I(Vcc) operating current
(~ mA)

Current Sensing and Leading-edge Blanking

startup current
(~uA) The typical current mode of PWM controller feedbacks both
t current signal and voltage signal to close the control loop
and achieve regulation. As shown in Fig. 15, the
Fig. 13
LD7535/LD7535A detect the primary MOSFET current from
the CS pin, which is not only for the peak current mode
Startup Current and Startup Circuit control but also for the pulse-by-pulse current limit. The
maximum voltage threshold of the current sensing pin is set
The typical startup circuit to generate the LD7535/LD7535A at 0.85V. From above, the MOSFET peak current can be
Vcc is shown in Fig. 14. During the startup transient, the obtained from below.
Vcc is lower than the UVLO threshold thus there is no gate
0.85 V
pulse produced from LD7535/LD7535A to drive power IPEAK(MAX) =
RS
MOSFET. Therefore, the current through R1 will provide
the startup current and to charge the capacitor C1.
Whenever the Vcc voltage is high enough to turn on the
LD7535/LD7535A and further to deliver the gate drive signal,
the supply current is provided from the auxiliary winding of
the transformer. Lower startup current requirement on the

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 LD7535/LD7535A

Fig. 15

A 350nS leading-edge blanking (LEB) time is included in the

input of CS pin to prevent the false-trigger from the current
spike. In the low power application, if the total pulse width of
the turn-on spikes is less than 350nS and the negative spike Fig. 16
on the CS pin doesnt exceed -0.3V, it could eliminated the
R-C filter (as shown in the figure16).
However, the total pulse width of the turn-on spike is
decided by the output power, circuit design and PCB layout.
It is strongly recommended to adopt a smaller R-C filter (as
shown in figure 17) for higher power application to avoid the
CS pin being damaged by the negative turn-on spike.

Output Stage and Maximum Duty-Cycle

An output stage of a CMOS buffer, with typical 300mA
driving capability, is incorporated to drive a power MOSFET
directly. And the maximum duty-cycle of LD7535/LD7535A
is limited to 75% to avoid the transformer saturation.

Oscillator and Switching Frequency

Connect a resistor from RT pin to GND according to the
equation below to program the normal switching frequency:
65.0
fSW = 100(KHz )
RT(K ) Fig. 17

The operating frequency range for the LD7535/LD7535A is Voltage Feedback Loop
recommended to set between 50KHz and 130KHz. The voltage feedback signal is provided from the TL431 at
the secondary side through the photo-coupler to the COMP
pin of the LD7535/LD7535A. Similar to UC3842, the
LD7535/LD7535A would carry 2 diodes voltage offset at the
stage to feed the voltage divider at the ratio of 1/3, that is,

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 LD7535/LD7535A
1 The Vcc OVP function in LD7535/LD7535A is an
V (PWMCOMPARATOR ) = ( VCOMP 2VF )
3 auto-recovery type protection. If the OVP condition,
usually caused by the feedback loop opened, is not
A pull-high resistor is embedded internally and can be
released, the Vcc will tripped the OVP level again and
eliminated externally.
re-shutdown the output. The Vcc is working as a hiccup
mode. The Figure. 18 shows its operation.
Internal Slope Compensation On the other hand, if the OVP condition is removed, the Vcc

In the conventional application, the problem of the stability is level will get back to normal level and the output will
a critical issue for current mode controlling, when it operates automatically return to the normal operation.

in higher than 50% of the duty-cycle. As UC384X, It takes

slope compensation from injecting the ramp signal of the
RT/CT pin through a coupling capacitor. It therefore requires
no extra design for the LD7535/LD7535A since it has
integrated it already.

On/Off Control
The LD7535/LD7535A can be turned off by pulling COMP
pin lower than 1.2V. The gate output pin of the
LD7535/LD7535A will be disabled immediately under such
condition. The off-mode can be released when the pull-low
signal is removed.
Fig. 18

Dual-Oscillator Green-Mode Operation

The OVP levels are ---
There are many different topologies has been implemented
in different chips for the green-mode or power saving z LD7535 --- 28.0V 1.5V.
requirements such as burst-mode control, skipping-cycle
mode, variable off-time control etc. The basic operation z LD7535A --- 21.0V 1.5V.

theory of all these approaches intended to reduce the

switching cycles under light-load or no-load condition either
Over Load Protection (OLP)
by skipping some switching pulses or reduce the switching
To protect the circuit from being damaged under over load
frequency.
condition or short condition, a smart OLP function is
implemented in the LD7535/LD7535A. The figure 20 shows
By using this dual-oscillator control, the green-mode
the waveforms of the OLP operation. In this case, the
frequency can be well controlled and further to avoid the
feedback system will force the voltage loop proceed toward
generation of audible noise.
the saturation and then pull up the voltage on COMP pin
(VCOMP). Whenever the VCOMP trips up to the OLP threshold
OVP (Over Voltage Protection) on Vcc 5V and stays longer than 60mS, the protection will activate
The VGS ratings of the nowadays power MOSFETs are often and then turn off the gate output to stop the switching of
limited up to max. 30V. To prevent the VGS from the fault power circuit. The 60mS delay time is to prevent the false
condition, LD7535/LD7535A are implemented an OVP trigger from the power-on and turn-off transient.
function on Vcc. Whenever the Vcc voltage is higher than By such protection mechanism, the average input power
the OVP threshold voltage, the output gate drive circuit will can be reduced to very low level so that the component
be shutdown simultaneously thus to stop the switching of temperature and stress can be controlled within the safe
the power MOSFET until the next UVLO(on). operating area.

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 LD7535/LD7535A
Under the conditions listed below, the gate output will turn
VCC off immediately to protect the power circuit ---
y RT pin short to ground
UVLO(on) y RT pin floating
y CS pin floating
UVLO(off)
OLP
UVLO(off)
OLP Reset
t

COMP
60mS

5.0V

OLP trip Level

t

OUT

Switching Non-Switching Switching

Fig. 19

Fault Protection
There are several critical protections were integrated in the
LD7535/LD7535A to prevent the power supply or adapter
from being damaged. Those damages usually come from
open or short condition on the pins of LD7535/LD7535A.

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 LD7535/LD7535A
Reference Application Circuit --- 10W (5V/2A) Adapter

Schematic

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 LD7535/LD7535A
Reference Application Circuit --- 10W (5V/2A) Adapter

BOM

P/N Component Value Original P/N Component Value Note

R1A N/A C1 22F, 400V L-tec
R1B N/A C2 10F, 50V
R2A 750K, 1206 C4 1000pF, 1000V, 1206 Holystone
R2B 750K, 1206 C5 0.01F, 16V, 0805
R4A 39K, 1206 C51 1000pF, 50V, 0805
R4B 39K, 1206 C52 1000F, 10V L-tec
R6 10, 1206 C54 470F, 10V L-tec
R7 10, 1206 C55 0.01F, 16V, 0805
R8 10K, 1206 CX1 0.1F X-cap
RS1 2.70, 1206, 1% CY1 2200pF Y-cap
RS2 2.70, 1206, 1% D1A 1N4007
RT 100K, 0805, 1% D1B 1N4007
R51A 100, 1206 D1C 1N4007
R51B 100, 1206 D1D 1N4007
R52 2.49K, 0805, 1% D2 PS102R
R53 2.49K, 0805, 1% D4 1N4007
R54 220, 0805 Q1 2N60B 600V/2A
R55 10K, 0805 CR51 SB540
R56A 510, 1206 ZD51 6V2C
R56B N/A IC1 LD7535/LD7535A BL SOT-26
NTC1 08SP005 IC2 EL817B
FL1 20mH UU9.8 IC51 TL431 1%
T1 EI-22 F1 250V, 1A
L51 2.7H Z1 N/A

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 LD7535/LD7535A
Reference Application Circuit #2 --- 10W Adapter with 2-Stage Startup Circuit
Pin < 0.25W when Pout = 0W

2-stage Startup
Circuit

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 LD7535/LD7535A
Reference Application Circuit #2 --- 10W Adapter with 2-Stage Startup Circuit

BOM

P/N Component Value Original P/N Component Value Note

R1A N/A C1 22F, 400V L-tec
R1B N/A C2 10F, 50V L-tec
R2A 2.2M, 1206 C3 2.2F, 50V
R2B 2.2M, 1206 C4 1000pF, 1000V, 1206 Holystone
R4A 39K, 1206 C5 0.01F, 16V, 0805
R4B 39K, 1206 C51 1000pF, 50V, 0805
R6 2.2, 1206 C52 1000F, 10V L-tec
R7 10, 1206 C54 470F, 10V L-tec
R8 10K, 1206 C55 0.01F, 16V, 0805
RS1 2.70, 1206, 1% CX1 0.1F X-cap
RS2 2.70, 1206, 1% CY1 2200pF Y-cap
RT 100K, 0805, 1% D1A 1N4007
R51A 100, 1206 D1B 1N4007
R51B 100, 1206 D1C 1N4007
R52 2.49K, 0805, 1% D1D 1N4007
R53 2.49K, 0805, 1% D2 PS102R
R54 220, 0805 D3 1N4148
R55 10K, 0805 D4 1N4007
R56A 1K, 1206 Q1 2N60B 600V/2A
R56B N/A CR51 SB540
NTC1 5, 3A 08SP005 ZD51 6V2C
FL1 20mH UU9.8 IC1 LD7535/LD7535A IL SOT-26
T1 EI-22 IC2 EL817B
L51 2.7H IC51 TL431 1%
F1 250V, 1A
Z1 N/A

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 LD7535/LD7535A
Package Information
SOT-26

Dimension in Millimeters Dimensions in Inches

Symbol
Min Max Min Max

A 2.692 3.099 0.106 0.122

B 1.397 1.803 0.055 0.071

C ------- 1.450 ------- 0.058

D 0.300 0.550 0.012 0.022

F 0.838 1.041 0.033 0.041

H 0.080 0.254 0.003 0.010

I 0.050 0.150 0.002 0.006

J 2.600 3.000 0.102 0.118

M 0.300 0.600 0.012 0.024

0 10 0 10

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 LD7535/LD7535A
Package Information
DIP-8

Dimension in Millimeters Dimensions in Inches

Symbol
Min Max Min Max

A 9.017 10.160 0.355 0.400

B 6.096 7.112 0.240 0.280

C ----- 5.334 ------ 0.210

D 0.356 0.584 0.014 0.023

E 1.143 1.778 0.045 0.070

F 2.337 2.743 0.092 0.108

I 2.921 3.556 0.115 0.140

J 7.366 8.255 0.290 0.325

L 0.381 ------ 0.015 --------

Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers should

verify the datasheets are current and complete before placing order.

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Revision History

Rev. Date Change Notice

00 03/01/06 Renew from the LD7535 spec. (Rev=0) by adding the LD7535A related descriptions and

data. The revision number is reset from 0.

01 01/11/07 Revision: Block Diagram and Characteristic

01a 5/17/07 Revision: Marking description

01b 11/29/07 Revision: green package option

01c 12/11/07 Revision: Block Diagram/ LD7535A OVP

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