A Full-Bridge DC-DC Converter With Zero-Voltage-Switching Over The Entire Conversion Range
A Full-Bridge DC-DC Converter With Zero-Voltage-Switching Over The Entire Conversion Range
A Full-Bridge DC-DC Converter With Zero-Voltage-Switching Over The Entire Conversion Range
AbstractA new topology of full-bridge dcdc converter is pro- Therefore, in high-power converters, the loss of ZVS addition-
posed featuring zero-voltage-switching (ZVS) of active switches ally results in the discharge of snubber capacitor in IGBT. The
over the entire conversion range. In contrast to conventional tech- resulting surge current can be detrimental to IGBT and capacitor
niques, the stored energy in the auxiliary inductor of the proposed
converter is minimal under full-load condition and it progres-
in the long run and it increases EMI problem. Further, the reso-
sively increases as the load current decreases. Therefore, the ZVS nant voltage overshoots due to resonance between the snubber
operation over the entire conversion range is achieved without capacitor and wiring/lead inductance can exceed IGBT voltage
signicantly increasing full-load conduction loss making the rating. Therefore, it is important to maintain ZVS operation over
converter particularly suitable in applications where the output is the entire range of operation or the conversion range. The fol-
required to be adjustable over a wide range and load resistance lowing solutions have been proposed in the past.
is xed (e.g., an electromagnet power supply). The principle of
operation is described and the considerations in the design of
1) Using higher series inductance increases the ZVS range but
converter are discussed. Performance of the proposed converter is results in increased loss of duty cycle and ringing across
veried with experimental results on a 500-W, 100-kHz prototype. secondary-side rectier diodes. With consequent reduction
Index TermsDCDC power conversion, soft-switching, zero-
in transformer turns ratio, primary reected current and
voltage-switching (ZVS). switch conduction loss increases [2], [5].
2) Using saturable inductor instead of a linear inductor, ZVS
range can be increased without signicantly losing the duty
I. INTRODUCTION ratio [7], [8]. However, a large-size core is required to im-
plement the saturable inductor.
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1744 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 4, JULY 2008
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BORAGE et al.: FULL-BRIDGE DCDC CONVERTER 1745
(2) where .
A suitable design approach can be to minimize the trans-
Thus, the load current and the auxiliary inductor current in former leakage inductance to minimize the duty cycle loss as
the proposed circuit vary opposite to each other. When is well as the overshoot and ringing on the secondary side. This
high, load current is high. Energy stored in transformer leakage will also maximize the turns ratio of the transformer reducing
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1746 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 4, JULY 2008
(4)
(5)
(7)
(8)
(9)
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BORAGE et al.: FULL-BRIDGE DCDC CONVERTER 1747
Fig. 5. Experimental waveforms of the turn-on transition of switch at (a) Fig. 6. Experimental waveforms of the turn-on transition of switch at (a)
, and, (b) . Legends: (1) gate-source voltage (10 V/div), (2) , and, (b) . Legends: (1) gate-source voltage (10 V/div), (2)
drain-source voltage (100 V/div). X-scale: 500 ns/div. drain-source voltage (100 V/div). X-scale: 500 ns/div.
drops become comparable with the low output voltage (10 V).
The prototype converter was then re-congured as the conven-
tional FBZVS converter by connecting the primary windings of
the two transformers in series, and connecting them between
the midpoints of both the legs. To demonstrate the advantage
of adaptive auxiliary current over the xed auxiliary current,
a pole was added to the lagging-leg of the full bridge with
120 inductor (to keep the peak circulating current same as
that in the proposed converter) and capacitive voltage divider
using two 1 capacitors across the input dc bus. The ef-
ciency of conventional FBZVS converter with pole on lagging
leg is shown as plot (2) in Fig. 7. From full-load to approxi-
mately 20% part-load, efciency of the proposed converter is
observed to be higher. This is because the auxiliary current in
the proposed converter is lesser than that in the conventional
FBZVS converter with pole on lagging leg. For lower output
power, the efciency of the proposed converter is observed to be Fig. 7. The plots of experimental efciency. (1) Proposed converter with
. (2) Conventional FBZVS converter with pole on only lagging-leg.
lesser. The reason is that in the conventional FBZVS converter . (3) Conventional FBZVS converter with poles
with pole on lagging leg, the auxiliary current is circulating in on both the legs. each.
only two switches whereas in the proposed converter auxiliary
current is circulating in all the four switches causing more con-
duction loss. FBZVS converter with poles on the both legs is shown as the
A pole on leading leg is also added to conventional FBZVS plot (3) in Fig. 7. The efciency is observed to be further de-
converter to achieve ZVS of all the switches over the entire load graded at full-load and also over the entire range as compared
range. Therefore to compare the efciencies of proposed con- to the efciency of the proposed converter.
verter and conventional FBZVS converter with pole on both The improvement in efciency with the proposed converter
legs, another pole with 120 was added to the congured con- with respect to the conventional FBZVS converter at part-
ventional FBZVS converter on the leading leg along with pole load operation depends on the trade-off between switching
of 120 on lagging leg. The efciency of this conventional losses saved by maintaining ZVS operation and the additional
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1748 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 4, JULY 2008
Fig. 8. Approximated waveforms of various device currents in the proposed FBZVS converter for (a) and (b) .
conduction loss in the switches due to circulating current plus out of the midpoint of lagging leg is the difference between
losses in the auxiliary inductor. The savings in the switching and . The amplitude of and is equal to where
losses which will be larger if either switching frequency is high is given by (2). Two distinctive modes can be observed de-
(typically 300500 kHz in low-power applications, e.g., up to 12 pending on whether or . The
kW, using MOSFET) or the snubber capacitors are larger (tens boundary between the two modes can be derived by equating
of nano-farads) in high-power converters (e.g. up to 520 kW, to . The duty ratio, where the two currents have
using IGBT). Simplied loss analysis and calculations described same amplitude is termed as and can be derived as
in Section VI illustrates this. Nevertheless, the full-range ZVS
operation achievable in the proposed converter without additional
loss penalty at full-load, is the major advantage as safe operation (10)
of semiconductor devices, snubber capacitors is guaranteed
and overall reliability is increased. Fig. 8(a) and (b) shows various current waveforms for
and respectively. The expressions
VI. SIMPLIFIED LOSS ANALYSIS OF THE PROPOSED for average currents in all IGBT switches and anti
FBZVS CONVERTER WITH IGBT SWITCHES parallel diodes of the full-bridge circuit are sum-
IGBTs are used for the high-power application of proposed marized in Table I. Expressions for the total conduction losses
FBZVS converter. To calculate the conduction losses in the in these devices, , can then be derived as follows.
IGBT switches and anti-parallel diodes as well as the losses For
in the auxiliary inductor over the entire conversion range,
following simplifying assumptions are made.
1) The output current is ripple-free, therefore transformer pri-
mary current is square-wave.
2) Transformer leakage inductance is small, therefore the
slew interval (during which the transformer primary cur-
rent reverses its direction) is absent.
3) The average power loss in an IGBT and a diode is propor- (11)
tional to the respective average currents.
For
A. Device Conduction Loss
The current owing out of the midpoint of the leading leg is
the sum of and (see Fig. 1). Similarly the current owing (12)
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BORAGE et al.: FULL-BRIDGE DCDC CONVERTER 1749
TABLE I
SUMMARY OF EXPRESSIONS FOR AVERAGE DEVICE CURRENTS
(13)
(14)
(15)
(16) Fig. 9. Calculated losses over the entire conversion range in the proposed
FBZVS converter and its comparison with the conduction losses in the conven-
tional FBZVS converter. The plots are obtained using Equations (10)(18) and
the parameters of Table II.
C. Total Primary-Side Losses and Comparison With
Conventional FBZVS Converter
proposed converter are the same as conventional FBZVS con-
The total primary-side losses in the proposed converter are verter for operation with higher values of (full-load opera-
given by tion). For the lower values of , the device conduction plus
magnetics losses are higher (e.g. 111 W at 0) in the pro-
(17) posed FBZVS converter due to auxiliary circulating current.
However, the loss of ZVS with 15 nF snubber capacitors in
For conventional FBZVS converter, the expression for the
the conventional FBZVS converter would have resulted in total
total primary-side loss (equal to the conduction loss in IGBTs
loss of 187.5 W. Therefore, the proposed con-
and anti-parallel diodes), can be derived as
verter improves the overall efciency for lower values of in
addition to the full-range ZVS operation.
(18)
VII. CONCLUSION
For a 18 kW (60 V/300 A) output electromagnet power supply
with designed parameters listed in Table II, Fig. 9 compares A new FBZVS converter is proposed with ZVS of active
the total primary-side losses in the proposed and conventional switches over the entire conversion range. The principle of oper-
FBZVS converter over the entire conversion range. These plots ation and design considerations of the circuit are described. The
are obtained using (10)(18) and the parameters of Table II. experimental results on a 500 W prototype converter demon-
It can easily be seen that the total primary-side losses in the strate the adaptive auxiliary current which is high at lower duty
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1750 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 4, JULY 2008
ratio assisting the ZVS operation and low at higher duty ratio Mangesh Borage received the B.E. degree in elec-
minimizing the additional conduction loss. The experimental re- trical engineering from Shivaji University, Kolhapur,
India, in 1993 and the M.Tech. degree in electrical en-
sults conrm the full-range ZVS operation. The proposed con- gineering (with specialization in power electronics)
verter is therefore deemed suitable particularly for high-power from Banaras Hindu University, Varanasi, India, in
applications where full-range ZVS operation is desired without 1996.
He joined the 38th Batch of Training School,
the penalty of additional losses at full-load not only for the Bhabha Atomic Research Center (BARC), Mumbai,
saving of switching losses but also for the reliable operation due India, in 1994. Since 1995, he has been with the
to elimination of current and voltage stresses on the devices and Raja Ramanna Center for Advanced Technology
EMI which results from the non-ZVS operation. (RRCAT), Indore, India, as Scientic Ofcer where
he is primarily working on the development of high stability current regulated
power supplies for electromagnets used in research and medical particle
accelerators. His research interests include soft-switching and resonant con-
verters, power factor correction, high-frequency magnetic components, and
high-frequency power converters.
REFERENCES Mr. Borage received the University Merit Certicate from Shivaji University,
Kolhapur, India, for First Rank in Electrical Engineering in 1993 and the Dr.
Homi Bhabha Award at BARC, Mumbai, India, in 1995. He is an Associate
[1] R. A. Fischer, R. D. T. Ngo, and M. H. Kuo, A 500 kHz, 250 W dcdc Member of the Institution of Engineers, India, and a Life Member of the So-
converter with multiple outputs controlled by phase-shifted PWM and ciety of EMC Engineers, India (SEMCEI) and the Indian Society for Particle
magnetic, in Proc. High Freq Power Conv., May 1988, pp. 100110. Accelerators (ISPA).
[2] J. A. Sabate, V. Vlatkovic, R. B. Ridley, F. C. Lee, and B. H. Cho,
Design considerations for high-voltage high-power full-bridge zero-
voltage-switching PWM converter, in Proc. IEEE Appl. Power Elec-
tron. Conf. (APEC), 1990, pp. 275284. Sunil Tiwari received the B.E. degree in electronics
[3] D. Dalal, A 500 kHz multi-output converter with zero voltage engineering from Maharaja Sayajirao University,
switching, in Proc. IEEE Appl. Power Electron. Conf. (APEC), 1990, Vadodra, India, in 1984.
pp. 265274. He was with Bharat Heavy Electricals, Ltd.
[4] F.-S. Tsai, Small-signal and transient analysis of a zero-voltage- (BHEL), Bangalore, India, from 1984 to 1987, and
switched, phase controlled PWM converter using averaged switch with the Ministry of Defence, Agra, India, from 1987
model, IEEE Trans. Ind. Appl., vol. 29, no. 3, pp. 493499, May/Jun. to1989. Since 1989, he has been with Raja Ramanna
1993. Center for Advanced Technology (RRCAT), Indore,
[5] A. W. Lot, Q. Chen, and F. C. Lee, Non-linear optimization tool India, as Scientic Ofcer. His research interests
for the full-bridge zero-voltage-switched dcdc convertor, Proc. Inst. include soft-switching and resonant techniques for
high power application and development of high
Elect. Eng. B, vol. 140, no. 5, pp. 289296, Sep. 1993.
stability power supplies for particle accelerators.
[6] J. G. Cho, J. A. Sabate, G. Hua, and F. C. Lee, Zero-voltage and
Mr. Tiwari is a Member of the Institution of Engineers, India and a Life
zero-current-switching full bridge PWM converter for high power ap- Member of Society of EMC Engineers, India (SEMCEI), the Indian Society
plications, IEEE Trans. Power Electron., vol. 11, no. 4, pp. 622627, for Particle Accelerators (ISPA), and the Indian Nuclear Society (INS).
Jul. 1996.
[7] G. Hua, F. C. Lee, and M. M. Jovanovic, An improved full-bridge
zero-voltage-switched PWM converter using a saturable inductor,
IEEE Trans. Power Electron., vol. 8, no. 4, pp. 530534, Oct. 1993.
Shubhendu Bhardwaj was born in Pratapgarh,
[8] S. Hamada and M. Nakaoka, Analysis and design of a saturable re-
India, on October 4, 1985. He is currently persuing
actor assisted soft-switching full-bridge dcdc converter, IEEE Trans.
the B.Tech. degree in electronics engineering at the
Power Electron., vol. 9, no. 3, pp. 309317, May 1994. Indian School of Mines-University, Dhanbad, India.
[9] R. Watson and F. C. Lee, Analysis, design and experimental results of He worked, on the technique presented in this
a 1-kW FB-ZVS-PWM converter employing magamp secondary side paper, as a Research Student under the Young Sci-
control, IEEE Trans. Ind. Electron., vol. 45, no. 5, pp. 806814, Oct. entist Research Program (YSRP) 2007 (organized
1998. at Raja Ramanna Center for Advanced Technology
[10] R. Ayyanar and N. Mohan, Novel soft-switched dcdc converter (RRCAT), Indore, India) in May through July 2007.
with full ZVS-range and reduced lter requirementPart I: Regu-
lated-output applications, IEEE Trans. Power. Electron., vol. 16, no.
2, pp. 184192, Mar. 2001.
[11] R. Ayyanar and N. Mohan, Novel soft-switched dcdc converter
with full ZVS-range and reduced lter requirementPart II: Con-
stant-input, variable-output applications, IEEE Trans. Power. Swarna Kotaiah received the B.E. degree in elec-
Electron., vol. 16, no. 2, pp. 193200, Mar. 2001. tronics and communication engineering from Andhra
[12] P. K. Jain, W. Kang, H. Soin, and Y. Xi, Analysis and design con- University, Waltair, India in 1973.
He joined the 17th Batch of Training School,
siderations of a load and line independent zero voltage switching full
Bhabha Atomic Research Center (BARC), Mumbai,
bridge DC/DC converter topology, IEEE Trans. Power Electron., vol.
India, in 1973. From 1974 to 1986, he was with
17, no. 5, pp. 649657, Sep. 2002. Variable Energy Cyclotron Center (VECC), Kolkata,
[13] Y. Jang, M. M. Jovanovic, and Y. Chang, A new ZVS-PWM full- India, and worked in the elds of power supplies,
bridge converter, IEEE Trans. Power Electron., vol. 18, no. 5, pp. radio-frequency ampliers, and instrumentation.
11221129, Sep. 2003. From 1986 to 2008 he was with the Raja Ramanna
[14] Y. Jang and M. M. Jovanovic, A new family of full-bridge ZVS con- Center for Advanced Technology (RRCAT), Indore,
verters, IEEE Trans. Power Electron., vol. 19, no. 3, pp. 701708, May India, where he was the head of the Power Supplies Division and the Project
2004. Manager for Indus-2 Synchrotron Radiation Source. His research areas include
[15] M. Borage, S. Tiwari, and S. Kotaiah, A passive auxiliary circuit power electronics, instrumentation and high-power, high stability precision
achieves zero-voltage-switching in full-bridge converter over entire power supplies.
conversion range, IEEE Power Electron. Lett., vol. 3, no. 4, pp. Mr. Kotaiah is a Life Member of the Indian Vacuum Society (IVS) and the
141143, Dec. 2005. Indian Society for Particle Accelerators (ISPA).
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