PHD Thesis PDF

Warsaw University of Technology
Faculty of Electrical Engineering

Institute of Control and Industrial Electronics
Ph.D. Thesis
M. Sc. Mariusz Malinowski
Sensorless Control Strategies for

Three - Phase PWM Rectifiers
Thesis supervisor
Prof. Dr Sc. Marian P. Kaźmierkowski
Warsaw, Poland - 2001

Preface
The work presented in the thesis was carried out during my Ph.D. studies at the
Institute of Control and Industrial Electronics at the Warsaw University of Technology
and scholarship of the Foundation for Polish Science. Some parts of the work was
realized in cooperation with foreign Universities and companies:
! University of Nevada, Reno, USA (US National Science Foundation grant – Prof.
Andrzej Trzynadlowski),
! University of Aalborg, Denmark (International Danfoss Professor Programme –
Prof. Frede Blaabjerg),
! Danfoss Drives A/S, Denmark (Dr Steffan Hansen).
First of all, I would like to thank Prof. Marian P. Kaźmierkowski for continuous
support and help. His precious advice and numerous discussions enhanced my
knowledge and scientific inspiration.
I am grateful to Prof. Tadeusz Citko from the Białystok Technical University and
Prof. Roman Barlik from the Warsaw University of Technology for their interest in this
work and holding the post of referee.
Furthermore, I thank my colleagues from the Group of Intelligent Control in Power

Electronics for their support and friendly atmosphere. Mr Marek Jasiński’s support in
preparation of the laboratory set-up is especially appreciated.
Finally, I am very grateful for my wife Ann’s and son Kacper’s love, patience and
faith. I would also like to thank my whole family, particularly my parents for their care
over the years.
1
Introduction
1. INTRODUCTION
Methods for limitation and elimination of disturbances and harmonic pollution

in the power system have been widely investigated. This problem rapidly intensifies
with the increasing amount of electronic equipment (computers, radio set, printers, TV
sets etc.). This equipment, a nonlinear load, is a source of current harmonics, which
produce increase of reactive power and power losses in transmission lines. The
harmonics also cause electromagnetic interference and, sometimes, dangerous
resonances. They have negative influence on the control and automatic equipment,
protection systems, and other electrical loads, resulting in reduced reliability and
availability. Moreover, nonlinear loads and non-sinusoidal currents produce non-
sinusoidal voltage drops across the network impedance’s, so that non-sinusoidal
voltages appears at several points of the mains. It brings out overheating of line,
transformers and generators due to the iron losses.
Reduction of harmonic content in line current to a few percent allows avoiding most of
the mentioned problems. Restrictions on current and voltage harmonics maintained in
many countries through IEEE 519-1992 in the USA and IEC 61000-3-2/IEC 61000-3-4
in Europe standards, are associated with the popular idea of clean power.
Many of harmonic reduction method exist. These technique based on passive

components, mixing single and three-phase diode rectifiers, and power electronics
techniques as: multipulse rectifiers, active filters and PWM rectifiers (Fig. 1.1). They
can be generally divided as:
A) harmonic reduction of already installed non-linear load;
B) harmonic reduction through linear power electronics load installation;
2
Introduction
Harmonic reduction techniques
A B
MIXING SINGLE
AND THREE-
PWM MULTI-PULSE
FILTERS [7] PHASE DIODE
RECTIFIERS RECTIFIERS RECTIFIER
[106]
PASSIVE BUCK BOOST

HYBRID
FILTER RECTIFIER [35] RECTIFIER
ACTIVE
PWM FILTER
2-LEVEL 3-LEVEL [112]
Fig.1.1 Most popular three-phase harmonic reduction techniques of current

A) Harmonic reduction of already installed non-linear load
B) Harmonic reduction through linear power electronics load installation
The traditional method of current harmonic reduction involves passive filters LC,
parallel-connected to the grid. Filters are usually constructed as series-connected legs of
capacitors and chokes. The number of legs depends on number of filtered harmonics
(5th, 7th, 11th, 13th). The advantages of passive filters are simplicity and low cost [105].
The disadvantages are:
! each installation is designed for a particular application (size and placement of
the filters elements, risk of resonance problems),
! high fundamental current resulting in extra power losses,
! filters are heavy and bulky.
In case of diode rectifier, the simpler way to harmonic reduction of current are
additional series coils used in the input or output of rectifier (typical 1-5%).
The other technique, based on mixing single and three-phase non-linear loads, gives a
reduced THD because the 5th and 7th harmonic current of a single-phase diode rectifier
often are in counter-phase with the 5th and 7th harmonic current of a three-phase diode
rectifier [106].
3
Introduction
The other already power electronics techniques is use of multipulse rectifiers. Although
easy to implement, possess several disadvantages such as: bulky and heavy transformer,
increased voltage drop, and increased harmonic currents at non-symmetrical load or line
voltages.
An alternative to the passive filter is use of the active PWM filter (AF), which displays
better dynamics and controls the harmonic and fundamental currents. Active filters are
mainly divided into two different types: the active shunt filter (current filtering) (Fig.
1.2) and the active series filter (voltage filtering) [7].
iL iLOAD Non-linear
load
iF
AF
L
Fig. 1.2 Three-phase shunt active filter together with non-linear load.
The three-phase two-level shunt AF consist of six active switches and its topology is
identical to the PWM inverter. AF represents a controlled current source iF which added
to the load current iLoad yields sinusoidal line current iL (Fig. 1.2). AF provide:
! compensation of fundamental reactive components of load current,
! load symetrization (from grid point of view),
! harmonic compensation much better than in passive filters.
In spite of the excellent performance, AFs possess certain disadvantages as complex
control, switching losses and EMC problems (switching noise is present in the line
current and even in the line voltage). Therefore, for reduction of this effects, inclusion
of a small low-pass passive filter between the line and the AF is necessary.
load
Fig.1.3 PWM rectifier
4
Introduction
The other interesting reduction technique of current harmonic is a PWM (active)

rectifier (Fig. 1.3). Two types of PWM converters, with a voltage source output (Fig.
1.4a) and a current source output (Fig. 1.4b) can be used. First of them called a boost
rectifier (increases the voltage) works with fixed DC voltage polarity, and the second,
called a buck rectifier (reduces the voltage) operates with fixed DC current flow.
iload iload Ldc
Ui
ia
uLa
ia C u La
ib ib
uLb
ic Udc u Lb Udc
uLc ic
uLc
3xL 3xL
3xC
a) b)
Fig. 1.4 Two basic topologies of PWM rectifier:

a) boost with voltage output b) buck with current output
Among the main features of PWM rectifier are:

! bi-directional power flow,
! nearly sinusoidal input current,
! regulation of input power factor to unity,
! low harmonic distortion of line current (THD below 5%),
! adjustment and stabilization of DC-link voltage (or current),
! reduced capacitor (or inductor) size due to the continues current.
Furthermore, it can be properly operated under line voltage distortion and notching, and
line voltage frequency variations.
Similar to the PWM active filter, the PWM rectifier has a complex control structure, the
efficiency is lower than the diode rectifier due to extra switching losses. A properly
designed low-pass passive filter is needed in front of the PWM rectifier due to EMI
concerns.
The last technique is most promising thanks to advances in power semiconductor

devices (enhanced speed and performance, and high ratings) and digital signal
5
Introduction
processors, which allow fast operation and cost reduction. It offers possibilities for
implementation of sophisticated control algorithm.
This thesis is devoted to investigation of different control strategies for boost type of
three-phase bridge PWM rectifiers. Appropriate control can provide both the rectifier
performance improvements and reduction of passive components. Several control
techniques for PWM rectifiers are known [16-23, 30-69]. A well-known method based
on indirect active and reactive power control is based on current vector orientation with
respect to the line voltage vector (Voltage Oriented Control - VOC) [30-69]. An other
less known method based on instantaneous direct active and reactive power control is
called Direct Power Control (DPC) [16, 20-23]. Both mentioned strategies do not
produce sinusoidal current when the line voltage is distorted. Therefore, the following
thesis can be formulated:
“using the control strategy based on virtual flux instead of the line voltage vector
orientation provides lower harmonic distortion of line current and leads to line-
voltage sensorless operation”.
In order to prove the above thesis, the author used an analytical and simulation based
approach, as well as experimental verification on the laboratory setup with a 5kVA
IGBT converter.
The thesis consists of six chapters. Chapter 1 is an introduction. Chapter 2 is devoted to

presentation of various topologies of rectifiers for ASD’s. The mathematical model and
operation description of PWM rectifier are also presented. General features of the
sensorless operation focused on AC voltage-sensorless. Voltage and virtual flux
estimation are summarized at the end of the chapter. Chapter 3 covers the existing
solution of Direct Power Control and presents a new solution based on Virtual Flux
estimation [17]. Theoretical principles of both methods are discussed. The steady state
and dynamic behavior of VF-DPC are presented, illustrating the operation and
performance of the proposed system as compared with a conventional DPC method.
Both strategies are also investigated under unbalanced and distorted line voltages. It is
shown that the VF-DPC exhibits several advantages, particularly it provides sinusoidal
line current when the supply voltage is non-ideal. Test results show excellent
6
Introduction
performance of the proposed system. Chapter 4 is focused on the Voltage Oriented and
Virtual Flux Oriented Controls. Additionally, development and investigation of novel
modulation techniques is described and discussed, with particular presentation of
adaptive modulation. It provides a wide range of linearity, reduction of switching losses
and good dynamics. Chapter 5 contains comparative study of discussed control
methods. Finally Chapter 6 presents summary and general conclusions. The thesis is
supplemented by nine Appendices among which are: conventional and instantaneous
power theories [A.2], implementation of a space vector modulator [A.3], description of
the simulation program [A.4] and the laboratory set-up [A.6].
In the author’s opinion the following parts of the thesis represent his original
achievements:
! development of a new line voltage estimator – (Section 2.5),

! elaboration of new Virtual Flux based Direct Power Control for PWM rectifiers –
(Section 3.4),
! implementation and investigation of various closed-loop control strategies for PWM
rectifiers: Virtual Flux – Based Direct Power Control (VF -DPC), Direct Power
Control (DPC), Voltage Oriented Control (VOC), Virtual Flux Oriented Control
(VFOC) – (Sections 3.6 and 4.5),
! development of a new Adaptive Space Vector Modulator for three-phase PWM
converter, working in polar and cartesian coordinate system (Patent No. P340 113) –
(Section 4.4.7),
! development of a simulation algorithm in SABER and control algorithm in C
language for investigation of proposed solutions – (Appendix A.4),
! construction and practical verification of the experimental setup based on a mixed
RISC/DSP (PowerPC 604/TMS320F240) digital controller – (Appendix A.6).
7
Contents
Table of Contents
Chapter 1 Introduction
Chapter 2 PWM rectifier

2.1 Introduction
2.2 Rectifiers topologies
2.3 Operation of the PWM rectifier
2.3.1 Mathematical description of the PWM rectifier
2.3.2 Steady-state properties and limitations
2.4 Sensorless operation
2.5 Voltage and virtual flux estimation
Chapter 3 Voltage and Virtual Flux Based Direct Power Control (DPC, VF-DPC)
3.1 Introduction
3.2 Basic block diagram of DPC
3.3 Instantaneous power estimation based on the line voltage
3.4 Instantaneous power estimation based on the virtual flux
3.5 Switching table
3.6 Simulation and experimental results
3.7 Summary
Chapter 4 Voltage and Virtual Flux Oriented Control (VOC, VFOC)

4.1 Introduction
4.2 Block diagram of the VOC
4.3 Block diagram of the VFOC
4.4 Pulse width modulation (PWM)
4.4.1 Introduction
4.4.2 Carrier based PWM
4.4.3 Space vector modulation (SVM)
4.4.4 Carrier based PWM versus space vector PWM
4.4.5 Overmodulation
4.4.6 Performance criteria
4.4.7 Adaptive space vector modulation (ASVM)
4.4.8 Simulation and experimental results of modulation
4.4.9 Summary of modulation
4.5 Simulation and experimental results
4.6 Summary
Chapter 5 Comparative Study

5.1 Introduction
5.2 Performance comparison
5.3.Summary
Chapter 6 Conclusion
8
Contents
References
Appendices
A.1 Per unit notification
A.2 Harmonic distortion in power systems
A.3 Implementation of SVM
A.4 Saber model
A.5 Simulink model
A.6 Laboratory setup based on DS1103
A.7 Laboratory setup based on SHARC
A.8 Harmonic limitation
A.9 Equipment
9
List of Symbols
List of Symbols
Symbols (general)
x(t), x – instantaneous value
X * , x * - reference
X , x - average value, average (continuous) part
~
X,~ x - oscillating part
x - complex vector
*
x - conjugate complex vector
X - magnitude (length) of function
∆X , ∆x - deviation
Symbols (special)
α - phase angle of reference vector
λ - power factor
ϕ - phase angle of current
ω - angular frequency
ψ - phase angle
ε - control phase angle
cosϕ - fundamental power factor

f – frequency
i(t), i – instantaneous current
j – imaginary unit
kP, kI – proportional control part, integral control part
p(t), p – instantaneous active power
q(t), q – instantaneous reactive power
t – instantaneous time
v(t), v - instantaneous voltage
ΨL – virtual line flux vector

ΨLα – virtual line flux vector components in the stationary α, β coordinates
ΨLβ – virtual line flux vector components in the stationary α, β coordinates
ΨLd – virtual line flux vector components in the synchronous d, q coordinates
ΨLq – virtual line flux vector components in the synchronous d, q coordinates
uL – line voltage vector

uLα – line voltage vector components in the stationary α, β coordinates
uLβ – line voltage vector components in the stationary α, β coordinates
uLd – line voltage vector components in the synchronous d, q coordinates
uLq – line voltage vector components in the synchronous d, q coordinates
iL – line current vector

iLα – line current vector components in the stationary α, β coordinates
iLβ – line current vector components in the stationary α, β coordinates
10
List of Symbols
iLd – line current vector components in the synchronous d, q coordinates

iLq – line current vector components in the synchronous d, q coordinates
uS, uconv – converter voltage vector

uSα – converter voltage vector components in the stationary α, β coordinates
uSβ – converter voltage vector components in the stationary α, β coordinates
uSd – converter voltage vector components in the synchronous d, q coordinates
uSq – converter voltage vector components in the synchronous d, q coordinates
udc – DC link voltage

idc – DC link current
Sa, Sb, Sc – Switching state of the converter
C – capacitance
I – root mean square value of current
L – inductance
R – resistance
S – apparent power
T – time period
P – active power
Q – reactive power
Z - impedance
Subscripts
..a, ..b, ..c - phases of three-phase system
..d, ..q - direct and quadrature component
..+, -, 0 - positive, negative and zero sequence component
..α, ..β, ..0 - alpha, beta components and zero sequence component
..h – harmonic order of current and voltage, harmonic component
..n – harmonic order
..max - maximum
..min - minimum
..L-L - line to line
..Load - load
..conv - converter
..Loss - losses
..ref - reference
..m - amplitude
..rms - root mean square value
Abbreviations
AF active PWM filter

ANN artificial neural network
ASD adjustable speed drives
ASVM adaptive space vector modulation
CB-PWM carrier based pulse width modulation
11
List of Symbols
CSI current source inverter

DPC direct power control
DSP digital signal processor
DTC direct torque control
EMI electro-magnetic interference
FOC field-oriented control
IFOC indirect field-oriented control
IGBT insulated gate bipolar transistor
PCC point of common coupling
PFC power factor correction
PI proportional integral (controller)
PLL phase locked loop
PWM pulse-width modulation
REC rectifier
SVM space vector modulation
THD total harmonic distortion
UPF unity power factor
VF virtual flux
VF-DPC virtual flux based direct power control
VFOC virtual flux oriented control
VOC voltage oriented control
VSI voltage source inverter
ZSS zero sequence signal
12
PWM rectifier
2. PWM RECTIFIER
2.1. INTRODUCTION
As it has been observed for recent decades, an increasing part of the generated electric
energy is converted through rectifiers, before it is used at the final load. In power
electronic systems, especially, diode and thyristor rectifiers are commonly applied in the
front end of DC-link power converters as an interface with the AC line power (grid) -
Fig. 2.1. The rectifiers are nonlinear in nature and, consequently, generate harmonic
currents in to the AC line power. The high harmonic content of the line current and the
resulting low power factor of the load, causes a number of problems in the power
distribution system like:
• voltage distortion and electromagnetic interface (EMI) affecting other users of the
power system,
• increasing voltampere ratings of the power system equipment (generators,
transformers, transmission lines, etc.).
Therefore, governments and international organizations have introduced new standards

(in the USA: IEEE 519 and in Europe: IEC 61000-3)[A8] which limit the harmonic
content of the current drown from the power line by the rectifiers. As a consequence a
great number of new switch-mode rectifier topologies that comply with the new
standards have been developed.
In the area of variable speed AC drives, it is believed that three-phase PWM boost
AC/DC converter will replace the diode rectifier. The resulting topology consists of two
identical bridge PWM converters (Fig. 2.4). The line-side converter operates as rectifier
in forward energy flow, and as inverter in reverse energy flow. In farther discussion
assuming the forward energy flow, as the basic mode of operation the line-side
converter will be called as PWM rectifier. The AC side voltage of PWM rectifier can be
controlled in magnitude and phase so as to obtain sinusoidal line current at unity power
factor (UPF). Although such a PWM rectifier/inverter (AC/DC/AC) system is
expensive, and the control is complex, the topology is ideal for four-quadrant operation.
Additionally, the PWM rectifier provides DC bus voltage stabilization and can also act
as active line conditioner (ALC) that compensate harmonics and reactive power at the
point of common coupling of the distribution network. However, reducing the cost of
the PWM rectifier is vital for the competitiveness compared to other front-end rectifiers.
The cost of power switching devices (e.g. IGBT) and digital signal processors (DSP’s)
are generally decreasing and further reduction can be obtained by reducing the number
of sensors. Sensorless control exhibits advantages such as improved reliability and
lower installation costs.
13
PWM rectifier
2.2. RECTIFIERS TOPOLOGIES
A voltage source PWM inverter with diode front-end rectifier is one of the most
common power configuration used in modern variable speed AC drives (Fig. 2.1). An
uncontrolled diode rectifier has the advantage of being simple, robust and low cost.
However, it allows only undirectional power flow. Therefore, energy returned from the
motor must be dissipated on power resistor controlled by chopper connected across the
DC link. The diode input circuit also results in lower power factor and high level of
harmonic input currents. A further restriction is that the maximum motor output voltage
is always less than the supply voltage.
Equations (2.1) and (2.2) can be used to determine the order and magnitude of the
harmonic currents drawn by a six-pulse diode rectifier:
h = 6k ± 1 k = 1, 2, 3,... (2.1)
Ih
=1/ h (2.2)
I1
Harmonic orders as multiples of the fundamental frequency: 5th, 7th, 11th, 13 th etc., with
a 50 Hz fundamental, corresponds to 250, 350, 550 and 650 Hz, respectively. The
magnitude of the harmonics in per unit of the fundamental is the reciprocal of the
harmonic order: 20% for the 5th , 14,3% for the 7th, etc. Eqs. (2.1)-(2.2) are calculated
from the Fourier series for ideal square wave current (critical assumption for infinite
inductance on the input of the converter). Equations (2.1) is fairly good description of
the harmonic orders generally encountered. The magnitude of actual harmonic currents
often differs from the relationship described in (2.2). The shape of the AC current
depends on the input inductance of converter (Fig. 2.2). The ripple current is equal 1/L
times the integral of the DC ripple voltage. With infinite inductance the ripple current is
zero and the flap-top wave of Fig. 2.2d results. The full description of harmonic
calculation in six-pulse converter can be found in [116].
ia
ua
LOAD
ib
ub C
ic
uc
Fig. 2.1 Diode rectifier
14
PWM rectifier
THD=76% THD=53% THD=29% THD=27,6%
Fig. 2.2 Simulation results of diode rectifier at different input inductance (from 0 to infinity)
Besides of six-pulse bridge rectifier a few other rectifier topologies are known [117-
118]. Some of them are presented in Fig. 2.3. The topology of Fig. 2.3(a) presents
simple solution of boost – type converter with possibility to increase DC output voltage.
This is important feature for ASD’s converter giving maximum motor output voltage.
The main drawback of this solution is stress on the components, low frequency
distortion of the input current. Next topologies (b) and (c) uses a PWM rectifier
modules with a very low current rating (20-25% level of rms current comparable with
(e) topology). Hence they have a low cost potential provide only possibility of
regenerative braking mode (b) or active filtering (c). Fig. 2.3d presents 3-level converter
called Vienna rectifier [112]. The main advantage is low switch voltage, but not typical
switches are required. Fig. 2.3e presents most popular topology used in ASD, UPS and
recently like a PWM rectifier. This universal topology has the advantage of using a low-
cost three-phase module with a bi-directional energy flow capability. Among
disadvantages are: high per-unit current ratting, poor immunity to shoot-through faults,
and high switching losses. The features of all topologies are compared in Table 2.1.
Table 2.1 Features of three-phase rectifiers

feature Regulation of Low harmonic Near sinusoidal Power Bi-directional Remarks
DC output distortion of current factor power flow
topology voltage line current waveforms correction
Diode rectifier - - - - -
Rec(a) + - - + -
Rec(b) - - - - +
Rec(c) - + + + - UPF
Rec(d) + + + + - UPF
Rec(e) + + + + + UPF
15
PWM rectifier
(a) (b)
ia
LOAD
ia ua
LOAD
ua
ib C ub
ib C
ub ic
ic
uc uc
3xL 3xL
(c) (d)
ia
ua
ia
LOAD
LOAD
ua
ib ib
ub C ub C
ic
uc ic
3xL uc
3xL
(e)
ua
ia C
LOAD
ib
ub
ic
uc
3xL
Fig.2.3 Basic topologies of switch-mode three-phase rectifiers

a) simple boost-type converter b) diode rectifier with PWM regenerative braking rectifier
c) diode rectifier with PWM active filtering rectifier d) Vienna rectifier (3 – level converter)
e) PWM reversible rectifier (2 – level converter)
The last topology is most promising therefore was chosen by most global company
(SIMENS, ABB and other). In a DC distributed Power System (Fig. 2.5) or AC/DC/AC
converter (Fig. 2.4), the AC power is first transformed into DC thanks to three-phase
PWM rectifier. It provides UPF and low current harmonic content. The converters
connected to the DC-bus provide further desired conversion for the loads, such as
adjustable speed drives for induction motors (IM) and permanent magnet synchronous
motor (PMSM), DC/DC converter, multidrive operation, etc.
16
PWM rectifier
The AC/DC/AC converter (Fig. 2.4) is known in ABB like an ACS611/ACS617 (15 kW
- 1,12 MW) complete four-quadrant drive. The line converter is identical to the ACS600
(DTC) motor converter with the exception of the control software [20,121]. Similar
solutions possess SIEMENS in Simovert Masterdrive (2,2 kW – 2,3 MW) [127].
Furthermore, AC/DC/AC provide:
• the motor can operate at a higher speed without field weakening (by maintaining the
DC-bus voltage above the supply voltage peak),
• decreased theoretically by one-third common mode voltage compared to
conventional configuration thanks to the simultaneous control of rectifier - inverter
(same switching frequency and synchronized sampling time may avoid common-
mode voltage pulse because the different type of zero voltage (U0,U7) are not applied
at the same time) [114],
• the response of the voltage controller can be improved by fed-forward signal from
the load what gives possibility to minimize the DC link capacitance while
maintaining the DC-link voltage within limits under step load conditions [104, 111].
Other solution used in industry is shown in Fig. 2.5 like a multidrive operation [120].
ABB propose active front-end converter ACA 635 (250 kW - 2,5 MW) and Siemens
Simovert Masterdrive in range of power from 7,5 kW up to 1,5 MW.
Re ctifie r Inve rte r

Ua L ia PW M PW M
Ub L ib
Uc L ic
Fig. 2.4 AC/DC/AC converter

Rectifier DC Power Distribution Bus
Ua L ia PWM
Ub L ib
Uc L ic
Filter Filter
DC/DC Converter
PWM PWM PWM

Inverter
Inverter
Load
IM PMSM
Fig. 2.5 DC distributed Power System
17
PWM rectifier
2.3 OPERATION OF THE PWM RECTIFIER
Fig. 2.6b shows a single-phase representation of the rectifier circuit presented in Fig.
2.6a. L and R represents the line inductor. uL is the line voltage and uS is the bridge
converter voltage controllable from the DC-side. Magnitude of uS depends on the
modulation index and DC voltage level.
(a) (b)
Bridge Converter DC - side
AC - side
Ua R L
LOAD
Ub A C jωLiL RiL
R L
Udc
B
C
L iL R
Uc R L
uL
uS=uconv
Fig. 2.6 Simplified representation of three-phase PWM rectifier for bi-directional power flow.
a) main circuit b) single-phase representation of the rectifier circuit
(a)
q
uL d
uS
jωLiL
RiL
iL
90o
(b) (c)
RiL
uS
q q
jωLiL
iL uL d iL ε d
ε uL
jωLiL
uS
RiL
Fig. 2.7 Phasor diagram for the PWM rectifier a) general phasor diagram
b) rectification at unity power factor c) inversion at unity power factor
Inductors connected between input of rectifier and lines are integral part of the circuit. It
brings current source character of input circuit and provide boost feature of converter.
The line current iL is controlled by the voltage drop across the inductance L
interconnecting two voltage sources (line and converter). It means that the inductance
voltage uI equals the difference between the line voltage uL and the converter voltage uS.
When we control phase angle ε and amplitude of converter voltage uS, we control
18
PWM rectifier
indirectly phase and amplitude of line current. In this way average value and sign of DC
current is subject to control what is proportional to active power conducted through
converter. The reactive power can be controlled independently with shift of fundamental
harmonic current IL in respect to voltage UL.
Fig. 2.7 presents general phasor diagram and both rectification and regenerating phasor
diagrams when unity power factor is required. The figure shows that the voltage vector
uS is higher during regeneration (up to 3%) then rectifier mode. It means that these two
modes are not symmetrical [67].
Main circuit of bridge converter (Fig. 2.6a) consists of three legs with IGBT transistor
or, in case of high power, GTO thyristors. The bridge converter voltage can be
represented with eight possible switching states (Fig. 2.8 six-active and two-zero)
described by equation:
(2 / 3)u dc e jkπ / 3

u k +1 =  for k = 0…5 (2.3)
 0
+ +
k=0 U1 k=1 U2
Sb= 0
Sc= 0
Sc= 0
Sa=1
Sa=1
Sb=1
U dc U dc
A B C A B C
- -
+ +
k=2 U3 k=3 U4
Sc= 0
Sb=1
Sa=0
Sa=0
Sb=1
Sc=1
U dc U dc
A B C A B C
- -
+ +
k=4 U5 k=5 U6
Sa=0
Sb=0
Sb=0
Sa=1
Sc=1
Sc=1
U dc U dc
A B C A B C
- -
+ +
U0 U7
Sa=0
Sc=0
Sb=1
Sb=0
Sa=1
Sc=1
U dc U dc
A B C A B C
- -
Fig. 2.8 Switching states of PWM bridge converter
19
PWM rectifier
2.3.1 Mathematical description of the PWM rectifier
The basic relationship between vectors of the PWM rectifier is presented in Fig. 2.9.
β
b
ω
q d
uL uI=jωLiL
iL
us
id
ϕ
ε
iq γL=ωt
a
α
c
Fig. 2.9 Relationship between vectors in PWM rectifier
Description of line voltages and currents
Three phase line voltage and the fundamental line current is:
u a = E m cos ωt (2.4a)
2π
u b = Em cos(ωt + ) (2.4b)
3
2π
u c = Em cos(ωt − ) (2.4c)
3
ia = I m cos(ωt + ϕ ) (2.5a)
2π
ib = I m cos(ωt + +ϕ) (2.5b)
3
2π
ic = I m cos(ωt − +ϕ) (2.5c)
3
where Em (Im) and ω are amplitude of the phase voltage (current) and angular frequency,
respectively, with assumption
20
PWM rectifier
ia + ib + ic ≡ 0 (2.6)
we can transform equations (2.4) to α-β system thanks to equations (A.2.22a) and the
input voltage in α-β stationary frame are expressed by:
3
u Lα = Em cos(ωt ) (2.7)
2
3
u Lβ = Em sin(ωt ) (2.8)
2
and the input voltage in the synchronous d-q coordinates (Fig. 2.9) are expressed by:
u Ld   3 E   u L2α + u L2β 
u  =  2 m  =   (2.9)
 Lq   0   0 
Description of input voltage in PWM rectifier

Line to line input voltages of PWM rectifier can be described with the help of Fig. 2.8
as:
u Sab = ( S a − S b ) ⋅ u dc (2.10a)
u Sbc = ( S b − S c ) ⋅ u dc (2.10b)
u Sca = ( S c − S a ) ⋅ u dc (2.10c)
and phase voltages are equal:
u Sa = f a ⋅ u dc (2.11a)
u Sb = f b ⋅ u dc (2.11b)
u Sc = f c ⋅ u dc (2.11c)
where:
2S a − (S b + S c )
fa = (2.12a)
3
2S − (S a + S c )
fb = b (2.12b)
3
2S c − (S a + S b )
fc = (2.12c)
3
The fa, fb, fc are assume 0, ±1/3 and ±2/3.
Description of PWM rectifier

Model of three-phase PWM rectifier
The voltage equations for balanced three-phase system without the neutral connection
can be written as (Fig. 2.7b):
uL = uI + uS (2.13)
21
PWM rectifier
d iL
u L = Ri L + L + uS (2.14)
dt
u a  ia  ia  u Sa 
u  = R i  + L d i  + u  (2.15)
 b  b dt    
b Sb
uc  ic  ic  u Sc 
and additionally for currents

du dc
C = S a ia + S b ib + S c ic − idc (2.16)
dt
The combination of equations (2.11, 2.12, 2.15, 2.16) can be represented as three-phase
block diagram (Fig. 2.10) [34].
idc
ua + 1 ia - 1 u dc
- R + sL + sC
uSa
Sa
fa + -
ub + 1 ib + +
- R + sL +
uSb
Sb + + 1
+ 3
fb + -
uc + 1 ic
- R + sL
uS c
Sc
fc +
-
Fig. 2.10 Block diagram of voltage source PWM rectifier in natural three-phase coordinates
Model of PWM rectifier in stationary coordinates (α - β )

The voltage equation in the stationary α -β coordinates are obtained by applying
(A.2.22a) to (2.15) and (2.16) and are written as:
u Lα  i Lα  d iLα  u Sα 
u  = R i  + L  +  (2.17)
 Lβ   Lβ  dt i Lβ  u S β 
and
du dc
C = (i Lα Sα + i Lβ S β ) − idc (2.18)
dt
1 1
where: Sα = (2S a − S b − S c ) ; S β = (Sb − S c )
6 2
22
PWM rectifier
A block diagram of α-β model is presented in Fig. 2.11.
idc
+ 1 iLα - 1 udc
uLα
uSα
- R + sL +
+ sC
Sα
Sβ
uSβ
+ - 1 iLβ
uLβ
R + sL
Fig. 2.11 Block diagram of voltage source PWM rectifier in stationary α-β coordinates
Model of PWM rectifier in synchronous rotating coordinates (d-q)

The equations in the synchronous d-q coordinates are obtained with the help of
transformation 4.1a:
diLd
u Ld = RiLd + L − ωLi Lq + u Sd (2.19a)
dt
di Lq
u Lq = RiLq + L + ωLi Ld + u Sq (2.19b)
dt
du
C dc = (iLd S d + iLq S q ) − idc (2.20)
dt
where: S d = Sα cos ωt + S β sin ωt ; S q = S β cos ωt − Sα sin ωt
A block diagram of d-q model is presented in Fig. 2.12.
idc
+ 1 iLd - 1 udc
uLd
- + R + sL + + sC
uSd
Sd
− ωL
Sq ωL
uSq
- + 1
uLq
+ R + sL iLq
Fig. 2.12 Block diagram of voltage source PWM rectifier in synchronous d-q coordinates
23
PWM rectifier
R can be practically neglected because voltage drop on resistance is much lower than
voltage drop on inductance, what gives simplified equations (2.14), (2.15), (2.17),
(2.19).
d iL
uL = L + uS (2.21)
dt
u a  ia  u Sa 
u  = L d i  + u  (2.22)
 b dt    
b Sb
uc  ic  u Sc 

u Lα  d i Lα  u Sα 
u  = L i  + u  (2.23)
 Lβ  dt  Lβ   S β 
di
u Ld = L Ld − ωLi Lq + u Sd (2.24a)
dt
di Lq
u Lq = L + ωLiLd + u Sq (2.24b)
dt
The active and reactive power supplied from the source is given by [see A.2]
{ } *
p = Re u ⋅ i = uα iα + u β i β = u a ia + u b ib + u c ic (2.25)
q = Im{u ⋅ i } = u
1
*
i − uα i β =
β α (u bc ia + u ca ib + u ab ic ) (2.26)
3
It gives in the synchronous d-q coordinates:
3
p = (u Lq i Lq + u Ld i Ld ) = Em I m (2.27)
2
q = (u Lq i Ld − u Ld i Lq ) (2.28)
(if we make assumption of unity power factor, we will obtain following properties
3 3
iLq = 0, uLq = 0, u Ld = Em , i Ld = I m , q = 0 (see Fig. 2.13)).
2 2
β
q(-)
d q(+)
p(+) uL
q ωLiL
jω
p(-) iL
uS
Fig. 2.13 Power flow in bi-directional AC/DC converter as dependency of iL direction.
24
PWM rectifier
2.3.2 Steady-state properties and limitations
For proper operation of PWM rectifier a minimum DC-link voltage is required.

Generally it can be determined by the peak of line-to-line supply voltage:
Vdc min 〉VLN ( rms ) ∗ 3 ∗ 2 = 2,45 ∗ VLN ( rms ) (2.29)
It is true definition but not concern all situations. Other publication [36,37] defines
minimum voltage but do not take into account line current (power) and line inductors.
The determination of this voltage is more complicated and is presented in [59].
Equations (2.24) can be transformed to vector form in synchronous d-q coordinates
defining derivative of current as:
d i Ldq
L = u Ldq − jωLi Ldq − u Sdq . (2.30)
dt
Equation (2.30) defines direction and rate of current vector movement. Six active
vectors (U1-6) of input voltage in PWM rectifier rotate clockwise in synchronous d-q
coordinates. For vectors U0, U1, U2, U3, U4, U5, U6, U7 the current derivatives are
denoted respectively as Up0, Up1, Up2, Up3, Up4, Up5, Up6, Up7 (Fig. 2.14).
q
U
6
)
(u s
ω
U1
p1
U p6
U
iL uL
ξ
U5
U Up5 d
p0 jωLiL
p2
U
Up
7
)
2/
U 2(u s
3*
U dc
U
U p3
p4
U4
3
U
Fig. 2.14 Instantaneous position of vectors
25
PWM rectifier
q
Up6
Up1
iLref uL d
ξ
iL Up5
Up0
Up7
Up2
Up4
Up3
Fig. 2.15 Limitation for operation of PWM rectifier
The full current control is possible when the current is kept in specified error area (Fig.
2.15). Fig. 2.14 and Fig. 2.15 presents that any vectors can force current vector inside
error area when angle created by vectors Up1 and Up2 is ξ < π. It results from
trigonometrical condition that vectors Up1, Up2, U1 and U2 form an equilateral triangle
for ξ = π where u Ldq − jωLi Ldq is an altitude. Therefore, from simple trigonometrical
relationship, it is possible to define boundary condition as:
3
u Ldq − jωLi Ldq = u sdq (2.31)
2
and after transformation, assumpting that uSdq = 2/3Udc, uLdq = Em, iLdq = iLd (for UPF)
we get condition for minimal DC-link voltage:
[
u dc 〉 3 Em2 + (ωLi Ld ) 2 ] and ξ > π . (2.32)
Above equation shows relation between supply voltage (usually constant), output dc
voltage, current (load) and inductance. It also means that sum of vector
u Ldq − jωLi Ldq should not exceed linear region of modulation i.e. circle inscribed in the
hexagon (see Section 4.4).
The inductor has to be designed carefully because low inductance will give a high
current ripple and will make the design more depending on the line impedance. The
high value of inductance will give a low current ripple, but simultaneously reduce the
operation range of the rectifier. The voltage drop across the inductance has influence for
the line current. This voltage drop is controlled by the input voltage of the PWM
rectifier but maximal value is limited by the DC-link voltage. Consequently, a high
current (high power) through the inductance requires either a high DC-link voltage or a
low inductance (low impedance). Therefore, after transformation of equation (2.32) the
maximal inductance can be determinate as:
u dc2
− E m2
L〈 3 . (2.33)
ω i Ld
26
PWM rectifier
2.4 SENSORLESS OPERATION
Normally, the PWM rectifier needs three kinds of sensors:

! DC-voltage sensor (1 sensor)
! AC-line current sensors (2 or 3 sensors)
! AC-line voltage sensors (2 or 3 sensors)
The sensorless methods provide technical and economical advantages to the system
as: simplification, isolation between the power circuit and control system, reliability and
cost effectiveness. The possibility to reduce the number of the expensive sensors have
been studied especially in the field of motor drive application [1], but the rectifier
application differ from the inverter operation in the following reasons:
! Zero vector will shorted the line power,
! The line operates at constant frequency 50Hz and synchronization is necessary.
The most used solution for reducing of sensors include:

! AC voltage and current sensorless,
! AC current sensorless,
! AC voltage sensorless.
AC voltage and current sensorless

Reductions of current sensors especially for AC drives are well known [1]. The two-
phase currents may be estimated based on information of DC link current and reference
voltage vector in every PWM period. No fully protection is main practical problem in
the system. Particularly for PWM rectifier the zero vectors (U0, U7) presents no current
in DC-link and three line phases are short circuit simultaneously. New improved
method presented in [30, 115] is to sample DC-link current few times in one switching
period. Basic principle of current reconstruction is shown in Fig. 2.16 together with a
voltage vector’s patterns determining the direction of current flow. One active voltage
vector takes it to reconstruct one phase current and another voltage vector is used to
reconstruct a second phase current using values measured from DC current sensor. A
relationship between the applied active vectors and the phase currents measured from
DC link sensor is shown in TABLE 2.2, which is based on eight voltage vectors
composed of six active vectors and two zero vectors.
Ts Ts Table 2.2 Relationship between voltage vectors of
converter, DC-link current and line currents.
A 0 1 1 1 1 1 1 0 Voltage Vector DC link current idc
U1(100) +ia
B 0 0 1 1 1 1 0 0 U2(110) -ic
U3(010) +ib
C 0 0 0 1 1 0 0 0
U4(011) -ia
U5(001) +ic
U0 U1 U2 U7 U7 U2 U1 U0
idc
U6(101) -ib
ia -ic -ic ia U0(000) 0
U7(111) 0
Fig. 2.16 PWM signals and DC link
current in sector I
27
PWM rectifier
The main problem of AC current estimation based on minimum pulse-time for DC-link
current sampling. It appears when either of two active vectors is not present, or is
applied only for a short time. In such a case, it is impossible to reconstruct phase
current. This occur in the case of reference voltage vectors passing one of the six
possible active vectors or a low modulation index (Fig. 2.17). The minimum short time
to obtain a correct estimation depends on the rapidness of the system, delays, cable
length and dead-time [30]. The way to solve the problem is to adjust the PWM-pulses or
to allow that no currents information is present in some time period. Therefore
improved compensation consists of calculating the error, which are introduced by the
PWM pulse adjustment and then compensate this error in the next switching period.
Im
U3(010) U 2(110)
U4 (011) U1 (100)
Re
U 5(001) U6(101)
Fig. 2.17. Voltage vector area requiring the adjustment of PWM signals, when a reference
voltage passes one of possible six active vectors and in case of low modulation index and
overmodulation
The AC voltage and current sensorless methods in spite of cost reduction posses several
disadvantages: higher contents of current ripple, problems with discontinuous
modulation and overmodulation mode [see Section 4.4], sampling is presented few
times per switching state what is not technically convenient, unbalance and start up
condition are not reported.
AC current sensorless
This very simple solution based on inductor voltage (uI) measurement in two lines.
Supply voltage can be estimated with assumption that voltage on inductance is equal to
line voltage when the zero-vector occurs in converter (Fig. 2.18)
uI
L iL
uL uS=0
Fig. 2.18. PWM rectifier circuit when the zero voltage vector is applied.
28
PWM rectifier
On the basis of the inductor voltage described in equation (2.34)

diLR
u IR = L (2.34)
dt
the line current can be calculated as:
1
L∫
iLR = u IR dt (2.35)
Thanks to equation (2.35) the observed current will not be affected by derivation noise,
but it directly reduces the dynamic of the control. This gains problems with over-current
protection
AC voltage sensorless
Previous solutions present some over voltage and over current protection troubles.
Therefore the DC-voltage and the AC-line current sensors are an important part of the
over-voltage and over-current protection, while it is possible to replace the AC-line
voltage sensors with a line voltage estimator or virtual flux estimator what is described
in next point.
2.5 VOLTAGE AND VIRTUAL FLUX ESTIMATION
Line voltage estimator [44]

An important requirement for a voltage estimator is to estimate the voltage correct also
under unbalanced conditions and pre-existing harmonic voltage distortion. Not only the
fundamental component should be estimated correct, but also the harmonic components
and the voltage unbalance. It gives a higher total power factor [21]. It is possible to
calculate the voltage across the inductance by the current differentiating. The line
voltage can then be estimated by adding reference of the rectifier input voltage to the
calculated voltage drop across the inductor [52]. However, this approach has the
disadvantage that the current is differentiated and noise in the current signal is gained
through the differentiation. To prevent this a voltage estimator based on the power
estimator of [21] can be applied. In [21] the current is sampled and the power is
estimated several times in every switching state.
In conventional space vector modulation (SVM) for three-phase voltage source
converters, the AC currents are sampled during the zero-vector states because no
switching noise is present and a filter in the current feedback for the current control
loops can be avoided. Using equation (2.36) and (2.37) the estimated active and reactive
power in this special case (zero states) can be expressed as:
 di di di 
p = L a ia + b ib + c ic  = 0 (2.36)
 dt dt dt 
3L  dia di 
q=  ic − c i a  . (2.37)
3  dt dt 
29
PWM rectifier
It should be noted that in this special case it is only possible to estimate the reactive
power in the inductor. Since powers are DC-values it is possible to prevent the noise of
the differentiated current by use of a simple (digital) low pass filter. This ensures a
robust and noise insensitive performance of the voltage estimator.
Based on instantaneous power theory, the estimated voltages across the inductance is:
u Iα  1 iLα − iLβ  0 
u  2 =    (2.38)
 Iβ  i Lα + i Lβ iLβ i Lα  q 
2
where:
uIα, uIβ are the estimated values of the three-phase voltages across the inductance L, in
the fixed α-β coordinates.
The estimated line voltage uL(est) can now be found by adding the voltage reference of
the PWM rectifier to the estimated inductor voltage [44].
u L ( est ) = u S + u I (2.39)
Virtual flux estimator

The voltage imposed by the line power in combination with the AC side inductors are
assumed to be quantities related to a virtual AC motor as shown in Fig. 2.19.
PWM Rectifier DC - side

AC - side
Ua R L
LOAD
Ub R L
A C
Udc
B
C
Uc R L
Virtual AC Motor
Fig. 2.19. Three-phase PWM rectifier system with AC-side presented as virtual AC motor
Thus, R and L represent the stator resistance and the stator leakage inductance of the
virtual motor and phase-to-phase line voltages: Uab, Ubc, Uca would be induced by a
virtual air gap flux. In other words the integration of the voltages leads to a virtual line
flux vector ΨL, in stationary α-β coordinates (Fig. 2.20).
30
PWM rectifier
β
q
uI uS
uL
iq
iL d
ΨL rotated
γL=ωt
α
id
(fixed)
Fig. 2.20. Reference coordinates and vectors

ΨL – virtual line flux vector, uS – converter voltage vector, uL - line voltage vector,
uI – inductance voltage vector, iL – line current vector
Similarly to Eq. (2.39) a virtual flux equation can be presented as [65, 102] (Fig. 2.21):
ψ L ( est ) = ψ S + ψ I (2.40)
AC - side PWM Rectifier DC - side AC - side PW M Rectifier DC - side

Idc Idc
A A
Udc
Udc
B B
C C
M M
POWER FLOW POWER FLOW
q q
uI uI
uL uS uL
ψS
uS
iL
ψI
ψL d ψL d
ψI
ϕ1 = 0ο ψS ϕ 1 = 180 ο iL
Fig. 2.21 Relation between voltage and flux for different power flow direction in PWM rectifier.
31
PWM rectifier
Based on the measured DC-link voltage Udc and the converter switch states Sa, Sb, Sc the
rectifier input voltages are estimated as follows
2 1
u Sα = U dc ( S a − ( S b + S c )) (2.41a)
3 2
1
u Sβ = U dc ( S b − S c ) (2.41b)
2
Then, the virtual flux ΨL components are calculated from the (2.41) in stationary (α-β)
coordinates system
di L α
Ψ L α ( est ) = ∫ (u Sα +L
dt
) dt (2.42a)
di L β
Ψ L β ( est ) = ∫ (u Sβ + L
dt
) dt (2.42b)
The virtual flux components calculation is shown in Fig. 2.22.

1
T
_
∫
1
usα TN
ΨLα
iLα
L
iLβ
∫
1
usβ TN ΨLβ
_
1
T
Fig. 2.22. Block scheme of virtual flux estimator with first order filter.
32
Direct Power Control (DPC)
3. VOLTAGE AND VIRTUAL FLUX BASED DIRECT POWER CONTROL
3.1 INTRODUCTION
Control of PWM rectifier can be considered as a dual problem to vector control of an

induction motor (Fig. 3.1) [4,110]. Various control strategies have been proposed in
recent works on this type PWM converter. Although these control strategies can
achieve the same main goals, such as the high power factor and near-sinusoidal current
waveforms, their principles differ. Particularly, the Voltage Oriented Control (VOC),
which guarantees high dynamics and static performance via an internal current control
loops, has become very popular and has constantly been developed and improved [46,
48], [51], [53-54]. Consequently, the final configuration and performance of the VOC
system largely depends on the quality of the applied current control strategy [6].
Another control strategy called Direct Power Control (DPC) is based on the
instantaneous active and reactive power control loops [21], [22]. In DPC there are no
internal current control loops and no PWM modulator block, because the converter
switching states are selected by a switching table based on the instantaneous errors
between the commanded and estimated values of active and reactive power. Therefore,
the key point of the DPC implementation is a correct and fast estimation of the active
and reactive line power.
Rectifier Inverter
Ua L ia PWM PWM
Ub L ib IM
Uc L ic
P W M R e c tif ie r In d u c t io n
C o n tr o l M o to r C o n tr o l
D P C D T C
V O C F O C
Fig.3.1 Relationship between control of PWM line rectifier and PWM inverter – fed IM
The control techniques for PWM rectifier can be generally classified as voltage based
and virtual flux based, as shown in Fig. 3.2. The virtual flux based method corresponds
to direct analogy of IM control.
Control strategies for PWM Rectifier
Voltage Based Virtual Flux Based

Control Control
VOC DPC VFOC VF-DPC
Fig. 3.2 Classification of control methods for PWM rectifier
33
3.2 BASIC BLOCK DIAGRAM OF DIRECT POWER CONTROL (DPC)
The main idea of DPC proposed in [22] and next developed by [21] is similar to the
well-known Direct Torque Control (DTC) for induction motors. Instead of torque and
stator flux the instantaneous active (p) and reactive (q) powers are controlled (Fig.
3.3).
L ia
Ua PWM
L ib
Ub U dc Load
L ic
Uc
i a,b Sa Sb Sc
Current measurement Sa
Instantaneous power & Sb Switching
line-voltage Sc Table
or virtual flux estimator U dc
-
sector dq dp
γUL or γ ΨL selection Udcref
PI
p -
q -
p ref
q ref = 0
Fig. 3.3 Block scheme of DPC.
The commands of reactive power qref (set to zero for unity power factor) and active
power pref (delivered from the outer PI-DC voltage controller) are compared with the
estimated q and p values (described in section 3.3 and 3.4), in reactive and active
power hysteresis controllers, respectively.
The digitized output signal of the reactive power controller is defined as:
dq = 1 for q < qref - Hq (3.1a)
dq = 0 for q > qref + Hq, (3.1b)
and similarly of the active power controller as
dp = 1 for p < pref - Hp (3.2a)
dp = 0 for p > pref + Hp, (3.2b)
where: Hq & Hp are the hysteresis bands.
The digitized variables dp, dq and the voltage vector position γUL = arc tg (uLα/uLβ) or
flux vector position γΨL = arc tg (ψLα/ψLβ) form a digital word, which by accessing the
address of the look-up table selects the appropriate voltage vector according to the
switching table (described in section 3.5).
The region of the voltage or flux vector position is divided into twelve sectors, as
shown in Fig. 3.5 and the sectors can be numerically expressed as:
π π
( n − 2) ≤ γ n < (n − 1) where n = 1, 2...12 (3.3)
6 6
34
β β
γ5 γ4 γ8 γ 7
γ6 γ3 γ9 γ6
γ7 γ2 α γ10 γ5 α
γ8 γ1 γ11 γ4
γ9 γ12 γ12 γ3
γ10 γ11 γ1 γ2
Fig. 3.5 Sector selection for DPC and VF-DPC
Note, that the sampling frequency has to be about few times higher than the average
switching frequency. This very simple solution allows precisely control of
instantaneous active and reactive power and errors are only limited by the hysteresis
band. No transformation into rotating coordinates is needed and the equations are easy
implemented. This method deals with instantaneous variables, therefore, estimated
values contain not only a fundamental but also harmonic components. This feature also
improves the total power factor and efficiency [21].
Further improvements regarding VF-DPC operation can be achieved by using sector
detection with PLL (Phase-Locked Loop) generator instead of zero crossing voltage
detector (Fig. 3.6). This guarantees a very stable and free of disturbances sector
detection, even under operation with distorted and unbalanced line voltages (Fig.3.19).
L ia
Ua PW M
L ib
Ub U dc Load
L ic
Uc
i a,b SA S B S C
SA
C urrent measurement SB Switching
V irtual flux estimator Table
(V FE ) SC
U dc
-
γ sector
selectio n dq dp
U dcref
i Lα i LβΨ Lα Ψ Lβ PLL PI
Instantaneous p -
-
active & reactive p ref
power estimator q
(PE ) q ref
Fig. 3.6. Block scheme of VF-DPC with PLL generator
35
3.3 INSTANTANEOUS POWER ESTIMATION BASED ON THE LINE VOLTAGE
The main idea of voltage based power estimation for DPC was proposed in [21-22].
The instantaneous active and reactive powers are defined by the product of the three
phase voltages and currents (2.25-2.26). The instantaneous values of active (p) and
reactive power (q) in AC voltage sensorless system are estimated by Eqs. (3.8) and
(3.9). The active power p is the scalar product of the current and the voltage, whereas
the reactive power q is calculated as a vector product of them. The first part of both
equations represents power in the inductance and the second part is the power of the
rectifier.
dia dib dic
p = L( ia + ib + ic ) +Udc(Saia + Sbib + Scic ) (3.8)
dt dt dt
1 di di
q= {3L( a ic − c ia ) −Udc[Sa (ib −ic ) + Sb(ic −ia ) + Sc (ia −ib)]} (3.9)
3 dt dt
As can be seen in (3.8) and (3.9), the form of equations have to be changed according
to the switching state of the converter, and both equations require the knowledge of the
line inductance L. Supply voltage usually is constant, therefore the instantaneous active
and reactive powers are proportional to the iLd and iLq.
The AC-line voltage sector is necessary to read the switching table, therefore
knowledge of the line voltage is essential. However, once the estimated values of
active and reactive power are calculated and the AC-line currents are known, the line
voltage can easily be calculated from instantaneous power theory as:
u Lα  1 iLα − iLβ   p 
u  2 = 2    (3.10)
 Lβ  i Lα + i Lβ iLβ iLα  q 
The instantaneous power and AC voltage estimators are shown in Fig. 3.7.
ia ib
2 Sa
3 in s t a n t a n e o u s a c t iv e a n d
r e a c t iv e p o w e r e s t im a t o r Sb
E q u a t io n s ( 3 . 8 ) a n d ( 3 . 9 )
abc Sc
αβ
iL β iL α
v o lt a g e
e s t im a t o r
E q u a t io n
(3 .1 0 )
u dc q p u Lα u Lβ
Fig. 3.7 Instantaneous power estimator based on line voltage.
36
In spite of the simplicity, this power estimation method has several disadvantages such
as:
• high values of the line inductance and sampling frequency are needed (important
point for the estimator, because a smooth shape of current is needed).
• power estimation depends on the switching state. Therefore, calculation of the
power and voltage should be avoided at the moment of switching, because of high
estimation errors.
3.4 INSTANTANEOUS POWER ESTIMATION BASED ON THE VIRTUAL FLUX
The Virtual Flux (VF) based approach has been proposed by Author to improve the
VOC [42, 56]. Here it will be applied for instantaneous power estimation, where
voltage imposed by the line power in combination with the AC side inductors are
assumed to be quantities related to a virtual AC motor as shown in section 2.5.
With the definitions
Ψ L = ∫ u L dt (3.11)
where
u Lα  1 1 / 2  u ab 
u L =   = 2 / 3   (3.12)
u Lβ  0 3 / 2 ubc 
 Ψ L α   ∫ u L α dt 
ΨL =  =  (3.13)
 Ψ Lβ   ∫ u L β dt 
i L α   3/ 2 0  i a 
iL =   = 2/3 (3.14)
i Lβ   3/2 3  ib 
uAM
usα   1 −1/ 2 −1/ 2  
uS =uconv =   = 2/ 3 uBM (3.15)
usβ  0 3 / 2 − 3 / 2u 
 CM
the voltage equation can be written as
d
u L = Ri L + ( Li L + Ψ S ) . (3.16a)
dt
In practice, R can be neglected, giving
diL d di
uL = L + ΨS = L L + uS (3.16b)
dt dt dt
Using complex notation, the instantaneous power can be calculated as follows:
∗
p = Re(u L ⋅ i L ) (3.17a)
∗
q = Im( u L ⋅ i L ) (3.17b)
37
where * denotes the conjugate line current vector. The line voltage can be expressed by
the virtual flux as
d d dΨL jωt dΨL jωt
uL = Ψ L = (ΨLe jωt ) = e + jωΨLe jωt = e + jω Ψ L (3.18)
dt dt dt dt
where ΨL denotes the space vector and ΨL its amplitude. For the virtual flux oriented
d-q coordinates (Fig. 2.20), ΨL=ΨLd, and the instantaneous active power can be
calculated from (3.17a) and (3.18) as
d Ψ Ld
p = i Ld + ω Ψ Ld i Lq (3.19)
dt
For sinusoidal and balanced line voltages, equation (3.19) is reduced to
d Ψ Ld
=0 (3.20)
dt
p = ω Ψ Ld i Lq (3.21)
which means that only the current components orthogonal to the flux ΨL vector,
produce the instantaneous active power. Similarly, the instantaneous reactive power
can be calculated as:
d Ψ Ld
q=− i Lq + ω Ψ Ld i Ld (3.22)
dt
and with (3.20) it is reduced to:
q = ωΨLd iLd (3.23)
However, to avoid coordinate transformation into d-q coordinates, the power estimator
for the DPC system should use stator-oriented quantities, in α-β coordinates
(Fig.2.20).
Using (3.17) and (3.18)
uL =
dΨL
dt
+j
dΨL
dt
(
+ jω ΨLα + jΨL β ) (3.24)
α β
dΨ dΨ
uLiL* =  L + j L + jω ΨLα + jΨLβ ( ) (i
Lα − jiLβ ) (3.25)
 dt α dt β 
That gives
dΨ 
dΨ
(
p =  L iLα + L iLβ +ω ΨLα iLβ − ΨL β iLα ) (3.26a)
and
 dΨ dΨ 
q = − L iLβ + L iLα +ω ΨLαiLα +ΨL β iLβ( ). (3.26b)
38
For sinusoidal and balanced line voltage the derivatives of the flux amplitudes are
zero. The instantaneous active and reactive powers can be computed as [17-19]
p = ω ⋅ (ΨLα iLβ − ΨLβ iLα ) (3.27a)

q = ω ⋅ (ΨLα iLα + ΨLβ iLβ ) . (3.27b)
The measured line currents ia, ib and the estimated virtual flux components ΨLα ,ΨLβ
are delivered to the instantaneous power estimator block (PE) as depicted in Fig. 3.8.
ia ib
2 SA
3 flu x e s t im a t o r
SB
E q u a t io n s ( 2 .4 2 a , b )
abc Sc
αβ
iL α
in s t a n t a n e o u s
a c t iv e a n d r e a c t iv e
p o w e r e s t im a t o r
E q u a t io n s ( 3 . 2 7 a , b )
iL β PE
u dc q p ψ Lα ψ Lβ
Fig. 3.8 Instantaneous power estimator based on virtual flux
3.5 SWITCHING TABLE
It can be seen in Fig. 3.9, that the instantaneous active and reactive power depends on
position of converter voltage vector. It has indirect influence on inductance voltage as
well as phase and amplitude of line current. Therefore, different pattern of switching
table can be applied to direct control (DTC, DPC). It influence control condition as:
instantaneous power and current ripple, switching frequency and dynamic
performance. Some works, propose different switching tables for DTC but we cannot
find too much reference for DPC. For drives exist more switching table techniques
because of wide range of output frequency and dynamic demands [24-29]. For PWM
rectifier we have constant line frequency and only instantaneous power varies. Fig. 3.9
presents four different situations, which illustrate the variations of instantaneous
power. Point M presents reference values of active and reactive power.
39
(a) (b)
β β
uL uL ωLiL
jω
ωLiL
jω p ref V3 V2 p ref
∆iL
iL V4 V1
V3 V2
∆iL V5 V6
M V4 V1
iL uS M
V6
iL*
V5
iL *
uS q ref q ref
α α
(c) (d)
β β
uL uL
ωLiL
jω pref p ref
V3 V2 ωLiL
jω
V4 V1 ∆iL M
M V3 V2
∆iL uS
V5 V6
iL V4 V1
iL* iL* V5 V6
qref qref
uS
iL
α α
Fig. 3.9 Instantaneous power variation:

a) pref<p, qref>q (0,1); b) pref>p, qref>q (1,1); c) pref>p, qref<q (1,0); d) pref<p, qref<q (0,0);
The selection of vector is made so that the error between q and qref should be within the
limits (Eqs. (3.1),(3.2)). It depends not only on the error of the amplitude but also the
direction of q as shown in Fig. 3.10.
β
sector 5 sector 4
(U3,U5) (U3,U5)
sector 6 sector 3
(U4,U6) (U2,U4)
sector 7 sector 2
(U4,U6) (U2,U4)
α
qref
sector 8 sector 1
Hq sector 2 sector 3 sector 4 sector 5

qref
-Hq t
Fig.3.10 Selection of voltage vectors for q
40
Some behaviour of DPC are not satisfactory. For instance when the instantaneous
reactive power vector is close to one of sector boundary, two of four possible active
vectors are wrong. These wrong vectors can only change the instantaneous active
power without correction of the reactive power error. This is easy visible on a current.
A few methods to improve the DPC behaviour in the sector bonders is well known.
One of them is to add more sectors or hysteresis levels. Therefore, switching table are
generally constructed with difference in:
! number of sectors,
! dynamic performance,
! two and three level hysteresis controllers.
Number of sectors
Usually the vectors plane is divided for 6 (3. 28) or 12 (3. 29) sectors (Fig. 3.11). It has
influence for switching table construction (Table 3.1).
(a) (b)
sector 5 sector 4
sector 3 sector 2
β sector 6 sector 3
β
sector 7 sector 2
sector 4
sector 1
α α
sector 8 sector 1
sector 9 sector 12
sector 5 sector 6 sector 10 sector 11
Fig. 3.11 Voltage plane with a) 6 sectors b) 12 sectors
(2n − 3) π ≤ γ n < (2n − 1)

π
n = 1, 2, ..., 6 (3.28)
6 6
(n − 2) π ≤ γ n < (n − 1)
π
n = 1, 2, ..., 12 (3.29)
6 6
Table 3.1.b Switching table for 6 sectors Table 3.1.a Switching table for 12 sectors
dp dq Sector A dp dq Sector A Sector B
1 0 UB 1 0 UB U7
1 U0 1 U0 U7
0 0 UB 0 0 UB
1 UA 1 UA
UA=U1(100),U2(110),U3(010),U4(011),U5(001),U6(101) UA=U1(100),U2(110),U3(010),U4(011),U5(001),U6(101)
UB=U6(101),U1(100),U2(110),U3(010),U4(011),U5(001) UB=U6(101),U1(100),U2(110),U3(010),U4(011),U5(001)
U0=U0(000),U7(111) U0=U0(000),U7(111)
When region of the voltage vector position is divided into twelve sectors, the area
between adjoining vectors contain two sectors. Sector A is located closer to UA and
sector B closer to UB.
41
Hysteresis controllers
The wide of the instantaneous active and reactive hysteresis band have a relevant effect
on the converter performance. In particular, the harmonic current distortion, the
average converter switching frequency, the power pulsation and the losses are strongly
affected by the hysteresis wide. The controllers proposed by [21] in classical DPC are
two level comparators for instantaneous active and reactive power (Fig 3.12a). Three
level comparators can provide further improvements. Possible combinations of
hysteresis controllers for active and reactive power are presented in Fig. 3.12.
a) b) c)
1 1 1
0
dp −Η p 0
dp −Ηp 0
dp
−Ηp Ηp Ηp Ηp
-1 -1
1 1 1
0
dq 0
dq −Ηq 0
dq
−Ηq Ηq −Ηq Ηq Ηq
-1
Fig. 3.12 Hysteresis controllers: a) two level; b) mixed two and three level; c) three levels.
The two level hysteresis controllers for instantaneous reactive power can be described
as
if ∆q > Hq then dq = 1
if -Hq ≤ ∆q ≤ Hq and d∆q/dt > 0 then dq = 0
if -Hq ≤ ∆q ≤ Hq and d∆q/dt < 0 then dq = 1
if ∆q < -Hq then dq = 0.
The three level hysteresis controllers for the instantaneous active power can be
described as a sum of two level hysteresis
if ∆p > Hp then dp = 1
if 0 ≤ ∆p ≤ Hp and d∆p/dt > 0 then dp = 0
if 0 ≤ ∆p ≤ Hp and d∆p/dt < 0 then dp = 1
if -Hq ≤ ∆p ≤ 0 and d∆p/dt > 0 then dp = -1
if -Hq ≤ ∆p ≤ 0 and d∆p/dt < 0 then dp = 0
if ∆p < -Hp then dp = -1.
Dynamic performance
Combinations of each converter voltage space vector used for instantaneous active and
reactive power variation are summarized in Table 3.3. Situation is presented for vector
located in the k-th sector (k = 1, 2, 3, 4, 5, 6) of the α, β plane as shown in Fig. 3.13
[24]. In the table, a single arrow means a small variation, whereas two arrows mean a
large variation. As it appears from the table, an increment of reactive power (↑) is
obtained by applying the space vector UK, UK+1 and UK+2. Conversely, a decrement of
reactive power (↓) is obtained by applying vector UK-2, UK-1, or UK+3. Active power
increase when UK+2, UK+3, UK+1, UK-2 or U0, U7 are applied and active power decrease
when UK, UK-1 are applied.
42
UK+2 β UK+1
sector k
UK+3 U0,7 UpK-1

UpK-2
UK
iL UpK+3 α
Up0,7
UpK
UpK+2
UpK+1
UK-2 UK-1
Fig. 3.13 Variation of converter voltage space vector
Table 3.3 Instantaneous active and reactive variations due to the applied voltage vectors
UK-2 UK-1 UK UK+1 UK+2 UK+3 U0U7
q ↓↓ ↓ ↑↑ ↑ ↑ ↓ ↑↓
p ↑ ↓ ↓ ↑ ↑↑ ↑↑ ↑
General features of switching table and hysteresis controllers

! The switching frequency depends on the hysteresis wide of active and reactive
power comparators.
! By using three-level comparators, the zero vectors are naturally and systematically
selected. Thus, the number of switching is considerably smaller than in the system
with two-level hysteresis comparators.
! Zero vectors decrease switching frequency but it provides short-circuit for the line
to line voltage.
! Zero vectors U0(000) and U7(111) should be appropriate chosen.
! For DPC only the neighbour vectors should be selected what decrease dynamics
but provide low current and power ripples (low THD).
! Switching table with PLL (Phase-Locked Loop) sector detection guarantees a very
stable and free of disturbances operation, even under distorted and unbalanced line
voltages.
! 12 sectors provide more accurate voltage vector selection.
43
3.6 SIMULATION AND EXPERIMENTAL RESULTS
To study the operation of the VF-DPC system under different line conditions and to
carry out a comparative investigation, the PWM rectifier with the whole control scheme
has been simulated using the SABER software [A.4]. The main electrical parameters of
the power circuit and control data are given in the Table A.4.1.
The simulation study has been performed with two main objectives:
! explaining and presenting the steady state operation of the proposed by Author VF-
DPC with a purely sinusoidal and distorted unbalanced supply line voltage, as well as
performance comparison with the conventional scheme where the instantaneous power
is estimated based on calculated voltage (not virtual flux) signals [21];
! presenting the dynamic performance of power control.
The simulated waveforms for the proposed by Author VF-DPC and for the DPC
reported in [21] are shown in Fig. 3.14. These results were obtained for purely
sinusoidal supply line voltage. Similarly Fig. 3.15 shows on oscilogram for distorted
(5% of 5-th harmonic) and unbalanced (4,5%) line voltages (see A.1). Fig. 3.15 and Fig.
3.16 show that VF-DPC provides sinusoidal and balanced line currents even at distorted
and unbalanced supply voltage. This is thanks to fact that voltage was replaced by
virtual flux.
The dynamic behaviour under a step change of the load is presented in Fig. 3.21. Note,
that in spite of the lower sampling frequency (50 kHz), the VF based power estimator
gives much less noisy instantaneous active and reactive power signals (Fig. 3.21b) in
comparison to the conventional DPC system with 80 kHz sampling frequency (Fig.
3.21a). This is thanks to the natural low-pass filter behaviour of the integrators used in
(2.42) (because k-th harmonics are reduced by a factor 1/k and the ripple caused by high
frequency power transistor switching is effectively damped). Consequently, the
derivation of the line current, which is necessary in conventional DPC for sensorless
voltage estimation, is in the VF-DPC eliminated. However, the dynamic behaviour of
both control systems, are identical (see Fig. 3.21). The excellent dynamic properties of
the VF-DPC system at distorted and unbalanced supply voltage are shown in Fig. 3.22.
Experimental results were realized on laboratory setup presented in A.6. The main
electrical parameters of the power circuit and control data are given in the Table A.6.2.
The experimental results are measured for significantly distorted line voltage what is
presented in Fig. 3.17. Steady state operation for DPC and VF-DPC are shown in Fig.
3.18 - 3.20. The shape of the current for conventional DPC is strongly distorted because
two undesirable conditions are applied:
# sampling time was 20µs (should be about 10µs [21]),
# the line voltage was not purely sinusoidal.
VF-DPC in comparison with the conventional solution at the same condition provides
sinusoidal current (Fig. 3.19-3.20) with low total harmonic distortion. The dynamic
behaviour under a step change of the load for VF-DPC are shown in Fig. 3.23-3.24.
44
STEADY STATE BEHAVIOUR

! RESULTS UNDER PURELY SINUSOIDAL LINE VOLTAGE (SIMULATION)
(a) (b)
Fig. 3.14 Simulated basic signal waveforms and line current harmonic spectrum under purely
sinusoidal line voltage: a) conventional DPC presented in [21], b) proposed VF-DPC,.
From the top: line voltage, estimated line voltage (left) and estimated virtual flux (right), line
currents, instantaneous active and reactive power, harmonic spectrum of the line current.
DPC THD = 5.6%, VF-DPC THD = 5.2%.
! RESULTS UNDER NON SINUSOIDAL LINE VOLTAGE (SIMULATION)
Fig. 3.15. Simulated waveforms and line current harmonic spectrum under pre-distorted (5%
of 5th harmonic) and unbalanced (4.5%) line voltage for conventional DPC and VF-DPC.
From the top: line voltage, estimated line voltage(left) and virtual flux (right), line currents,
harmonic spectrum of the line current.
45
Fig. 3.16. Simulated basic signal waveforms in the VF-DPC under pre-distorted (5% of 5th
harmonic) and unbalanced (4.5%) line voltage.
From the top: line voltages, line currents. THD = 5.6%
! RESULTS UNDER NON SINUSOIDAL LINE VOLTAGE (EXPERIMENT)
UL
Udif
Fig.3.17. Line voltage with harmonic spectrum

(uL – line voltage, udif -distortion from purely sinusoidal supply line voltage).
46
UL
IL
ΨL
Fig.3.18. Experimental waveforms with distorted line voltage for conventional DPC.
From the top: line voltage, line currents (5A/div) and estimated virtual flux.
UL
IL
ΨL
Fig.3.19. Experimental waveforms with distorted line voltage for VF- DPC.
From the top: line voltage, line currents (5A/div) and estimated virtual flux
47
UL
IL
1 0
0
0 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0
Fig.3.20. Experimental waveforms with distorted line voltage for VF-DPC. From the top: line
voltage, line currents (5A/div), instantaneous active (2 kW/div) and reactive power (2 kVAr/div),
harmonic spectrum of line current (THD = 5,6%) [17].
48
DYNAMIC BEHAVIOUR
(a) (b)
Fig. 3.21. Transient of the step change of the load:

(a) conventional DPC presented in [21], (b) proposed VF-DPC,.
From the top: line voltage, line currents, instantaneous active and reactive power.
! RESULTS UNDER NON SINUSOIDAL LINE VOLTAGE (SIMULATIONS)

(a) (b)
Fig. 3.22. Transient to the step change of the load in the VF-DPC:
(a) load increasing (b) load decreasing.
From the top: line voltages, line currents, instantaneous active and reactive power.
49
! RESULTS UNDER NON SINUSOIDAL LINE VOLTAGE (EXPERIMENT)
UL
IL
Fig. 3.23. Transient of the step change of the load in the improved VF-DPC: load increasing.
From the top: line voltages, line currents (5A/div),
instantaneous active (2 kW/div) and reactive power (2 kVAr/div).
Fig. 3.24 Transient of the step change of the load in the improved VF-DPC: start-up of
converter. From the top: line voltages, line currents (5A/div),
instantaneous active (2 kW/div) and reactive power (2 kVAr/div).
50
3.8 SUMMARY
The presented DPC system constitutes a viable alternative to the VOC system
[see Chapter 4] of PWM line rectifiers. However, conventional solution shown
by [21] possess several disadvantages:
! the estimated values are changed every time according to the switching state
of the converter, therefore, it is important to have high sampling frequency.
(good performance is obtained at 80kHz sampling frequency, it means that
result precisely depends on sampling time),
! the switching frequency is not constant, therefore, a high value of
inductance is needed (about 10%). (this is an important point for the line
voltage estimation because a smooth shape of current is needed),
! the wide range of the variable switching frequency can be problem, when
designing the necessary LC input filter,
! calculation of power and voltage should be avoided at the moment of
switching because it gives high errors of the estimated values.
Based on duality with a PWM inverter-fed induction motor, a new method of

instantaneous active and reactive power calculation has been proposed. This
method uses the estimated Virtual Flux (VF) vector instead of the line voltage
vector. Consequently, voltage sensorless line power estimation is much less
noisy thanks to the natural low-pass behaviour of the integrator used in the
calculation algorithm. Also, differentiation of the line current is avoided in this
scheme. So, the presented VF-DPC of PWM rectifier has the following features
and advantages:
! no line voltage sensors are required,

! simple and noise robust power estimation algorithm, easy to implement in
a DSP,
! lower sampling frequency (as conventional DPC [21]),
! sinusoidal line currents (low THD),
! no separate PWM voltage modulation block,
! no current regulation loops,
! coordinate transformation and PI controllers are not required,
! high dynamic, decoupled active and reactive power control,
! power and voltage estimation gives possibility to obtain instantaneous
variables with all harmonic components, what have influence for
improvement of total power factor and efficiency [21].
The typical disadvantages are:

! variable switching frequency,
! fast microprocessor and A/D converters, are required.
As shown in the Chapter 3, thanks to duality phenomena, an experience with the

high performance decoupled PWM inverter-fed induction motor control can be used
to improve properties of the PWM rectifier control.
51
Voltage and Virtual Flux Oriented Control
4. VOLTAGE AND VIRTUAL FLUX ORIENTED CONTROL (VOC, VFOC)
4.1 INTRODUCTION
Similarly as in FOC of an induction motor [4], the Voltage Oriented Control (VOC) and
Virtual Flux Oriented Control (VFOC) for line side PWM rectifier is based on
coordinate transformation between stationary α-β and synchronous rotating d-q
reference system. Both strategies guarantees fast transient response and high static
performance via an internal current control loops. Consequently, the final configuration
and performance of system largely depends on the quality of applied current control
strategy [6]. The easiest solution is hysteresis current control that provides a fast
dynamic response, good accuracy, no DC offset and high robustness. However the
major problem of hysteresis control is that its average switching frequency varies with
the load current, which makes the switching pattern uneven and random, thus, resulting
in additional stress on switching devices and difficulties of LC input filter design.
Therefore, several strategies are reported in literature to improve performance of current
control [2], [38-40], [68-69]. Among presented regulators the widely used scheme for
high performance current control is the d-q synchronous controller, where the currents
being regulated are DC quantities what eliminates steady state error.
4.2 BLOCK DIAGRAM OF THE VOLTAGE ORIENTED CONTROL (VOC)

The conventional control system uses closed-loop current control in rotating
reference frame, the Voltage Oriented Control (VOC) scheme is shown in Fig. 4.1.
Ua L ia PW M
LOAD
Ub L ib
L Udc
Uc ic
ia ib
Sa Sb Sc
Current m easurem ent
& PW M Adaptive
line voltage estim ation M odulator
iLα iLβ uLα uLβ

-
uSα uSβ U dc_ref
α−β sinγ UL α−β

k - γ cosγ UL d -q ∆U dc
uSq uSd
α−β sinγ UL
d-q cosγ UL PI
iLd iLq
PI PI
- ∆iq ∆id
-
i q_ref= 0 id_ref
Fig. 4.1 Block scheme of AC voltage sensorless VOC
A characteristic feature for this current controller is processing of signals in two

coordinate systems. The first is stationary α-β and the second is synchronously rotating
d-q coordinate system. Three phase measured values are converted to equivalent two-
phase system α-β and then are transformed to rotating coordinate system in a block
α-β/d-q:
52
k d   cos γ UL sin γ UL   kα 
k  =    (4.1a)
 q  − sin γ UL cos γ UL  k β 
Thanks to this type of transformation the control values are DC signals. An inverse
transformation d-q/α-β is achieved on the output of control system and it gives a result
the rectifier reference signals in stationary coordinate:
 kα  cos γ UL − sin γ UL  k d 
k  =    (4.1b)
 β   sin γ UL cos γ UL   k q 
For both coordinate transformation the angle of the voltage vector γUL is defined as:
sin γ UL = u Lβ / (u Lα )2 + (u Lβ )2 (4.2a)
cos γ UL = u Lα / (u Lα )2 + (u Lβ )2 . (4.2b)
In voltage oriented d-q coordinates, the AC line current vector iL is split into two
rectangular components iL = [iLd, iLq] (Fig. 4.2). The component iLq determinates reactive
power, whereas iLd decides about active power flow. Thus the reactive and the active
power can be controlled independently. The UPF condition is met when the line current
vector, iL, is aligned with the line voltage vector, uL (Fig. 2.7b) By placing the d-axis of
the rotating coordinates on the line voltage vector a simplified dynamic model can be
obtained.
β−axis
q-axis iLβ ω
iL
d-axis
uLβ (rotating)
iLq ϕ u =u
iLd L Ld
γUL=ωt α−axis
iLα uLα (fixed)
Fig. 4.2: Vector diagram of VOC. Coordinate transformation of line current, line voltage and
rectifier input voltage from stationary α−β coordinates to rotating d-q coordinates.
The voltage equations in the d-q synchronous reference frame in accordance with
equations 2.19 are as follows:
di Ld
u Ld = R ⋅ iLd + L + u Sd − ω ⋅ L ⋅ i Lq (4.3)
dt
diLq
u Lq = R ⋅ i Lq + L + u Sq + ω ⋅ L ⋅ i Ld (4.4)
dt
Regarding to Fig. 4.1, the q-axis current is set to zero in all condition for unity power
factor control while the reference current iLd is set by the DC-link voltage controller and
53
controls the active power flow between the supply and the DC-link. For R ≈ 0 equations
(4.3), (4.4) can be reduced to:
di Ld
u Ld = L + u Sd − ω ⋅ L ⋅ iLq (4.5)
dt
diLq
0=L + u Sq + ω ⋅ L ⋅ i Ld (4.6)
dt
Assuming that the q-axis current is well regulated to zero, the following equations hold
true
di
u Ld = L Ld + u Sd (4.7)
dt
0 = u Sq + ω ⋅ L ⋅ i Ld (4.8)
As current controller, the PI-type can be used. However, the PI current controller has no
satisfactory tracing performance, especially, for the coupled system described by Eqs.
(4.5), (4.6). Therefore for high performance application with accuracy current tracking
at dynamic state the decoupled controller diagram for the PWM rectifier should be
applied what is shown in Fig. 4.3 [49]:
u Sd = ωLi Lq + u Ld + ∆u d (4.9)
u Sq = −ωLi Ld + ∆u q (4.10)
where ∆ is the output signals of the current controllers
∆u d = k p (id∗ − id ) + k i ∫ (id∗ − id )dt (4.11)

∆u q = k p (iq∗ − iq ) + k i ∫ (iq∗ − iq )dt (4.12)
The output signals from PI controllers after dq/αβ transformation (Eq. (4.1b)) are used
for switching signals generation by a Space Vector Modulator [see Section 4.4].
uLd
+
Udc* ∆Udc PI id* PI ∆Ud USd
voltage controller current controller
+ + +
-
+
Udc
id -ωL
iq ωL
+
-
∆Uq USq
PI
iq*=0
current controller +
+
Fig. 4.3 Decoupled current control of PWM rectifier
54
4.3 BLOCK DIAGRAM OF THE VIRTUAL FLUX ORIENTED CONTROL (VFOC)
The concept of Virtual Flux (VF) can also be applied to improve VOC scheme, because
disturbances superimposed onto the line voltage influence directly the coordinate
transformation in control system (4.2). Sometimes this is solved only by phase-locked
loops (PLL’s) only, but the quality of the controlled system depends on how effectively
the PLL’s have been designed [31]. Therefore, it is easier to replace angle of the line
voltage vector γUL by angle of VF vector γΨL, because γΨL is less sensitive than γUL to
disturbances in the line voltage, thanks to the natural low-pass behavior of the
integrators in (2.42) (because nth harmonics are reduced by a factor 1/k and the ripple
related to the high frequency transistor is strongly damped). For this reason, it is not
necessary to implement PLL’s to achieve robustness in the flux-oriented scheme, since
ΨL rotates much more smoothly than uL. The angular displacement of virtual flux vector
ΨL in α-β coordinate is defined as:
sin γ ΨL = ΨLβ / (ΨLα )2 + (ΨLβ )2 (4.13a)
cos γ ΨL = ΨLα / (ΨLα )2 + (ΨLβ )2 (4.13b)
The Virtual Flux Oriented Control (VFOC) scheme is shown in Fig. 4.4.
VFOC
Ua L ia PWM
LOAD
Ub L ib
L Udc
Uc ic
ia ib
Sa Sb Sc
Current measurement
& PW M Adaptive
virtual flux estimation Modulator
-
iLα i Lβ ΨLα Ψ Lβ
u Sα u Sβ
U dc_ref
α−β sinγ ΨL α−β

k - γ cosγ ΨL d -q
∆U dc
uSd u Sq
α−β sinγ ΨL
d-q cosγ ΨL PI
iLd iLq
PI PI
- ∆id ∆iq
-
id_ref= 0 iq_ref
Fig. 4.4 Block scheme of VFOC
The vector of virtual flux lags the voltage vector by 90o (Fig. 4.5). Therefore, for the UPF
condition, the d-component of the current vector, iL, should be zero.
55
q-axis β−axis
uL = uLq
uLβ
iLq ω
iL iLβ d-axis
ΨL
(rotating)
ϕ ΨL β
γΨL=ωt α−axis
iLα uLα ΨL α (fixed)
iLd
Fig. 4.5: Vector diagram of VFOC. Coordinate transformation of line voltage, rectifier input
voltage and line current from fixed α−β coordinates to rotating d-q coordinates.
In the virtual flux oriented coordinates voltage equations are transformed into
diLq
u Lq = L + u Sq + ω ⋅ L ⋅ i Ld (4.17)
dt
di Ld
0=L + u Sd − ω ⋅ L ⋅ i Lq (4.18)
dt
for iLd = 0 equations (4.17) and (4.18) can be described as:
diLq
u Lq = L + u Sq (4.19)
dt
0 = u Sd − ω ⋅ L ⋅ i Lq (4.20)
56
4.4 PULSE WIDTH MODULATION (PWM)
4.4.1 Introduction
Application and power converter topologies are still expanding thanks to improvements
in semiconductor technology, which offer higher voltage and current rating as well as
better switching characteristics. On the other hand, the main advantages of modern
power electronic converters such as: high efficiency, low weight and small dimensions,
fast operation and high power densities are being achieved trough the use of the so
called switch mode operation, in which power semiconductor devices are controlled in
ON/OFF fashion. This leads to different types of Pulse Width Modulation (PWM),
which is basic energy processing technique applied in power converter systems. In
modern converters, PWM is high-speed process ranging – depending on a rated power –
from a few kHz (motor control) up to several MHz (resonant converters for power
supply). Therefore, an on-line optimisation procedure is hard to be implemented
especially, for three or multi-phase converters. Development of PWM methods is,
however, still in progress [70-101].
Fig.4.7 presents three-phase voltage source PWM converter, which is the most popular
power conversion circuit used in industry. This topology can work in two modes:
! inverter - when energy, of adjusted amplitude and frequency, is converted from DC
side to AC side. This mode is used in variable speed drives and AC power supply
including uninterruptible power supply (UPS),
! rectifier - when energy of mains (50 Hz or 60Hz) is converted from AC side to DC
side. This mode has application in power supply with Unity Power Factor (UPF).
DC side PW M Converter AC side
Sa+ Sb+ Sc+

U dc /2
c
b
0 RLE N
a
U dc /2 Sa- Sb- Sc-
Energy flow :
inverter
rectifier
Fig. 4.7. Three-phase voltage source PWM converter
Basic requirements and definitions

Performance significantly depends on control methods and type of modulation.
Therefore the PWM converter, should perform some general demands like:
! wide range of linear operation, [3, 72, 74, 78, 81, 85, 89],
! minimal number of (frequency) switching to keep low switching losses in power
components, [5, 72, 74, 80, 87, 93],
! low content of higher harmonics in voltage and current, because they produce
additional losses and noise in load [5, 77],
! elimination of low frequency harmonics (in case of motors it generates torque
pulsation)
! operation in overmodulation region including square wave [75, 79, 85, 89, 96].
57
Additionally, investigations are lead with the purpose of:

! simplification because modulator is one of the most time-consuming part of control
algorithm and reducing of computations intensity at the same performance is the main
point for industry (it gives possibility to use simple and inexpensive microprocessors)
[76, 95, 101],
! reduction of common mode voltage [90],
! good dynamics [28, 93],
! reduction of acoustic noise (random modulation)[70].
Basic definition and parameters, which characterize PWM methods, are summarized in
Tab.4.1.
Tab. 4.1. Basic parameters of PWM.
lp. Name of parameter Symbol Definition Remarques
M = U1m/U1(six-step)= Two definition of modulation
1 Modulation index M =U1m/(2/π)Ud index are used. For sinusoidal
m m = Um / Um(t) modulation 0≤M≤0,785 or 0≤m≤1
Mmax 0 ... 0.907 Depends on shape of modulation
2 Max. linear range
mmax 0 ... 1.154 signal
M > M max Nonlinear range used for increase
3 Overmodulation
m > m max of output voltage
m f = f s / f1 For mf > 21 asynchronous

4 Frequency modulation ratio mf
modulation is used
fs = fT = 1 / Ts
5 Switching frequency (number) fs ( ls ) Constant
Ts – sampling time
6 Total Harmonic Distortion THD= 100% * I h / I s1 Used for voltage and current
THD
7 Current distortion factor d Ih(rms) / Ih(six-step)(rms) Independent of load parameters
8 Polarity consistency rule PCR Avoids + 1 DC voltage transition
4.4.2. Carrier Based PWM
Sinusoidal PWM
Sinusoidal modulation is based on triangular carrier signal. By comparison of common
carrier signal with three reference sinusoidal signals Ua*, Ub*, Uc* (moved in phase of
2/3π) the logical signals, which define switching instants of power transistor (Fig. 4.8)
are generated. Operation with constant carrier signal concentrate voltage harmonics
around switching frequency and multiple of switching frequency. Narrow range of
linearity is a limitation for CB-SPWM modulator because modulation index reaches
Mmax = π/4 = 0.785 (m = 1) only, e.g. amplitude of reference signal and carrier are equal.
Overmodulation region occurs above Mmax and PWM converter, which is treated like a
power amplifier, operates at nonlinear part of characteristic (see Fig. 4.21).
58
(a) (b)
*
Udc 1 0
8
U a U b
* U t
6
Ua* + Sa
0
- 2
- 4
- 6
Ub* - + Sb
- 8
*
- 1 0 U c
0 . 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4
Uc* - +
3 0 0
Sc U a N
2
1
0
0
0
- - 1 0
0
- 2 0 0
- 3 0 0
0 . 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4
UaN,UbN,UcN 3 0 0
Ut U b N
2
1
0
0
0
carrier - 1 0
0
- 2 0 0
- 3 0 0
0 . 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4
RLE U a b
6
4
0
0
0
2 0 0
- 2 0 0
- 4 0 0
N - 6 0
0
0
. 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4
Fig. 4.8. a) Block scheme of carrier based sinusoidal modulation (CB-SPWM)

(b) Basic waveforms
CB-PWM with Zero Sequence Signal (ZSS)

If neutral point on AC side of power converter N is not connected with DC side
midpoint 0 (Fig. 4.7), phase currents depend only on the voltage difference between
phases. Therefore, it is possible to insert an additional Zero Sequence Signal (ZSS) of 3-
th harmonic frequency, which does not produce phase voltage distortion UaN, UbN, UcN
and without affecting load average currents (Fig. 4.10). However, the current ripple and
other modulator parameters (e.g. extending of linear region to Mmax = π / 2 3 = 0.907,
reduction of the average switching frequency, current harmonics) are changed by the
ZSS. Added ZSS occurs between N and 0 points and is visible like a UN0 voltage and can
be observed in Ua0, Ub0, Uc0 voltages (Fig. 4.10).
Udc
Ua* + Ua** + Sa
Ub* + + Ub** -
+ Sb
Uc* + + Uc** -
+ Sc
+ -
Calculation
of UaN,UbN,UcN
ZSS Ut
carrier
RLE
Fig. 4.9. Block scheme of modulator based on additional Zero Sequence Signal (ZSS).
Fig. 4.10 presents different waveforms of additional ZSS, corresponding to different

PWM methods. It can be divided in two groups: continuous and discontinuous
modulation (DPWM) [92]. The most known of continuous modulation is method with
sinusoidal ZSS with 1/4 amplitude, it corresponds to minimum of output current
harmonics, and with 1/6 amplitude it corresponds to maximal linear range [86].
Triangular shape of ZSS with 1/4 peak corresponds to conventional (analogue) space
vector modulation with symmetrical placement of zero vectors in sampling time [83]
59
(see Section 4.4.3). Discontinuous modulation is formed by unmodulated 60o segments

(converter power switches do not switch) shifted from 0 to π/3 (different shift Ψ gives
different type of modulation Fig. 4.11). It finally gives lower (average 33%) switching
losses. Detailed description of different kind of modulation based on ZSS can be found
in [80].
U aN =U a0 U d /2 10 U aN U d /2 U aN
U d /2 10
10
U a0 5
U a0
5 5
0
0 0
U N0
U N0
U N0 -5
-5 -5
-10 -10 -10
-U d /2 -U d /2 -U d /2
0.015 0.02 0.025 0.03 0.035 0.015 0.02 0.025 0.03 0.035 0.015 0.02 0.025 0.03 0.035
sinusoidal modulation (SPWM) modulation with 3-th harmonic SVPWM

Ud/2 Ua0 Ud/2
10 Ud/2 Ua0
10
UaN 10 UaN
UaN
5
5
5
Ua0
0
0
UN0 0
UN0
UN0
-5
-5 -5
-10 -10 -10
-Ud/2
0.015 0.02 0.025 0.03 0.035 -Ud/2 0.015 0.02 0.025 0.03 0.035 -Ud/2 0.015 0.02 0.025 0.03 0.035
DPWM 1 (ψ=π/6) DPWM 3 PWM 2 (ψ=π/3)
Fig. 4.10. Variants of PWM modulation methods in dependence on shape of ZSS.
U dc/2
Ψ π/3
π
π/6
U aT
U U
UbS UR
U c
-U dc/2
ZSS
Fig. 4.11. Generation of ZSS for DPWM method.
4.4.3. Space Vector Modulation (SVM)

Basics of SVM
The SVM strategy, based on space vector representation (Fig. 4.12a) becomes very
popular due to its simplicity [97]. A three-phase two-level converter provides eight
possible switching states, made up of six active and two zero switching states. Active
vectors divide plane for six sectors, where a reference vector U* is obtained by
switching on (for proper time) two adjacent vectors. It can be seen that vector U* (Fig.
4.12a) is possible to implement by the different switch on/off sequence of U1 and U2,
and that zero vectors decrease modulation index. Allowable length of U* vector, for
each of α angle, is equal U max
∗
= U dc / 3 . Higher values of output voltage (reach six-
step mode) up to maximal modulation index (M = 1), can be obtained by an additional
60
(a) (b)
Im
U3(010) U2(110)
(t2/Ts)U2
(2/3)Udc
2f s
U4(011) U* U1(100) Sa
U0(000) α Sb
U7(111) (t1/Ts)U1 Re U * (Ts) Sc
Sector
Selection
U*max U*
t1 t2 t0 t7
U5(001) U6(101) Calculation

RLE
Fig. 4.12. (a) Space vector representation of three-phase converter, (b) Block scheme of SVM
non-linear overmodulation algorithm (see Section 4.4.5).

Contrary to CB-PWM, in the SVM there is no separate modulators for each phase.
Reference vector U* is sampled with fixed clock frequency 2fs = 1/Ts, and next U*(Ts) is
used to solve equations which describe times t1, t2, t0 and t7 (Fig. 4.12b). Microprocessor
implementation is described with the help of simple trigonometrical relationship for first
sector (4.21a and 4.21b), and, recalculated for the next sectors (n).
2 3
t1 = MT s sin( π / 3 − α ) (4.21a)
π
2 3
t2 = MT s sin α (4.21b)
π
After t1 and t2 calculation, the residual sampling time is reserved for zero vectors U0, U7
with condition t1 + t2 ≤ Ts. The equations (4.21a), (4.21b) are identical for all variants of
SVM. The only difference is in different placement of zero vectors U0(000) and U7(111).
It gives different equations defining t0 and t7 for each of method, but total duration time
of zero vectors must fulfil conditions:
t0,7 = Ts - t1 - t2 = t0 + t7 (4.22)
The neutral voltage between N and 0 points is equal: (see Tab. 4.2) [91]
1 U U U U U 1 t t (4.23)
U N0 = ( − dc t 0 − dc t1 + dc t 2 + dc t 7 ) = dc ( −t 0 − 1 + 2 + t 7 )
Ts 2 6 6 2 2 Ts 3 3
Table 4.2. Voltages between a, b, c and N, 0 for eight converter switching state
Ua0 Ub0 Uc0 UaN UbN UcN UNO
U0 -U dc /2 -U dc /2 -Udc /2 0 0 0 -Udc/2
U1 Udc/2 -Udc/2 -Udc/2 2Udc/3 -Udc/3 -Udc/3 -Udc/6
U2 Udc/2 Udc/2 -Udc/2 Udc/3 Udc/3 -2Udc/3 Udc/6
U3 -U dc /2 Udc /2 -Udc /2 -U dc /3 2Udc/3 -Udc/3 -Udc/6
U4 -Udc/2 Udc/2 Udc/2 -2Udc/3 Udc/3 Udc/3 Udc/6
U5 -Udc/2 -Udc/2 Udc/2 -Udc/3 -Udc/3 2Udc/3 -Udc/6
U6 Udc/2 -Udc/2 Udc/2 Udc/3 -2Udc/3 Udc/3 Udc/6
U7 Udc/2 Udc/2 Udc/2 0 0 0 Udc/2
61
Three-phase SVM with symmetrical placement of zero vectors (SVPWM)

The most popular SVM method is modulation with symmetrical zero states (SVPWM):
t0 = t7 = (Ts - t1 - t2)/2 (4.24)
Figure 4.13a shows gate pulses for (SVPWM) and correlation between duty time Ton, Toff
and duration of vectors t1, t2, t0, t7. For the first sector commutation delay can be
computed as:
Taon = t 0 / 2 T aoff = t 0 / 2 + t1 + t 2
Tbon = t 0 / 2 + t1 T boff = t0 / 2 + t2 (4.25)
Tcon = t 0 / 2 + t1 + t 2 T coff = t0 / 2
For conventional SVPWM times t1, t2, t0 are computed for one sector only. Commutation
delay for other sectors can be calculated with the help of matrix:
T
 sector1 sector2 sector3 sector4 sector5 sector6 
Taoff  1 1 1 1 1 1 1 1 1 1 1 11 1 1 1 1 1 0.5T0 
     t 
Tboff  = 1 0 0 1 1 0 0 1 0 0 1 10 0 1 1 0 1  1  (4.26)
Tcoff  1 1 0 0 1 0 0 1 1 0 0 11 0 1 1 0 0  t2 
 
 
Ts Ts Ts Ts Ts Ts
t0 t1 t2 t7 t7 t2 t1 t0 t1 t2 t7 t7 t2 t1 t0 t1 t2 t2 t1 t0
Sa 0 1 1 1 1 1 1 0 Sa
1 1 1 1 1 1 Sa
0 1 1 1 1 0
Sb 0 0 1 1 1 1 0 0 Sb 0 1 1 1 1 0 Sb 0 0 1 1 0 0
Sc 0 0 0 1 1 0 0 0 Sc 0 0 1 1 0 0 Sc 0 0 0 0 0 0
U0
Taon
U1 U2 U7 U7 U2 U1
Taoff
U0 U1 U2 U7 U7 U2 U1 U0 U1 U2 U2 U1 U0
Tbon Tboff
Tcon Tcoff
(a) (b)
b)
Fig. 4.13. Vectors placement in sampling time:

a) three-phase SVM (SVPWM, t0 = t7) b) two-phase SVM (DPWM, t0 = 0 and t7 = 0)
Two-phase SVM
This type of modulation proposed in [98] was developed in [72,74,88] and is called
discontinuous pulse width modulation (DPWM) for CB technique with an additional
Zero Sequence Signal (ZSS) in [80]. The idea bases on assumption that only two phases
are switched (one phase is clamped by 600 to lower or upper DC bus). It gives only one
zero state per sampling time (Fig. 4.13b). Two-phase SVM provides 33% reduction of
effective switching frequency. However, switching losses also strongly depend on a
load power factor angle (see Chapter 4.4.6). It is very important criterion, which allows
farther reduction of switching losses up to 50% [80].
Fig. 4.14a shows several different kind of two-phase SVM. It can be seen that sectors are
adequately moved on 00, 300, 600, 900, and denoted as PWM(0), PWM(1), PWM(2),
PWM(3) respectively (t0 = 0 means that one phase is clamped to one, while t7 = 0 means
that phase is clamped to zero). Fig. 4.14b presents phase voltage UaN, pole voltage Ua0
62
and voltage between neutral points UN0 for these modulations. Zero states description
for PWM(1) can be written as:
t0=0 ⇒ t7=Ts-t1-t2 when 0≤α<π/6 (4.27)

t7=0 ⇒ t0=Ts-t1-t2 when π/6≤α<π/3
Im Im Im Im
U3 (010) U2 (110) U3(010) U2(110) U3(010) U2(110) U3(010) U2(110)
PWM(0) PWM(1) PWM(2)
PWM(3)
t 0=0 t 7=0
t0=0 t7=0 t =0 t =0
7 0
t =0 t =0 t7=0 t0=0
0 7
t7=0 t 7=0 t 0=0 t0=0
t7=0 t0=0
U4 (011) U1(100) U4(011) t 0=0 U1(100) U4 (011) U1 (100) U4(011) t7=0 U1(100)
U0 (000 U0 (000) U0(000 U 0(000)
U7 (111 Re U7(111) Re U7 (111 Re U 7 (111)

t7=0 t0=0 t =0 t7=0 Re
0
t 0=0 t 0=0 t 7=0 t7=0
t =0 t7=0
0 t7=0 t0=0
t 7=0 t0=0 t7=0 t =0 t7=0 t0=0
0
(a) U5(001) U6 (101) U5(001) U6(101) U5 (001) U6(101) U5(001) U6(101)
Ud/2 Ua0 Ud/2 Ua0 Ud/2 Ud/2

10
10
10 UaN Ua0 10
UaN
UaN
5
5 5 5
Ua0
0
0 0 0
UN0
UN0
UN0
-5 -5 -5
-5
UN0 UaN
-10 -10 -10

-10
-Ud/2 -Ud/2
-Ud/2 0.015 -Ud/2 0.015
(b)
0.015 0.02 0.025 0.03 0.035 0.02 0.025 0.03 0.035 0.02 0.025 0.03 0.035
0.015 0.02 0.025 0.03 0.035
Fig. 4.14 a) Placement of zero vectors in two-phase SVM. Succession: PWM(0) = 00, PWM(1) =
300, PWM(2) = 600 and PWM(3) = 900 b) Phase voltage UaN, pole voltage Ua0 and voltage
between neutral points UN0 for each of modulation
Variants of Space Vector Modulation

From equations (4.21)-(4.23) and knowledge of UN0 (Fig. 4.14b), it is possible to
calculate duration of zero vectors t0, t7. An evaluation and properties of different
modulation method shows Table 4.3.
Table 4.3. Variants of Space Vector Modulation
Vector modulation Calculation of t0 and t7
methods Remarques
Vector modulation Ts 4 • Equivalent of classical CB-SPWM (no
with UN0 = 0 t0 = (1 − M cos α ) difference between UaN and Ub0 voltages)
2 π
t7 = Ts-t0-t1-t2 • Linear region Mmax = 0.785
Vector modulation T 4 1 • Low current distortions
t 0 = s (1 − M (cos α − cos 3α ))
with 3-th harmonic 2 π 6 • More complicated calculation of zero vectors
t7 = Ts-t0-t1-t2 • Extended linear region: M = 0.907
Three-phase SVM t0 = t7 = (Ts-t1-t2)/2 • Most often used in microprocessor technique
with symmetrical for the sake of simple zero vector calculation
zero states (SVPWM) (symmetrical in sampling time 2Ts )
• Current harmonic content almost identical like
in previous method
Two-phase SVM t0 = 0 ⇒ t7 =Ts-t1-t2 • Equivalent of DPWM methods in CB-PWM
when 0≤α<π/6 technique
• 33% switching frequency and switching losses
t7 = 0 ⇒ t0 = Ts-t1-t2 reduction
when π/6≤α<π/3 • Higher current harmonic content at low
modulation index
(for PWM(1)) • Only one zero state per sampling time, simple
calculation (Fig. 4.14)
63
The space vector modulation techniques with one zero state in sampling time may be
additionally changed for the sake of different harmonic content what is presented in
Tab.4.4 and Fig.4.15 [73].
Tab. 4.4 Different zero vector placement in PWM(0)
sector PWM(0) Different PWM(0)
1 U0-U1-U2-U2-U1-U0 U2-U1-U0-U0-U1-U2
2 U3-U2-U7-U7-U2-U3 U3-U2-U7-U7-U2-U3
3 U0-U3-U4-U4-U3-U0 U4-U3-U0-U0-U3-U4
4 U5-U4-U7-U7-U4-U5 U5-U4-U7-U7-U4-U5
5 U0-U5-U6-U6-U5-U0 U6-U5-U0-U0-U5-U6
6 U1-U6-U7-U7-U6-U1 U1-U6-U7-U7-U6-U1
a)
Ts Ts
U0 U1 U2 U2 U1 U0 U2 U1 U0 U0 U1 U2
0 1 1 1 1 0 1 1 0 0 1 1
0 0 1 1 0 0 1 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0
b)
Fig. 4.15 Different PWM(0) methods presented above

a) vectors placement b) voltage harmonic content.
4.4.4 Carrier Based PWM Versus Space Vector PWM

Comparison of CB-PWM methods with additional ZSS to SVM is shown on Fig. 4.16.
Upper part shows pulse generation through comparison of reference signal Ua**, Ub**,
Uc** with triangular carrier signal. Lower part of figure shows gate pulses generation in
SVM (obtained by calculation of duration time of active vectors U1 , U2 and zero vectors
U0, U7). It is visible that both methods generate identical gate pulses. Also it can be
observed from Fig. 4.14 and Fig. 4.16 that the degree of freedom represented in
selection of ZSS waveform in CB-PWM, corresponds to different placement of zero
vectors U0(000) and U7(111) in sampling time Ts = 1/2fs of the SVM. Therefore, there is
no exist difference between CB-PWM and SVM (CB-DPWM1 = PWM(1)-SVM). The
difference is only in the treatment of the three-phase quantities: CB-PWM operates in
terms of three natural components, whereas SVM uses artificial (mathematically
transformed) vector representation.
64
(a) (b)
10
10
5 5
0 0
-5 -5
-10 -10
0.02 0.022 0.024 0.026 0.028 0.03 0.032 0.034 0.036 0. 038 0.04 0.02 0.022 0.024 0.026 0.028 0.03 0.032 0.034 0.036 0.038 0.04
1 2
1 0
6
1 2
4
1 0
8 2
6 0
0 . 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4
0
1 2
0 . 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4
1 0
8
1 2
1 0 6
8 4
6
2
4
0
0 . 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4
2
0 . 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4
1 2 1 2
1 0
1 0
8
8
6
6
4
4
0 . 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4 0
0 . 0 2 0 . 0 2 2 0 . 0 2 4 0 . 0 2 6 0 . 0 2 8 0 . 0 3 0 . 0 3 2 0 . 0 3 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4
Tcarrier T carr Tcarrier

T c a rr
Ts Ts Ua ** Ts Ts
CB-PWM switching
CB-PWM switching
1 2
1 2
1 0
8 1 0
U a ** 6
Ub ** 8
pattern
4
6
pattern
2
4
0
2
0 . 0 2 6 0 . 0 2 6 1 0 . 0 2 6 2 0 . 0 2 6 3 0 . 0 2 6 4 0 . 0 2 6 5 0 . 0 2 6 6 0 . 0 2 6 7 0 . 0 2 6 8
0 . 0 2 6 0 . 0 2 6 1 0 . 0 2 6 2 0 . 0 2 6 3 0 . 0 2 6 4 0 . 0 2 6 5 0 . 0 2 6 6 0 . 0 2 6 7 0 . 0 2 6 8
U b ** Uc **
1 2
1 0
1 2
8
2
ca rrie r
1 0
6
ca rrie r
0
0 . 0 2 6 0 . 0 2 6 1 0 . 0 2 6 2 0 . 0 2 6 3 0 . 0 2 6 4 0 . 0 2 6 5 0 . 0 2 6 6 0 . 0 2 6 7 0 . 0 2 6 8 4
U c ** 1 2
2
0
0 . 0 2 6 0 . 0 2 6 1 0 . 0 2 6 2 0 . 0 2 6 3 0 . 0 2 6 4 0 . 0 2 6 5 0 . 0 2 6 6 0 . 0 2 6 7 0 . 0 2 6 8
1 0
6
1 2
4
1 0
0 . 0 2 6 0 . 0 2 6 1 0 . 0 2 6 2 0 . 0 2 6 3 0 . 0 2 6 4 0 . 0 2 6 5 0 . 0 2 6 6 0 . 0 2 6 7 0 . 0 2 6 8
6
1 1 1 1 1 1
2
a 0 1 1 1 1 1 1 0 a 0
0 . 0 2 6 0 . 0 2 6 1 0 . 0 2 6 2 0 . 0 2 6 3 0 . 0 2 6 4 0 . 0 2 6 5 0 . 0 2 6 6 0 . 0 2 6 7 0 . 0 2 6 8
SV-PWM pattern
SV-PWM pattern
b 0 0 1 1 1 1 0 0 b 0 1 1 1 1 0
c 0 0 0 1 1 0 0 0 c 0 0 1 1 0 0
U0 U1 U2 U7 U7 U2 U1 U0 U1 U2 U7 U7 U2 U1
Ts Ts Ts Ts
t 0 t 1 t 2 t 7 t 7 t 2 t 1 t 0 t 1 t 2 t7 t7 t 2 t 1
Fig. 4.16. Comparison of CB-PWM with SVM a) SVPWM b) DPWM

From the top: CB-PWM with pulses, short segment of reference signal at high carrier frequency
(reference signals are straight lines), formation of pulses in SVM.
4.4.5 Overmodulation
Modulation is a basic techniques in power electronics, therefore for full description of
this topic is necessary to presents also overmodulation. This part of modulation is not so
important for PWM rectifier in the sake of higher harmonic contents in current but it is
possible to find some application with similar mode [119].
Many approaches have been reported in the literature to increase the range of the PWM
voltage source inverter [75,79,85,89]. Some of them are proposed as extensions of the
Sinusoidal PWM (SPWM), and others as extensions of the Space Vector PWM
(SVPWM). In CB-PWM by increasing the reference voltage beyond the amplitude of the
triangular carrier signal, some switching cycles are skipped and the voltage of each
phase remains clamped to one of the dc bus. This range shows a high non-linearity
between reference and output voltage amplitude and requires infinite amplitude of
reference in order to reach a six-step output voltage.
In SVM allowable length of reference vector U* which provide linear modulation is
equal U max
∗
= U dc / 3 (circle inscribed in hexagon M = 0.906) (Fig. 4.17). To obtain
higher values of output voltage (reach six-step mode) up to maximal modulation index
M = 1, an additional non-linear overmodulation algorithm has to be apply. This is
because minimal pulse width becomes shorter than critical (mainly dependent on power
switches characteristic – usually few µs) or even negative. Zero vectors are never used
in this type of modulation.
65
Im
U 3 (010) U2 (110)
Overmodulation
region
(2/3)Udc
(t 2 /Ts )U2
U*
U4 (011) U 0(000) α U1(100)
(t 1/T s )U1
U 7(111)
Re
dc
M= /π)U
(2
1
ma =
x
U
U 5 (001) U 6 (101)
Fig. 4.17 Overmodulation region in space vector representation
Algorithm Based on Two Modes of Operation

Two overmodulation regions are considered (Fig. 4.18). In region I the magnitude of
reference voltage is modified in order to keep space vector within the hexagon. It
defines the maximum amplitude that can be reached for each angle. This mode extends
the range of the modulation index up to 0.95. Mode II starts from M = 0.95 and reach
six step mode M = 1. Mode II defines both the magnitude and the angle of the reference
voltage. To implement both modes a lookup table or neural network [96] based
approach can be applied.
Im
U 2 (110)
Region I
Region II
U1 (100)
Re
Fig. 4.18 Subdivision of the overmodulation region
Overmodulation mode I: distorted continuous reference signal

In this range, the magnitude of the reference vector is changed while the angle is
transmitted without any changes (αp = α). However, when the original reference
trajectory passes outside the hexagon, the time average equation gives an unrealistic on
duration for the zero vectors. Therefore, to compensate reduced fundamental voltage,
i.e. to track with the reference voltage U*, a modified reference voltage trajectory U is
selected (Fig. 4.19a). The reduced fundamental components in region where reference
trajectory surpass hexagon is compensated by a higher value in corner (equal areas in
one sector - see Fig. 4.19a) [85].
66
a) b)
Im Im
U 2(110) U 2(110)
U
U* αh U*
U1(100) αp α αh U1 (100)
Re Re
Fig. 4.19 Overmodulation: (a) mode I (0.907 < M < 0.952), (b) mode II (0.952 < M < 1)
U* - reference trajectory (dashed line), U – modified reference trajectory (solid line)
The on time durations for region where modified reference trajectory is moved along
hexagon are calculated as:
3 cos α − sin α
t1 = TS (4.28 a)
3 cos α + sin α
t 2 = TS − t1 (4.28 b)
t0 = 0 (4.28 c)
Overmodulation mode II: distorted discontinuous reference signal.

The operation in this region is illustrated in Fig. 4.19b. The trajectory changes gradually
from a continuous hexagon to the six-step operation. To achieve control in
overmodulation mode II, both the reference magnitude and reference angle (from α to
αp) are changed:
 0 0 ≤α ≤ αh
 α − α π
αp =  h
α h ≤ α ≤ π / 3 −α h (4.29)
 π / 6 − α 6
 π / 3
h
π / 3 −α h ≤ α ≤ π / 3
The modified vector is held at a vertex of the hexagon for holding angle αh over
particular time and then partly tracking the hexagon sides in every sector for the rest of
the switching period. The holding angle αh controls the time interval when active
switching state remains at the vertices, which uniquely controls the fundamental
voltage. It is a nonlinear function of the modulation index, which can be piecewise
linearized as [89]:
α h = 6.4 ⋅ M − 6.09 (0.95< M < 0.98)

α h = 11.75 ⋅ M − 11.34 (0.98< M < 0.9975) (4.30)
α h = 48.96 ⋅ M − 48.43 (0.9975< M < 1.0)
The six-step mode is characterized by selection of the switching vector, which is closest
to the reference vector for one-sixth of the fundamental period. In this way the
modulator generates the maximum possible converter voltage. For a given switching
67
frequency, the current distortion increases with the modulation index. The distortion
factor strongly increases when the reference waveform becomes discontinuous in the
mode II.
Algorithm Based on Single Mode of Operation

In a simple technique proposed in [75], the desired voltage angle is held constant when
the reference voltage vector is located outside of hexagon. The value, at which the
command angle is held, is determined by the intersection of the circle (respond with
modulation index) with the hexagon (Fig. 4.20). The angle at which the command is
held (hold angles) depends on the desired modulation index (M) and can be found from
Eq. (4.31) (max circular trajectory is related to the maximum possible fundamental
output voltage 2/πUdc not to 2/3Udc – see Fig. 4.17):
 3 
α 1 = arcsin  
 (4.31a)
 2M ' 
 2 3 −3  3 −π 
M ' =   M +   (4.31b)

 2 3 −π   2 3 −π 
π
α2 = − α1 (4.31c)
3
Im
U 2 (110)
U*
α2=π/3−α1
π/6 U1(100)
α1
Re
Fig. 4.20 Overmodulation: single mode of operation

U* - reference trajectory (dashed line), U – modified reference trajectory (solid line)
For a desired angle between 0 and α1, the commanded angle tracks its value. When the
desired angle increases over α1, the commanded angle stays at α1 until the desired angle
becomes π/6. After that, the commanded angle jumps to value of α2 = π/3-α1. The
commanded value of α is kept constant at α2 for any desired angle between π/6 and α2.
For a desired angle between α2 and π/3, the commanded angle tracks the value of
desired angle, as in Fig. 4.20. The advantage of linearity and easy implementation is
obtained on the cost of higher harmonic distortion.
68
4.4.6 Performance criteria

Several performance criteria are considered for selection of suitable modulation method
[3]. Some of them are defined in the Table 4.1. Below further important criteria as:
range of linear operation, current distortion factor and switching losses are discussed.
Range of linear operation

The linear range of the control characteristic for sinusoidal CB-PWM ends at M = π/4 =
0.785 (m = 1) of modulation index (Fig. 4.21) i.e. to equal of reference and carrier peak.
The SVM or CB-PWM with ZSS injection provide extension of linear range up to Mmax =
π / 2 3 = 0.907 (mmax = 1.15). The region above M = 0.907 is the non-linear
overmodulation range.
b)
Ua b (rm s)
Udc
w ith Z S S
0 .7 8
0 .7 0 3
0 .6 1 2
S -P W M 1 -lin e a r ra n g e
2 -o ve rm o d u la tio n
3 -six ste p m o d e
1 2 3
m
1 1 .1 5 3 .2 4
2
M
0 .7 8 5 0 .9 0 7 1 .0
Fig. 4.21 Control characteristic of PWM converter
Switching losses
Power losses of the PWM converter can be generally divided into: conduction and
switching losses (see in [87]). Conduction losses are practically the same for different
PWM techniques and they are lower than switching losses. For the switching losses
calculation, the linear dependency of a switching energy loss on the switched current is
assumed. This also was proved by the measurement results [87]. Therefore, for high
switching frequency, the total average value of the transistor switching power losses can
be for the continuous PWM expressed as:
π
+ϕ
2
1 kTD If s
Psl ( c ) =
2π π
∫k TD ⋅i ⋅ f s dα =
π
(4.32)
− +ϕ
2
where: kTD= kT+kD - proportional relation of the switching energy loss per pulse period
to the switched current for the transistor and the diode.
69
In the case of discontinuous PWM the following properties hold from the symmetry of
the pole voltage:
Psl (−ϕ ) = Psl (ϕ )
Psl (ϕ ) = Psl (π − ϕ ) where 0<ϕ<π. (4.33)
Therefore, it is sufficient to consider the range of from 0 to π/2 for the DPWM as
follows [87]:
 1
 Psl ( c ) ⋅ (1 − 2 cos ϕ ) for 0 < ϕ < π / 3
PWM (1) ⇒ Psl (ϕ ) =  (4.34)
 Psl ( c ) ⋅ 3 sin ϕ
 ) for π / 3 < ϕ < π / 2
2
π
PWM (0) ⇒ Psl (ϕ ) = Psl ( PWM (1)) ⋅ (ϕ − ) (4.35)
6
π
PWM (2) ⇒ Psl (ϕ ) = Psl ( PWM (1)) ⋅ (ϕ + ) (4.36)
6
 3 −1
 Psl(c) ⋅ (1 − cosϕ) for 0 < ϕ < π / 6
 2
 sinϕ + cosϕ
PWM(3) ⇒ Psl (ϕ) =  Psl(c) ⋅ forπ / 6 < ϕ < π / 3 (4.37)
 2
P ⋅ (1 − 3 −1 sinϕ) forπ / 3 < ϕ < π / 2
 sl(c) 2
Switching losses depends on type of discontinuous modulation and power factor angle
what is shown in Fig. 4.22 (comparison to continuous modulation). Since the switching
losses increase with the magnitude of the phase current (approximately linearly),
selecting a suitable modulation can significantly improve performance of the converter.
Switching losses are average reduced about 33%. In favour conditions, when
modulation is clamped in phase conducting max. current, switching losses decrease up
to 50%.
0.9
Switching losses (x100%)
0.85
PW M(1)
0.8
PW M(3)
0.75
0.7
0.65
0.6
0.55
PW M(0) PW M(2)
0.5
-150 -100 -50 0 50 100 150
Power factor angle
Fig. 4.22. Switching losses (Psl(φ)/Psl(c)) versus power factor angle
70
Distortion and Harmonic Copper Loss Factor

The current waveform quality of the PWM converter is determined by harmonics of
switching frequency what have influence for copper losses and the instantaneous power
ripple. Harmonics are changed according to the selected switching sequence. Detailed
description is presented in [84, 98]. The rms harmonic current defined as:
T
1
I h ( rms ) =
T0∫ [iL (t ) − iL1 (t )]2 dt , (4.38)
depends on type of PWM and AC side impedance. To eliminate influence of AC side

impedance parameters, the distortion factor is commonly used (see Table 4.1):
d = Ih(rms) / Ih(six-step)(rms) (4.39)
For six-step operation the distortion factor is d = 1. It should be noted that harmonic
copper losses in the AC-side are proportional to d2. Therefore, d2 can be considered as a
loss factor. Values of loss factor can be compute for different modulation methods
[3,87]. It depends on switching frequency, modulation index M, and shape of the ZSS
(Fig. 4.23):
- for continuous modulation:
4M 32M 3M 2  π
SPWM d= 1− + M ∈ 0,  (4.40)
6πk f SB 3π 2
π  4
4M 32M 9M 2  3 3   π 
SVPWM d = 1− + 1− M ∈ 0,  (4.41)
6πk f SB 3π 2
2π  4π   2 3
- for discontinuous modulation (DPWM):
(8+15 3) + 92Mπ 2 + 2π3   π 

2
4M 4M
DPWM1 d = 4− M ∈0,  (4.42)
6πk fSB 3π 2
   2 3
4M 140M 9M 2  3 3   π 
DPWM0(2) d = 4− + 2 +  M ∈0,  (4.43)
6πk f SB 3π 2 2π  4π   2 3
(62−15 3) + 92Mπ 2+ π3  π 

2
4M 4M
DPWM3 d = 4− M ∈0,  (4.44)
6πk fSB 3π 2
   2 3
where k f SB is defined as a ratio of carrier frequency (sampling time) to base of carrier

frequency. All continuous PWM have the advantage over DPWM methods for the sake
of small distortion factor in the low range of modulation. When the modulation index
increases and the PWM performance rapidly decreases, the SVPWM maintain at lowest
distortion factor. The harmonic content for SVPWM and DPWM at the same carrier
frequency is similar at high modulation index only (Fig. 4.23). However, we should
remember that DPWM possess lower switching losses. Therefore, the carrier frequency
can be increased by factor 3/2 for 33% reduction of switching losses, or 2 times
increased for 50% reduction of switching losses. It provides to lower current distortion
for DPWM in comparison to SVPWM.
71
0.08
0.07
0.06
0.05
2
d 0.04
S-PWM (fSB)
D-PWM1 (fSB)
D-PWM0(2) and (fSB)
D-PWM3 (fSB)
SV-PWM (fSB)
0.03
0.02 D-PWM1 (1.5fSB)
0.01 D-PWM1 (2fSB)
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
M
Fig. 4.23. Square of current distortion factor as function of modulation index.
4.4.7 Adaptive Space Vector Modulation (ASVM)
The concept of adaptive space vector modulation (ASVM) proposed by Author [93,
Patent No. P340113] provides:
! full control range including overmodulation and six-step operation,
! theoretically, up to 50% reduction of switching losses at 33% reduction of average
switching frequency,
! high dynamics.
The above features are achieved by use of four different modes of SVM with an
instantaneous tracking of the AC current peak and an optimal switching table for fast
response to step changes of the load. Four PWM operation modes are distributed in the
range of modulation index (M) as follows (Fig. 4.24a):
A: 0 < M < 0.5 – conventional SVM with symmetrical zero switching states,
B: 0.5 < M < 0.908 – discontinuous SVM with one zero state per sampling time (two-
phase or flap top PWM),
C: 0.908 < M < 0.95 – overmodulation mode I, (see Section 4.4.6)
D: 0.95 < M < 1 – overmodulation mode II.
The combination of regions A with B without current tracing, suggested in [72,80] is
known as hybrid PWM. In the region B of discontinuous PWM, for maximal reduction
of switching losses, the peak of the current should be located in the centre of “flat”
parts. Therefore, it is necessary to observe the peak current position. Components iLα, iLβ
of the measured current are transformed into polar coordinates and compared with
voltage reference angle (Eq. (4.45)). It gives possibility to identify power factor angle ϕ,
which decide about placement of clamped region. Thus, the ring from Fig. 24b will be
adequately moved (ϕ). For each of sector:
72
if α < ϕ + κ ⇒ t0 = 0 (4.45)
if α > ϕ + κ ⇒ t7 = 0
where: α - reference voltage angle, ϕ – power factor angle, κ - for successive sectors
π/6, π/2, 5π/6, 7π/6, 3π/2, 11π/6
This provides tracking of the power factor angle in full range of ϕ (from -π to π), what
guarantees maximal reduction of switching losses (Fig. 4.25)
(a) (b)
Im
U3(010) U2(110)
(2/3)Udc
(t2/Ts)U2
U*
U4(011) U0(000) α U1(100)
(t1/T s)U 1
U7(111)
Re
U*max
SVPWM
DPWM
OVPWM
U5(001) U6(101)
Fig. 4.24. Adaptive modulator

a) effect of modulation index b) effect of power factor angle
SVPWM
Switching losses (x100 %)
0.9
0.8
0.7
0.6 ASVM
0.5
-150 -100 -50 0 50 100 150
Power factor angle
Fig. 4.25. Switching losses versus power factor angle for conventional SVPWM and ASVM
The dynamic state is identified after step change of load what results that switching
table is used. After returning to steady state the ASVM operates like a conventional
SVM. The full algorithm of adaptive modulator is presented in Fig. 4.26. Fig. 4.27
shows an example of implementation in a current regulator. Adaptive modulation with
simplified switching time calculation is described in A.3.
73
ULα ULβ
iLα iLβ iα_ref iβ_ref
USα USβ
αβ αβ αβ αβ
Μα lδ kγ nφ
M α
+ - - +
SVPWM α ϕ
dynamics
a
state
b
if (5.45) if
switching
table
steady
c-d a) M<0.5
state
OVPWM b) 0.5<M<0.908 SVM

c-d) M>0.908
Fig. 4.26. Algorithm of ASVM
dq iβ_ref
iα_ref
αβ
Coordinate UDC
Current transformation
id_ref + regulator ULα S
PI dq PWM Sa
b
- U adaptive Sc
+ Lβ
PI αβ modulator
i q_ref - sin γL
cos γL ia
iLd iLα
dq αβ
ib
i Lq iLβ ic
αβ
ABC
RLE
Fig. 4.27: ASVM in PI synchronous current controller.
74
4.4.8 Simulation and experimental results of modulation
Simulation of CB-PWM with additional ZSS was realized in SIMULINK [A.5]. Fig. 4.28
presents results of: sinusoidal modulation (SPWM), modulation with 3-th harmonic
(amplitude 1/6), analogue SVPWM and DPWM1.
Simulations of SVM are made in the DESIM. Selected results which illustrate work of
modulators with UN0 = 0, 3-th harmonic, three-phase modulation SVPWM and two-
phase modulation with one zero states in sampling time are shown on Fig. 4.29-4.30.
Discussed method of SVM was implemented on the laboratory setup described in A.6.
Investigation was done with 100µs sampling time and dead-time compensation
algorithm [A.3]. Experimental results for different variants of SVM are shown in Fig.
4.29-4.30. Results presents that higher harmonic ripple at low modulation index is one
disadvantage of DPWM compared to SVPWM. This drawback can be neglected for
PWM rectifier, because under normal conditions the PWM rectifier operates, at high
linear modulation index. Much more important is that DPWM provides lower switching
losses in the converter.
ASVM is an universal solution for different kind of PWM converters, therefore
investigation was carried-out both for PWM rectifier using Voltage Oriented Control
(VOC) [44] and PWM inverter using Indirect Field Oriented Control (IFOC) [4].
Experimental results of ASVM are presented in Fig. 4.31-4.32. Fig. 4.33 presents
comparison of phase currents at step change of load.
Moreover, it was found that ASVM in Cartesian coordinates is three-times less time-
consuming than its counterpart in polar coordinates [A.3].
75
MODULATION WITH ADDITIONAL ZSS (SIMULATION)
(a) (c)
20 20
U Sab USab
15 15
U Sa0
U Sa0 Ia
10 10
5 5 Ia
0 0
-5 -5
-10 -10
-15 -15
-20 -20
0.036 0.038 0.04 0.042 0.0 44 0.046 0.048 0.05 0.052 0.054 0.036 0.038 0.04 0.042 0.044 0.046 0.048 0.05 0.052 0.054
1 1
1 0
1 1
9
1 0
8
9
Sa
7
8
6
Sa
7
5
6
4
5
3
4
2
3
1
2
0
1
0 . 0 3 6 0 . 0 3 8 0 . 0 4 0 . 0 4 2 0 . 0 4 4 0 . 0 4 6 0 . 0 4 8 0 . 0 5 0 . 0 5 2 0 . 0 5 4
0
0 . 0 3 6 0 . 0 3 8 0 . 0 4 0 . 0 4 2 0 . 0 4 4 0 . 0 4 6 0 . 0 4 8 0 . 0 5 0 . 0 5 2 0 . 0 5 4
3
2
ZSS
2
ZSS
1
0
0
- 1
- 1
- 2
- 2
- 3
- 3
0 . 0 3 6 0 . 0 3 8 0 . 0 4 0 . 0 4 2 0 . 0 4 4 0 . 0 4 6 0 . 0 4 8 0 . 0 5 0 . 0 5 2 0 . 0 5 4 0 . 0 3 6 0 . 0 3 8 0 . 0 4 0 . 0 4 2 0 . 0 4 4 0 . 0 4 6 0 . 0 4 8 0 . 0 5 0 . 0 5 2 0 . 0 5 4
(b) (d)
20 20
U Sab
UU
15 U S a0 15 URN
U
Sa0
Sab
RS
10 10
Ia
5
IRIa
5
0 0
-5 -5
-10 -1 0
-15 -1 5
-20 -2 0
0.0 36 0.0 38 0 .04 0 .042 0 .044 0.046 0.048 0.05 0.052 0.054 0 . 04 0 .0 4 2 0 . 04 4 0. 0 46 0 .0 48 0. 0 5 0 .05 2 0 . 05 4 0 .0 5 6 0 .0 5 8
1 1
1 0
8
1 1
Sa
7
1 0
6
9
5
8
4
7
3
6
2
5
1
4
0
3
0 . 0 3 6 0 . 0 3 8 0 . 0 4 0 . 0 4 2 0 . 0 4 4 0 . 0 4 6 0 . 0 4 8 0 . 0 5 0 . 0 5 2 0 . 0 5 4
2
0 . 0 4 0 . 0 4 2 0 . 0 4 4 0 . 0 4 6 0 . 0 4 8 0 . 0 5 0 . 0 5 2 0 . 0 5 4 0 . 0 5 6 0 . 0 5 8
3
2
ZSS
1
1
0
- 1
- 1
- 2
- 2
- 3
- 3
0 . 0 3 6 0 . 0 3 8 0 . 0 4 0 . 0 4 2 0 . 0 4 4 0 . 0 4 6 0 . 0 4 8 0 . 0 5 0 . 0 5 2 0 . 0 5 4
0 . 0 4 0 . 0 4 2 0 . 0 4 4 0 . 0 4 6 0 . 0 4 8 0 . 0 5 0 . 0 5 2 0 . 0 5 4 0 . 0 5 6 0 . 0 5 8
Fig. 4.28. Simulation results for CB-PWM with additional ZSS (Fig. 4.9): a) SPWM b) with 3-th
harmonic c) analogue SVPWM d) DPWM1. Each of cases presents : uSab, - filtered line to line
voltage of converter, uSa0 – filtered pole voltage, ia - phase current, pulses Sa and ZSS; (m=0.95)
76
SPACE VECTOR MODULATION
Simulation results Experimental results
a)
b)
Fig. 4.29. Simulation and experimental results for various SVM (Fig. 4.12b):
a) with UN0 = 0 (SPWM) b) with 3-th harmonic.
Each of cases presents: pulses Sa, phase current ia, phase voltage uSaN
and pole voltage uSa0 (estimated from Udc and switching state).
77
Simulation results Experimental results
c)
d)
Fig. 4.30. Simulation and experimental results for various SVM (Fig. 4.12):
c) three-phase SVM with symmetrical zero states (SVPWM) d) two-phase SVM (PWM(1)).
Each of cases presents: pulses Sa, phase current ia, phase voltage uSaN
and pole voltage uSa0 (estimated from Udc and switching state).
78
ADAPTIVE SPACE VECTOR MODULATION (ASVM)

(A) (B)
Fig. 4.31. Experimental waveforms of VS converter with adaptive modulation

(A) transition from three to two – phase SVM,
(B) transition from overmodulation to six–step operation.
From the top: phase voltage uSaN and pole voltage uSa0
(estimated from Udc and switching state), current ia, pulses Sa.
(A) (B)
Fig. 4.32. Experimental waveforms of (A) VS converter with adaptive modulation for two -
phase SVM – peak current tracing during load change, (B) VS line rectifier with adaptive
modulation: two–phase SVM – peak current tracing during reactive power change.
From the top: phase voltage uSaN and pole voltage uSa0
(estimated from Udc and switching state), current ia, pulses Sa.
79
(A) (B)
Fig. 4.33: Simulation results of phase current response at 100% step change
of load for PWM rectifier with A) SVPWM B) ASVM
4.4.9 Summary of modulation
This chapter has shown many of the PWM techniques developed during recent
years. Most important conclusions can be summarized as below:
! parameters of PWM converter (linear range of operation, current harmonic and
switching losses in power components) depends on:
• zero vectors placement in SVM,
• shape of zero sequence signal (ZSS) in CB-PWM.
! there is no one method of PWM, which provide minimal current distortion in
whole range of control (Fig. 4.23),
! three-phase SVM with symmetrical zero states (SVPWM) should be used in low
range of modulation index, two-phase SVM with one zero state in sampling
time (DPWM) should be used in high range of modulation index,
! maximal reduction of switching losses in DPWM is achieved when the peak of
the line current is located in the centre of clamped (not switching) region (Fig.
4.22),
! SVPWM and DPWM should be applied for industrial applications, because both
methods have low time-consuming algorithms and high linearity,
! Adaptive Space Vector Modulation (ASVM) is a universal solution for three-
phase PWM converter, among its main features are: full control range
including overmodulation and six-step operation, tracking of peak current for
instantaneous selection of two-phase PWM (this guarantees maximal reduction
of switching losses up to 50%), higher efficiency of the converter and high
dynamics by switching table application,
! ASVM with simplified switching time calculation provide low time consuming
algorithm based on implementation in Cartesian coordinates, it gives three
times less time consuming algorithm than it’s counterpart in polar coordinates.
80
4.5 SIMULATION AND EXPERIMENTAL RESULTS

The main parameters of the system under consideration are summarized in Table A.4.1
and Table A.6.2. The research has been carried out for two cases:
! ideal line voltage (balanced and sinusoidal),
! distorted line voltage with 5% 5th harmonics and 4.5% unbalance [see A.1].
A PWM rectifier with the presented control schemes has been simulated using SABER
[A4]. The simulated waveforms for VOC with SVPWM and VOC with DPWM under
purely sinusoidal line voltage are presented in Fig. 4.34 and Fig. 4.35 respectively. The
switching and sampling frequency is 5kHz for VOC-SVPWM. The current has only a
total harmonic distortion (THD) of 4.5 %, and the estimated line voltage is very close to
the real supply voltage. The simulation results for the VOC with DPWM presents that
the current THD is only 2.6 %. The difference to the classical control with SVPWM is
mainly because of a higher sampling and switching frequency. In DPWM the switching
frequency can be twice as high with the same switching losses what can reduce the size
of the input filter. A more practical advantages for the industry is shown by [99].
Therefore the simulations are made with a sampling frequency of 10 kHz. The estimated
line voltage is very close to the real supply voltage.
Fig. 4.36 shows the simulation results for the VOC with SVPWM where the supply
voltage is pre-distorted and unbalanced. The THD of the line current is 11.8% because
of a high content of 5th harmonic current. The estimated line voltage is still very close to
the real supply voltage and the current follows the voltage very well. Fig. 4.37 shows
the simulation results for the classical control with DPWM where the supply voltage is
pre-distorted and unbalanced. The THD of the line current is 10.1%. The estimated line
voltage is still very close to the real supply voltage and the current follows the voltage
well. These oscillograms are obtained for the same operation conditions. Note, that the
estimated line voltage follows the actual line voltage very close for both under pre-
distorted and unbalanced conditions as well as under ideal conditions. There is a small
time delay of one sample because the old value of the rectifier voltage reference is
added to the estimated voltage drop across the inductance. In classical control the
voltage is not as important as the angle γL between the fixed reference frame and the
rotating reference frame. The angle γL can be feed-forward compensated by adding ∆γL.
∆γL can be calculated as a function of the line frequency and the sampling frequency.
The experimental results for the conventional VOC strategy and no AC-line voltage
sensors with SVPWM and DPWM modulation techniques were realized on laboratory
setup presented in A.7 and they are presented in Fig. 4.34-Fig. 4.37. The simulation and
experimental results for the VFOC and no AC-line voltage sensors with SVPWM are
presented in Fig. 4.38. The current has only 4.5% of THD at purely sinusoidal voltage
(similarly to VOC). For non-sinusoidal line voltage the THD of current for VFOC is
lower than VOC.
The current total harmonic distortion factor (THD) together with the different operating
conditions for the two control schemes are summarized in Table 5.1.
Transient of the step change of the load for VOC are presented in Fig. 4.39 (current
controllers without decoupling) and Fig. 4.40 (current controllers with decoupling).
Results show that decoupled control system of PWM rectifier possess better
performance.
81
STEADY STATE BEHAVIOUR

! RESULTS UNDER PURELY SINUSOIDAL LINE VOLTAGE OF VOC
(a) SIMULATION (b) EXPERIMENT

4 0 0
2 0 0
-2 0 0
-4 0 0
0 2 4 6 8 1 0 1 2 1 4 1 6 1 8
-3
x 1 0
4 0 0
2 0 0
-2 0 0
-4 0 0
2 6 0 2 8 0 3 0 0 3 2 0 3 4 0 3 6 0
1 0
- 5
- 1 0
0 2 4 6 8 1 0 1 2 1 4 1 6 1 8
- 3
x 1 0
1 0
0
0 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0
Fig. 4.34: Line voltage, estimated line voltage and input current, together with the harmonic
spectrum of the input current for the VOC with SVPWM: a) simulation results
(the current THD = 4,5 %); b) experimental results (the current THD = 6,1 %).
(a) (b)
4 0 0
2 0 0
-2 0 0
-4 0 0
0 2 4 6 8 1 0 1 2 1 4 1 6 1 8
-3
x 1 0
4 0 0
2 0 0
-2 0 0
-4 0 0
3 0 0 3 2 0 3 4 0 3 6 0 3 8 0 4 0 0 4 2 0 4 4 0 4 6 0 4 8 0
1 0
- 5
- 1 0
0 2 4 6 8 1 0 1 2 1 4 1 6 1 8
- 3
x 1 0
1 0
0
0 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0
spectrum of the input current for the VOC with DPWM: a) simulation results
(the current THD = 2,6 %.); b) experimental results (the current THD = 3,1 %).
82
! RESULTS UNDER NON SINUSOIDAL LINE VOLTAGE OF VOC
(a) SIMULATION (b) EXPERIMENT

4 0 0
2 0 0
- 2 0 0
- 4 0 0
0 2 4 6 8 1 0 1 2 1 4 1 6 1 8
- 3
x 1 0
4 0 0
2 0 0
-2 0 0
-4 0 0
3 0 0 3 2 0 3 4 0 3 6 0 3 8 0 4 0 0
1 0
- 5
- 1 0
0 2 4 6 8 1 0 1 2 1 4 1 6 1 8
- 3
x 1 0
1 0
0
0 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0
spectrum of the input current for the VOC with SVPWM and 4.5% voltage unbalance and 5% 5th
harmonic voltage: a) simulation results (the current THD = 9,2 %); b) experimental results
(the current THD = 11,8 %).
(a) (b)
4 0 0
2 0 0
- 2 0 0
- 4 0 0
0 2 4 6 8 1 0 1 2 1 4 1 6 1 8
- 3
x 1 0
4 0 0
2 0 0
- 2 0 0
- 4 0 0
2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 1 6 0 1 8 0 2 0 0
1 0
- 5
- 1 0
0 2 4 6 8 1 0 1 2 1 4 1 6 1 8
- 3
x 1 0
1 0
0
0 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0
spectrum of the input current for the VOC with DPWM and 4.5% voltage unbalance and 5% 5th
harmonic voltage: a) simulation results (the current THD = 7.1 %); b) experimental results
(the current THD = 10.1 %).
83
! RESULTS UNDER PURELY SINUSOIDAL AND NON SINUSOIDAL LINE

VOLTAGE OF VFOC
SIMULATION
(a) (b)
EXPERIMENT
(c)
Fig. 4.38: Line voltage, estimated virtual flux and input current, together with the harmonic
spectrum of the input current for the VFOC with SVPWM: a) simulation results for purely
sinusoidal line voltage (the current THD = 4,5%); b) simulation results for 4.5% voltage
unbalance and 5% 5th harmonic voltage (the current THD = 8,7 %);
c) experimental results (the current THD = 10,5 %).
84
DYNAMIC BEHAVIOUR
Fig. 4.39. Transient of the step change of the load for VOC (current controllers without
decoupling). From the top: line voltage, line currents, iLd and iLq currents.
Fig. 4.40. Transient of the step change of the load for VOC (current controllers with
decoupling). From the top: line voltage, line currents, iLd and iLq currents.
85
4.6 SUMMARY
It is shown by simulations and experimental results that line voltage estimators

perform very well even under unbalanced and pre-distorted conditions.
Furthermore, the current follows the voltage fairly well with VOC control
strategies what provide high value of total power factor. However, sometimes
sinusoidal currents are desired even under unbalanced and pre-distorted conditions
because sinusoidal current do not produce non-sinusoidal voltage drops across the
line impedance’s. For the conventional VOC scheme some compensating
algorithms exists [35,55,62,63,107] or concept of Virtual Flux VF can be applied
to improve VOC scheme.
The VOC with line voltage estimation and VFOC with virtual flux estimator,
compared to DPC, exhibit some advantages:
! low sampling frequency (cheaper A/D converters and micro-controllers) can

be used for good performance, e.g. 5kHz,
! fixed switching frequency (easier design of the input filter),
! possible implementation of modern PWM techniques (see Section 4.4.7).
Moreover the VFOC provide improved rectifier control under non-ideal line
voltage condition, because AC voltage sensorless operation is much less noisy
thanks to the natural low-pass behaviour of the integrator used in the flux
estimator.
There are also some disadvantages for both control strategies:

! exist coupling between active and reactive components and some decoupling
solution is required,
! coordinate transformation and PI controllers are required.
86
Comparative Study
5. COMPARATIVE STUDY
5.1 INTRODUCTION
For better assessment of the individual rectifier control techniques presented, a

comparative investigation of these techniques has been carried out. This issue is of great
importance to designers and manufacturers of AC ASDs. PWM rectifiers have been
increasingly employed as front-end converters in these drives (e.g., Siemens or ABB).
Results of the investigation are presented below.
5.2 PERFORMANCE COMPARISON
! Condition of study
All the four control schemes have been simulated using the SABER software [A.4].
Values of the sampling and switching frequency, respectively, were as follows: (a) VOC
– 5 kHz, 5 kHz, (b) DPC – 80 kHz, 5 kHz (average), (c) VFOC – 5 kHz, 5 kHz, and (d)
VF-DPC – 50 kHz, 4 kHz (average). Other parameters of power circuit are given in
Table A.4.1. For fairness of the comparison, no outer-loop voltage controller was used
in the dynamic investigation. The comparative study was conducted with respect to the
complexity of control algorithms, operation with unbalanced and distorted line voltages,
parameter sensitivity, and dynamic performance.
! Complexity of control algorithms
To illustrate differences between the techniques with respect to the computational effort,
the number of instructions per sampling cycle is shown in Fig. 5.1. The control
strategies utilizing the virtual flux enjoy certain edge over their voltage-based
counterparts. Computation intensity, that is, the processor load per sampling cycle, is
illustrated in Fig. 5.2 for all methods under consideration. It can be seen that the direct
power control strategies require distinctly faster processors than the VOC and VFOC
techniques.
Fig. 5.1 Computational effort (number of instructions per sampling cycle).
87
Comparative Study
80% 75%
70%
60%
50%
50%
40%
30%
20%
10% 10%
10%
0%
VOC VFOC V-DPC VF-DPC
Fig. 5.2 Computation intensity (dSpace 1103)
! Influence of unbalanced and distorted line voltage
Under ideal conditions the PWM rectifier should provide sinusoidal line current.
However there are three major reasons of disturbances, which may distort the current
waveform:
• voltage unbalance,
• voltage distortion,
• distortion of reference instantaneous active power and current (because ripple on udc
created by unbalanced and distorted condition).
With unbalanced line voltage the second harmonic appear in control structure (100Hz).
Another two distortion produce most significant harmonic as: 5th, 7th, 11th, 13th and 17th.
Fig. 5.3 shows the influence of unbalanced and distorted line voltage on DC-link
voltage and reference angle in control structure. Figure 5.3(a) shows basic waveforms of
signals, when a ideal voltage is applied. On the other hands, Fig 5.3(b) shows the same
waveforms, when the three-phase line voltage is unbalanced and distorted.
(a) Sinusoidal and balanced supply voltage (b) Distorted and unbalanced supply voltage
Fig.5.3. Waveforms of basic signals in the VOC scheme.

From the top: -line voltages, DC-link voltage, reference angle of line voltage.
88
Comparative Study
Figs. 5.4 and 5.5 illustrate the effect of non-ideal line voltage on the current drawn by a
rectifier under various control options. Specifically, the total harmonic distortion (THD)
of the current is shown as a function of the coefficient of imbalance (Fig. 5.4) and
magnitude of the 5th harmonic (Fig. 5.5). Again, the VFOC and VF-DPC strategies
display distinct superiority over the VOC and DPC schemes.
Fig. 5.4. THD of the line current as a function of voltage imbalance.
Fig. 5.5.THD of the line current as a function of the magnitude of fifth harmonic
of the line voltage.
The line current (THD) factor for the different control schemes are summarized in Table
5.1 together with the different operating conditions and experimental results.
TABLE 5.1. Simulation and experimental results

Control strategy Sampling Switching THD of line current
frequency frequency Sinusoidal voltage Unbalanced and distorted line voltage
Simulation Experimental Simulation Experimental
VOC with SVPWM and 5 kHz 5 kHz 4.3 % 6.0 % 9.0 % 11.7 %
AC voltage sensors
VOC with SVPWM 5 kHz 5 kHz 4.5 % 6.1 % 9.2 % 11.8 %
VOC with DPWM 10 kHz 6.66 kHz 2.6 % 3.1 % 8.0 % 10.1 %
VFOC with SVPWM 5 kHz 5 kHz 4.5% - 8.7 % 10.5%
V-DPC 80 kHz 5 kHz (average) 5.6 % - 8.9 % -
VF-DPC 50 kHz 3.5 kHz (average) 5.2 % - 5.6 % 5.6%
89
Comparative Study
! Parameter sensitivity
Figure 5.6 shows the dependence of the line current THD on variations of the line
inductance. As expected, the VOC and VFOC techniques are insensitive to these
variations, because the line inductance affects only the estimated angular position of the
line voltage or virtual flux vectors. Therefore, it influences the input power factor but
not the THD of the current. To the contrary, in the DPC schemes, the line inductance
directly affects the estimated active and reactive power values, which in the closed
control loop define switching instants and, as a result, the current THD. However, the
impact of inaccurate line inductance estimation on the performance of a VF-DPC
rectifier is considerably lower than that of a DPC rectifier. This is so because in the
former rectifier no line current differentiation is performed (see (3.8) and (3.9)) and the
integrator used in flux calculation (see (2.42a) and (2.42b)) displays a low-pass filter
behaviour.
20
V-D PC
18 VF -D PC
VF O C
16
VO C
14
12
THD [%]
10
0
-20 -15 -10 -5 0 5 10 15 20
∆ L [% ]
Fig. 5.6 Current THD versus error in estimation of the line inductance.
! Dynamic performance
A simulated response to a step change in the active power in the virtual-flux based
control systems under consideration is shown in Fig. 5.7. As seen in Fig. 5.7a, to reduce
the control error, the VF-DPC scheme selects directly an appropriate voltage vector,
providing very fast power control. Contrastingly, the dynamic response of a VFOC
rectifier, illustrated in Fig. 5.7b, is determined by the performance of current controllers.
With PI controllers, the rectifier’s reaction is slower than that with hysteresis
controllers.
90
Comparative Study
(a) VF-DPC (b) VFOC
Fig. 5.7 Response of the VF-DPC and the VFOC rectifiers to a step change in active power.
From the top: line voltage ua, line current ia, iLd current, iLq current,
instantaneous active power p, instantaneous reactive power q, line to line voltage uab
and instantaneous active power p.
91
Comparative Study
5.3. SUMMARY
Advantages and disadvantages of the control schemes compared are listed in Table 5.2.
Taking into account all operational features, the VF-DPC technique seems to be the
most advantageous of all.
TABLE 5.2: Advantages and disadvantages of control techniques for PWM rectifiers
TECHNIQUE ADVANTAGES DISADVANTAGES
VOC • Fixed switching frequency (easier design of the EMI • Coordinate transformation and decoupling between active
input filter) and reactive current is required
• Advanced PWM strategies can be used • Complex algorithm
• Cheaper A/D converters • Input power factor lower than that for DPC
• No sensitivity for inductance variation
DPC • No separate voltage modulation block • Variable switching frequency
• No current regulation loops • High values of the inductance and sampling frequency are
• No coordinate transformation needed (important point for the estimator, because smooth
• Good dynamics shape of the current waveform is required)
• Simple algorithm • Power and voltage estimation should be avoided at the
• Decoupled active and reactive power control moment of switching (it yields high errors)
• Instantaneous variables with all harmonic components • Fast microprocessor and A/D converters required
are estimated (improvement of the power factor and
efficiency)
VFOC • Fixed switching frequency • Coordinate transformation and decoupling between active
• Advanced PWM strategies can be used. and reactive components is required
• Cheaper A/D converters • Complex algorithm
• No sensitivity for inductance variation • Input power factor lower than that for DPC
VF-DPC • Simple and noise-resistant power estimation algorithm, • Variable switching frequency
easy to implement in a DSP • Fast microprocessor and A/D converters required
• Lower sampling frequency than that for DPC
• Low THD of line currents at a distorted and unbalanced
line voltage (sinusoidal line currents)
• No separate voltage modulation block
• No current regulation loops
• No coordinate transformation
• Good dynamics
• Simple algorithm
• Decoupled active and reactive power control
92
Conclusions
6. CONCLUSION
The theses formulated in the Chapter 1 has been proved by simulation and experimental
investigation. It was shown that application of virtual flux (VF) based control yields
lower current distortion for both the Voltage Oriented Control (VOC) and Direct Power
Control (DPC) scheme (see Fig. 5.5 and 5.6). Also, the VF estimation is much less
noisy than that of the line voltage (see Fig 3.21). Moreover, a line voltage or virtual flux
estimator can replace AC-line voltage sensors without deterioration in protection and
performance of PWM rectifiers. Therefore, taking into account all operational features
(see Table 5.2), the Virtual Flux Based Direct Power Control (VF-DPC) technique
seems to be the most advantageous of all. Other most important results of the work can
be summarized as below:
VF-DPC versus DPC

• lower sampling frequency,
• simple and noise robust power estimation algorithm,
• sinusoidal line currents (low THD) even under unbalanced and distorted line
voltage,
VF-DPC versus VOC and VFOC

• simpler algorithm,
• no current control loops,
• coordinate transformation and PI controllers are not required,
• no separate PWM voltage modulation block,
• decoupled active and reactive power controls,
• sinusoidal line currents (low THD) even under unbalanced and distorted line
voltage,
• good dynamic performance,
• power estimation gives possibility of obtaining instantaneous variables with all
harmonic components, which have an impact on improvement of the total power factor
and efficiency.
93
Conclusions
Additionally, it has been shown that for implementation of VOC and VFOC schemes,
one of the most important blocks is the voltage modulator. Therefore, special attention
was paid to various PWM techniques. As result the new concept of Adaptive Space
Vector Modulation (ASVM) was developed. Investigation shows that ASVM is a
universal solution for three-phase PWM converters. Among its main features are: full
control range including overmodulation and six-step operation, tracking of peak current
for instantaneous selection of two-phase PWM (this guarantees maximal reduction of
switching losses up to 50%), good dynamic performance by the switching table
application. ASVM with simplified switching time calculation provide a time efficient
algorithm based on implementation in Cartesian coordinates. It consumes one third of
the time required by it’s counterpart in polar coordinates.
94
Appendices
Appendices
A.1 PER UNIT NOTIFICATION

2
U LL Z 50 Hz
ZB = ; Z PU =
S nom ZB
ULL - Input line-line rms voltage (Uab = 1 per unit)

Snom - Fundamental apparent input power (S1 = 1 per unit)
ZB - Base impedance (S1 = 1 per unit (100%))
The voltage unbalance is defined as:

en
u=
ep
ep - positive sequence of input voltage vector
en - negative sequence of input voltage vector
A.2 HARMONIC DISTORTION IN POWER SYSTEM
The specification of power system harmonic, conventional and instantaneous power

theories will be reviewed under ideal and distorted conditions. A waveform is distorted
when a voltage or current in power system contains other frequencies than the
fundamental frequency of the mains. The distorting components of waveforms under
steady state conditions are usually integer multiples of the fundamental power
frequency.
Specification of power system distortion

When the periodical function performs a Dirichlet conditions (the conditions are
performed almost by all real electrical signals) then it can be represented as an infinite
concurrent Fourier series. The sum of this series is equal f(x) function
∞
a0
f ( x) = + ∑ Fn sin( nx + ψ n ) (A.2.1a)
2 n =1
or
a0 ∞
f (ω s t ) = + ∑ Fn sin( nω s t + ψ n ) (A.2.1b)
2 n =1
where:
Fn- trigonometric Fourier series coefficient with physical meaning of n harmonic
amplitude
a0/2 – average component
F1 sin (ωst+ψ1) – fundamental harmonic
Fn sin (nωst+ψn) – harmonic of n order
ψn – initial phase of n order harmonic
95
Appendices
ωs = 2π/Ts = ω1
Ts – period
If we describe:
Fn sin (nωst+ψn) = Fn (sin nωst cosψn + cos nωst sinψn) (A.2.2)
and with notation (Fig. A.2.1)
Fn sin ψn= bn, Fn cos ψn= an (A.2.3)
and
bn
tgψ n = , Fn = an2 + bn2 (A.2.4)
an
Im
Fn
bn
ψn
Re
an
Fig. A.2.1 Fn decomposition into an and bn
with this consideration the series can be represented as
a0 ∞ ∞
f (ω s t ) = + ∑ a n cos nω s t + ∑ bn sin nω s t (A.2.5)
2 n =1 n =1
or
a0 ∞   2πnt   2πnt  
f (ω s t ) = + ∑  a n cos  + bn sin   
 (A.2.6)
2 n =1   Ts   Ts  
The coefficient a0 represents the average value of f(x) and the coefficients an and bn
represents the orthogonal components of the nth harmonic. The coefficients are
determined as follows:
Ts
2
a0 =
Ts 0
∫ f (ω t )dt
s (A.2.7a)
Ts Ts
2 2  2πnt 
an =
Ts ∫0 ∫0
f (ω s t ) cos nω s tdt =
f (ω
Ts
s t ) cos
T
 s 
dt (A.2.7b)
Ts Ts
2 2  2πnt 
bn = ∫ f (ω s t ) sin nω s tdt = ∫ f (ω s t ) sin dt (A.2.7c)
Ts 0 Ts 0  Ts 
96
Appendices
Most of periodical signals perform some of symmetry conditions. Elements of Fourier

series disappear in this case.
• Symmetry to abscissa axis
Area over and under axis are equal. It means that a0 = 0 and expansion of Fourier series
will be an infinity series about uneven harmonics.
• Symmetry to ordinate axis
Sinus expression disappears from Fourier series because sinus function is uneven.
• Symmetry to beginning of coordinate system
The function is uneven. Therefore a0 = 0 and cosinus expression disappears from
Fourier series, because cosinus function is even.
When symmetry to abscissa axis and symmetry to beginning of coordinate system

occur, the Fourier series will have only uneven expression with sinus. Therefore, we can
describe:
∞
f (ω s t ) = ∑b
n =1, 3, 5...
n sin nω s t (A.2.8)
Conventional decomposition of voltage, currents and powers

According to the above description periodical signal of voltage, current and power can
be represented as Fourier series
∞
u (t ) = ∑ 2U n sin(ω n t + ψ n ) (A.2.9)
n =0
∞
i (t ) = ∑ 2 I n sin(ω n t + ψ n − ϕ n ) (A.2.10)
n =0
where ϕ n = ∠(U n , I n ) - phase angle between n-th voltage and current harmonics
ωn = nω1; ωn is the angular frequency of the nth harmonic
2πn
ω n = 2πnf 1 = (A.2.11)
T1
Un and In are the rms (root mean square) value of the nth harmonic voltage and current
respectively:
T
1 2
T ∫0
Xn = x n (t )dt (A.2.12)
based on Parseval theorem the rms value of the distorted voltage and current is given
by:
T ∞
1
U rms = ∫
T 0
u (t ) 2 dt = ∑U 0
2
n = U 02 + U 12 + U 22 + ... (A.2.13)
97
Appendices
T ∞
1
I rms =
T ∫0
i (t ) 2 dt = ∑I0
2
n = I 02 + I 12 + I 22 + ... (A.2.14)
The total harmonic distortion factor (THD) is most commonly used to characterize the
magnitude of the distorted signals. The THD gives the ratio between the geometric sum
of the magnitudes or rms of the harmonics and the magnitude (or rms value) of the
fundamental component:
∞
∑X
n=2
2
n
THD = . (A.2.15)
X1
The main disadvantage of the THD is that the detailed information about harmonic
spectrum is lost.
The instantaneous power is defined as:
p(t) = u(t) i(t) (A.2.16)
Classical approaches define that active power is an average value of instantaneous
power
T T ∞ ∞
1 1
P=
T ∫0
p (t ) dt =
T ∫0
u (t ) ⋅ i (t ) dt = ∑
n=0
Pn = U I
0 0 + ∑
n =1
U n I n cos γ n
T T ∞ ∞
1 1
S = U rms ⋅ I rms =
T0∫ u (t ) 2 dt
T ∫0
i (t ) 2 dt = ∑U n2 ∑ I n2
n =0 n =0
(A.2.17)
Q = S 2 − P2
For a typical three-phase system without neutral wire, U0I0 will be zero since a zero
sequence components of the current system do not exists. Therefore, the equations
(A.2.17) posses only AC components:
∞ ∞
P = ∑ Pn = ∑ U n I n cos γ n (A.2.18)
n =1 n =1
∞ ∞
S= ∑U n2 ∑ I n2
n =1 n =1
(A.2.19)
∞ ∞
Q = ∑ Qn = ∑ U n I n sin γ n (A.2.20)
n =1 n =1
Where the active power P will thus represent a measure of the average energy flow even
in a disturbed power system. The apparent power S is usually used to specify the size of
required power system equipment. The apparent power S is considered as representing
the maximum active power, which can be delivered by a voltage source while the line
losses are maintained constant. The reactive power Q is of interest for specifying the
98
Appendices
size of compensation equipment in power system such as PWM converters and active
power filters.
From the comparison of Eqs. (A.2.18), (A.2.20) with (A.2.19) can be seen that as
distinct from sinusoidal signals the square sum of active and reactive power is not equal
to apparent power. Therefore, to complete the definitions a “distortion power” D has
been introduced (Fig. A.2.2). The separate power are connected in equation
D = S 2 − P2 − Q2 (A.2.21)
P
Fig. A.2.2 Graphical representation of power components
Instantaneous decomposition of powers

Many theories of instantaneous power exist in scientific literature [8-10,13-15] and it is
in detail described in [7,11-12]. The extension of the reactive power to non-sinusoidal
waveforms is now a subject of controversy. Many new theories have been proposed and
they are not accepted for all researchers around the world. However, the definition of
this topic is still confusing and it is difficult to find a general and unified definition of
power components under non-sinusoidal conditions, particularly when three-phase
systems are analyzed. The most popular definition for instantaneous reactive
(imaginary) and active (real) power has been proposed by Takahashi and by Akagi
[8,9,13]. However, the instantaneous imaginary power proposed by Akagi does not have
a clear physical meaning.
Furuhashi presents a new definition of instantaneous reactive power [13], which is
generated by compensating equipment such as an active filter. In author opinion most
clear presentation of instantaneous components of active and reactive power was
presented by Peng [14].
Instantaneous power for three-phase system are usually considered in orthogonal

coordinates α-β-0 then in three phase coordinate a-b-c. Therefore, the Clarke
transformation C and its reverse transformation C-1 define the relationship between the
three-phase system a-b-c and the stationary reference frame α-β-0 are described as:
 xα   1 − 1 / 2 − 1 / 2   xa 
x  = 2
 β  0 3 / 2 − 3 / 2  xb  (A.2.22a)
3
 x0  1 / 2 1 / 2 1 / 2   x c 
99
Appendices
where x denotes currents or voltages
 xa   1 0 1 / 2   xα 
x  = 2 
 b  − 1/ 2 3 / 2 1 / 2   x β  (A.2.22b)
3  
 x c 
− 1 / 2 − 3 / 2 1 / 2   x 0 
The α-β components can be represented in the Cartesian plane by a space vector xαβ:
x αβ = xα + jx β (A.2.23)
where the α-axis and the a-axis have the same orientation. The β-axis leads the a-axis
with 900.
For a three-phase power system, instantaneous voltages ua, ub, uc and instantaneous
currents ia, ib, ic are expressed as instantaneous space vectors u and i
u a  ia 
u = u b  and i = ib  (A.2.24)
u c  ic 
For three-phase voltages and currents ua, ub, uc and ia, ib, ic the α, β and 0 components
are expressed as:
u α  u a  iα  i a 
u  = [C ]u  and i  = [C ]i  (A.2.25)
 β  b β  b
 u 0  u c   i0  ic 
For the typical three-phase system without neutral wire, zero sequence component i0 of
the current system does not exist ( ia + ib + ic = 0 ). It gives finally simple realization of
signal processing thanks to only two signals in α-β coordinate what is the main
advantage of abc/αβ transformation. With this assumption the equations (A.2.25) can
be described as:
u a 
u α  2 1 − 1 / 2 − 1 / 2   
u  = ub (A.2.26)
 β 3 0 3 / 2 − 3 / 2  
u c 
and
i a 
iα  2 1 − 1 / 2 − 1 / 2   
i  = ib (A.2.27)
β 3 0 3 / 2 − 3 / 2  
ic 
General three-phase four-wire system is represented as separated: three-phase three-

wire system and a single-phase system, which represents the zero sequence components.
100
Appendices
T T
u a  ia  uα  iα 
p ∑ = u b  i  = u 
 b  β 
i  = p (t ) + p (t )
 β 0 (A.2.28)
u c  ic   u 0   i0 
The instantaneous zero sequence power p0(t) is only observable if exist both zero
sequence components (u0, i0).
p 0 (t ) = v0 ⋅ i0 (A.2.29)
The Takahashi define the instantaneous active power p as scalar product between the
three-phase voltages and currents and instantaneous reactive power q as vector product
between them:
p = u ( abc ) ⋅ i ( abc ) = u a ia + u b ib + u c ic (A.2.30)

q = u ( abc ) × i ( abc ) = u i + u i + u i
'
a a
'
b b
'
c c (A.2.31)
where u’a, u’b, u’c is 900 lag of ua, ub, uc respectively. The same equations can be
described in matrix form as:
ia 
 p  u a u b u c   
q  =  ' '
i ,
'  b 
(A.2.32)
  u a u b u c  i 
 c
where
u a'  u c − u b  u ca 
 ' 1   1  
u b  = u a − u c  = 3 u ac  . (A.2.33)
u c  3
 
'
u b − u a  u ba 
Additional information can be obtained by defining an instantaneous complex power

p(t) in the Cartesian plane:
{ } { }
p(t ) = u(t ) ⋅ i(t )* = Re p(t ) + Im p(t ) = p(t ) + jq(t ) =
1 (A.2.34)
= ua ia + ub ib + uc ic + j [(ub − uc )ia + (uc − ua )ib + (ua − ub )ic ]
3
The most frequently referred power theory was proposed by Akagi [9] when the three-
phase voltages and currents are transformed into α-β coordinates, and additionally the
three-phase voltages and currents excluding zero-phase sequence components.
Therefore, instantaneous power on the three-phase circuit can be defined as follows:
p = u α iα + u β i β (A.2.37)
where p is equal to the conventional equation (A.2.30). In order to define the

instantaneous reactive power, Akagi introduced the instantaneous imaginary power
space vector defined by:
101
Appendices
q = uα × i β + u β × iα (A.2.38)
(imaginary axis vector is perpendicular to the real plane on the α-β coordinates)
From equation (A.2.37) the conventional instantaneous power p and the above defined
instantaneous imaginary power q, which is the amplitude of space vector q are
expressed by:
 p   uα u β  iα 
 q  = − u uα  i β 
(A.2.39)
   β
uαiα and uβiβ obviously mean instantaneous power because they are defined by product
of the instantaneous voltage in one axis and the instantaneous current in the same axis.
Therefore, p is the real power in the three-phase circuit and its dimension is [W].
Conversely, uα iβ and uβ iα are not instantaneous power, because they are defined by the
product of the instantaneous voltage in one axis and instantaneous current not in the
same axis but in the perpendicular axis.
The α-β currents can be obtained by the equations inverse to (A.2.39):
−1
iα   uα u β   p
i  = − u uα   q 
(A.2.40)
β  β
and gives finally
iα  1 uα − u β   p
i  = 2 2 
uα   q 
(A.2.41)
 β  uα + u β u β
The theory proposed by Peng [14] base on equations (A.2.30), (A.2.31) and defines
vector q designated as the instantaneous reactive (or nonactive) power vector of the
three-phase circuit. The magnitude (or the length) of q is designated as the instantaneous
reactive power that is
 ub uc 
 
i ic
q a   b 
u ua 
q = qb  =  c  (A.2.43)
 ic ia 
 qc   u ub 
a
i ib 
 a 
and
q = q = q a2 + qb2 + q c2 (A.2.44)
Next the instantaneous active current vector ip, the instantaneous reactive current vector
iq, the instantaneous apparent power s and the instantaneous power factor λ are defined
as:
102
Appendices
iap 
  def p
i p = ibp  = u (A.2.45)
u ⋅u
icp 
 
iaq 
  def q × u
i q = ibq  = (A.2.46)
u ⋅u
icq 
 
def def
p
s = ui and λ= (A.2.47)
s
where
u = u = u a2 + u b2 + u c2 and i = i = i a2 + ib2 + ic2 (A.2.48)
are the instantaneous magnitudes (or norms) of the three-phase voltage and current,
respectively.
Moreover, following interesting properties can be observed:
! a three-phase current vector i is always equal to the sum of ip and iq i.e. i ≡ i p + i q
! iq is orthogonal to u, and ip parallel to u namely u ⋅ i q ≡ 0 and u × i p ≡ 0
! all properties of the conventional reactive power theory still hold true for new theory
such as: i 2 ≡ i p2 + iq2 , s 2 ≡ p 2 + q 2 , and i 2 ≡ ( p 2 + q 2 ) / u 2 , where i p = i p and
iq = i q
! for a three-phase system without zero sequence voltage and current i.e.
u a + u b + u c = 0 and ia + ib + ic = 0 , it is true that:
q = qa = qb = qc = ub ic − uc ib = uc ia − u a ic = u a ib − ub ia
p = 2(u a ia + u b ib ) + u a ib + u b ia = 2(u b ib + u c ic ) + u b ic + u c ib = 2(u c ic + u a ia ) + u c i a + u a ic
The definitions of the instantaneous reactive components are all based on the direct
quantities of three-phase voltages and currents. If necessary these newly defined
quantities can be expressed in any other coordinates.
p = u (abc) ⋅ i (abc) = u (αβ 0 ) ⋅ i (αβ 0 ) (A.2.49)

q ( abc ) = [q a qc ] = u ( abc ) × i ( abc ) = u (αβ 0) × i (αβ 0 )
T
qb (A.2.50)
After αβ transformation all equations proposed by Peng are identical to definition

described in [9].
Other popular theory was proposed by Furuhashi [13], especially, for active filters
because the new instantaneous reactive power qk is defined with the power of each line
of the active filter (active filter does not generate the instantaneous active power) as:
q k = u k ∗ i Fk (k = 1,2,..., n) (A.2.51)
where uk – phase voltage iFk – phase current of active filter.
103
Appendices
Since the active filter does not generate the instantaneous active power, the following
constraint is imposed on the power in (A.2.51):
n
∑q
k =1
k =0 (A.2.52)
All of researchers only agree with definition that the instantaneous active and reactive
power „p” and „q” can be decomposed into average DC components q , p corresponding
to the fundamental of the load current and an oscillating (ripple) components
q~, ~
p corresponding to the harmonics:
p 3− phase = p + q = p + ~
p + q + q~ (A.2.53)
p= p+ ~ p and q = q + q~ (A.2.54)
where:
p3− phase -total three-phase instantaneous power demanded by the load
p-instantaneous active components of p3− phase
q- instantaneous reactive components of p3− phase
p - direct (average) components of p associated to the fundamental frequency active
components of load current
~
p - alternating (ripple) components of p associated to the harmonic active components
of load current
q - direct (average) components of q associated to the fundamental frequency reactive
components of load current
q~ - alternating (ripple) components of q associated to the harmonic reactive components
of load current
Only in the Peng’s definition ~

p and q~ can additionally be split into two parts (2ω
components and harmonic components) as
~
p = p 2ω + p h (A.2.55)
q~ = q + q 2ω h (A.2.56)
where p 2ω and q 2ω are the negative-sequence active and reactive power (2ω
components) originating from asymmetrical fundamental (negative sequence)
components of the load current, and p h and q h are the harmonic active and reactive
power (harmonic components) originating from harmonic components of load current.
A.3 IMPLEMENTATION OF SVM
Simplified switching time calculation for SVM

This point presents an approach, which allows simplified calculations and the algorithm
in real time implementation is much faster, compare to the conventional method. The
new algorithm is based on the assumption, that the conduction times in each phase are
calculated directly using only information about command phase voltages. In classical
104
Appendices
SVM techniques the polar coordinate system is used to calculate these times, whereas in
presented method the Cartesian coordinate system is used.
The description is based on the simple equations [101]. It is easy to show that the
average values of output voltages with respect to neutral point of converter (Fig. 4.7) are
calculated as:
Udc U U U U U
ua0 = ⋅ Ta − dc , ub0 = dc − dc ⋅ Tb, uc0 = dc ⋅ Tc − dc (A.3.1)
Ts 2 Ts 2 Ts 2
where Ta, Tb, Tc are the conduction times in each phase of the converter.
Note, that in balanced system, the neutral point voltage is expressed as:
1 U dc U
uN 0 = ⋅ (Ta + Tb + Tc ) − dc (A.3.2)
3 Ts 2
After simple calculations we can obtain the relationship between phase voltages and
conduction times in the form:
u aN   2 − 1 − 1 Ta 
u  == 1 ⋅ U dc  − 1 2 − 1 T  (A.3.3)
 bN  3 Ts   b 
u cN   − 1 − 1 2  Tc 
Note, that the matrix used in the above equation is singular, and that is no unique
solution, if we want to calculate conduction times from phase voltages. This one degree
of freedom gives us possibility to construct different modulation methods. The only
limitation is that all these times should be in the range [0, Ts] . It is easy to conclude that
lower voltage gives lower conduction time. So, the minimum time is for the minimum
voltage (Fig. A.3.1a).
b
V3(010)
V2 (110)
REGION 2
REGION 1
v min
REGION 3
V*
V 4 (011) V 1(100)
V0 (000)
vmax a
V7 (111) vmid
REGION 4 REGION 6
REGION 5
V6 (101)
V5(001)
c
(a) (b)
Fig. A.3.1 a) Correspondence between phase voltages and conduction times.
From the top: phase voltages and pulses.
b) Space vector representation of three-phase converter in natural a, b, c coordinate.
105
Appendices
If we introduce the following notation (Fig. A.3.1b):

umin = min(uao, ubo, uco),
umax = max(uao, ubo, uco),
umin < umid < umax.
and assume that Tmin, Tmid, Tmax, are the conduction times in phases for which the
voltages are umin, umid, umax respectively. The minimum value, which can be taken for
Tmin, is zero. In this case we can calculate another conduction times using equation:
Tmax  u max − u min 

T  = Ts u − u  (A.3.4)
 mid  U  mid min 
Tmin  dc
 0 
If we rewrite this formula with phase indexes we can obtain the following equivalent
form:
Ta  u aN − u min 
T  = Ts u − u  (A.3.5)
 b U  bN min 
Tc  dc
u cN − u min 
The algorithm using the above equation is the discontinues modulation algorithm, and
each phase in the period 120° is not switched. Generally any modulation algorithm can
be described by the equation:
Ta  u aN − u min  T0 

T  = Ts u − u  + k T  (A.3.6)
 b U  bN min   0
Tc  dc
u cN − u min  T0 
where
Ts
T0 = Ts − (u max − u min ) (A.3.7)
U dc
and 0 ≤ k ≤ 1. Note, that for k = 0.5, the algorithm correspond to the modulation with
symmetrical zero states (SVPWM).
Adaptive Modulation with simplified switching time calculation

The new idea of ASVM [93] bases on assumption that modulator should provide
maximal reduction of switching losses in linear range of modulation [see Section 4.4.7].
Therefore, modulator use k = 0.5 for low values of modulation index, what gives good
performance at start-up condition and, moreover, guarantees low current harmonic
distortion. In the discontinues modulation method zero vectors could be chosen as
U0(0,0,0) or U7(1,1,1). In the first case in the described algorithm Eqs. A.3.8 k = 0 in
the second case k = 1. The selection, which method is used depends on the following
condition:
if umax+umin < 0 then k = 0 else k = 1 (A.3.8)
106
Appendices
This algorithm describes the discontinues modulation method without current tracking.
If we want take into account the phase values of the current, the algorithm is modified.
We must additional made sorting of current values
imin = min(ia,ib,ic),
imax = max(ia, ib, ic),
imin < imid < imax.
and use instead of algorithm Eq. A.3.8, the adaptive algorithm based on the condition
presented below:
if imax+imin < 0 then k = 0 else k = 1 (A.3.9)
Dead time compensation

One of the main problems encountered in open-loop PWM voltage-source converter is
the nonlinear voltage gain caused by the nonideal characteristics of the power converter.
The most important nonlinearity is introduced by the necessary dead time (Td) to avoid
the shoottrought of the DC-link. In most cases, the compensation techniques are based
on an average value theory, the lost volt seconds are averaged over an entire period and
added vectorially to the commanded voltage. Regardless of the used method, all dead
time compensation techniques are based on information of the polarity of the current,
hence current detection becomes an important issue. This is particularly important
around the zero crossings, where an accurate current measurement is needed to exactly
compensate for the dead-time. In this case the compensation is added to pulse, before
the dead time generation for positive current, and subtracted from the pulse for negative
current [71][91]. Simple algorithm of dead time compensation is presented below:
if (0 < ia < imin) {Ta = Ta + Td/Ts;}
if (0 > ia > -imin) {Ta = Ta - Td/Ts;}
if (0 < ib < imin) {Tb = Tb + Td/Ts;}
if (0 > ib > -imin) {Tb = Tb - Td/Ts;}
if (0 < ic < imin) {Tc = Tc + Td/Ts;}
if (0 > ic > -imin) {Tc = Tc - Td/Ts;}
107
Appendices
A.4 SABER MODEL
Fig. A.4.1 Example of Saber model
The control algorithms of PWM rectifier was implemented in SABER, which provides
analysis of the complete behavior of analog and mixed-signal systems, including
electrical subsystems. The main electrical parameters of the power circuit and control
data are given in the Table A.4.1. The example of PWM rectifier model is shown in Fig.
A.4.1. The electrical elements are taken from library, but control algorithm has been
written in MAST language. The example of VF-DPC algorithm implemented in SABER
is shown below.
Table A.4.1 Parameters used in simulation

Sampling frequency (DPC): 80kHz
Sampling frequency (VF-DPC): 50kHz
Sampling frequency (VOC, VFOC): 5kHz
Resistance of reactors R: 100mΩ
Inductance of reactors L: 10mH
DC-link capacitor: 1mF
Load resistance RL: 100Ω
Switching frequency (DPC) f: 5kHz
Switching frequency (VF_DPC) f: 3.5kHz
Switching frequency (VOC, VFOC) f: 5kHz
Phase voltage V: 230 RMS
Source voltage frequency: 50 Hz
DC-link voltage: 620V
Resistance of source R: 8mΩ
Inductance of source L: 0.127mH
n Inductance per unit notification: 8.7%
108
Appendices
#******************************************************************************#
#* Direct Power Control for Saber - MM *#
#******************************************************************************#
element template dpc_udc smp,ia,ib,Sa_out,Sb_out,Sc_out,Sa_out_i,Sb_out_i,Sc_out_i,vaz,vbz,vcz,udc_z
state nu smp,ia,ib,udc_z,vaz,vbz,vcz
state logic_4 Sa_out,Sb_out,Sc_out,Sa_out_i,Sb_out_i,Sc_out_i
{
<consts.sin
state nu ic,ialf,ibet,L=0.013,hh=1,Kp=0.0,Ti=0.0,pi=math_pi,T_in =0.1, Ts=10u

state nu Theta,delta_Udc,p,q,delta_q,delta_p,p_old,q_old, I_ref_old, delta_Udc_old
state nu i,Sq,Sq_old,Sp,Sp_old,sector,udc_ref=610,p_ref,q_ref=0,pdc=1
state nu ui,up,I_ref,ie,Sa,Sb,Sc,Sa_old,Sb_old,Sc_old
state nu Psi_alf,Psi_bet, usa, usb, usc, Psi_alf_s=-1.0, Psi_bet_s=0.0, Psi_alf_c, Psi_bet_c
number pi_r=0.7,ti_r=5m
state nu tab_11[1:12]=[1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0]
state nu tab_12[1:12]=[0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0]
state nu tab_13[1:12]=[1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1]
state nu tab_21[1:12]=[1, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0]
state nu tab_22[1:12]=[1, 1, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0]
state nu tab_23[1:12]=[0, 1, 0, 0, 1, 1, 1, 0, 1, 1, 0, 0]
state nu tab_31[1:12]=[1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1]
state nu tab_32[1:12]=[0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0]
state nu tab_33[1:12]=[1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1]
state nu tab_41[1:12]=[1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1]
state nu tab_42[1:12]=[0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0]
state nu tab_43[1:12]=[0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0]
when(time_init){
schedule_event(time,Sa_out,l4_0)
schedule_event(time,Sa_out_i,l4_0)
schedule_event(time,Sb_out,l4_0)
schedule_event(time,Sb_out_i,l4_0)
schedule_event(time,Sc_out,l4_0)
schedule_event(time,Sc_out_i,l4_0)
}
when(event_on(smp)){
#*Transformacje wspolrzednych
ic=-(ia+ib) #* "ic" calculation
ialf=ia #*abc/alfa_beta transformation
ibet=(1/sqrt(3))*(ia+2*ib)
#*Virtual flux estimation
usa=1.0/3.0*udc_z*(2.0*Sa_old-Sb_old-Sc_old);
usb=1.0/3.0*udc_z*(-Sa_old+2.0*Sb_old-Sc_old);
usc=1.0/3.0*udc_z*(-Sa_old-Sb_old+2.0*Sc_old);
Ualf=usa;
Ubet=(1/sqrt(3))*(usa+2.0*usb);
Psi_alf_c=Psi_alf_s+Ts*(Ualf-(1/T_in)*Psi_alf_c)
Psi_alf_s=Psi_alf_c
Psi_alf=Psi_alf_c+ialf*L
Psi_bet_c=Psi_bet_s+Ts*(Ubet-(1/T_in)*Psi_bet_c)
Psi_bet_s=Psi_bet_c
Psi_bet=Psi_bet_c+ibet*L
#*Instantaneous power estimation
p= 3/2*314*(Psi_alf*ibet - Psi_bet*ialf)
q= 314*(Psi_alf*ialf + Psi_bet*ibet)
if(Psi_alf<0 & Psi_bet>0) Theta = atan(Psi_bet/( Psi_alf+0.000001p))+math_pi

else if(Psi_alf<0 & Psi_bet< 0) Theta = atan(Psi_bet/( Psi_alf+0.000001p))-math_pi
else Theta=atan(Psi_bet/( Psi_alf+0.000001p))
#*Sector selection
if ((0 <= Theta) & (Theta < pi/6)) sector = 2 #* 0 <= Theta < 30 *#
if ((pi/6 <= Theta) & (Theta < pi/3)) sector = 3 #* 30 <= Theta < 60 *#
if ((pi/3 <= Theta) & (Theta < pi/2)) sector = 4 #* 60 <= Theta < 90 *#
if ((pi/2 <= Theta) & (Theta < 2*pi/3)) sector = 5 #* 90 <= Theta < 120*#
if ((2*pi/3 <= Theta) & (Theta < 5*pi/6)) sector = 6 #*120 <= Theta < 150*#
if ((5*pi/6 <= Theta) & (Theta <= pi)) sector = 7 #*150 <= Theta < 180*#
if ((-pi <= Theta) & (Theta < -5*pi/6)) sector = 8 #*180 <= Theta < 210*#
109
Appendices
if ((-5*pi/6 <= Theta) & (Theta < -2*pi/3)) sector = 9 #*210 <= Theta < 240*#
if ((-2*pi/3 <= Theta) & (Theta < -pi/2)) sector = 10 #*240 <= Theta < 270*#
if ((-pi/2 <= Theta) & (Theta < -pi/3)) sector = 11 #*270 <= Theta < 300*#
if ((-pi/3 <= Theta) & (Theta < -pi/6)) sector = 12 #*300 <= Theta < 330*#
if ((-pi/6 <= Theta) & (Theta < 0)) sector = 1 #*330 <= Theta < 360*#
delta_Udc=udc_ref-udc_z #*voltage control

I_ref= I_ref_old + pi_r*delta_Udc + pi_r*((Ts/ti_r)-1)*delta_Udc_old #* regulator PI
p_ref=I_ref*udc_z
I_ref_old=I_ref
delta_Udc_old=delta_Udc
#* Control Structure
delta_p=p_ref-p
delta_q=q_ref-q
#****************************************************************************#
if (delta_p>hh) Sp = 1 #* p histeres *#
if (delta_p<(-hh)) Sp = 0
if ((delta_p<hh) & (delta_p>(-hh))) Sp=Sp_old
Sp_old=Sp
#*************************************************************************#
if (delta_q>hh) Sq = 1 #* q histeres *#
if (delta_q<(-hh)) Sq = 0
if ((delta_q<hh) & (delta_q>(-hh))) Sq=Sq_old
Sq_old=Sq
#*************************************************************************#
if((Sp==1) & (Sq==0)){
Sa=tab_11[sector], Sb=tab_12[sector], Sc=tab_13[sector]
}
if((Sp==1) & (Sq==1)){
}
if((Sp==0) & (Sq==0)){
}
if((Sp==0) & (Sq==1)){
}
Sa_old=Sa
Sb_old=Sb
Sc_old=Sc
#*************************************************************************#
if(Sa==0){
schedule_event(time+Ts,Sa_out,l4_0)
schedule_event(time+Ts,Sa_out_i,l4_1)
}
if(Sa==1){
schedule_event(time+Ts,Sa_out,l4_1)
schedule_event(time+Ts,Sa_out_i,l4_0)
}
if(Sb==0){
schedule_event(time+Ts,Sb_out,l4_0)
schedule_event(time+Ts,Sb_out_i,l4_1)
}
if(Sb==1){
schedule_event(time+Ts,Sb_out,l4_1)
schedule_event(time+Ts,Sb_out_i,l4_0)
}
if(Sc==0){
schedule_event(time+Ts,Sc_out,l4_0)
schedule_event(time+Ts,Sc_out_i,l4_1)
}
if(Sc==1){
schedule_event(time+Ts,Sc_out,l4_1)
schedule_event(time+Ts,Sc_out_i,l4_0)
}
schedule_next_time(time)
}
}
110
Appendices
A.5 SIMULINK MODEL
Different modulation techniques with additional Zero Sequence Signal (ZSS) has been
simulated using MATLAB-SIMULINK program. The model is presented on Fig. A.5.1.
[Ia]
Goto
XY Graph1
A I-alfa
ALFA
Scope4
B
THIPWM A
BETA ALFA
Scope3 C
B
ABC/ALFA-BETA1 XY Graph
BETA
C
Va
SPWM ZSS TRIANGLE ABC/ALFA-BETA
+ Vb
In1 I-beta
0 Mux3
Mux 220 Vc
control TR ia [Vab]
INVERTER Mux
3 PWM-R In2 ib Currents Goto1
REF+ZSS + R ic
IN1
PWM-S IN2S Vab
IN3 In3
ZSS R Vbc
- T Mux
-
SIN-REF Vca
S -220 LOAD 1 Voltages1
T
s
PWM-T Integrator Voltages2 LP_filter1
Multiport
Mux
Switch MODULATOR [Va]
R SIN REF Goto2

SIN Vab1
Out1 S +ZERO SIQUENCE
SIGNAL
T
Mux
SVPWM
Out1 R Demux Voltages
Out2 S
Demux1 LP_filter
Out3 T
[Ia]
Out4 In From
Mux4
GDPWM1 HAVA [Vab] Mux
DPWM3
From1
Mux WYNIKI
-1 [Va]
From2
Transport
Delay1
Fig. A.5.1. PWM model in Simulink
A.6 LABORATORY SETUP BASED ON DS1103

Laboratory setup consist of two parts:
! power circuit,
! control and measurement systems.
111
Appendices
PWM Rectifier PWM Inverter

TM TM
IPC IPC
Optic fiber Optic fiber
receiver receiver
3 Phase
Grid 3 2 DC link 3
Optic fiber
Optic fiber
AC Voltage&Currents
AC Voltage&Currents
Measurements
Measurements
Measurements
DC Voltage
6 6
Measurement DSP Interface

Equipment
DS1103 dSPACE AC Motor

Master : PowerPC 604e
Slave: DSP TMS320F240
Pentium TM
Host Computer
Fig. A.6.1. Configuration of laboratory setup
Power circuit
The laboratory setup (Fig. A.6.1) consists of two commercial Danfoss inverters VLT
5000 series (Table A.6.1)[122] and a 3kW induction motor as active and resistor as a
passive load. The main electrical parameters of the power circuit and control data are
given in the Table A.6.2.
Table A.6.1 General parameters of VLT5005 inverter

ULN ILN IVLT,N SVLT,N PVLT,N Efficiency
[V] [A] [A] [kVA] [kW] -
380 7 7,2 5,5 3,0 0,96
where:
ULN - line voltage, ILN - line current, IVLT,N - output current, SVLT,N - output power, PVLT,N - power on shaft.
Table A.6.2 Parameters used in experiment

Sampling frequency (DPC, VF-DPC): 50kHz
Sampling frequency (VOC, VFOC): 5kHz
Resistance of reactors R: 100mΩ
Inductance of reactors L: 10mH
DC-link capacitor: 470µF
Load resistance RL: 100Ω
Switching frequency (DPC, VF-DPC) f: 3.5 kHz
Switching frequency (VOC, VFOC) f: 5 kHz
Phase voltage V: 230 RMS
Source voltage frequency: 50 Hz
DC-link voltage: 620V
112
Appendices
Control and measurement systems

This part of system consists of following elements (Fig. A.6.2):
! dSpace DS1103 board inserted into a PC-Pentium,
! interface board and measurement system,
! software.
Measurement AC&DC Optic Fiber

Equipment
Measurement Voltages&Currents
AC&DC Receivers
Optic Fiber
Equipment Voltages&Currents Receivers
Optic Fibers
LEM-55 Converters
Isolation and Optic Fiber START
Amplifiers Isolation Drivers
Optic Fiber STOP
START
Amplifiers Drivers STOP
DA AD Input/Output PWM
Converters Converters Signals Signals
DS1103
DS1103
Fig. A.6.2. Block diagram of DSP interface
The power converters are controlled by the dSpace DS1103 board inserted into a PC-
Pentium (Fig. A.6.3). The mixed RISC/DSP/CAN digital controller based on two
microprocessors (PowerPC604e – 333MHz and TMS320F240 – 20MHz) and four high-
resolution analog-to-digital (A/D) converters (0.8µs - 12 bit) provide a very fast
processing for floating point calculations. It makes possible real time control.
Fig. A.6.3 DS1103 inside the Pentium PC
Basic parameters of DS1103[125-126]:

! master processor - Motorola PowerPC604e/333MHz
! slave processor – fixed point DSP of TI’s TMS320F240
! 16 channels of ADC – 16 bit (resolution) – 4 µs (sampling time), +10V
! 4 channels of ADC – 12 bit – 0.8 µs, +10V
113
Appendices
! 8 channels of DAC – 14 bit - 5 µs, +10V

! incremental Encoder Interface – 7 channels
! 32 digital I/O lines
! ControlDesk software
The DSP subsystem, based on the Texas Instruments TMS320F240 fixed point
processor, is especially designed for control of power electronics. Among other I/O
capabilities, the DSP provides one three-phase PWM generator and four single phase
PWM generators. The other CAN subsystem based on Siemens 80C164 microcontroller
is used for connection to a CAN bus.
The PPC has access to both the DSP and the CAN subsystems. The PPC is the master,
whereas the DSP and the CAN microcontroller are slaves. The following figures give an
overview of the functional units of the DS1103 PPC.
a) b)
ISA Bus interface conector (Host intrface)
Master PPC ADC Unit

Decrementer
, DAC Unit
Timebase
Incremental
Encoder
Interface
Timer A & B
Bit I/O Unit
Serial
I/O Connectors P1, P2, P3
Interrupt Control Interface
I/O Units
DPMEM DPMEM
ADC Unit
Slave MC Slave DSP
Timing I/O
CAN Subsystem
Unit (PWM,
CAP)
CAN Bit I/O Unit

Controller
CAN Subsystem
Fig.A.6.4. a) Block scheme of DS1103; b) Placement of main components.
DSP interface provide galvanic isolation between control board DS1103 and power
circuit. All PWM signals are generated by DS1103 and send using optic fibers to the
Interface and Protection Card IPC [124] that is mounted on the front panel of the
inverter, instead of original Danfoss control board. The IPC includes: optic fiber
receivers, 4MHz modulation of gate signals and protective function required by the
VLT, i.e. short-circuit, shoot-trough of the DC link, over voltage and over temperature.
114
Appendices
Software
Operation on DS1103 is provided by an integrated ControlDesk program (Fig. A.6.5)

[123]. Thanks to this application it is possible to change structure and parameters in real
time. For algorithms application it is possible to use: assembler, C language (see the
next page) and Simulink (Fig. A.6.6).
Fig. A.6.5 Screen of ControlDesk
Fig. A.6.6 Some functional blocks for Simulink RTI interface.
115
Appendices
/*DPC for dSpace 1103 - written by Mariusz Malinowski*/

#include <Brtenv.h>
#include <math.h>
//#include <Io1103.h>
/*----------------------------------------------------------*/
#define DT 20e-6
#define _1_sqrt3 0.57735 /* Constants */
#define sqrt2 1.414213562
/* variables for communication with Slave DSP */
Int16 task_id = 0; /* communication channel */
Int16 index = -1; /* slave DSP command index */
Float64 deadband = 2e-6; /* deadband period */
UInt16 sync_mode = SLVDSP1103_PWM3_SYNC_LEFT; /* sync mode */
Float64 exec_time, total_time; /* variables for TRACE and COCKPIT */
Float64 period = 20e-6; /* PWM period */
/* variables for PWM rectifier */
Float64 L=0.010,Kp=0.0,Ti=0.0,Ts=DT,pi=PI, ia, ib, ic, i_alf, i_bet, psi_alf,psi_bet,psi_alf_c,psi_bet_c;
Float64 Theta,delta_Udc,u_alf,u_bet,delta_udc_old=0.0,udc, udc_old=0.0,ualf,ubet;
Float64 p,q,delta_q,delta_p,p_old=0.0,q_old=0.0,p_ref, I_ref,I_ref_old=0.0,I_ref_max=10.0;
int sector,Sa_old,Sb_old,Sc_old,Sq,Sq_old,Sp,Sp_old, _Ts,_T_in;
volatile Float64 hh=0; udc_ref=600.0; q_ref=0.0; pdc=0.1; ti=0.1; T_in=0.0159; ku1=1435.0; ki1=18.55; ki2=18.55;
unsigned int tab_11[12]={1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0};

unsigned int tab_12[12]={0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0};
unsigned int tab_13[12]={1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1};
unsigned int tab_21[12]={1, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0};
unsigned int tab_22[12]={1, 1, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0};
unsigned int tab_23[12]={0, 1, 0, 0, 1, 1, 1, 0, 1, 1, 0, 0};
unsigned int tab_31[12]={1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1};
unsigned int tab_32[12]={0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0};
unsigned int tab_33[12]={1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1};
unsigned int tab_41[12]={1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1};
unsigned int tab_42[12]={0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0};
unsigned int tab_43[12]={0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0};
void measure(void);
void control(void);
void da_converter(void);
void PWM_sync_interrupt(void);
/*----------------------------------------------------------*/
void measure(void)
{
ds1103_adc_start(DS1103_ADC_CH17); /* specifies channels to be started */
ds1103_adc_start(DS1103_ADC_CH18);
ds1103_adc_start(DS1103_ADC_CH19);
udc= ds1103_adc_read_ch(17); /* read converter 17*/

ia= ds1103_adc_read_ch(18);
ib= ds1103_adc_read_ch(19);
udc=udc-0.0025; ia=ia+0.002; ib=ib+0.003; /*scaling signals */

udc=ku1*udc; ia=ki1*ia; ib=ki2*ib;
}
void control(void)
{
ic=-(ia+ib); uc=-(ua+ub); /*Transformations*/
i_alf = sqrt23*(ia-0.5*ib-0.5*ic);
i_bet = sqrt23*(_sqrt3to2)*(ib-ic);
/* Flux, instantaneous active and reactive power estimator */
ualf=0.6666*udc*(Sa_old-0.5(Sb_old+Sc_old)); /*Converter Voltage*/
ubet=_1sqrt3*udc*(Sb_old- Sc_old);
psi_alf_c += Ts*(ualf-_T_in*psi_alf_c); /*Converter Flux*/
psi_bet_c += Ts*(ubet-_T_in*psi_bet_c);
psi_alf = psi_alf_c + i_alf*L; /* Line Flux */
psi_bet = psi_bet_c + i_bet*L;
p= 2*314*(psi_alf*i_bet - psi_bet*i_alf); /* Instantaneous power estimations*/
q= 314*(psi_alf*i_alf + psi_bet*i_bet);
Theta_est=atan2(psi_bet,psi_alf);
/* Sector detection */
if ((0 <= Theta) & (Theta < pi_6)) {sector = 1;} /* 0 <= Theta < 30 */
if ((pi_6 <= Theta) & (Theta < _1pi3)) {sector = 2;} /* 30 <= Theta < 60 */
if ((_1pi3 <= Theta) & (Theta < pi_2)) {sector = 3;} /* 60 <= Theta < 90 */
116
Appendices
if ((pi_2 <= Theta) & (Theta < _2pi3)) {sector = 4;} /* 90 <= Theta < 120*/
if ((_2pi3 <= Theta) & (Theta < _5pi_6)) {sector = 5;} /*120 <= Theta < 150*/
if ((_5pi_6 <= Theta) & (Theta <= pi)) {sector = 6;} /*150 <= Theta < 180*/
if ((-pi <= Theta) & (Theta < -_2pi3)) {sector = 7;} /*180 <= Theta < 210*/
if ((-_5pi_6 <= Theta) & (Theta < -_2pi3)) {sector = 8;} /*210 <= Theta < 240*/
if ((-_2pi3 <= Theta) & (Theta < -pi_2)) {sector = 9;} /*240 <= Theta < 270*/
if ((-pi_2 <= Theta) & (Theta < -_1pi3)) {sector = 10;} /*270 <= Theta < 300*/
if ((-_1pi3 <= Theta) & (Theta < -pi_6)) {sector = 11;} /*300 <= Theta < 330*/
if ((-pi_6 <= Theta) & (Theta < 0)) {sector = 0;} /*330 <= Theta < 360*/
/*Control structure*/
delta_Udc=udc_ref-udc;
I_ref=I_ref_old+pdc*delta_Udc+pdc*((Ts/ti)-1)*delta_udc_old;
p_ref=I_ref*udc;
delta_p=p_ref-p;
if (delta_p>hh) Sp = 1; /* p histeres */
if (delta_p<(-hh)) Sp = 0;
if ((delta_p<hh) & (delta_p>(-hh))) Sp=Sp_old;
/*************************************************************************/
delta_q=q_ref-q;
if (delta_q>hh) Sq = 1; /* q histeres */
if (delta_q<(-hh)) Sq = 0;
if ((delta_q<hh) & (delta_q>(-hh))) Sq=Sq_old;
/*************************************************************************/
if((Sp==1) & (Sq==0)){D_R=tab_11[sector]; D_S=tab_12[sector]; D_T=tab_13[sector]; }
if((Sp==0) & (Sq==1)){D_R=tab_41[sector]; D_S=tab_42[sector]; D_T=tab_43[sector];}
udc_old=udc; p_old=p; q_old=q; /*Old values*/

Sp_old=Sp; Sq_old=Sq; Sa_old=D_R; Sb_old=D_S; Sc_old=D_T; I_ref_old=I_ref; delta_udc_old=delta_Udc; ;
break; /*END*/
}
}
void da_converter(void)
{
ds1103_dac_write(1,ia*0.1); /* output via DS1103 on-board DAC channel 1 */
ds1103_dac_write(2,px*0.001);
ds1103_dac_write(3,qx*0.001);
ds1103_dac_strobe();
}
void PWM_sync_interrupt(void) /* interrupt service routine for PWM sync interrupt */

{
host_service(1, 0); /* TRACE service */
ds1103_tic_start(); /* start time measurement */
measure();
control();
ds1103_slave_dsp_pwm3_duty_write(task_id, index,D_R,D_S,D_T);
da_converter();
exec_time = ds1103_tic_read();
}
main()
{
ds1103_init(); /* basic initialization of DS1103 */
ds1103_tic_delay(2.0e-6); /* ensure 2 us settling time */
ds1103_dac_init(DS1103_DACMODE_LATCHED); /* init D/A converter in latched mode */
ds1103_slave_dsp_communication_init(); /* initialization of slave DSP communication */
ds1103_slave_dsp_pwm3_init(task_id, period,D_R,D_S,D_T, deadband, sync_mode); /* init and start of 3-phase PWM on DSP */
ds1103_slave_dsp_pwm3_start(task_id);
ds1103_slave_dsp_pwm3_duty_write_register(task_id, &index); /* registration of PWM duty cycle update command */
ds1103_set_interrupt_vector(ds1103_int_slave_DSP_PWM,(DS1103_Int_Handler_Type)&PWM_sync_interrupt,save_regs_on);
ds1103_enable_hardware_int(DS1103_INT_SLAVE_DSP_PWM);
ds1103_GLOBAL_INTERRUPT_ENABLE();
while(1)
{
master_cmd_server();
host_service(0, 0); /*
COCKPIT service */
}
}
117
Appendices
(a) (b)
Fig. A.6.7. View of the laboratory setup

(a) Danfoss converters, (b) interface, measurements and PC with DS1103 card.
A.7 LABORATORY SETUP BASED ON ADSP 21062 (SHARC)

Some experiments concern VOC was carried-out at experimental setup of the Institute
of Energy Technology at Aalborg University (Denmark) (Fig.A.7.1). The laboratory
setup consists of a three-phase 30 kVA programmable power supply (Fig.A.7.2), two
commercial inverters controlled by two DSP’s (ADSP 21062) and a motor-generator
setup as active load.
PC
RS232
VLT 3008 VLT 3008 SIEMENS
3-phase grid
1500ix3
IM PMSM
Transformer
and
filters
Galvanic isolation &

ADC
µC µC
S/H SAB80C167 SAB80C167
IRQ
DSP DSP
ADSP21062 ADSP21062
PC
Fig. A.7.1. Laboratory setup based on sharc ADSP 21062
Fig.A.7.2. Three-phase 30 kVA programmable power supply of California Instruments (1500ix3)
118
Appendices
A.8 HARMONIC LIMITATION

IEEE 519-1992
Sets limits for harmonic voltage and currents at the Point of Common Coupling (PCC). It places
responsibility on large commercial and industrial consumers.
Voltage Distortion Limits
Bus Voltage at PCC Individual voltage distortion [%]* Total voltage distortion [%]
below 69kV 3.0 5.0
69kV to 138kV 1.5 2.5
Above 138kV 1.0 1.5
* maximum for individual harmonic
Current Distortion Limits

Maximum odd harmonic current distortion in percent of IL for general distribution systems (120V – 69kV)
ISC/IL <11 11<n<17 17<n<23 23<n<35 35<n TDD
<20 4.0 2.0 1.5 0.6 0.3 5.0
20<50 7.0 3.5 2.5 1.0 0.5 8.0
50<100 10.0 4.5 4.0 1.5 0.7 12.0
100<1000 12.0 5.5 5.0 2.0 1.0 15.0
>1000 15.0 7.0 6.0 2.5 1.4 20.0
ISC- maximum short circuit current at the PCC
IL- fundamental of the average (over 12 months) maximum monthly demand load current at PCC
TDD – total demand distortion, harmonic current distortion in % of maximum demand load current (15 or
30 minute demand)
IEC 61000-3-2 (IEC 1000-3-2)

It is addresses for small customer equipment. Emphasis on public, low-voltage and household.
IEC 1000-3-2 Limits for Class D Equipment
Harmonic order Maximum permissible Maximum permissible
harmonic current per watt harmonic current
N mA/W A
3 3.4 2.3
5 1.9 1.14
7 1.0 0.77
9 0.5 0.40
11 0.35 0.33
13<n<39 (odd har. only) 3.85/n Refer to class A
IEC 61000-3-4 (IEC 1000-3-4)

It’s addresses for larger customers (single and three-phase harmonic limits). It gives a consideration of the
short circuit ratio RSCC.
IEC 1000-3-4 limits for three-phase equipment
Minimal RSCC Upper limits for harmonic distortion Limits for individual harmonic in %
factors of I1
THD PWHD I5 I7 I11 I13
66 17 22 12 10 9 6
120 18 29 15 12 12 8
175 25 33 20 14 12 8
250 35 39 30 18 13 8
350 48 46 40 25 15 10
450 58 51 50 35 20 15
>600 70 57 60 40 25 18
2
I 
40
PWHD = ∑  n 
n =14 I1 
119
Appendices
A.9 EQUIPMENT
Instrument Type
Digital oscilloscope LeCroy 9314AM 400MHz
Digital oscilloscope Oscyloskop Tektronix TDS3014 100MHz
Analyzer NORMA D6000 - Goerz Instruments
Voltage differential probe Tektronix P5200
Current probe LEM PR30
Simualtion program SABER - Analogy
Simualtion program Matlab6.0, Simulink and Real Time Workshop
Simualtion program DESIM
120
References
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127

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Warsaw University of Technology

Faculty of Electrical Engineering

M. Sc. Mariusz Malinowski

Sensorless Control Strategies for

Warsaw, Poland - 2001

Furthermore, I thank my colleagues from the Group of Intelligent Control in Power

Methods for limitation and elimination of disturbances and harmonic pollution

Many of harmonic reduction method exist. These technique based on passive

Harmonic reduction techniques

PASSIVE BUCK BOOST

Fig.1.1 Most popular three-phase harmonic reduction techniques of current

Fig.1.3 PWM rectifier

The other interesting reduction technique of current harmonic is a PWM (active)

iload iload Ldc

Fig. 1.4 Two basic topologies of PWM rectifier:

Among the main features of PWM rectifier are:

The last technique is most promising thanks to advances in power semiconductor

The thesis consists of six chapters. Chapter 1 is an introduction. Chapter 2 is devoted to

! development of a new line voltage estimator – (Section 2.5),

Chapter 2 PWM rectifier

Chapter 4 Voltage and Virtual Flux Oriented Control (VOC, VFOC)

Chapter 5 Comparative Study

cosϕ - fundamental power factor

ΨL – virtual line flux vector

uL – line voltage vector

iL – line current vector

iLd – line current vector components in the synchronous d, q coordinates

uS, uconv – converter voltage vector

udc – DC link voltage

Sa, Sb, Sc – Switching state of the converter

AF active PWM filter

CSI current source inverter

Therefore, governments and international organizations have introduced new standards

2.2. RECTIFIERS TOPOLOGIES

Fig. 2.1 Diode rectifier

THD=76% THD=53% THD=29% THD=27,6%

Table 2.1 Features of three-phase rectifiers

Fig.2.3 Basic topologies of switch-mode three-phase rectifiers

Re ctifie r Inve rte r

Fig. 2.4 AC/DC/AC converter

PWM PWM PWM

2.3 OPERATION OF THE PWM RECTIFIER

(2 / 3)u dc e jkπ / 3

Fig. 2.8 Switching states of PWM bridge converter

2.3.1 Mathematical description of the PWM rectifier

Description of line voltages and currents

Description of input voltage in PWM rectifier

and phase voltages are equal:

Description of PWM rectifier

uc  ic  ic  u Sc 

and additionally for currents

Model of PWM rectifier in stationary coordinates (α - β )

A block diagram of α-β model is presented in Fig. 2.11.

Model of PWM rectifier in synchronous rotating coordinates (d-q)

uc  ic  u Sc 

Fig. 2.13 Power flow in bi-directional AC/DC converter as dependency of iL direction.

2.3.2 Steady-state properties and limitations

For proper operation of PWM rectifier a minimum DC-link voltage is required.

Vdc min 〉VLN ( rms ) ∗ 3 ∗ 2 = 2,45 ∗ VLN ( rms ) (2.29)