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00 Lec 00 - Course Introduction

This document provides an overview of the IEE5011 Memory Systems course taught by Professor Wei Hwang in Spring 2018. The course objectives are to learn about memory and storage systems technologies and architectures. Topics covered include memory hierarchies, cache design, DRAM, flash memory, and emerging technologies. Evaluation includes homework, a midterm exam, and a semester-long memory system design project presented at the end of the course. Reference materials and information on meeting times, instructors, and grading are also provided.

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0% found this document useful (0 votes)
140 views8 pages

00 Lec 00 - Course Introduction

This document provides an overview of the IEE5011 Memory Systems course taught by Professor Wei Hwang in Spring 2018. The course objectives are to learn about memory and storage systems technologies and architectures. Topics covered include memory hierarchies, cache design, DRAM, flash memory, and emerging technologies. Evaluation includes homework, a midterm exam, and a semester-long memory system design project presented at the end of the course. Reference materials and information on meeting times, instructors, and grading are also provided.

Uploaded by

li_wuen
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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IEE5011 – Spring 2018

記憶體系統
Memory Systems
Part 1 – Introduction
MS Course : Syllabus / (Getting Started)

Professor Wei Hwang 黃 威 教授


http://lpsoc.eic.nctu.edu.tw/course

Wei Hwang, NCTU 1 March 2018


Course Objectives
 Learn the fundamental memory and storage
systems, technologies and applications
 Gain basic understanding of hierarchy
memory models, architectures and systems
(hardware) design methodology
 Become familiar with Advanced Cloud
Computing, IoT ,Big Data ,AI and Machine
Learning Industries and Research trends

Wei Hwang, NCTU 2 March 2018


Course Contents / Focus
 Memory and Storage Systems – Introduction
 Memory Hierarchy - Multi-level Cache Organization
 Memory Technology – Fundamentals
 Embedded Cache (SRAM) Design Issues
 Off-Chip Memory Interfaces
 DRAM System Signaling and Timing
 DRAM Memory Organization and Access Protocol
 DRAM Memory Controllers
 Fully Buffered DIMM Memory Systems
 High Bandwidth 3D Memory and Hybrid Memory Cube (HMC)
 Flash Memory Controller and NOR and NAND memory
 Solid State Drives (SSDs)
 Data Center Storage and Cloud Computing
 Big Data Storage and Processor-In-Memory Computing
 Memory Hierarchy for AI / Machine Learning

Wei Hwang, NCTU 3 March 2018


Pre-requisite

 Preferable having some background or knowledge on


the following courses:
 Semiconductor devices and technology
 Digital Integrated Circuits
 VLSI Design
 Computer Organization / Architectures

Wei Hwang, NCTU 4 March 2018


Course Materials
 Getting started : Sign up for the course
 Class Lecture Notes on web-site:
(http://lpsoc.eic.nctu.edu.tw)

 Reference Text Books


[1] B. Jacob et al, "Memory Systems- Cache, DRAM and Disk",
Morgan Kaufmann 2008
[2] C. Kim and H. Lee” High-Bandwidth Memory Interface”,
Springer 2013.
[3] R. Micheloni et al “ Inside Solid State Drives (SSDs)”
Springer 2013
[4] John Hennessy and David Patterson, Computer Architecture,
6th ed., Morgan Kaufmann 2017.

 Other Reference Materials


Related IEEE Journal and Major Conference Papers

Wei Hwang, NCTU 5 March 2018


Other Reference Sources
Core material - (selected papers)
1. IEEE Journal of Solid-state Circuits (JSSC)
2. IEEE International Solid-State Circuits Conference (ISSCC)
3. Symposium on VLSI technology and circuits (VLSI)
4. International Symposium on Circuits and Systems (ISCAS)
5. IEEE Transaction on Circuits and Systems (TCAS)

CAD topics
1. Design Automation Conference (DAC)
2. International Conference on Computer Aided Design (ICCAD)

Wei Hwang, NCTU 6 March 2018


Grading Policy
 1 term-long Memory /Storage System
Projects
 Phase 1: Proposal (by week 3)
 Phase 2: Study and survey (presentation by week 7)
 Phase 3: Design results (presentation and
report by final week)
 Project Presentations & Reports (IEEE format)
 last week of classes

 5 (+/-) Home Problem Sets 20%


 Midterm Exam. (Phase 2) 30%
 Final Examination (Phase 3) 50%
--------------
100%
Wei Hwang, NCTU 7 March 2018
General Information
 Regular Class Hours: Thu. 1:30- 4:30 pm (MIRC ES201)
 Make Up Class hours: Tue. 3:30 pm -5:20 pm

 Instructor : 黃威教授, Professor Wei Hwang


Rm. 309 MIRC 電資中心
hwang@mail.nctu.eud.tw
Office Hours: Tue. 1:30-3:30 pm
 Teaching Assistants:
吳易真 (cvbnmm11@gmail.com)
葛佩玉 (pennyhwa@gmail.com)
Administration: Belinda Ma 馬振茹,
Belinda@mail.nctu.edu.tw

Course website: http://lpsoc.eic.nctu.edu.tw

Wei Hwang, NCTU 8 March 2018

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