Whites, EE 481/581 Lecture 36 Page 1 of 11

Lecture 36 – Single Stage Amplifier:

Design for Specific Gain.

Maximum gain amplifiers discussed in the previous lecture are

designed to provide the maximum gain possible from the circuit
for a given set of S parameters for a small-signal amplifier. If a
specific gain value less than the maximum is required, then
another design approach must be used, which is the topic of this
lecture.

Additional motivation for amplifiers with less than maximum

gain is related to the gain-bandwidth product concept. Increased
gain usually occurs at the expense of bandwidth and vice versa.
Generally speaking, more bandwidth from an amplifier may be
obtained if the gain is reduced.

Unilateral Transistor

Before introducing the method of design for specific gain, we

will first discuss the concept of a unilateral transistor. This is an
approximation in which S12  0 is assumed for a transistor. This
is in contrast to a so-called bilateral transistor where S12  0 .

© 2016 Keith W. Whites

Whites, EE 481/581 Lecture 36 Page 2 of 11

The unilateral approximation can substantially simplify the

design of an amplifier circuit while, in some cases, introducing
acceptable error in the gain calculation.

The assumption that S12  0 has some important consequences

for the input and output reflection coefficients in a two-port
network:
Z out Z L
Z S Z in
Z0
Output
+ Input  out  L matching Z0
VS matching  S in network
- network
l<<1 l<<1

In particular, from (12.3a) for the input reflection coefficient and

S12  0 :
 S S
in  S11  L 12 21  S11 (12.3a),(1)
1   L S22
while from (12.3b) for the output reflection coefficient and
S12  0 :
 S S
 out  S22  S 12 21  S 22 (12.3b),(2)
1   S S11

Under the unilateral transistor assumption, we see from these

two equations that in is no longer dependent on  L and that
 out is no longer dependent on  S . Consequently, the IMN and
OMN can be designed independently of one another. This is
perhaps the chief benefit of the unilateral assumption.
Whites, EE 481/581 Lecture 36 Page 3 of 11

[This is in contrast to the maximum transducer gain amplifier

design of a bilateral transistor in the previous lecture where the
IMN and the OMN needed to be designed simultaneously,
which lead to the design equations (12.40a) and (12.40b).]

Using (1) and (2) in the expression for GT [from (12.13) in the
text] provides what is called the unilateral transducer gain, GTU,
given as
1 |  S |2 1 |  L |2
GTU  | S21 |2
(12.15),(3)
|1   S S11 |2
|1  S 22 L |2

The error in gain calculated by the unilateral approximation is

sometimes quantified through the ratio of GTU to the regular (or
“bilateral”) transducer gain GT. As given in the text, this ratio is
bounded as
1 GT 1
  (12.45),(4)
1  U  GTU 1  U 
2 2

where U is the unilateral figure of merit defined as

S11 S 21 S12 S 22
U
  
(12.46),(5)
1  S11 1  S 22
2 2

The unilateral assumption is often found acceptable when the

error is less than approximately 0.5 dB or so.

We have found that this expression in (4) is actually not

correct. You will be investigating this in your homework.
Whites, EE 481/581 Lecture 36 Page 4 of 11

Constant Gain Circles

The unilateral transducer gain in (3) is the product of three terms

GTU  GSU G0GLU (6)
1  S 1  L
2 2

where GSU  , GLU  (7),(8)

1  S11 S 1  S 22 L
2 2

G0  S 21
2
and (9)
The S parameters of the transistor are fixed by the device itself
as well as the particular DC biasing.

To achieve a specific gain, which is less than the maximum,

from the transistor amplifier circuit, mismatch will be
purposefully designed into the input and/or output “matching”
networks to yield the gain we seek.

In other words, the source and load gain factors in (7) and (8)
will be adjusted downward from their maximum values GSU max
and GLU max in order to achieve the specified gain. As we
discussed in the previous lecture, the maximum GS occurs when
there is a conjugate match at the transistor input ( Z S  Z in* ), so
that for a unilateral device
 S  *in  *
 S11 (10)
(1)

Likewise, the maximum GL occurs when there is a conjugate

match at the transistor output ( Z L  Z out
*
) so that
Whites, EE 481/581 Lecture 36 Page 5 of 11

 L  *out  *
 S 22 (11)
(2)

Applying (10) in (7) and (11) in (8) leads to an expression for

the maximum unilateral transducer gain, GTU max , given as
1 1
GTU max   GSU max G0GLU max
2
S 21 (12)
1  S11 1  S 22
2 2

where the maximum source and load gain factors for the
unilateral device are
1
GSU max  (12.47a),(13)
1  S11
2

1
and GLU max  (12.47b),(14)
1  S 22
2

We will define normalized gain factors gS and gL to quantify the

amount of reduction in the source and load gain factors needed
to achieve the desired gain. These factors are given as
1  S
 
2
GSU
gS   
2
 1 S11 (12.48a),(15)
GSU max (7),(13) 1  S11 S 2

1  L
 
2
G
g L  LU  1  S 22
2
and  (12.48b),(16)
1  S 22 L
2
GLU max (8),(14)

so that 0  g S  1 and 0  g L  1.

As shown in the text, (15) and (16) can be cast in the forms
 S  CS  RS and  L  CL  RL , (17),(18)
respectively, where
Whites, EE 481/581 Lecture 36 Page 6 of 11

g S S11*
CS  (12.51a),(19)
1  1  g S  S11
2

RS 

1  g S 1  S11
2
 (12.51b),(20)
1  1  g S  S11
2

*
g L S 22
and CL  (12.52a),(21)
1  1  g L  S22
2

RL 

1  g L 1  S 22
2
 (12.52b),(22)
1  1  g L  S22
2

As we’ve seen many times now, (17) and (18) are equations for
circles in the complex  S and  L planes, respectively. Any
value of  S or  L on these circles will produce the desired
normalized gain factor.

These so-called constant gain circles can be drawn on a Smith

chart to facilitate the design of an amplifier circuit for a
specified gain, which is illustrated in the following example.

Example N36.1 (Text example 12.4). Design an amplifier for 11

dB gain at 4 GHz. Plot the constant gain circles for GS = 2 dB
and 3 dB, and GL = 0 dB and 1 dB. Calculate and plot the input
return loss and the overall amplifier gain from 3 to 5 GHz. The
FET S parameters, referenced to 50-system impedance, are:
Whites, EE 481/581 Lecture 36 Page 7 of 11

f(GHz) S11 S21 S12 S22

3.0 0.80  90 2.8100 0 0.66  50
4.0 0.75  120 2.580 0 0.60  70
5.0 0.71  140 2.3 60 0 0.58  85

Since S12  0 , we have a unilateral transistor. (This is just an

approximation for a real device, of course, that has a small S12 .)

The first step in this design process is to ensure that the device is
unconditionally stable at 4.0 GHz. With S12  0 , the mu stability
factor is
1  S11 1  S11
2 2

 
S22  S11  S 21S12
*
S22  S11* S11S 22
If S11  1 and S22  1 then  > 1, so this FET is unconditionally
stable.

From (13) and (14), the maximum gain factors at 4 GHz are
1
GSU max   2.29   3.59 dB 
1  0.752
1
and GLU max   1.56   1.94 dB 
1  0.60 2

Additionally, from (9)

G0  S21  2.52  6.25   7.96 dB 
2

Consequently, from (12) the maximum unilateral transducer

gain from this FET at 4 GHz is the sum of these dB factors:
GTU max  3.59 dB  1.94 dB  7.96 dB  13.50 dB
Whites, EE 481/581 Lecture 36 Page 8 of 11

Only 11-dB transducer gain is requested, so there is an extra 2.5

dB of gain.

We’ll arbitrarily choose GSU  2 dB (reducing 1.59 dB) and

GLU  1 dB (reducing by 0.94 dB) to reach 11 dB overall gain,
as were chosen in the text.

From (15) and (16):

GSU 102 10 GLU 101 10
gS    0.69 and g L    0.81
GSU max 2.29 GLU max 1.56
Using these values in (19)-(22) gives the parameters for the
constant gain circles to be
CS  0.63120º and RS  0.17
while CL  0.52 70º and RL  0.30
These circles are drawn on the Smith chart below (Fig. 12.8),
along with the GS = 3 dB and GL = 0 dB circles.

The next step is to choose S and L values on these circles.

There are an infinite number of possibilities, but the points
marked on the Smith chart
 S  0.33120º and  L  0.2270º (23),(24)
are those closest to the origin and provide the best match at 4
GHz. Presumably, these will also lead to a broader bandwidth.
Whites, EE 481/581 Lecture 36 Page 9 of 11

Notice the points GSmax and GLmax . These are actually the points
CS max and CL max from (19) and (21), respectively, with g S  1
and g L  1, respectively. Think of these as constant gain circles
with radius equal to zero, which is what they actually are.

The final step is to design the input and output “matching”

networks to provide the necessary amount of mismatch in the
IMN and OMN dictated by (23) and (24).
Whites, EE 481/581 Lecture 36 Page 10 of 11

Most any type of lossless matching network could be used for

this function. Your text chose shunt open circuit stubs, as shown
in the figure below (Fig. 12.8). (The design process for this stub
design is identical to that discussed in Example N35.1)

The resulting unilateral transducer gain GTU and return loss

(-RL) are shown as well, as computed from a CAD package.

 L  0.2270º
 S  0.33120º

A gain of approximately 11 dB was achieved at 4 GHz, with a

return loss of approximately 5 dB (which is not too good, but a
necessary byproduct to reduce the gain by 2.5 dB). The relative
bandwidth over which GTU varies by less than  1 dB is
approximately 25%. This is significantly larger than that for the
Whites, EE 481/581 Lecture 36 Page 11 of 11

maximum gain amplifier we designed in Lecture 35, though a

different transistor was used in that example so a direct
comparison of the results from these two examples is not
accurate.