Simplified MIPS Datapath: Add Sub and or SLT Beq LW SW
Simplified MIPS Datapath: Add Sub and or SLT Beq LW SW
Simplified MIPS Datapath: Add Sub and or SLT Beq LW SW
Consider the simplified MIPS datapath below, which supports the add, sub, and, or,
slt, beq, lw and sw instructions:
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Latency Critical Path 2
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Execution Paths in the Data Path Critical Path 3
For a given instruction, some datapath components are relevant (logically necessary) and
some are not.
Take add: 7
2
3
4
5 6
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Execution Paths in the Data Path Critical Path 4
For a given instruction, some datapath components are relevant (logically necessary) and
some are not.
Take add: 2
1
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Path Latency Critical Path 5
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Path Latency Critical Path 6
Assuming the same component latencies, what is the latency of this path?
2
3
4
5 6
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Instruction Latency Critical Path 7
The latency of an instruction is the latency of the longest path necessary for the execution
of that instruction.
For the add instruction in this datapath, the latency would be…?
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Datapath Latency Critical Path 8
The latency of of the datapath is the maximum latency among the instructions that the
datapath supports.
CS@VT October 2009 Computer Organization I ©2006-09 McQuain, Feng & Ribbens