IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO.

2, MARCH 2005 425

On the Practical Design of a Sliding Mode

Voltage Controlled Buck Converter
Siew-Chong Tan, Student Member, IEEE, Y. M. Lai, Member, IEEE, Martin K. H. Cheung, and
Chi K. Tse, Senior Member, IEEE

Abstract—This paper presents a simple and systematic approach Concurrently, there was also an alternative approach of
to the design of a practical sliding mode voltage controller for buck limiting the switching frequency, which is through the incor-
converters operating in continuous conduction mode. Various as- poration of a constant ramp function into the controller to
pects of the design, including the associated practical problems and
the proposed solutions, are detailed. A simple and easy-to-follow determine the switching of the converter [7], [15]. The main
design procedure is also described. Experimental results are pre- advantage of this approach is that the switching frequency
sented to illustrate the design procedure. is constant under all operating conditions, and it is easily
Index Terms—Buck converter, continuous conduction mode, controllable through varying the ramp signal. Basically, there
hysteresis band, sliding mode control, variable structure system. are two methods of implementing this constant frequency
operation. The first method is to encode the ramp signal into
the discontinuous SM switching function of the controller [15].
I. INTRODUCTION The advantage of this method is that it is straightforward and
simple to implement. However, this comes at an expense of
S LIDING mode (SM) controllers were introduced initially
for variable structure systems (VSS) [1]–[4]. Characterized
by switching, dc/dc converters are inherently variable structured
additional hardware circuitries, as well as deteriorated transient
response in the system’s performance caused by the superpo-
[5]. Therefore, it is appropriate to apply SM controllers to dc/dc sition of the ramp function upon the SM switching function.
converters. This is especially true for buck converters operating The second method is to compare the continuous input signal
in the continuous conduction mode (CCM), which have measur- (commonly termed as ) generated from the SM equations
able continuous controllable states (output voltage and its time derived from the equivalent control method, with the ramp
derivative) [5], [6]. waveform to create the switching operation [7]. Conceptually,
Although well known for their stability and robustness toward this is analogous to the way in which fixed switching frequency
parameter, line, and load variations (ability to handle large tran- is obtained in classical PWM control schemes whereby the
sients), SM controllers are seldom used in power converters. control signal is compared to the ramp waveform [16]. The
This is mainly due to the lack of understanding in its design advantage of this method over the previous method is that
principle by power supply engineers [7], as well as the lack of a there is no need for additional hardware circuitries since the
systematic procedure in existing literature, which can be used to switching function is replaced by the PWM modulator and that
develop such controllers. This can be attributed to the fact that transient response is not deteriorated. However, the drawback
much of the work on the subject has been reported from the con- of this method is that the implementation of the equivalent
trol’s viewpoint, rather than the circuit’s viewpoint. Hence, the control law to obtain requires computations that are too
focus had been on the theoretical aspects of the control, while complicated to be implemented with analog controllers [8]. On
the practical aspects of the implementation are still rarely dis- the other hand, even though possible, the implementation of
cussed [5]–[13]. digital controllers on power converters is costly and unpopular.
Consequently, many design issues pertaining to the im- Considering that these methods were introduced with the pri-
plementation of SM controlled converters have not been mary objective of suppressing high switching frequency [14],
sufficiently covered. One such issue is on the design and their disadvantages probably outweigh their advantages since
constriction of the converter’s switching frequency. Although this may easily be performed by controlling the hysteresis band
different methods (hysteresis; constant sampling frequency; of the SM switching function.
constant on-time; constant switching frequency; and limited Hence, one objective of this paper is to introduce a mathemat-
maximum switching frequency) were proposed to limit the ical model for the hysteresis band method that was originally
switching frequency [14], they fall short of a set of systematic proposed in [14], so that engineers may conveniently adopt it
design methods and implementation criteria. for the implementation of the SM controller. Nevertheless, this
paper is still principally focused on introducing a simple ap-
proach that is easily applicable in the development of a sliding
Manuscript received August 22, 2003; revised July 30, 2004. This work was
supported by a Grant provided by The Hong Kong Polytechnic University under mode voltage controlled (SMVC) buck converter, to bridge the
Project G-T379. Recommended by Associate Editor P. Mattavelli. gap between the control principle and circuit implementation.
The authors are with the Department of Electronic and Information Engi- To present a complete exposition, mathematical derivations and
neering, Hong Kong Polytechnic University, Hong Kong (e-mail: ensctan@
eie.polyu.edu.hk). theoretical analyzes which extend from the work of [5] are firstly
Digital Object Identifier 10.1109/TPEL.2004.842977 performed. Moreover, the approach is presented in a manner
0885-8993/$20.00 © 2005 IEEE
426 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 2, MARCH 2005

The graphical representation of individual substructures of

the system with 1 and 0, for different starting
conditions, are shown in Fig. 2. It can be seen that when ,
the phase trajectory for any arbitrary starting position on the
phase plane will converge to the equilibrium point (
, 0) after some finite time period. Similarly, when
, all the trajectories converge to equilibrium point ( ,
0). These characteristics will be exploited for the design of
the SM voltage controller.

B. Design of an Ideal SM Voltage Controller

Fig. 1. Basic structure of an SMVC buck converter. In SM control, the controller employs a switching function
to decide its input states to the system [1]. For SM voltage con-
involving only a standard SMVC buck converter model and troller, the switching state can be determined from the control
some simple guided steps and design equations. This allows de- parameters and using the switching function
signer to skip through laborious preliminary derivations when
performing the controller’s design. (3)
Section II details the theoretical derivation of an ideal SMVC
buck converter, the description of the problems associated with where is the control parameter (termed as sliding coefficient)
practical implementation, and the proposed solutions to these to be designed; ; and . By enforcing
problems. Section III presents a standard converter model with , a sliding line with gradient can be obtained. The pur-
a simple design procedure. In Section IV, the experimental re- pose of this sliding line is to serve as a boundary to split the
sults under various operating conditions are given. These exper- phase plane into two regions. Each of this region is specified
iments were conducted on a converter that was designed using with a switching state to direct the phase trajectory toward the
the proposed procedure. Finally, Section V gives the conclusion sliding line. It is only when the phase trajectory reaches and
to the paper. tracks the sliding line toward the origin that the system is con-
sidered to be stable, i.e., 0 and 0.
The specification of the switching state for each sector in the
II. THEORETICAL DERIVATION case of a second order system like the buck converter can be
graphically performed by observing the behavior of the trajecto-
This section covers the theoretical aspects of the SMVC con- ries in Fig. 3, which is a combination of the two plots in Fig. 2. It
verter. Complete mathematical derivations of both the ideal and can be observed that if the phase trajectory is at any arbitrary po-
practical converter designs are presented. sition above the sliding line ( 0), e.g., point , must
be employed so that the trajectory is directed toward the sliding
A. Mathematical Model of Buck Converter line. Conversely, when the phase trajectory is at any position
To illustrate the underlying principle, the state space descrip- below sliding line, e.g., point , 0 must be employed for
tion of the buck converter under SM voltage control, where the the trajectory to be directed toward the sliding line. This forms
control parameters are the output voltage error and the voltage the basis for the control law
error dynamics (in phase canonical form) [8], is first discussed. when
Fig. 1 shows the schematic diagram of an SMVC buck con- (4)
when
verter. Here, the voltage error and the voltage error dynamics
(or the rate of change of voltage error) under CCM, can be Although abiding the hitting condition [5], which states that
expressed as the system trajectory must eventually reach the sliding line, the
control law in (4) only provides the general requirement that
the trajectories will be driven toward the sliding line. However,
there is no assurance that the trajectory can be maintained on this
(1) line. To ensure that the trajectory is maintained on the sliding
line, the existence condition, which is derived from Lyapunov’s
second method [17] to determine asymptotic stability, must be
where , , are the capacitance, inductance, and load obeyed [1], [6]
resistance, respectively, , , and are the reference,
input, and sensed output voltage, respectively, 1 or 0 is the (5)
switching state of power switch . Then, by differentiating
(1) with respect to time, the state space model can be obtained Thus, by substituting the time derivative of (3), the condition
as for SM control to exist is

for
(2) (6)
for
TAN et al.: SLIDING MODE VOLTAGE CONTROLLED BUCK CONVERTER 427

(a) (b)
Fig. 2. Phase trajectories of the substructure corresponding to (a) u =1 and (b) u =0 for different starting (x ;x ) positions.

Fig. 4. Regions of existence of SM in phase plane: (a)  > 1=R C and

(b)  < 1=R C .

outside [as shown in Fig. 4(a)]. This results in an overshoot

in the voltage response when . Hence, for the prac-
Fig. 3. Phase trajectories of the substructure corresponding to both u =1 and
u =0 for different (x ; x ) starting positions. tical condition that , the system trajectory will be
bounded within the region . Taking this
into account, the maximum existence region will occur when
where is an arbitrarily small positive quantity. Substituting (2)
.
and (4) into (6), the inequalities become
Furthermore, by manipulating (3), we have

(9)

(7) where is any point in time and is the voltage error at

. From this, it can be understood that the choice of in the
SM design is more than controlling the existence region. It also
where controls the dynamic response of the system with a first order
time constant of

(8) (10)

The above conditions are depicted in Fig. 4 for the two respec- Hence, to ensure that is high enough for fast dynamic response
tive situations: (a) and (b) . In both fig- and low enough to maintain a large existence region, it is pro-
ures, Region 1 represents 0 and Region 2 represents 0. posed to set
SM will only occur on the portion of the sliding line, , that
covers both Regions 1 and 2. In this case, this portion is within (11)
and , where is the intersection of 0 and 0; and
is the intersection of 0 and 0. Since the phase trajec- It should however be noted that must be a positive quantity
tory will slide to the origin only when it touches 0 within to achieve system stability. This can be analyzed from (7) and
, it will overshoot the sliding line if the trajectory landed (9) by the substitution of a negative quantity, resulting in,
428 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 2, MARCH 2005

respectively, a phase trajectory that moves away from the phase

plane origin and an that does not tend to zero.

C. Design of a Practical SM Voltage Controller

In this section, a practical SM voltage controller is consid-
ered. The sliding line defined in the previous section is rede-
fined to accommodate for hardware limitations. Additionally, Fig. 5. Phase trajectory for (a) ideal SM operation and (b) actual SM operation
a hysteresis band is introduced to the sliding line as a form of with chattering.
frequency control to suppress high frequency switching. The re-
lationship of hysteresis band versus switching frequency of the
SMVC buck converter is derived. at . In addition, the response time is still maintained
1) Redefinition of Sliding Line: As previously mentioned, at .
SM controller requires the continuous assessment of the param- 2) Introduction of Hysteresis Band: Ideally, a converter will
eters and for its control. By substituting (1) and (9) into switch at infinite frequency with its phase trajectory moving on
(3), we have the sliding line when it enters SM operation [see Fig. 5(a)].
However, in the presence of switching imperfections, such as
(12) switching time constant and time delay, this is not possible. The
discontinuity in the feedback control will produce a particular
where and . From the equation, dynamic behavior in the vicinity of the surface trajectory known
the terms ( ) and are the feedback state variables as chattering [see Fig. 5(b)] [1]–[4].
from the converter that should be amplified by gain coefficients If the chattering is left uncontrolled, the converter system
and respectively, before a summation is performed. This, will become self-oscillating at a very high switching frequency
from a practical perspective, does generate a problem. Noting corresponding to the chattering dynamics. This is undesirable
that capacitance in power converters is usually in the micro- as high switching frequency will result in excessive switching
farad ( ) range, its inverse term will be significantly higher losses, inductor and transformer core losses, and EMI noise is-
than and . Hence, the overall gain coefficients and sues [18]. Hence, most PWM power supplies are designed to op-
will become too high for practical implementation. If forcibly erate with switching frequencies between 40 kHz and 200 kHz
implemented, the feedback signals may be driven into satura- [18]. Furthermore, since chattering is introduced by the imper-
tion, thereby causing (12) to provide unreliable information for fection of controller ICs, gate driver, and power switches, it is
the control. difficult to predict the exact switching frequency. Hence, the de-
In view of that, it is simpler to reconfigure the switching func- sign of the converter and the selection of the components will
tion to the following description: be difficult.
To solve these problems, the control law in (4) is redefined as
(13)
when
(17)
when
where ; and . From (1) and
(9), we get
where is an arbitrarily small value. The reason for introducing
(14) a hysteresis band with the boundary conditions and
is to provide a form of control to the switching frequency of
the converter. This is a method commonly employed to alleviate
Thus, the practical implementation of becomes independent the chattering effect of SM control [17]. With this modification,
of , thereby reducing the amplification of the feedback signals. the operation is altered such that if the parameters of the state
With this sliding line, the conditions for SM control to exist are variables are such that , switch of buck converter
will turn on. Conversely, it will turn off when . In the
region , remains in its previous state. Thus, by
introducing a region where no switching occurs,
(15) the maximum switching frequency of the SM controller can be
controlled. This alleviates the effect of chattering. Additionally,
it is now possible to control the frequency of the operation by
where varying the magnitude of .
3) Calculation of Switching Frequency: To control the
switching frequency of the converter, the relationship between
(16) the hysteresis band, , and switching frequency, , must be
known.
An interesting point here is that although there is modification to Fig. 6 shows the magnified view of the phase trajectory when
the equations, the maximum existence region will still occur it is operating in SM. and are the vectors of state variable
TAN et al.: SLIDING MODE VOLTAGE CONTROLLED BUCK CONVERTER 429

Therefore, the time period for one cycle in which the phase tra-
jectory moves from position to is equivalent to (22) shown
at the bottom of the page. Since the cycle is repeated (cyclic)
throughout the SM steady-state operation, the frequency of the
converter when it is operating in SM can be expressed as (23)
shown at the bottom of the page. Using , the above
equation becomes

(24)
Considering that and are nonconstant parameters con-
Fig. 6. Magnified view of the phase trajectory in SM operation. sisting of respectively dc signals of and and time varying
perturbations of and , we can resolve (24) into
velocity for and , respectively. It was previously (25)
derived in [2] that
using small-signal approximation where

(26)
(18)

where is the time taken for vector to move from position (27)
to ; and is the time taken for vector to move from
position to . By substituting in (18) with representing the steady-state (nominal cyclic) switching
frequency and representing the ac varying (perturbed) fre-
(19) quency of the converter. This indicates that if there are
significantly small variations in the input and output voltages,
i.e., and , the converter will be operating
where
at a steady-state switching frequency of with very little ac
for frequency perturbation, i.e., . Since only the nom-
for inal steady-state operating conditions are considered in the
controller’s design, only (26) is required when it comes to the
we have design of the steady-state switching frequency of the converter.

III. STANDARD DESIGN PROCEDURE

(20) A standard SMVC buck converter module is proposed in this
section, along with a step by step design procedure for practical
Further substitution of (15) into (20) results in implementation. A design example is provided for illustration.

A. Standard SMVC Converter Model

Fig. 7 shows the proposed SMVC buck converter. The SM
controller comprises basically a differential amplifier circuit
(21) V ; a voltage follower circuit ; a difference amplifier circuit
; and a noninverting Schmitt Trigger circuit . Similar to

(22)

(23)
430 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 2, MARCH 2005

Fig. 7. Standard SMVC buck converter.

Fig. 8. Calculated  values for inductances of 50 H, 100 H, 110.23 H
(actual inductance), and 150 H at switching frequencies of up to 300 kHz.
TABLE I
SPECIFICATIONS OF BUCK CONVERTER
Choosing as 870 , we get .
3) Step 3: From (14), the gain required for the amplification
of the signal ( ) is . Hence, V and V are
related by

V V (30)

Choosing V , we get V . Additionally,

the resistors, , for the difference amplifier circuit: , are
chosen as 10 k .
4) Step 4: The parameter of the hysteresis band, , can be
conventional schemes, the feedback sensing network for is obtained from the re-arranged form of (26), i.e.,
provided by the voltage divider circuit, and . Addition-
ally, a low resistance current transformer is placed in series
with the filter capacitor to obtain the capacitor current, . (31)

B. Design Steps where , , and are the nominal parameters of the con-
The design of the buck converter is well covered in the lit- verter. A plot giving the calculated values for different induc-
erature [18]–[20]. Our discussion here starts with the assump- tances and switching frequencies is shown in Fig. 8.
tion that the converter’s parameters are known and are given in The actual inductance, , used in the design is 110.23 .
Table I. It should be noted that for CCM. Thus, substituting
These parameters are calculated on the basis that the con- into (31), is calculated as 0.136.1
verter is to be operated in CCM for 13 V to 30 V and 5) Step 5: The setting of for the hysteresis band can be per-
0.5 A to 4 A. The maximum peak to peak ripple voltage formed by adjusting the ratio of and of , using an
is 50 mV. equation derived from the mathematical description of a nonin-
1) Step 1: The current sensing gain, , is set at a value such verting Schmitt Trigger (38), i.e.,
that the measured capacitor current, is equal to the ac-
tual capacitor current, . (32)
2) Step 2: Setting reference voltage 3.3 V, is cal-
culated using the expression
where and are respectively the positive and nega-
tive voltage supplies to Schmitt Trigger . Choosing as
(28) 110 , resistor is set as 12 .
1The presence of hysteresis band in switching function introduces an error

Also, and are related by in the output voltage. It is important to limit the hysteresis band  to a small
value to minimize this error. On the other hand, if  is too small, it may be very
sensitive to change of  (i.e., high df =d). A good value is to set  in the range
(29)  
0:1  0:2. Otherwise, a different inductance may be used to keep  within
the range.
TAN et al.: SLIDING MODE VOLTAGE CONTROLLED BUCK CONVERTER 431

calculated and simulated data is mainly due to component tol-

erances and finite time delay of practical circuitries. In practical
development, fine tuning of is still required to achieve the de-
sired .
Fig. 11 shows the graphs of the measured average switching
frequency and average output voltage against for load
resistances 3, 6, and 12 . From the figure, is notably
higher with lower , and is lower with lower . Addi-
tionally, a major point to highlight is that at low , i.e., high
switching frequency, the voltage regulation is tighter and more
accurate. In our design, by setting 0.1 0.2 in the design,
we limit the voltage accuracy within 0.12 V (i.e., of
) error.

B. Steady-State Performance
Our experiment hereafter uses a controller that is fine-tuned
to a switching frequency of 200 kHz by replacing with a
Fig. 9. Full schematic diagram of the SMVC buck converter prototype. 16 k resistor, thereby setting 0.1.
Fig. 12 shows an example of the output voltage ripple, in-
ductor current, and switching state waveforms of the SMVC
buck converter at steady-state operation. Performing to design
expectation, the converter operates at an average switching fre-
quency of 199 kHz, with small frequency fluctuations, and
the output voltage ripple (without considering the ringing
oscillation) is around 10 mV (i.e., of ), under the
nominal operating condition 24 V and .

C. Load Variation
Fig. 13 gives the experimentally measured and for load
resistance . It can be concluded that voltage
regulation of the converter is robust to load variation, with only
a 0.37 V deviation (i.e., 3.1% of ) in for
the entire load range, i.e., load regulation averages
at 0.04 V . Additionally, the experimental readings also indi-
cate that there is a change of switching frequency when the load
vary. From the figure, the variation of switching frequency with
respect to load resistance averages at .
Fig. 10. Calculated, simulated, and experimentally measured average Theoretically, the nonlinear expression of can be ob-
switching frequencies f at nominal operating condition V = 24 V and
R = 6
for different hysteresis band  settings. tained by differentiating (23) with respect to , i.e.,

IV. EXPERIMENTAL RESULTS (33)

This section evaluates the performance of the SMVC buck

converter that is designed using the procedure described in D. Line Variation
Section III. The full schematic diagram of the experimental
prototype is shown in Fig. 9. The experimentally measured and for input voltage
range V 30 V are plotted in Fig. 14. It can be
observed that both and increase with increasing .
A. Verification of Design Equation
Specifically, output voltage deviation is 0.14 V (i.e., 1.2% of
Fig. 10 shows the graphs of the converter’s average switching ) for the entire input range, i.e., line regulation
frequency for different values at nominal operating condi- averages at 8.235 mV/V. The variation of switching
tion V and , that are obtained from calcu- frequency with respect to input voltage averages
lation, simulation, and experiment. Specifically, the calculation at 10.176 kHz/V. Theoretically, the nonlinear expression of
is performed using the proposed design (26) and the simulation can be obtained by differentiating (24) with respect to
is carried out in Matlab/Simulink using the circuit expression , i.e.,
of the proposed controller. Basically, the simulation and experi-
mental data are in good agreement with the calculated data. The
(34)
small discrepancy between the experimental data and both the
432 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 2, MARCH 2005

Fig. 11. (a) Experimentally measured average switching frequency f and (b) average output voltage V at V = 24 V and R = 3, 6, and 12
for different
hysteresis band  settings.

Fig. 13. Experimentally measured values of average switching frequency f

and average output voltage V for different load resistance R .
Fig. 12. Waveforms of V , i , and u at steady-state operation under nominal
operating conditions V = 24 V and R = 6
.
, and (f) , respectively. The re-
sults are summarized in Table II.
Fig. 15 shows the output voltage ripple waveform of the con-
Noticeably, as increases, the dynamic response of the con-
verter operating at nominal load when is sinusoidally varied
verter improves with shorter settling time and lower overshoots.
from 17.5 V to 29.0 V at a frequency of 100 Hz. This was per-
This is in good agreement with our theory that dynamic response
formed to test the robustness of the converter to a slowly varying
improves with increasing . However, when is too high, the
input voltage. It is found that the maximum peak to peak output
converter is unstable [see Fig. 16(f)]. This is due to the distor-
voltage is around 235 mV, i.e., the input voltage ripple rejection
tion of the control signal caused by the saturation of amplified
is 33.8 dB at 100 Hz. The converter has displayed adequate
feedback signal [refer to the discussion related to (12)].
control performance against audio susceptibility.
Fig. 17(a)–(f) show the output waveforms of the startup oper-
ation for the controller with the same set of sliding coefficients.
E. Variation The purpose is to examine the oscillatory behavior of the re-
The dynamic behavior of the converter corresponding to dif- sponse due to , which exercises direct influence on the exis-
ferent sliding coefficients is also investigated. Fig. 16(a)–(f) tence region in the control. Consistent with theory, the degree
show the output waveforms of the operation with load resis- of oscillation increases with the increasing . Since the magni-
tance that alternates between and tude of the oscillations will be high for heavy loads, the effect
for the controller with sliding coefficients: (a) , of oscillation due to should be taken into consideration when
(b) , (c) , (d) , (e) designing high power converters.
TAN et al.: SLIDING MODE VOLTAGE CONTROLLED BUCK CONVERTER 433

current mode and voltage mode converters. Suggestions to alle-

viate the various drawbacks are also provided.

A. Advantages
The main advantage of the SMVC converter is the simplicity
in the controller’s design and implementation. Unlike conven-
tional current mode and voltage mode controllers which require
special techniques (e.g., pole placement method) to estimate
their controllers’ gain parameters, the SM voltage controller’s
parameters can be precisely calculated from simple mathemat-
ical equations.
Furthermore, since the SMVC controller is designed from the
large-signal converter model, it is stable and robust to large pa-
rameter, line, and load variations. This is also a major advantage
over conventional current mode and voltage mode controllers
Fig. 14. Experimentally measured values of average switching frequency f which often fail to perform satisfactorily under parameter or
and average output voltage V for different input voltage V .
large load variations because they are designed from the lin-
earized small-signal converter models [21].

B. Disadvantages
One major disadvantage of the proposed SMVC converter is
that it has a nonzero steady-state voltage error. This is due to
the adoption of the phase canonical form in the design, which
makes the controller a proportional-derivative (PD) type of feed-
back controller [21], and the presence of hysteresis band in the
switching function, which being nonzero in its average value
also introduces an error in the output voltage [5].
Another disadvantage of the proposed converter is that its
steady-state switching frequency is affected by the line and load
variations (refer to Figs. 13 and 14). For line variation, this
can be understood from (26) where with preset design param-
eters , , and , a deviation in the input supply, , will re-
sult in a change in the steady-state dc switching frequency, .
Fig. 15. Waveforms of V and V under the operating condition whereby V is Specifically, increases as increases. For load variation,
sinusoidally varied from 17.5 V to 29 V at a frequency of 100 Hz, and R = the change in switching frequency is caused by two compo-
6
. nents. First, it is due to the imperfect feedback loop that causes
a small steady-state error in the output voltage which in turn
F. ESR Variation causes small deviation of the switching frequency from its nom-
The converter is also subjected to an ESR variation test. inal value [see (26)]. Second, it is due to the mismatch be-
The idea is to investigate the effect of the output capacitor’s tween the nominal load and operating the load. This can be un-
ESR on the switching behavior of the converter. Fig. 18(a)–(c) derstood from (23) where with preset control parameter
illustrates the experimental waveforms of the converter with for a certain nominal load , a change in
the same output capacitance, for different ESR values (25 , operating load from its nominal value will lead to a fre-
125 , and 225 ), operating under nominal load condi- quency not given by (24).
tions 24 V and . As expected, output voltage
ripples are higher with larger values of ESR. However, the C. Possible Solutions
variation of ESR does not influence the behavior of capacitor The steady-state voltage error can easily be eliminated by
current. In all cases, the peak-to-peak capacitor current remains converting the controller into a PID-type through the introduc-
at 0.36 A, while the average switching frequency is at around tion of an integrator to process the voltage error signal [5], [15].
200 kHz. Hence, it is evident that output capacitor’s ESR has Such controllers are well-known and will not be discussed in
little influence on the switching frequency. this paper.
One possible method of maintaining the switching frequency
V. FURTHER DISCUSSION against line variation is by introducing an adaptive feed-for-
This section discusses the merits and drawbacks of the pro- ward hysteresis band control that varies the hysteresis band
posed standard SMVC converter as compared to conventional with the change of . Practically, this can easily be performed
434 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 2, MARCH 2005

Fig. 16. Experimental waveforms of output voltage ripple V and inductor current i under step load change that alternates between R = 12
and R = 3

for controller with sliding coefficients (a)  = 0:5=R C , (b)  = 1=R C , (c)  = 2=R C , (d)  = 10=R C , (e)  = 100=R C , and (f)  = 500=R C .

by imposing a variable power supply, and , which that becomes independent of . Hence, the effect of fre-
changes with variation, to power the Schmitt Trigger circuit quency variation caused by the mismatch between the nominal
[see (40)]. and the operating load is eliminated. Additionally, with better
An adaptive feedback controller that varies the parameter, regulated steady-state output voltage with the adaptive feed-
, with the change of load , can be incorporated to main- back control scheme [22], the issue of switching frequency
tain the switching frequency of the converter against load vari- deviation due to the variation of the output voltage is also
ation. The idea is to adaptively maintain the operating status alleviated.
at for all load conditions. Such system has been Details of the design and derivation of such adaptive feed-
proposed in [22] to improve system’s performances. Here, it forward and feedback control schemes will be addressed in the
is suggested as a means to also maintain the validity of (24) so subsequent paper.
TAN et al.: SLIDING MODE VOLTAGE CONTROLLED BUCK CONVERTER 435

TABLE II
DYNAMIC BEHAVIOR OF THE EXPERIMENTAL SMVC CONVERTER FOR DIFFERENT  SETTINGS UNDER STEP LOAD CHANGE

Fig. 17. Experimental waveforms of output voltage V and inductor current i under nominal operating conditions V = 24 V and R = 3
for controller with
sliding coefficient (a)  = 0:5=R C , (b)  = 1=R C , (c)  = 2=R C , (d)  = 10=R C , (e)  = 100=R C , and (f)  = 500=R C during startup.

Fig. 18. Experimental waveforms of output voltage ripple V , capacitor current i , and the generated gate pulse u for SMVC converter with 100 F filter
capacitor of (a) ESR = 25 m
; (b) ESR = 125 m
; and (c) ESR = 225 m
, at constant load resistance R = 6
.

VI. CONCLUSION of chattering. The relationship between the hysteresis band and
A detailed analysis of the design principle of a SMVC buck the switching frequency is derived. To facilitate implementation,
converter is presented. The discussion takes into consideration a standard SM converter module is introduced. Design guide-
the practical aspects of the converter. The sliding line for an ideal lines are provided in a simple step by step manner. The exper-
controller is redefined to meet practical limitations. A hysteresis imental results are presented to verify the converter design and
band is introduced to the sliding line to the solve the problem procedure.
436 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 2, MARCH 2005

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Considering that both and must be balanced when
powering the Schmitt Trigger, the power supply description
should be

(40) Siew-Chong Tan (S’00) received the B.Eng. (with

honors) and M.Eng. degrees in electrical and com-
puter engineering from the National University of
Singapore, Singapore, in 2000 and 2002, respec-
tively, and is currently pursuing the Ph.D. degree at
REFERENCES Hong Kong Polytechnic University, Hong Kong.
[1] V. Utkin, J. Guldner, and J. X. Shi, Sliding Mode Control in Electro- His research interests include motor drives and
mechanical Systems. London, U.K.: Taylor and Francis, 1999. power electronics.
[2] V. Utkin, Sliding Modes in Control Optimization. Berlin, Germany:
Springer-Verlag, 1992.
TAN et al.: SLIDING MODE VOLTAGE CONTROLLED BUCK CONVERTER 437

Y. M. Lai (M’92) received the B.Eng. degree in Chi K. Tse (M’90–SM’97) received the B.Eng. (with
electrical engineering from the University of Western first class honors) degree in electrical engineering and
Australia, Perth, Australia, in 1983, the M.Eng.Sc. the Ph.D. degree from the University of Melbourne,
degree in electrical engineering from University of Australia, in 1987 and 1991, respectively.
Sydney, Sydney, Australia, in 1986, and the Ph.D. He is presently a Professor with Hong Kong
degree from Brunel University, London, U.K., in Polytechnic University, Hong Kong, and his research
1997. interests include nonlinear systems and power elec-
He is an Assistant Professor with Hong Kong Poly- tronics. He is the author of Linear Circuit Analysis
technic University, Hong Kong, and his research in- (London, U.K.: Addison-Wesley 1998) and Complex
terests include computer-aided design of power elec- Behavior of Switching Power Converters (Boca
tronics and nonlinear dynamics. Raton: CRC Press 2003), coauthor of Chaos-Based
Digital Communication Systems (Heidelberg, Germany: Springer-Verlag,
2003), and co-holder of a U.S. patent. He is an Associate Editor for the
International Journal of Systems Science. Since 2002, he has been appointed as
Martin K. H. Cheung received the B.Eng. (with Guest Professor by the Southwest China Normal University, Chongqing, China.
honors) degree and the M.Phil. degree in electronic Dr. Tse received the L.R. East Prize from the Institution of Engineers, Aus-
engineering from the Hong Kong Polytechnic Uni- tralia, in 1987, the IEEE TRANSACTIONS ON POWER ELECTRONICS Prize Paper
versity, Hong Kong, in 2000 and 2003, respectively. Award in 2001, the President’s Award for Achievement in Research (twice), and
He is currently a Project Assistant in the Depart- the Faculty’s Best Researcher Award. He was an Associate Editor for the IEEE
ment of Electronic and Information Engineering, TRANSACTIONS ON CIRCUITS AND SYSTEMS PART I—FUNDAMENTAL THEORY
Hong Kong Polytechnic University. His main AND APPLICATIONS, from 1999 to 2001, and since 1999, he has been an Asso-
research interests include RF circuit design and ciate Editor for the IEEE TRANSACTIONS ON POWER ELECTRONICS.
switch-mode power supplies design.