Autonomous peripheral operation

In computing, autonomous peripheral operation is a hardware feature found in some modern microcontroller architectures to off-
load certain tasks into embedded autonomous peripherals in order to minimize latencies and improve throughput in hard real-time
applications as well as to save energy in ultra-low-power designs.

Contents
Overview
Implementations
See also
References

Overview
Forms of autonomous peripherals in microcontrollers were first introduced around 2005. Allowing embedded peripherals to work
independently of the CPU and even interact with each other in certain pre-configurable ways off-loads event-driven communication
into the peripherals to help improve the real-time performance due to lower latency and allows for potentially higher data throughput
due to the added parallelism. Since 2009, the scheme has been improved in newer implementations to continue functioning in sleep
modes as well, thereby allowing the CPU to remain dormant for longer periods of time in order to save energy. This is partially
driven by the IoT market.[1]

Conceptually, autonomous peripheral operation can be seen as a generalization of and mixture between direct memory access (DMA)
and hardware interrupts. Peripherals that issue event signals are called event generators or producers whereas target peripherals are
called event users or consumers. In some implementations, peripherals can be configured to pre-process the incoming data and
perform various peripheral-specific functions like comparing, windowing, filtering or averaging in hardware without having to pass
the data through the CPU for processing.

Implementations
Known implementations include:

Intelligent autonomous peripherals (Capture/compare unitCCU6) in Infineon XC800 series of 8051-compatible 8-bit
microcontrollers since 2005[2]
Event System (EVSYS) in Atmel AVR XMEGA 8-bit microcontrollers since 2008[3][4]
Peripheral Event System(PES) with SleepWalking[5] in Atmel AVR32 AT32UC3L 32-bit microcontrollers since
2009[6][7][8]
Peripheral Reflex System(PRS) in Energy Micro (now Silicon Labs) Gecko EFM32 32-bit ARM-based
microcontrollers since 2009[9][10][8]
IXYS/Zilog ZNEO Z16FMC 16-bit microcontrollers since 2011[11][12]
Event Link Controller (ELC) in Renesas microcontrollers since 2011
[13]
Programmable Peripheral Interconnect(PPI) in Nordic nRF 32-bit ARM-based microcontrollers since about 2011
Autonomous peripherals in InfineonXMC 32-bit microcontrollers since 2012[14]
Data Transfer Manager (DTM) in Silicon Labs Precision32 SiM3L1 32-bit ARM Cortex-M3 microcontrollers since
2012[15][8][16]
Peripheral Event System(PES) with SleepWalking in Atmel (now Microchip) SAM4L 32-bit ARM Cortex-M4
microcontrollers since 2012[17]
 Power-Smart Peripherals inFreescale (now NXP) Kinetis L 32-bit ARM Cortex-M0+ microcontrollers since 2012[18]
Event System (EVSYS) with SleepWalking[5] in Atmel (now Microchip)SAMD, SAML and SAMC 32-bit ARM Cortex-
M0+ microcontrollers since 2013[19][20]
Core Independent Peripherals(CIP) in Microchip PIC16F[21] and PIC18F[22] as well as Microchip AVR ATtiny 8-bit
microcontrollers since 2015[23][24][25]
[26]
Peripherals Interconnect Matrixin STMicroelectronics' STM32 32-bit ARM-based microcontrollers since 2015

See also
Channel I/O
Peripheral DMA controller(PDC)
Clock gating, autonomous peripheral clock gating
Power gating
CPU power dissipation
Low-power electronics
Event-driven architecture
Event-driven programming

References
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eId=db3a304412b407950112b40c64690b15)(PDF). Infineon. May 2006. XC886 CC6 V1.Archived (https://web.arch
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40c64690b15) (PDF) from the original on 2018-05-10. Retrieved 2018-05-10. "[…] Drives need realtime performance
– control loop must run faster than 2-4 PWM periods (e.g. 100-200us) – CPU performance is valuable and must be
saved for key tasks – Question: How to offload the CPU? –Answer: Build intelligent and autonomous peripherals!
[…] CC6 in a Drive application: – generate PWM patterns for all kind of motors – operate always in a safe state –
even in an error condition – interact with ADC for sensorless control of motors […] CC6 is used intensively – the
more it works autonomous the more CPU load can be saved for control algorithms […] "
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