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IES E & T Topic wise Questions

Computer Engineering

MCQ 1
The expression for the inflix equivalent of the prefix form of
+−* - ABCD/E/F + GH will be
(A) BB * C − D + E/F/G + H (B) AB * C − D + E/G/G + H
(C) AB * C − D + E/F/ (G + H ) (D) AB * C − D + E/ (F/G + H )

MCQ 2
A PASCAL function is defined as calc (var A : real; B:
real); rea begin
X : = 3.0;
Y : = 3.0;
Calc : = 5.0 * A + (B - A);
end;
If this function was called
X : = 7.0;
Y : = 1.0;
R : = Calc(X, Y);
the value of R would be
(A) 15 (B) 29
(C) 13 (D) 31

MCQ 3
Consider the following statements :
1. An assembly language program runs faster than a high level
language program to produce the desired result.
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Computer Engineering

2. An assembler which runs on a computer for which it produce

object codes is called a resident assembler.
3. A cross-assembler is an assembler that runs on a computer than
that for which it provides machine codes.
4. A one-pass assembler reads the assembly language program only
once.
Which of these statements are correct ?
(A) 1, 2 and 3 (B) 2, 3 and 4
(C) 1 and 4 (D) 1, 2, 3 and 4

MCQ 4
The principle of locality of reference justifies the use of
(A) interrupts (B) DMA
(C) virtual memory (D) cache memory

MCQ 5
If the given binary tree is traversed in post-order

then the order of nodes visited is

(A) J G E D B K H I F C A (B) D B J G E A K H F I C
(C) D J G E B K H I F C A (D) A B D E G J C F H K I

MCQ 6
Consider the following features :
1. Negative operands cannot be used.
2. When immediate operand changes, the program should be
reassembled.
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3. The program is difficult to read

4. The size of operand is restricted by word length of the computer.
Disadvantages of immediate addressing include
(A) 1 and 2 (B) 2 and 4
(C) 2 and 3 (D) 1 and 4

MCQ 7
The method used to transfer data from I/O units to memory by
suspending the memory-CPU data transfer for one memory cycle is
called
(A) I/O spooling (B) cycle stealing
(C) line conditioning (D) demand paging

MCQ 8
The access time of a word in a 4 MB main memory is 100 ns. The
access time of a word in a 32 kB data cache memory is 10 ns. The
average data cache hit ratio is 0.95. The effective memory access time
is
(A) 9.5 ns (B) 14.5 ns
(C) 20 ns (D) 95 ns

MCQ 9
In 8086 microprocessor, if the code segment register contains 1 FAB
and IP register contains 10A1, the effective memory address is
(A) 20B51 (B) 304C
(C) FBC0 (D) FDB5

MCQ 10
To have the multiprocessing capabilities of the 8086 microprocessor ,
the pin connected to the ground is
(A) DEN (B) ALE
(C) INTR (D) MN/MX

MCQ 11
Assertion (A) : The top down structured programming should be
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used for developing programs.

Reason (R) : The top down structured programming methodology
enables us to get readable and easily provable programs.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true but R is false
(D) A is false but R is true

MCQ 12
Assertion (A) The ‘do-while’ statements is used less frequently than
the ‘while’ statement.
Reason (R) : For most applications, it is more natural to test for
continuation of a loop at the beginning rather than at the end of the
loop
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true and R is false
(D) A is false but R is true

MCQ 13
Match List I (Pre terminals) with List II (Applications) and select
the correct answer using the code given below the lists :

List I List II
a. SID, SOD 1. Wait state
b. Ready 2. Interrupt
c. TRAP 3. Serial data transfer
d. ALE 4. Memory or I/O read/ write
5. Address latch control
Codes :
a b c d
(A) 3 1 5 2
(B) 3 1 2 5
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(C) 4 3 2 5
(D) 4 3 1 2

MCQ 14

The software that transfers that object program from secondary

memory to the main memory is called
(A) assembler (B) loader
(C) Linker (D) task builder

YEAR 2000

MCQ 15

If the value of x in decimal number 3954, the value of y in decimal

number computed by the given flow chart is

(A) 20 (B) 22
(C) 21 (D) 3954

MCQ 16

In C language, f −= 9 is equivalent to
(A) F =− 9 (B) f = f − 9
(C) f = 9 − 1 (D) − f = 9
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MCQ 17

A primitive computer uses a single register. The following fragment

of assembly code is written for the machine
LOAD X
MULT Y
STORE T1
MULT T1
STORE T1
LOAD Z
ADD Z
ADD T1
STORE R
Which one of the following expression is evaluated ?
(A) R : = (XY ) + Y + Z (B) R :(XY ) 2 + Y + Z
(B) R : XY 2 + Y + Z (D) R : XY 2 : (Y + Z )

MCQ 18

A single edge is added to a tree without increasing the number of

nodes. The number of cycles in the resulting graph is equal to
(A) zero (B) one
(C) two (D) indeterminate

MCQ 19

The prefix form of the expression X + Y − Z is

(A) −+ XYZ (B) +− XYZ
(C) XYZ −+ (D) XYZ +−

MCQ 20

Consider the following statements :

The horizontal microinstruction has
1. longer control word than vertical microinstruction
2. high degree of parallelism
3. slower execution than vertical microinstruction
Which of these statements is/are correct ?
(A) 1 alone (B) 2 alone
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(C) 1 and 2 (D) 2 and 3

MCQ 21
The logic operation that will selectively clear bits in register A in
those positions where there are 1’s in the bits of register B is given by
(A) A ! A + B (B) A ! AB
(C) A ! A + B (D) A ! AB

MCQ 22
Which one of the following is loaded in the main memory by the
bootstrap loader ?
(A) System data (B) User program
(C) BIOS (D) Parts of DOS

MCQ 23
If a RAM has 34 bits in its MAR and 16 bits in its MDR, then its
capacity will be
(A) 32 GB (B) 16 GB
(C) 32 MB (D) 16 MB

MCQ 24
In 8086, if the content of the code segment register is 1 FAB and the
content of the IP register is 10A1, then the effective memory address
is
(A) 1FBC0 (B) 30AC
(C) FDB5 (D) 20B51

MCQ 25
Assertion (A) : Most personal computers use static RAMs for their
main memory.
Reason (R) : Static RAMs are much faster than dynamic RAMs
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true and R is false
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(D) A is false but R is true

MCQ 26

Assertion (A) : LRU (Least Recently Used) replacement policy is not

applicable to direct mapped caches.
Reason(R) : A unique memory page is associated with every cache
page in direct mapped caches.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true and R is false
(D) A is false but R is true

MCQ 27

Consider the following instructions executed in 8086.

PUSH AX ; AX has 20 Hex in it
PUSH BX ; BX has 34 Hex in it
POP AX ;
ADD AX, BX ;
POP G
The value stored in G would be
(A) 20 Hex (B) 34 Hex
(C) 54 Hex (D) 68 Hex

YEAR 2001

MCQ 28

Which of the following conditional IF statements of Pascal are correct

?
1. If condition 1 THEN statement 1
ELSE IF condition 2 THEN statement 2 ELSE statement 3
2. IF condition 1 THEN IF condition 2 THEN statement 1 ELSE
statement 2 ELSE statement 3
3. IF condition 1 THEN IF condition 2 THEN statement 1 ELSE
statement 2
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Select the correct answer using the codes given below :

(A) 1 and 2 (B) 2 and 3
(C) 1 and 3 (D) 1, 2 and 3

MCQ 29
In an assemble, which one of the following is required for variable
names in symbol table ?
(A) Addresses (B) Values
(C) Registers (D) Storage

MCQ 30
Which of the following operations are performed on linear queues ?
1. Testing a linear queue for underflow
2. Enqueue operation
3. Dequeue operation
4. Testing a linear queue for overflow
Select the correct answer using the codes given below :
(A) 1, 2 and 3 (B) 2, 3 and 4
(C) 1, 3 and 4 (D) 1, 2, 3 and 4

MCQ 31
Effective address is calculated by adding or subtracting displacement
value to
(A) immediate address (B) relative address
(C) absolute address (D) base address

MCQ 32
The microprograms provided by a manufacturer to be used on this
micro-programmed computer are generally called
(A) software (B) netware
(C) firmware (D) hardware

MCQ 33
The control logic for a binary multiplier is specified by a state diagram.
The state diagram has four states and two inputs. To implement it by
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the sequence register and decoder method

(A) two flip-flops and 2 # 4 decoder are needed
(B) four flip-flops and 2 # 4 decoder are needed
(C) two flip-flops and 3 # 9 decoders are needed
(D) four flip-flops and 3 # 9 decoders are needed

MCQ 34

The frequency of the driving network connected between pins 1 and

2 of a 8085 chip must be
(A) equal to the desired clock frequency
(B) twice the desired clock frequency
(C) four times the desired clock frequency
(D) eight times the desired clock frequency

MCQ 35

The 8086 arithmetic instructions work on

1. signed and unsigned numbers
2. ASCII data
3. unpacked BCD data.

Select the correct answer using the codes given below :

(A) 1 and 2 (B) 2 and 3
(C) 1 and 3 (D) 1, 2 and 3

MCQ 36

Which of the following are required for a multimedia PC ?

1. CD-ROM drive, speaker and sound card.
2. Modem and network card.
3. Hardware needed to display videos and animation
4. Software needed to display videos and animation.

Select the correct answer using the codes given below :

(A) 1, 2 and 3 (B) 1, 2, 3 and 4
(C) 1, 2 and 4 (D) 1, 3 and 4
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MCQ 37
Assertion (A) : A processor can reference a memory stack without
specifying an address.
Reason (R) : The address is always available and automatically
updated in the stack pointer.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true and R is false
(D) A is false but R is true

MCQ 38
Assertion (A) : Some redundancy is useful in programming language
syntax.
Reason (R) : Redundancy makes a program easier to read and also
allows more error-checking to be done during translation.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true and R is false
(D) A is false but R is true

YEAR 2002

MCQ 39
Consider the following :
1. Sign Flag 2. Zero Flag
3. Carry Flag 4. Parity Flag
Which of the above flags of 8085 get affected by the instruction SUB
B?
(A) 1 and 2 (B) 1 and 3
(C) 3 and 4 (D) 1, 2, 3 and 4

MCQ 40
The use of a cache in a computer system increases the
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(A) available memory space for the program

(B) available memory space for data
(C) average speed for memory access
(D) addressing range of CPU

MCQ 41

Consider the following :

1. Input device 2. Arithmetic and logic unit
3. Control unit 4. Auxiliary memory
5. Main memory 6. Active hub
Which of these form part of CPU ?
(A) 1, 4 and 6 (B) 2, 3 and 6
(C) 2, 4 and 5 (D) 2, 3 and 5

MCQ 42

Which one of the following is not a characteristic of RISC processor

design ?
(A) One instruction per cycle
(B) Register-to-register operations only
(C) Simple address modes
(D) Register-to-memory operations only

MCQ 43

The following micro operations are part of interrupt cycle of a control

unit :
MAR ! save address
1. 2. MBR ! (PC)
PC ! routine address
3. Memory ! (MBR)
Which of the following is the correct order of their occurrence ?
(A) 1, 2 and 3 (B) 2, 3 and 1
(C) 2, 1 and 3 (D) 3, 1 and 2

MCQ 44

Which of the following is not a characteristic of transparent DMA

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mode of I/O operation ?

(A) The external logic steals cycles from the CPU
(B) The normal rate of execution is slowed down
(C) Only one word can be transferred at a time
(D) Data is transferred to/from memory directly

MCQ 45
The contents of accumulator in an 8085 microprocessor are altered
after the execution of the instruction ?
(A) CMP C (B) CPI 3A
(C) ANI SC (D) ORA A

MCQ 46
An 8085 microprocessor after the execution of XRA A instruction
(A) the carry flag is set (B) the accumulator contains FFH
(C) the content of accumulator is shifted by one
(D) the zero flag is set

MCQ 47
A microprocessor has 24 address lines and 32 data lines. If it uses 10
bits of opcode, the size of its Memory Buffer Register is
(A) 22 bits (B) 24 bits
(C) 32 bits (D) 14 bits

MCQ 48
In the 8086 instruction ADD DX, [BX] [CI], the addressing mode of
source operand is
(A) Register (B) Register Indirect
(C) Based indexed (D) Direct

MCQ 49
The MODEM is used with a personal computer to do which of the
following ?
(A) Convert from serial to parallel and vice versa
(B) Convert signals between TTL and RS 232 C standard and vice
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versa

(C) Contact from digital to analog signal and vice versa

(D) To convert the computer to a long distance communication link

MCQ 50

The technology used for display in PC note-books (laptop computers)

is

(A) Light Emitting Diodes display

(B) Liquid Crystal display

(C) CRT display

(D) Plasma display

MCQ 51

The computer program which converts statements written in high

level language to object code is known as

(A) Assembler (B) Compiler

(C) Disassembler (D) operating system

MCQ 52

What will be values of A and B, respectively, when printed for the

given flow chart ?

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(A) 10 and 20 (B) 5 and 15

(C) 20 and 10 (D) 15 and 5

MCQ 53

Consider the following C structure and declaration :

Struct date {
int day ;
int month ;
int year ;
} ;
Struct data * pd ;
Which of the following is the correct method to refer to the year
number ?
(A) (* pd) : year (B) (* pd) * year
(C) (* pd) " year (D) pd " year
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MCQ 54
The different classes of formal parameters used in PASCAL are
(A) value are variable parameters
(B) procedure and function parameters
(C) value, variable, procedure and function parameters
(D) variable, procedure and function parameters

MCQ 55
Which one of the following is not a linear data structure ?
(A) Array (B) Linked list
(C) Stack (D) Tree

MCQ 56
A data structure in which insertions and deletions are possible at
either end, is called a
(A) queue (B) deque
(C) stack (D) enque

MCQ 57
Consider the following registers :
1. Accumulator and B register
2. B and C registers
3. D and E registers
4. H and L registers
Which of these 8-bit registers of 8085 μP can be paired together to
make a 16-bit register ?
(A) 1, 3 and 4 (B) 2, 3 and 4
(C) 1 and 2 (D) 1, 2 and 3

MCQ 58
Consider the following instructions of 8085 μP :
1. MOV M, A 2. ADD C
3. MVI A, FF 4. CMP M
Which of these cause change in the status of flag (s) ?
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(A) 1 and 2 (B) 1, 2 and 3

(C) 3 and 4 (D) 2 and 4

MCQ 59

A Read/Write memory chip has a capacity of 64 kBytes. Assuming

separate data and address lines and availability of chip enable signal,
what is the minimum number of pins required in the IC chip ?
(A) 28 (B) 26
(D) 24 (D) 22

YEAR 2003

MCQ 60

Consider the following features in an 8085 microprocessor system

with memory mapped I/O :
1. I/O device have 16-bit addresses.
2. I/O devices accessed using IN and OUT instructions.
3. There can be maximum of 256 input devices and 256 output
devices.
4. Arithmetic and logic operations can be directly performed with
the I/O data.

Select the correct answer using the codes given below :

(A) 1, 2 and 4 (B) 1, 3 and 4
(C) 2 and 3 (D) 1 and 4

MCQ 61

In 8085 microprocessor the value of the most significant bit of the

result following the execution of any arithmetic or Boolean instruction
is stored in
(A) The carry-status flag
(B) The auxiliary carry status flag
(C) The sign status flag
(D) The zero status flag
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MCQ 62

In a microprocessor when a CPU is interrupted, it

(A) Stops execution of instructions
(B) Acknowledges interrupt and branches of subroutine
(C) Acknowledges interrupt and waits for the next instruction from
the interrupting device

MCQ 63

A certain well-known computer family represents the exponents of

its floating-point number as ‘Excess-64’ integers. Which one of the
following numbers is represented by the exponent e6 e5 e 4 e 3 e2 e1 e 0 ?
6 6
(A) e =− 64 + /2 e i
i (B) e =− 64 + / 2e i
i=0 i=0
6 6
(C) e =− 64 + /2 e i
i (D) e = 64 − / 2e i
i=0 i=0

MCQ 64

Which one of the following correctly defines a C-macro for computing

the square ?
(A) # defines sqr (x) x * x (B) # defines sqr (x) (x * x)
(C) # defines sqr (x) ((x) * (x)) (D) # defines sqr (x) (x) * (x)

MCQ 65

Consider the following declaration of C :

in (*P) ( ) ;
Which of the following is true for the above declaration ?
(A) P is pointed to function returning integer
(B) P is pointer to an array of integers
(C) P is an array of pointers
(D) P is a function returning pointer to integer

MCQ 66

Consider the following Pascal program fragment :

var i, j : integer ;
procedure Y (p, q : integer) ;
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begin
p : p - q ;
q : p + q ;
p : q - q
end ;
i : = 2 ;
j : = 3 :
Y (i, j) ;
If both parameter to Y are passed by reference, what are the values
of i and j at the end of the program fragment ?
(A) i = 0, j = 2 (B) i = 1, j = 5
(C) i = 2, j = 3 (D) i = 3, j = 2

MCQ 67

Consider the following C program :

# include < stdio.h>
main ( )
{float total = 0.0, q = 1.0, p = 2.0 ; while (p/
q>0.001)
{
q = q + q ;
total = total + p/q ;
print f (“ % f/n”, total) ;
}
}
Which one of the following is the integer that best approximates the
last number printed ?
(A) 0 (B) 2
(C) 2 (D) 3

MCQ 68

Which of the following correctly declares a pointer to an array of

integers in C ?
(A) int * P [20] ; (B) int * P ;
(C) int (*P) [20] ; (D) int * (P [20]) ;
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MCQ 69
Consider the assembler directives :
ORG 800
T : DW OFAOFH
Which one of the following is correct ?
(A) The contents of the locations 8000 and 8001 get erased
(B) The contents of the locations 8000 and 8001 remain unchanged
(C) The least significant byte OF will be stored at location 8000 and
the most significant byte FA will be stored at location 8001
(D) The least significant byte OF will be stored at location 8001 and
the most significant byte FA will be stored at location 8000

MCQ 70
Consider the following information :
An array A 61f.m@ is said to be p-ordered if A [i − p] # A [i] # A [i + p]
for each i such that p < i # m − p . For example, the array 1 4 2 6 3
7 5 8 is 2 - ordered.
In a 2-ordered array of 2N elements, what is the maximum number of
positions that an element can be from its position if the array were
1-ordered ?
(A) 1 (B) 2
(C) N/2 (D) N

MCQ 71
Which of the following are included in the architecture of computer ?
1. Addressing modes , design of CPU.
2. Instruction set, data formats.
3. Secondary set, data formats.
Select the correct answer using the codes given below :
(A) 1 and 2 (B) 2 and 3
(C) 1 and 3 (D) 1, 2 and 3

MCQ 72
The content of which of the following determines the states of the CPU
at the end of the execute cycle (when the interrupt is recognized) ?
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1. Program counter
2. Processor register
3. Certain status conditions
Select the correct answer using the codes given below :
(A) 1 and 2 (B) 2 and 3
(C) 1 and 3 (D) 1, 2 and 3

MCQ 73
The first machine cycle of an instruction is always
(A) A memory read cycle (B) A fetch cycle
(C) An I/O read cycle (D) A memory write cycle

MCQ 74
Match List I (Type of memory) with List II (Used as) and select the
correct answer using the code given below the lists :

List I List II
a. DRAM 1. Cache memory
b. SRAM 2. Main memory
c. Parallel Access 3. BIOS memory
d. ROM 4. CPU registers
Codes :
a b c d
(A) 1 2 3 4
(B) 2 1 4 3
(C) 1 2 4 3
(D) 2 1 3 4

MCQ 75
PUSH a
PUSH b
PUSH c
POP AX
POP BX
SUB AX, BX
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POP BX
ADD AX, BX
The expression computed by the above program and stored in AX is
(A) a + b − c (B) c + b − a
(C) c − b + a (D) c − b − a

MCQ 76
Match List I (8085 Register) with List II (8085 Register) and select
the correct answer using the code given below the lists :

List I List II
a. A 1. CJ
b. H 2. AL
c. L 3. BL
d. B 4. BH
Codes :
a b c d
(A) 4 2 3 1
(B) 2 4 1 3
(C) 4 2 1 3
(D) 2 4 3 1

MCQ 77
Consider the Motorola 68008, 68010, 68012 and 68020 microprocessors.
In systems that are severely constrained by the space available for the
printed circuit board, it is better to use
(A) 68008 (B) 68010
(C) 68012 (D) 68020

MCQ 78
Assertion (A) : In call-by-value parameter passing technique, function
call overheads are less are compared to that of call-by-reference.
Reason (R) : In call-by-reference parameter passing technique, address
of actual parameter is pushed into the stack.
(A) Both A and R are true and R is the correct explanation of A
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(B) Both and A and R are true but R is NOT the correct explanation
of A
(C) A is true but R is false
(D) A is false but R is true

MCQ 79
Assertion (A) : Insertion and deletion in a sorted array can be time-
consuming.
Reason (R) : All the elements following the inserted or deleted must
be shifted approximately.
(A) Both A and R are true and R is the correct explanation of A
(B) Both and A and R are true but R is NOT the correct explanation
of A
(C) A is true but R is false
(D) A is false but R is true

MCQ 80
Assertion (A) : Reduced instruction Set Computers (RISC) use
pipelined control unit.
Reason (R) : Pipelining reduces memory requirements of programs.
(A) Both A and R are true and R is the correct explanation of A
(B) Both and A and R are true but R is NOT the correct explanation
of A
(C) A is true but R is false
(D) A is false but R is true

MCQ 81
Assertion (A) : The data which is keyed in can be viewed through a
Visual Display Unit (VDU).
Reason (R) : VDU is also called a terminal.
(A) Both A and R are true and R is the correct explanation of A
(B) Both and A and R are true but R is NOT the correct explanation
of A
(C) A is true but R is false
(D) A is false but R is true
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YEAR 2004

MCQ 82

Given three integer variables a, b, c where each one will take positive
value. Which one of the following expressions in C avoids overflow ?
(A) a + b − c (B) b + a − c
(C) b − c + a (D) c + a + b − c − c

MCQ 83
x: = 1;y: = 0;
while y < k do
begin
x: = 2 * x;
y: = y + 1
end ;
for the above Pascal program fragment involving integers x, y and k
, which one of the following is a loop invariant ; i.e. true at the
beginning of each execution of the loop and at the completion of the
loop ?
(A) x = 2y (B) x = y + 1
(C) x = (y + 1) 2 (D) x = (y + 1) 2y

MCQ 84

Consider the following ‘C’ program :

main ()
{
pri () ; pri () ; pri ()
}
pri ()
{
static int k ;
print (“% d”, ++k) ;
}
Which one of the following is correct in respect of the program given
above ?
(A) It print 012
(B) It prints 123
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(C) It prints 111

(D) It print 3 consecutive but unpredictable

MCQ 85
Consider the complete graph with n vertices.
What is the total number of spanning trees ?
n (n − 1)
(A) (B) 2n − 1
2
(C) n ! (D) nn − 2

MCQ 86
It is given that two point variables p and q are of the same type and
p < q . Which one of the following operations is logically not correct ?
(A) p − q (B) p + q
(C) p + 5 (D) p ++

MCQ 87
Match List I (Type of Data Structure) with List II (Used in
Application) and select the correct answer using the code given below
the lists :

List I List II
a. Stack 1. Solving linear simultaneous equations
b. Tree 2. Subroutine linkage
c. Record 3. File Processing D. Array
d. Array 4. Sorting
Codes :
a b c d
(A) 3 4 2 1
(B) 2 1 3 4
(C) 2 4 3 1
(D) 3 1 2 4

MCQ 88
What is the depth of a complete binary tree with ‘n ’ nodes ?
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(A) log 2 (n + 1) − 1 (B) log 2 (n − 1) + 1

(C) log 2 (n) + 1 (D) log 2 (n) − 1

MCQ 89
A disc drive has a average seek time of 10 ms, 32 sectors on each
track and 512 bytes per sector. If the average time to read 8 bytes of
continuously stored data is 20 ms, what is the rotational speed of the
disc drive ?
(A) 3600 rpm (B) 6000 rpm
(C) 3000 rpm (D) 2400 rpm

MCQ 90
Given a 32-bit processor with 16 MB main memory, 32 kB, 4-way
set-associative on-chip cache and a cache block size (or line size) of 16
words. What is the total number of tag bits in the memory address
format ?
(A) 9 (B) 20
(C) 11 (D) 24

MCQ 91
Match List I (Characteristic) with List II (Processor Architecture)
and select the correct answer using the code given below the lists :

List I List II
a. Micro-code for CISC 1. Both RISC and several
instructions
b. Lack of indirect addressing 2. CISC only
c. Presence of on-chip CISC 3. Neither RISC nor cache
d. Simple optimizing compiler 4. RISC only
Codes :
a b c d
(A) 2 4 1 3
(B) 1 3 2 4
(C) 2 3 1 4
(D) 1 4 2 3
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MCQ 92
A disc drive has a rotational speed of 3600 rpm, an average seek time
of 10 ms, 64 sectors per track and 512 bytes of data per sector. What
is the average time of access the entire data of a 16 kbytes file stored
sequentially on the disk ?
(A) 18.85 ms (B) 10 ms
(C) 27.15 ms (D) 9 ms

MCQ 93
A particular parallel program computation requires 100 seconds when
executed on a single processor. If 40 percent of this computation is
‘inherently sequential’, then what are the theoretically best elapsed
times for this program running with 2 and 4 processors, respectively
?
(A) 20 and 10 seconds (B) 30 and 15 seconds
(C) 50 and 25 seconds (D) 70 and 55 seconds

MCQ 94
Consider the following statements :
The advantages of cycle stealing in DMA is that
1. it increases the maximum I/O transfer rate.
2. it reduces the interference by the DMA controller in the CPU’s
memory access.
3. it is beneficially employed for I/O devices with shorter bursts of
data transfer.
Which of the statements given above are correct ?
(A) 1 and 2 (B) 1 and 3
(C) 2 and 3 (D) 1, 2 and 3

MCQ 95
Consider a hypothetical processor with largest instruction length
being 32-bit and 16 registers R 0 − R15 . Processor supports only
following instructions :
ADD Ri,Rj
SUB Ri,Rj
AND Ri,Rj
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NOT Ri
MOV Ri,Rj
LOAD Address //Loads with register R 0
STORE Address//Stores the content of R 0
JUMP Address
JZ Address
Which is the maximum number of address pins of this processor ?
(A) 27 (B) 28
(C) 29 (D) 30

MCQ 96

Consider the following statements : The 8085 microprocessor will not

enter into bus idle machine cycle whenever
1. INTR interrupts is recognized
2. RST x.5 is recognized
3. DAD rp instruction is executed
Which of the statements given below is/are correct ?
(A) 1 only (B) 2 only
(C) 1 and 2 (D) 2 and 3

MCQ 97

Consider the following program :

ORG 7000 H
BEGIN : LXI H, 7000H
MOVE A,L
ADD H
JM END
RST O
ENDS : PCHL
HLT
Which one of the following statements is correct ?
(A) The program will halt the processor
(B) The program will be repeated infinitely
(C) The program will branch to 0007 H
(D) The program will branch to 000H after JM END
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MCQ 98
Consider the following program intended to transfer a block of 5
bytes from A000H to 9000H :
START : LXI B, 9000H
LXI H, A000H
LOOP : MOV A, M
STAX B
INX B
INX H
DCR C
JNZ LOOP
HLT
The above program will not work because
(A) C Register is used as counter
(B) DCR C instruction will not affect zero flag
(C) JNZ instruction is used instead of JZ
(D) The first two instruction in loop should have been LDAX D and
MOV M, A

MCQ 99
Assertion (A) : The DMA technique is more efficient than the
Interrupt-driven technique for high volume I/O data transfer.
Reason (R) : The DMA technique does not make use of the Interrupt
mechanism.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true but R is false
(D) A is false but R is true

YEAR 2005

MCQ 100
Consider the following statements :
1. Infix, Prefix and Postfix notations for expressing sum of A and B
are A + B , + AB , and AB +, respectively.
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2. AVL tree is binary tree in which the difference in heights between

the left and the right sub tree is not more than one for every
node.
3. Stack data stricture is used to save and retrieve information in
reverse order.
4. Queue data structure is known as LIFO.
Which of the statements given above are correct ?
(A) 1, 2 and 3 (B) 2, 3 and 4
(C) 1, 3 and 4 (D) 1, 2 and 4

MCQ 101
Consider the following statements is respect of the expression :
A + XYZ (&A) :
1. Result of expression may depend upon order of evaluation of
operands of the operator ‘x ’
2. Result of expression would never depend upon order of evaluation
of operands of the operator ‘x ’
3. Stack data stricture is used to save and retrieve information in
reverse order.
4. Queue data structure is known as LIFO.
Which of the statements correctly defines temporal locality ?
(A) 1 only (B) 2 only
(C) 1 and 3 (D) 1, 2 and 3

MCQ 102
Which one of the following correctly defines temporal locality ?
(A) Adjacent instructions for current instruction may be needed soon
(B) Current instruction being fetched may be needed again soon
(C) Instructions temporarily residing in memory
(D) None of the above

MCQ 103
Consider the function g which is taking a parameter f of type pointer
to function. Which one of the following best describes the use of
pointer to function ?
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(A) g can make modification in the definition off and the change is
visible after return form g
(B) g can dynamically test f and modify it
(C) Functionality of g gets customized through functionality of f
(D) F can dynamically test g and modify it

MCQ 104

A disc rotates at a speed of 7200 rpm. It has 4000 cylinders, 16

surfaces and 256 sectors per track. What is the average latency time
of the disk ?
(A) 8.33 ms (B) 4.166 ms
(C) 41.66 ms (D) 8.33 μs

MCQ 105

Consider the following statements :

1. Cache memory is low cost and fast memory.
2. Cache memory is fast but costly memory.
3. Performance of cache during program execution is measured by
hit ratio.
Which of the following statements given above are correct ?
(A) 1 and 2 (B) 2 and 3
(C) 3 and 4 (D) 1 and 4

MCQ 106

Consider the following statements :

The SIM instruction outputs the contents of accumulator to define :
1. interrupt mask bit
2. interrupt pending bit
3. serial input data line
4. serial output data line
Which of the statements given above are correct ?
(A) 1 and 2 (B) 2 and 3
(C) 3 and 4 (D) 1 and 4
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MCQ 107
Match List I (2 Pins of 8086) with List-II (Status) and select the
correct answer using the code given below the lists :

List I List II
BHE A0 What is read/written ?
a. 0 0 1. 1 byte from/to odd address
b. 0 1 2. 1 byte from/to even address
c. 1 0 3. 1 16-bit word
d. 1 1 4. NOP
Codes :
a b c d
(A) 4 2 1 3
(B) 3 1 2 4
(C) 4 1 2 3
(D) 3 2 1 4

MCQ 108
What are the number of machine cycles n and the types of machine
cycles carried out for PUSH B ?
(A) n = 2 , fetch and memory write
(B) n = 3 , fetch and 2 memory write
(C) n = 3 , fetch, memory write and read
(D) n = 3 , fetch, and 2 memory read

MCQ 109
The following sequence of instructions is executed by an 8085
microprocessor :
1000 LXI SP, 27 FF
1003 CALL 1006
1006 POP H
What are the contents of the stack pointer (SP) and the HL register
pair after completion of execution of these instructions ?
(A) SP = 27 FF, HL = 1003 (B) SP = 27 FD, HL = 1003
(C) SP = 27, FF, HL = 1006 (D) SP = 27 FD, HL = 1006
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MCQ 110
Which one of the following is not associated with a logic analyzer ?
(A) Delayed state (B) Delayed sweep
(C) Disassembler (D) Pre-triggering

MCQ 111
In a 500 # 500 matrix, 95% of the elements are zeros and these
elements are randomly distributed. Which is an appropriate data
structure to store this efficiently ?
(A) An array (B) A tree
(C) A list (D) A stack

MCQ 112
Match List I with List II and select the correct answer using the code
given below the lists :

List I List II
a. Immediate addressing 1. LDA 30 SC
b. Implied addressing 2. MOV A, B
c. Register addressing 3. LXI H, 2050
d. Direct addressing 4. RRC
Codes :
a b c d
(A) 3 4 2 1
(B) 2 1 3 4
(C) 3 1 2 4
(D) 2 4 3 1

MCQ 113
Match List I (Operation of C Language) with List II (Characteristic
of the operation) and select the correct answer using the code given
below the lists :

List I List II
a. / 1. Unary operator
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b. & 2. Binary operator

c. mod 3. Ternary operator
d. ? 4. Invalid operator
Codes :

a b c d

(A) 2 1 4 3

(B) 4 3 2 1

(C) 2 3 4 1

(D) 4 1 2 3

MCQ 114

What is the output of the following program ?

# include <stdio.h>
main()
{
float f ;
f=10/3 ;
print f (“% f, f);
}

MCQ 115

Assertion (A) : There is no overflow after an addition, if one number

is positive and the other is negative.

Reason (R) : Adding a positive number to a negative number always

produces a result which is smaller than the larger of the two.
(A) Both A and R are true and R is the correct explanation of A
(B) Both and A and R are true but R is NOT the correct explanation
of A
(C) A is true but R is false
(D) A is false but R is true
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YEAR 2006

MCQ 116

Which block replacement algorithm is not generally used in cache

operation ?
(A) LIFO (B) FIFO
(C) LRU (D) Random

MCQ 117

For which of the following devices, is DMA the most suitable ?

(A) Keyboard (B) Mouse
(C) Joy stick (D) Hard disk

MCQ 118

If push and pop operation on a stack takes 1 unit time, how much
time would it take to delete an element at n th position form bottom ?
(A) 1
(B) n
(C) n2
(D) cannot be determined from the given data

MCQ 119

Self-referential structures of ‘C’ programming language are very

useful in applications that involve
(A) Graphs (B) Lists
(C) Queues (D) Stacks

MCQ 120

Which one of the following is not correct about recursion ?

(A) Depth of stack is proportional to the depth of recursion
(B) Some of the recursive function can not be written as non-recursive
one
(C) For some of functions, writing recursive version is easier than
non-recursive version
(D) Recursive functions have terminating condition which limit the
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depth of recursion

MCQ 121

Which of the following instructions of an 8086 microprocessor uses

the contents of a CX register as a counter ?
1. LOCK
2. LOOP
3. ROTATE
Select the correct answer using the code given below :
(A) Only 1 and 2 (B) Only 1 and 3
(C) Only 2 and 3 (D) 1, 2 and 3

MCQ 122

Which one of the following is correct for ASCII codes of all upper
case English letters compared to all lower case English letters ?
(A) Are all larger
(B) Are all smaller
(C) Are all equal
(D) Some are larger and some are smaller

MCQ 123

Assertion (A) : The development of a microprocessor based product

requires the design of program and the hardware.
Reason (R) : The design effort for an electronic product follows the
same basic steps used in the development of software.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true but R is false
(D) A is false but R is true

MCQ 124

Assertion (A) : Processor-level design is very much a heuristic process.

Reason (R) : At this level of abstraction, components are very
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complex.
(A) Both and A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true but R is false
(D) A is false but R is true

MCQ 125
Assertion (A) : Binary search function can be easily implemented
using recursion.
Reason (R) : Recursion is based on number of elements in array to
be searched.
(A) Both and A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true but R is false
(D) A is false but R is true

YEAR 2007

MCQ 126
What does the minimizing of the memory requirement of a program
beam ?
(A) Maximizing number of macro calls
(B) Minimizing number of macro calls
(C) Maximizing depth of recursion
(D) Both (A) and (C) above

MCQ 127
Consider the following C statements :
1. x==1;x++;
2. # defined max=40
3. x=1;x--;
4. For (i=0;i<=1;i++)
{ print f (“i=%d\n”);
}
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Which of the C statements given above are not correct ?

(A) 1 and 2 only (B) 1, 2, and 3 only
(C) 2 and 3 only (D) 3 and 4 only

MCQ 128

In a microcomputer, why are wait states used ?

(A) To make the processor wait during a DMA operation
(B) To make the processor wait during an interrupt processing
(C) To make the processor wait during a power shutdown
(D) To interface slow peripherals to the processor

MCQ 129

Which one of the following is the most suitable definition of ARRAY

?
(A) It is collection of items which share a common name
(B) It is collection of items which share a common name and occupy
consecutive memory locations
(C) It is a collection of items of the same type and storage class
which share a common name and occupy consecutive memory
locations.
(D) It is just a collection of unordered items.

MCQ 130

Match List I (Program Required in System Software) with List II

(Definition) and select the correct answer using the code given below
the lists :

List I List II
a. Linker 1. It is a program which combines
smaller programs to form a single
program ; and also links subroutines
with the main program
b. Loader 2. It is program which loads machine
codes of a program into the system
memory
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c. Interpreter 3. It is a program which translates a

high-level program into machine
code, executes it and reads one
statement at a time, executes and
then goes to the next statements of
the program.
d. Compiler 4. It is a program which translates a
high-level program into a machine
language, reads the entire program
and then executes it
Codes :
a b c d
(A) 1 2 3 4
(B) 3 4 1 2
(C) 1 4 3 2
(D) 3 2 1 4

MCQ 131

In which unit is the performance of cache memory measured ?

(A) Hz (B) Bits/s
(C) Cache constant (D) Hit ratio

MCQ 132

Match List I (Type of Memory) with List II (Used as) and select the
correct answer using the code given below the lists :

List I List II
a. DRAM 1. Cache memory
b. SRAM 2. Main memory
c. Parallel Access Registers 3. BIOS memory
d. ROM 4. CPU registers
Codes :
a b c d
(A) 1 2 3 4
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(B) 2 1 4 3
(C) 1 2 4 3
(D) 2 1 3 4

MCQ 133

Three memory chips are of size of 1 KB, 2 KB and 4 KB. Their

address bus is 10 bits. What are the data bus sizes of the chips ?
(A) 8 bits, 16 bits and 24 bits respectively
(B) 8 bits, 16 bits and 32 bits respectively
(C) 8 bits, 16 bits and 64 bits respectively
(D) 8 bits, 16 bits and 128 bits respectively

MCQ 134

The following micro-operations are part of interrupt cycle of a control

unit :
1. MAR ! save-address
PC ! routine address
2. MBR !(PC)
3. Memory! (MBR)
Which one of the following is the correct order of their occurrence ?
(A) 1-2-3 (B) 2-3-1
(C) 2-1-3 (D) 3-1-2

MCQ 135

A memory system of size 16 K bytes is required to be designed using

memory chips which have 12 address lines and 4 data lines each.
What is the number of such chips required to design the memory
system ?
(A) 2 (B) 4
(C) 8 (D) 16

MCQ 136

Assertion (A) : DMA is faster than either Interrupt initiated I/O or

Polling base I/O or Polling based I/O for very large data transfers.
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Reason (R) : DMA takes control of the system buses and needs no
processor intervention during the data transfer.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true but R is false
(D) A is false but R is true

MCQ 137
Assertion (A) : Neumann machines are called Control Flow Computers.
Reason (R) : Instructions are executed sequentially as controlled by
a program counter.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true but R is false
(D) A is false but R is true

MCQ 138
Assertion (A) : Data-flow computers exploit maximum parallelism.
Reason (R) : Data-flow computers require no program counter.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
(C) A is true but R is false
(D) A is false but R is true

MCQ 139
Assertion (A) : In a micro-programmed CPU, each machine instruction
is executed by a real-time interpreter.
Reason (R) : Real-time interpreter helps to achieve high degree
parallelism in micro-programmed control.
(A) Both A and R are true and R is the correct explanation of A
(B) Both A and R are true but R is NOT the correct explanation of
A
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(C) A is true but R is false

(D) A is false but R is true

MCQ 140
For which one of the following problems, recursive solution exists but
non-recursive solution does not ?
(A) Tower of Hanoi (B) Factorial computation
(C) Tree traversal (D) No such problem exists

MCQ 141
Consider the following statements one binary tree :
1. A tree with n nodes has (n − 1) edges.
2. A labelled and rotted binary tree can be uniquely constructed
given its post-order and pre-order traversal results.
3. The maximum number of nodes in a binary tree of height (depth)
h is (2h + 1 − 1)
4. A complete binary tree with n internal nodes has (n + 1) leaves.
Which of the statements given above are correct ?
(A) 1, 2, 3 and 4 (B) 1, 2 and 3 only
(C) 1 and 3 only (D) 2 and 4 only

MCQ 142
Which of the following are included in architecture of computer ?
(A) Virtual memory increases
1. Addressing modes, design of CPU
2. Instruction set, data formats
3. Secondary memory, operating system
Which of the statements given above are correct ?
(A) 1 and 2 only (B) 2 and 3 only
(C) 1 and 3 only (D) 1, 2 and 3

MCQ 143
Why does an increase of the RAM of a computer typically improved
performance ?
(A) Virtual memory increases
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(B) Larger RAMs are faster

(C) Fewer page faults occur
(D) Fewer segmentation faults occur

MCQ 144
Division by zero in a program gives rise to which one of the following
?
(A) Syntax error (B) Run-time error
(C) Logical error (D) Semantic error

YEAR 2008

MCQ 145
If the mantissa in the floating point representation of a number is 37
bits long, then what is the accuracy of the digital computer ?
(A) 37 decimal place (B) 23 decimal place
(C) 11 decimal place (D) 10 decimal places

MCQ 146
Which one of the following is correct ?
The convention is that the number 0 has the normal form representation
as
(A) 0 (B) 0.0
(C) 0.0 (D) 0.10c

MCQ 147
Match list I (Pascal Operator) with List II (C operator) and select
the correct answer using the code given below the lists :

List I List II
a. : = 1. !=
b. < > 2. ==
c. = 3. =
Codes :
a b c
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(A) 1 2 3
(B) 3 1 2
(C) 2 1 3
(D) 2 3 1

MCQ 148
For interfacing of assembly language routines with some high level
language, one must address which of the following ?
1. How is the subroutines invoked ?
2. How are parameters passed
3. How are values returned ?
4. How many parameters are passed ?
Select the correct answer using the code given below :
(A) 1 and 3 only (B) 2 and 4 only
(C) 1, 2 and 3 only (D) 1, 2, 3 and 4

MCQ 149
The parallel computer are divided into which of the following
architecture configurations ?
1. Array processors
2. Data processors
3. Multi processor systems
4. Pipeline computers
Select the correct answer using the code given below :
(A) 1, 2 and 3 only (B) 2, 3 and 4 only
(C) 1, 3 and 4 only (D) 1, 2 and 4 only

MCQ 150
Which one of the following is correct ?
A micro program is
(A) any source program run on micro computers
(B) any set of instructions for primitive operation in a system
(C) a general name for ‘macros’ used in assemble language
programming
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(D) any program of a very small size

MCQ 151

Which are the characteristics of vertical micro instructions ?

1. Considerable encoding of control information
2. Limited ability to express parallel micro operation
3. Long format
Select the correct answer using the code given below :
(A) 1 and 2 only (B) 2 and 3 only
(C) 1 and 3 only (D) 1, 2 and 3

MCQ 152

A magnetic drum of 8 inch diameter has 100 tracks and storage

density of 200 bits/inch.
What is its storage capacity ?
(A) 8402 bits (B) 202400 bits
(C) 502400 bits (D) 1004800 bits

MCQ 153

Match list I (Type of Memory) with List II and select the correct
answer using the code given below the lists :

List I List II
a. DRAM 1. 1
b. SRAM 2. 10
c. Hard Disk 3. 100000
d. Magnetic Tape 4. 10000000
Codes :
a b c d
(A) 1 2 3 4
(B) 1 2 4 3
(C) 2 1 3 4
(D) 2 1 4 3
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MCQ 154

If 8085 adds 87 H and 79 H, then

(A) both CARRY and ZERO flags will be set to 0
(B) CARRY flag will be set to 0, ZERO flag to 1
(C) CARRY flag will be set to 1, ZERO flag to 0
(D) both CARRY and ZERO flag will be set to 1

MCQ 155

On the 8085, which of the following machine cycles are not used in
the CALL instruction ?
1. Instruction Fetch 2. I/O
3. Memory Read 4. Memory Write
Select the correct answer using the code given below :
(A) 2 only (B) 1 and 4
(C) 2, 3 and 4 (D) None of these

MCQ 156

In 8085, if the clock frequency is 5 MHz, the time required to execute

an instruction of 18 T-states is
(A) 3.0 μs (B) 3.6 μs
(C) 4.0 μs (D) 6.0 μs

MCQ 157

Which one of the following interrupts is both level and edge sensitive
?
(A) RST 7.5 (B) RST 5.5
(C) TRAP (D) INTR

MCQ 158

A group of personal computers are configured to work together for

speeding up the execution of a single program in
(A) simulated evaluation (B) cluster computing
(C) network computing (D) client server computing
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MCQ 159
A memory system of size 32 bytes is required to be designed using
memory chips which have 12 address lines and 4 data lines each.
What is the number of such chips required to design the memory
system ?
(A) 4 (B) 8
(C) 16 (D) 32

MCQ 160
What is an interrupt in which the external device supplies its address
as well as the interrupt request known as ?
(A) Vectoral interrupt (B) Maskable interrupt
(C) Non-maskable interrupt (D) None of the above

MCQ 161
Which one of the following is correct ?
A micro program
(A) is usually written in high level language
(B) is a program for micro computers
(C) is a program written in assembly language
(D) is a sequencing program for the control unit of any processor

MCQ 162
Match List I with List II and select the correct answer using the
codes given below the lists :

List I List II
a. Immediate addressing 1. LDA 30 FF
b. Implied addressing 2. MOV A, B
c. Register addressing 3. LXIH, 2050
d. Direct addressing 4. RRC
Codes :
a b c d
(A) 3 4 2 1
(B) 2 1 3 4
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(C) 3 1 2 4

(D) 2 4 3 1

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