Half Adder:: X Y Z Su M

 Half Adder: A half adder is a logical circuit that performs an addition operation on two
binary digits. The half adder produces a sum and a carry value which are both binary
digits.
X Y Carry Sum
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
 Full adder: Full adder circuit adds three bit binary numbers (X,Y,Z) & outputs two nos.
of one bit binary numbers, Sum & Carry.
X Y Z Carry Su
m
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
 Decoder: A decoder is a logic circuit that converts an n bit binary input code into M
(=2n) output lines such that each output line will be activated for only one of the possible
combinations of inputs.
(OR)
A decoder is a Combinational circuit that converts binary information from ‘n’ input lines to a
maximum of 2n unique output lines.
2 4 line Decoder (it is also called one four line decoder)
 Decoders are available in two different types of output forms:

(1) Active high output type decoders and
(2) Active low output type of decoders.
 Active high output type of decoders are constructed with AND gates and active low
output type of decoders are constructed with NAND gates.
Truth table of active high output type of decoder is given below:
X Y
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
 Active low output types of decoders will give the output low for given input combination
and all other outputs are high.
Truth table of active low output type of decoder
 3 to 8 line decoder is also called Binary-to-Octal decoder or converter. It is also called 1of
8 decoder, because only one of the 8 outputs is active at a time.
 Decoders are widely used in the memory system of computer, where they respond to the
address code input from the CPU to activate the memory storage location specified by the
address code.
 Decoders are also used to convert binary data to a form suitable for displaying on decimal
read outs.
 Decoders can be used to implement combinational circuits, Boolean functions etc.
• Multiplexer
A multiplexer or mux is a device that selects one of several analog or digital input signals
and forwards the selected input into a single line. A multiplexer of 2n inputs has n select lines,
which are used to select which input line to send to the output.”
ROM (read Only Memory): ROM is nothing but the combination of decoder and
Encoder. It is a semi conductor memory and which is a permanent memory, ROM can
also be defined as a Simple Code conversion unit.
 ROM = Fixed AND, Programmable OR
 PAL = Programmable AND, Fixed OR
PLA = Programmable AND, Programmable OR.
Flip-flop:
Important Points
 Two cross coupled inverters will form a basic latch which can store one bit of information.
 Flip-flops: Flip-Flop is also called Bistable multivibrator. It can store one bit of information.
 In a flip-flop one output is always complement of the other output.
 Flip-flop has two stable states.
JK-flip-flop
 A JK flip-flop is a refinement of the SR flip-flop in that the indeterminate state of the SR
type is defined in the JK type. Inputs J and K behave like inputs S and R to set and clear
the flip- flop (note that in a JK flip-flop, the letter J is for set and the letter K is for clear).
When logic 1 inputs are applied to both J and K simultaneously, the flip-flop switches to
its complement state, ie., if Q=1, it switches to Q=0 and vice versa.
A clocked JK flip-flop is shown in figure below. Output Q is ANDed with K and CP inputs
 Universal Shift Register: A register which is able to shift the information from left to
right or from right to left and which can perform all four operations is called universal
shift register.
 Applications of Shift registers:

1. Serial to parallel conversion (It is also called spatial to temporal code conversion).
2. Parallel to serial conversion (It is also called temporal to spatial code conversion).
3. Sequence generator.
 The modulus of a counter is the total number of states through which the counter can
progress. For example mod-8 counter is having 8 different states (000 to 111).
 The output signal frequency of Mod-n counter is 1/n th of the input clock frequency.
 Hence that counter is also called divide by n counter.
 The number of flip-flops (n) required to construct Mod N counter can be obtained from the
following formula:
2n-1 < N 2n.
 A decade counter is also called Mod- 10 or divide by 10 counter requires 4 flip-flops.
 Any binary counter can be a modulus counter where as the modulus counter need not be a
binary counter.
 Six flip-flops are required to construct mod-60 counter.
 Two types of synchronous counters are available.
1. Series carry
2. Parallel carry.

Half Adder:: X Y Z Su M

Uploaded by

Copyright:

Available Formats

Half Adder:: X Y Z Su M

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Half Adder:: X Y Z Su M

Uploaded by

Copyright:

Available Formats

 Half Adder: A half adder is a logical circuit that performs an addition operation on two

 Decoders are available in two different types of output forms:

 Applications of Shift registers:

You might also like