TJA1042
TJA1042
TJA1042
TJA1042
High-speed CAN transceiver with Standby mode
Rev. 04 — 6 October 2009 Product data sheet
1. General description
The TJA1042 is a high-speed CAN transceiver that provides an interface between a
Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus.
The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in the
automotive industry, providing the differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.
The TJA1042 is a step up from the TJA1040, PCA82C250 and PCA82C251 high-speed
CAN transceivers. It offers improved ElectroMagnetic Compatibility (EMC) and
ElectroStatic Discharge (ESD) performance, and also features:
• Ideal passive behavior to the CAN bus when the supply voltage is off
• A very low-current Standby mode with bus wake-up capability
• TJA1042T/3 and TJA1042TK/3 can be interfaced directly to microcontrollers with
supply voltages from 3 V to 5 V
These features make the TJA1042 an excellent choice for all types of HS-CAN networks,
in nodes that require a low-power mode with wake-up capability via the CAN bus.
2. Features
2.1 General
n Fully ISO 11898-2 and ISO 11898-5 compliant
n Suitable for 12 V and 24 V systems
n Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
n VIO input on TJA1042T/3 and TJA1042TK/3 allows for direct interfacing with 3 V to 5 V
microcontrollers (available in SO8 and very small HVSON8 packages respectively)
n SPLIT voltage output on TJA1042T for stabilizing the recessive bus level (available in
SO8 package only)
2.3 Protections
n High ESD handling capability on the bus pins
n Bus pins protected against transients in automotive environments
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NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
3. Ordering information
Table 1. Ordering information
Type number[1] Package
Name Description Version
TJA1042T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96
TJA1042T/3 SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96
TJA1042TK/3 HVSON8 plastic thermal enhanced very thin small outline package; no leads; SOT782
8 terminals; body width 3 × 3 × 0.85 mm
[1] TJA1042T with SPLIT pin; TJA1042T/3 and TJA1042TK/3 with VIO pin.
4. Block diagram
VIO VCC
5 3
VCC TJA1042
TEMPERATURE
PROTECTION
VIO(1) 7
CANH
SLOPE
CONTROL
AND
1 TIME-OUT 6
TXD DRIVER CANL
VIO(1)
MODE 5
8 CONTROL SPLIT SPLIT(1)
STB
4
RXD
MUX
AND
DRIVER
WAKE-UP
FILTER
015aaa017
GND
(1) In a transceiver with a SPLIT pin, the VIO input is internally connected to VCC.
Fig 1. Block diagram
5. Pinning information
5.1 Pinning
TJA1042T/3
TJA1042T TJA1042TK/3
015aaa018 015aaa019
6. Functional description
The TJA1042 is a HS-CAN stand-alone transceiver with Standby mode. It combines the
functionality of the PCA82C250, PCA82C251 and TJA1040 transceivers with improved
EMC and ESD handling capability and quiescent current performance. Improved slope
control and high DC handling capability on the bus pins provide additional application
flexibility.
The TJA1042 is available in two versions, distinguished only by the function of pin 5:
• The TJA1042T is 100 % backwards compatible with the TJA1040, and also covers
existing PCA82C250 and PCA82C251 applications
• The TJA1042T/3 and TJA1042TK/3 allow for direct interfacing to microcontrollers with
supply voltages down to 3 V
In Standby mode, the bus lines are biased to ground to minimize the system supply
current. The low-power receiver is supplied by VIO, and is capable of detecting CAN bus
activity even if VIO is the only supply voltage available. When pin RXD goes LOW to signal
a wake-up request, a transition to Normal mode will not be triggered until STB is forced
LOW.
Should VIO drop below the VIO undervoltage detection level, Vuvd(VIO), the transceiver will
switch off and disengage from the bus (zero load) until VIO has recovered.
VCC
TJA1042T
CANH
R 60 Ω
VSPLIT = 0.5 VCC SPLIT
in normal mode;
otherwise floating
R 60 Ω
CANL
GND 015aaa020
Fig 3. Stabilization circuitry and application for version with SPLIT pin
For versions of the TJA1042 without a VIO pin, the VIO input is internally connected to VCC.
This sets the signal levels of pins TXD, RXD and STB to levels compatible with 5 V
microcontrollers.
BAT 5V
VCC
BAT 3V
INH
5V
VCC VIO
TJA1042T/3 MICRO-
TJA1042TK/3 TXD CONTROLLER
TX0
CANL RXD
CANL RX0
GND
GND 015aaa021
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol Parameter Conditions Min Max Unit
Vx voltage on pin x no time limit; DC value
on pins CANH, CANL and SPLIT −58 +58 V
on any other pin −0.3 +7 V
Vtrt transient voltage on pins CANH and CANL [1] −150 +100 V
VESD electrostatic discharge voltage IEC 61000-4-2 [2]
[1] Verified by an external test house to ensure pins CANH and CANL can withstand ISO 7637 part 3 automotive transient test pulses 1, 2a,
3a and 3b.
[2] IEC 61000-4-2 (150 pF, 330 Ω).
[3] ESD performance of pins CANH and CANL according to IEC 61000-4-2 (150 pF, 330 Ω) has been be verified by an external test house.
The result is equal to or better than ±8 kV (unaided).
[4] Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 kΩ).
[5] Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 µH, 10 Ω).
[6] Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF). The classification level is C5 (>1000 V).
[7] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj = Tamb + P × Rth(vj-a), where Rth(vj-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
9. Thermal characteristics
Table 5. Thermal characteristics
According to IEC 60747-1.
Symbol Parameter Conditions Value Unit
Rth(vj-a) thermal resistance from virtual junction to ambient SO8 package; in free air 145 K/W
HVSON8 package; in free air 50 K/W
[1] Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC.
[2] All parameters are guaranteed over the virtual junction temperature range by design. Products are 100 % tested at 125 °C ambient
temperature (wafer level pretesting), and 100 % tested at 25 °C ambient temperature (final testing). Both pretesting and final testing use
correlated test conditions to cover the specified temperature and power supply voltage range.
[3] Not tested in production.
[4] Vcm(CAN) is the common mode voltage of CANH and CANL.
[5] For TJA1042T/3 and TJA1042TK/3: values valid when VIO = 4.5 V to 5.5 V; when VIO = 2.8 V to 4.5 V, values valid when
Vcm(CAN) = −12 V to +12 V.
[1] Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC.
[2] All parameters are guaranteed over the virtual junction temperature range by design. Products are 100 % tested at 125 °C ambient
temperature (wafer level pretesting), and 100 % tested at 25 °C ambient temperature (final testing). Both pretesting and final testing use
correlated test conditions to cover the specified temperature and power supply voltage range.
+5 V
47 µF 100 nF
VIO(1) VCC
TXD CANH
TJA1042 RL 100 pF
SPLIT
RXD CANL
GND STB
15 pF
015aaa024
(1) For versions with a VIO pin (TJA1042T/3 and TJA1042TK/3), the VIO pin is connected to pin VCC.
Fig 6. Timing test circuit for CAN transceiver
HIGH
TXD
LOW
CANH
CANL
dominant
0.9 V
VO(dif)(bus)
0.5 V
recessive
HIGH
0.7VIO
RXD
0.3VIO
LOW
td(TXD-busdom) td(TXD-busrec)
td(busdom-RXD) td(busrec-RXD)
SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
D E A
X
y HE v M A
8 5
Q
A2
(A 3) A
A1
pin 1 index
θ
Lp
1 4 L
e w M detail X
bp
0 2.5 5 mm
scale
0.25 1.45 0.49 0.25 5.0 4.0 6.2 1.0 0.7 0.7
mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1
0.10 1.25 0.36 0.19 4.8 3.8 5.8 0.4 0.6 0.3 8o
o
0.010 0.057 0.019 0.0100 0.20 0.16 0.244 0.039 0.028 0.028 0
inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004
0.004 0.049 0.014 0.0075 0.19 0.15 0.228 0.016 0.024 0.012
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
99-12-27
SOT96-1 076E03 MS-012
03-02-18
HVSON8: plastic thermal enhanced very thin small outline package; no leads;
8 terminals; body 3 x 3 x 0.85 mm SOT782-1
D B A
E A
A1
c
detail X
terminal 1
index area
e1
terminal 1 C
v C A B
index area e b
w C y1 C y
1 4
L
K
Eh
8 5
Dh
0 1 2 mm
Dimensions scale
Unit(1) A A1 b c D Dh E Eh e e1 K L v w y y1
max 1.00 0.05 0.35 3.10 2.45 3.10 1.65 0.35 0.45
mm nom 0.85 0.03 0.30 0.2 3.00 2.40 3.00 1.60 0.65 1.95 0.30 0.40 0.1 0.05 0.05 0.1
min 0.80 0.00 0.25 2.90 2.35 2.90 1.55 0.25 0.35
Note
1. Plastic or metal protrusions of 0.075 maximum per side are not included. sot782-1_po
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus SnPb soldering
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 10) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 8 and 9
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 10.
peak
temperature
time
001aac844
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in Applications — Applications that are described herein for any of these
modifications or additions. NXP Semiconductors does not give any products are for illustrative purposes only. NXP Semiconductors makes no
representations or warranties as to the accuracy or completeness of representation or warranty that such applications will be suitable for the
information included herein and shall have no liability for the consequences of specified use without further testing or modification.
use of such information. Limiting values — Stress above one or more limiting values (as defined in
Short data sheet — A short data sheet is an extract from a full data sheet the Absolute Maximum Ratings System of IEC 60134) may cause permanent
with the same product type number(s) and title. A short data sheet is intended damage to the device. Limiting values are stress ratings only and operation of
for quick reference only and should not be relied upon to contain detailed and the device at these or any other conditions above those given in the
full information. For detailed and full information see the relevant full data Characteristics sections of this document is not implied. Exposure to limiting
sheet, which is available on request via the local NXP Semiconductors sales values for extended periods may affect device reliability.
office. In case of any inconsistency or conflict with the short data sheet, the Terms and conditions of sale — NXP Semiconductors products are sold
full data sheet shall prevail. subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
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reliable. However, NXP Semiconductors does not give any representations or
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information and shall have no liability for the consequences of use of such
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may be subject to export control regulations. Export might require a prior
limitation specifications and product descriptions, at any time and without
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notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, 16.4 Trademarks
authorized or warranted to be suitable for use in medical, military, aircraft,
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malfunction of an NXP Semiconductors product can reasonably be expected are the property of their respective owners.
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18. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.2 Low-power management . . . . . . . . . . . . . . . . . 1
2.3 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Functional description . . . . . . . . . . . . . . . . . . . 5
6.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5
6.1.1 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6.1.2 Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 5
6.2 Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 6
6.2.1 TXD dominant time-out function . . . . . . . . . . . . 6
6.2.2 Bus dominant time-out function . . . . . . . . . . . . 6
6.2.3 Internal biasing of TXD and STB input pins . . . 6
6.2.4 Undervoltage detection on pins VCC and VIO . . 6
6.2.5 Over-temperature protection. . . . . . . . . . . . . . . 6
6.3 SPLIT output pin and VIO supply pin . . . . . . . . 6
6.3.1 SPLIT pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
6.3.2 VIO supply pin . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7 Application design-in information . . . . . . . . . . 7
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 Thermal characteristics. . . . . . . . . . . . . . . . . . . 9
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 9
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 12
12 Test information . . . . . . . . . . . . . . . . . . . . . . . . 13
12.1 Quality information . . . . . . . . . . . . . . . . . . . . . 13
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
14 Soldering of SMD packages . . . . . . . . . . . . . . 16
14.1 Introduction to soldering . . . . . . . . . . . . . . . . . 16
14.2 Wave and reflow soldering . . . . . . . . . . . . . . . 16
14.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 16
14.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 17
15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
16.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
16.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
16.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
17 Contact information. . . . . . . . . . . . . . . . . . . . . 19
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.