v2 Led LCD Screen Panel Repair Mirko 153 213

Buyer: Jose Tavarez Castillo (jk011831@gmail.
com)
Buyer:JoseTavarez Castillo(jk011831@gmail.com)Transaction ID: j-p0qn5l7dccb0b1a
Transaction ID: j-p0qn5l7dccb0b1a
32LS3500 Main Board +24V Distribution

NOTE: 24V is the label, but the Voltage is actually 24.56V
+24V PWR_ON:Q402: Turned on by Q401 turned on by IC101 RL_ON.

Output pin 1 to SMPS. Turns on 12V and 20V.
(For power to Q402, see +3.5V_ST Voltage Distribution)
Input: Pins 2 ~ 4
P401
PWR_Det PWR_ON
3
L407 +3.5V_ST
Q402
2
1
E Gnd
C B RL_ON
2 R406 R401
3 Q401
1
Q402 Ctrl.
R482
AUDIO Amp
L501
IC501
22 +24V_AMP
23
24 37 38 39
L504 L506
L503 L505
P501
LG TRAINING
CENTER Page 6 of Interconnect Diagram October 2012 32LS3500 LCD TV
Buyer: Jose Tavarez Castillo (jk011831@gmail.com)
32LS3500 Main Board Other Voltage Distributions

After all voltages are +3.5V_ST Input: Pins 9, 10, 11, 12
turned on on the Main
board, Q405 is turned Q405 turns on
Off supplying INV_ON backlights
to the power supply (via
INV_CTL
P401 EEPROM IC104
pin 18) turning on the From Q403
C
backlights. Collector
pulled up by Q405 B E 18 IC407 Turned on by +3.3V_Normal
L404 +3.3V_Normal
+3.3V_Normal through
INV_CTL
R419 R419 L420 IC407 L1209
+1.5V_DDR AVDD_MIU
Q400 G
3 2 1 See +3.5V_ST Voltage Distribution
B C S Q403 L1202 Primary distribution of +3.5V_ST
R433 IC402
E D
AVDD_DRO 2
R428
+3.3V_Normal
IC1201 IC101 +2.5V_Normal
IC403 L415 DDR Micro
IC403 Turned +1.10V_VDDC Video
Q403 Turned on Processor
on by
by Q400
+3.3V_Normal MIUVDDC
POWER_ON/
L228
OFF_1 IC3703
2 2
3
R206
IC501 L502 AVDD_AU33 MODEL_OPT_3 +1.8V_TU
R4027
L204 MODEL_OPT_4
R182
MODEL_OPT_5 TUNER PINS
URSA5_RESET L211 1. n/c
R226 AVDD2P5 2. Reset
MODEL_OPT_0
R211 L229 3. SCL
MODEL_OPT_1 AVDD2P5_MOD 4. SDA
R208
MODEL_OPT_2 L219 TU3700 5.+3.3V_TU
L227 R4019 AVDD25_PGA 11
6. SIF
IF_AGC_MAIN
R161 7. +1.8V_TU
Sensor_SDA
R160 Sensor_SCL +3.3V_TU 9. IF AGC
R1660 L3703 1 10. DIF (P)
AV_CVBS_DET
11. DIF (N)
R1612
COMP2_DET +3.3V_Normal
R141 From Q403
AMP_SDA
R140
AMP_SCL
R145
I2C_SDA
R144
I2C_SCL
LG TRAINING
CENTER
Page 7 of Interconnect Diagram October 2012 32LS3500 LCD TV
37LK450 INTERCONNECT DIAGRAM VCC 3.3V pins 52, 53

VDD 16V pins 35,36,37
VCC 3.3V pins 8, 9
VDD 16V pins 24, 25, 26
VGL -6V pin 50 VGL -6V pin 11
Other U601 Voltages to the Panel
SMPS TEST 1 : Forcing SMPS On. Remove AC Power. VGHC 23.33V pins 47, 48 VGHC 23.33V pins 13, 14 1) [15.44V] J103 41 & J105 20 17) [VCC 3.3V] J103 8,9 & J105 52,53
Disconnect P401 on Main Board. Jump pin 1 (PWR_ON) to pin 9, 10, 11 or 12 . TO TFT MODULE TO2)TFT
[15.25V] J103 40 & J105 21
MODULE 18) [6.7V] J103 35 & J105 27
Apply AC Power. This should force the SMPS to the on state. All Voltages should be produced. 3) [13V] J103 39 & J105 22 19) [6.34V] J103 36 & J105 28
J105 J103
Disconnect AC Power. Q101 5) [10.22V] J103 37 & J105 24 21) [1.23V] J103 38 & J105 30
Gnd
Use jumper with needles on each end.
L202 U202
1) 1.2V
2) Gnd Test
Gnd 0V
7) [7.47V] J103 35 & J105 26 28) [7.18V] J103 16 & J105 45 Attach 44 first, apply power, then touch
Leave Jumper from Test 1 in place. Q100 StaticHi 17.9V
Note: STBY 3.5V VCC 3.3V 1 2 3 3) 3.3V 3.3V 8) [16V] J103 24,25,26 & J105 35,36,37 29) [7.18V] J103 16 & J105 45
Jump pin 18 (INV_ON) to pin 9, 10, 11 or 12. Must be present U205 U100
Q201 3.33V Gnd
2
Apply AC Power. This should force the Backlights to come on. when AC applied. 7.9V 16 D102
16V V D202 U400 VCC U601
V3D3 3.3V
SMPS P201 Front pins on SMPS P201 Front pins on
D203 VDD 16V P201 "SMPS Board" To P401 "MAIN Board" P401 to SMPS P201
TEST 1
connector are connector are U201 Pin Label STBY Run No Load Diode Check Pin Diode
Warning: Over 23 24 TEST 2 23 24 odd Pins. Gnd VGHC 23.33V
D107
D100
odd Pins.
D101
D105
D108
D201 -3V VGL
-6.1V 24 ERROR 0V 0V 0V OL 1 2.9V
12V
23 n/c n/c n/c n/c OL 2-4 2.37V
To each Backlight Q505
12V 19 20 12V 19 20
16V VGL -6V F101
(1) PWR-On Pin 1: Turns on 12V, 24V to the Main and
T10 INV_ON 22 P-DIM 0.02V 0.46V~3.2V 0V OL 5-8 Gnd 24V to the Inverter. (Backlights not on).
To Backlight U1 12V 12V
Gn Gn 21 12V 0.06V 12.23V 12.18V 2.09V 9-12 1.15V (2) INV-On Pin 18: Turns on the Backlights
15 16 15 16 L201 d d
B 12V In 20 A-DIM 0.02V 3.31V 0V OL 13-16 Gnd
13 14 13 14 1 44 51
1 5 D201 Pins 48~51 (3) Error_Out Pin 24: Goes high when the backlights are
5 11 12 11 12 19 12V 0.06V 12.23V 12.18V 2.09V 17 2.3V
1 Q201 3.5V_ST 3.5V_ST told to come on. Goes back low when they come on.
Q311 3.5V_ST
9 10
3.5V_ST To Main 18 INV_On/Off 0.52V 3.09V 0V OL OL
9 10 18 If it goes high again on the 5th attempt to fire the
T9 7 8 7 8 17 12V 0.06V 12.23V 12.18V 2.09V 19 2.3V backlights, the set shuts off.
To Backlight Q801
6 7 A 5 6 5 6 A LVDS 13~16 Gnd Gnd Gnd Gnd Gnd 20 OL (4) A-DIM Pin 20: Is not used. It is a fixed Voltage.
DU59 DU64 24V 3 4 24V 24V 3 4 24V 9~12 3.5V_STBY 3.53V 3.5V 3.53V 2.62V 21 2.3V
DU61 (5) P-DIM Pin 22 Will vary according to OSD Backlight
DU15
DU62 PWR_ON PWR_ON 5~8 Gnd Gnd Gnd Gnd Gnd 22 OL setting, incoming video IRE level and Ambient room light
CN1
DU57
Hot Gnd LVDS Video Signals 2~4 24V 0.05V 24.17V 24.36V 1.27V 23 Gnd conditions. It is output from the Video Processor.
To Backlight 6 (Shock Hazard) Range 0.46V to 3.2V.
5 1 PWER_ON 0V 3.38V 3.53V 1.16V 24 OL
T8
5
T7
125V 24V
SMPS Page 2 of Interconnect Diagram For Main Component Voltages see See P201 SMPS
To Backlight 1 270uF + - P/N: EAY62170001 Page 3 of Interconnect Diagram

Q402 RL_ON Switch
DU14 12V Source
DU56 IC408/IC409 Power Det
(Set up SMPS in Test 2 mode). P401

3
7 6 +-
Q405 Q402 5V_USB
To Backlight 35V 24V Source D201 Cable J102. 1.5V_DDR EEPROM INV On/Off Switch 3 21 L406
T6 C163 USB
T102
G S
1 5
1 5 D251 Switch L422
IC1450
D
Jump 3.3V from the VCC Test point (Left side of L202) to
IC501
IC502
T5 Q107 The T-CON will product patters on the screen, Red, Green, 1.26V_DDR IC1202 DDR 3.3V_Normal Current Sense
To Backlight Cold
T501 Blue, etc. 3.5V_ST in 12V in
7 6 Hot IC104 EEPROM MAIN BOARD
5V_USB in
IC102 Q102 Saturn p/n: EBT61525901 CUSDLH
P202 "SMPS Board" To CN1 "Ballast Board"
Gnd
DU54 Other SMPS:
L415 p/n: EBT61542101 CUSDLH
Ballast IC3703
37LK450-
UB.SUSYJK/
Pin Label STBY Run Diode Check P703 IC102 NAND
FLASH
2
To Backlight Q101 DDR
6 5 CUSYLH
Q104
T4 p/n: EAY60869307 IC101 Saturn 3 2 1
D602
7 1 For Voltages F601 Video Q408 1.8V_TU
6 12 INV_On/Off 0V 3.09V OL Debug G
5 Processor S D
See Table for P2401 3.15A/250V STBY: 163V 3.3V_TU in

T3 11 DET 0V 0V OL Q1001 IC1401
Q704 J1 "IR Board" To P2401 RUN: 387V IC402 2.5V_Normal
Gnd
To Backlight 7 1
DU53 Pin Diode Check Q602 6~10 Gnd Gnd Gnd Gnd Serial Flash 3
3.5V_Normal in EIDID HDMI Side
L601
450V
68uF
1
2 2
Q806 G B Note: Components in Grey are on the

X1002
IC1002
+
DU12 +-
IC804
D S
Q701 OL 24V 0.05V 24.17V 1.27V
1~5 1 JK803
2 OL in 14 is P_DIM, Pin 13 is A_DIM, Pin 11 is Error.
P
32.768KHz
Micro DS back and are flipped for from view. HDMI 3
7 6 3 Other Main Boards Used in the 37LK450
Q105 C162 Gnd Q602 EEPROM D804 X201
4 OL 12V Pins 1 ~ 4 and D825
GB
p/n: EBU61376604 CUSYLH/SUSYJK
450V
68uF
D824
+
Q101
LVDS Video Signals IC1001 Q805 p/n: EBT61542109 CUSYLH/SUSYJK
To Backlight T2
+- 5 OL Q2405 Q803
IR Q1101
6 OL AC F101 Q2406 Buffers
24MHz Q1105
JK1103 JK1102
1 5 C161 7 Gnd Protection
5A/250V
Q1104
1 5
Q703 8 OL A P2401 Q1102
9 0.93V Q1103
Q106 P2401 “Main” to J1 “Ft. IR/SoftTouch Key Board” JK1601 JK1603
T1 10 Gnd L
BD101
To Backlight DU52 JK3301 HP

11 Pin Label STBY Run Diode Check Digital Video 18. IF p
Q102 OL G 17. IF n
JK1104 (PC) TU3702
DU51
12
16. IF AGC
OL 15 SDA 3.53V 3.29V 1.97V Q501
7 6 N JK1604 TUNER 15. Reset
Q1106
13
14. 3.3V
Gnd 14 SCL 3.52V 3.29V 1.97V RGB EDID TDVJ-H101F 13. 1.26V
AC
DU11 14 OL SK101 In 13 Gnd Gnd Gnd Gnd IC501 IC1105 Analog
12.
11.
GND
CVBS
SIDE A/V
Q3703
D1115 Video
10. NC
12 LED_R 0V 0V 2.67V Audio Amp 3.3V_Normal Audio 9. SIF
For Ballast Component Voltages and drive in JK1101 (RS232) IC1101
Q3705
0.56V 3.08V 0.56V 8. NC
11 +3.3V_NORMAL L509 L508
L507 L506 IC404 Tuner Data 7. SDA
waveforms see Key 1 & Key 2 Voltage and Resistance Chart with buttons pressed. 10 Gnd Gnd Gnd Gnd 1 2 3
Tuner Clock 6. SCL
1.8V_AMP 5. NC
Page 4 of Interconnect Diagram Key 1 J1/P2401 Pin 3 Key 2 J1/P2401 Pin 4 9 IR 1.96V 1.93V OL Q802 RS232 Data
4. NC
IC801
Tuner B+ 3. 5V
P501
D822
Resistance Function Voltage Resistance Function Voltage LED_B 0V 0V 2.67V
2
Q801
IC802
8 EIDID HDMI 1 2. NC
1. NC
1.96MΩ Vol + 1.69V 1.96MΩ CH + 1.69V 7 Gnd Gnd Gnd Gnd
J1 1.24MΩ Vol - 1.14V 1.24MΩ CH - 1.14V
Front IR R-R+L-L+ EIDID HDMI 2
6 3.5V_ST 3.33V 3.49V 1.16V JK801D821 JK802
550KΩ Menu 0.53V 550KΩ Power 0.53V 5 KEY 2 3.3V 3.29V 1.83V
11.5Ω Enter 0.0V 11.5Ω Input 0.0V To all Speakers
4 KEY 1 3.3V 3.29V 1.83V
All pins 12.05V
A Voltage and Resistance taken with AC applied to the set. 3 Gnd Gnd Gnd Gnd
No Button pressed Resistance is 16.7MΩ Diode Test = OL
2 NEC_EEPROM SDA 3.13V 3.48V 3.29V
1 NEC_EEPROM SCL 2.12V 3.48V 3.29V
37LK450 MAIN (FRONT SIDE) SIMICONDUCTORS
IC103 HDCP IC403 (+1.26V_VDDC) IC406 (+5V_Normal) Q408 (+1.5V_FRC_DDR) Q1001 EDID Write D804 Source Bias
Pin EEPROM Pin Regulator Pin Regulator Pin Switch Pin Protect Pin
Q806 [1] 0V (Gnd) [1] 3.28V (In) [1] 0V (Gnd) G 3.3V (PWR On/Off2_1) B 0V [A1] 0V
[2] 0V (Gnd) [2] 3.28V (In) [2] 12.23V (In) S 1.51V (In) C 4.7V [A2]
3.27V [3] 3.29V (B+) [3] 0V (Gnd) [3] 0V (Gnd) D 1.52V (Out) E Gnd [C]
3.17V [4] 0V (Gnd) [4] 0V (Gnd) [4] 0.8V
[5] 0V [5] 0V (Gnd) [5] 0.86V Q801 HDMI 2 Q1105 Head Phone D822 5V
Routing [6] 3.29V [6] 0.8V [6] 3.32V (PWR On/Off1) Pin Hot Swap Pin MUTE Pin
for IC802 [7] 0V (Gnd) [7] 0.86V [7] 5V (Out) B 0.63V B 2.82V [A1] 5V
[8] 3.29V (B+) [8] 0.54V [8] 5V (Out) C 0V C 0V [A2] 0V
[9] 1.75V E Gnd E 3.34V [C]
4.7V
IC401 5V Regulator [10] 1.33V (Out) IC407 (+1.5V_DDR)
Pin for USB [11] 1.33V (Out) Pin Regulator Q802 HDMI 1 Q1106 Head Phone D825 Source Bias
[1] 0V (Gnd) [12] 1.33V (Out) [1] 3.32V (In) Pin Hot Swap Pin Mute Driver Pin
Q805 [2] 12.24V (In) [13] 4.72V [2] 3.32V (In) B 0.63V B 0V [A1] 0V
[3] 0V (Gnd) [14] n/c [3] 0V (Gnd) C 0V C 2.82V [A2]
0.06V [4] 0.8V [15] 3.29V [4] 0V (Gnd) E Gnd E Gnd [C]
3.17V [5] 0.8V [16] 3.28V (In) [5] 0V (Gnd)
[6] 3.3V (PWR On/Off2_1) [6] 0.83V Q805 CEC
Remote [7] 4.99V (Out) IC405 (+3.3V_NORMAL) [7] 0.7V Pin
HDMI CEC [8] 4.99V (Out) Pin Regulator [8] 0.51V [B] 3.17V
[1] 0V (Gnd) [9] 1.93V [G] 0V
IC402 (+2.5V_Normal) [2] 12.23V (In) [10] 1.52V (Out) [S] 0V
Pin Regulator [3] 0V (Gnd) [11] 1.52V (Out) [D]
0.06VV [1] 3.29V (In) [4] 0.8V [12] 1.52V (Out)
[2] 0V (Gnd) [5] 0.87V [13] 4.87V Q806 CEC Remote
[3] 2.5V (Out) [6] 3.32V (PWR On/Off1) [14] n/c Pin HDMI
CEC [7] 3.34V (Out) [15] 3.31V [B] 3.17V
[8] 3.34V (Out) [16] 3.32V (In) [G] 0V
[S] 3.28V
[D] 3.29V
37LK450 MAIN (BACK SIDE) SIMICONDUCTORS
IC104 Microprocessor IC804 EDID Data IC1105 EDID Data Q401 Power On/Off Q803 HDMI 4 D821 5V Routing
Pin EEPROM Pin HDMI4 Pin PC Pin Driver for Q402 Pin Hot Swap Pin for IC801
[1] 0V (n/c) [1] 0V (Gnd) [1] 0V (Gnd) B 0.65V (RL_ON) B 0.65V [A1] 0V
[2] 0V (Gnd) [2] 0V (Gnd) [2] 0V (Gnd) C 0V C 0V

[A2] 5.0V [3] 0V (Gnd) [3] 0V (Gnd) [3] 0V (Gnd) E Gnd E Gnd
[C] 4.7V
[4] 0V (Gnd) [4] 0V (Gnd) [4] 0V (Gnd)
[5] 3.29V (SDA) [5] 4.7V (SDA) [5] 4.7V (SDA) Q402 Power On/Off Q1101 Head Phone D824 5V Routing
[6] 3.29V (SCL) [6] 4.7V (SCL) [6] 4.7V (SCL) Pin Switch Pin MUTE Pin for
IC804 [7] 0V (Gnd) [7] 4.7V (WP) [7] 4.7V (WP) 1 3.3V (In) B 0V [A1] 0V
[8] 3.29V (B+) [8] 4.7V (Vcc) [8] 4.7V (Vcc) 2 0.8V (Ctl) C 0V [A2] 5V
3 3.16V (Out) E Gnd [C] 4.7V
IC404 (+1.8V_Amp) IC1001 Micro IC1401 Serial Flash
Pin Regulator Pin EEPROM Pin Memory Q405 Inverter On/Off Q1102 Head Phone D1115 5V Routing
[1] Gnd [1] 0V (Gnd) [1] 0.0V Pin Switch Pin MUTE Pin for IC1105
[2] 1.79V (Out) [2] 0V (Gnd) [2] 3.3V B 0.0V B 0V [A1] 0.0V
[3] 3.29V (In) [3] 3.3V (B+) [3] 3.3V
[4] 0V (Gnd) [4] 0V (Gnd) C
5V3.0V (INV_On) C 0V [A2]
IC408 Power_Det [5] 3.3V (SDA) [5] 0V E Gnd E Gnd [C] 4.7V
Pin 12V [6] 3.3V (SCL) [6] 0V Q406 PANEL_VCC Q1103 Head Phone Q2405 IR
[1] 0V (Gnd) [7] 0V (Gnd) [7] 3.3V (B+) Pin Control 1st Driver Pin MUTE Pin Buffer
[2] 3.30V (Reset) [8] 3.3V (B+) [8] 3.3V (B+) B 0.0V B 0V B 0.0V
[3] 3.33V (In) C 0.68V C 0V C 3.0V (INV_On)
IC1101 RS232 IC1450 5V Short Protection E Gnd E Gnd E Gnd
IC409 Power_Det Pin Data Buffer Pin for USB
Pin 24V [1] 3.3V [1] 0V (Gnd) Q407 PANEL_VCC Q1104 Head Phone Q2406 IR
[1] 0V (Gnd) [2] 5.4V [2] 4.98V (In) Pin Control 2nd Driver Pin MUTE Pin
Buffer [2] 3.30V (Reset) [3] 0V [3] 4.98V (In) B 0.68V B 0V B 0.0V
[3] 3.33V (In) [4] 0V [4] 3.3V (USB-En) C 0V C 0V C 0.68V
[5] (-5.4V) [5] 4.96V E Gnd E Gnd E Gnd
IC801 EDID Data [6] 0V [6] 4.98V (Out)
Pin HDMI1 [7] n/c (0V) [7] 4.98V (Out) Q409 PANEL_VCC Q3703 Tuner CVSB
[1] 0V (Gnd) [8] n/c (0V) [8] n/c (0V) Pin Switch Pin (Video)
Buffer [2] 0V (Gnd) [9] n/c (3.3V) S 12.2V (In) B 3.4V
[3] 0V (Gnd) [10] n/c (0V) IC3703 (+1.2V_TU) G 1.84V (Enable) C Gnd
[4] 0V (Gnd) [11] n/c (3.3V) Pin Regulator D 12.2V (Out) E 4.1V
[5] 4.7V (SDA) [12] 3.3V [1] 0V (Gnd)
[6] 4.7V (SCL) [13] 0V [2] 1.26V (Out) Q501 AMP_MUTE Q3705 Tuner SIF
[7] 4.7V (WP) [14] (-5.4V) [3] 3.3V (In) Pin Pin 25 IC600 Pin (Sound) Buffer
[8] 4.7V (Vcc) [15] 0V (Gnd) B 0.0V B 0.2V
[16] 3.3V C 3.35V

C Gnd
IC802 EDID Data E Gnd E 0.9V
Pin HDMI2
[1] 0V (Gnd)
[2] 0V (Gnd)
[3] 0V (Gnd)
[4] 0V (Gnd)
[5] 4.7V (SDA)
[6] 4.7V (SCL)
[7] 4.7V (WP)
[8] 4.7V (Vcc)
37LK450 LVDS P703 WAVEFORMS
P703 Pin 11 Main or CN1 Pin 41 T-CON P703 Pin 13 or CN1 Pin 39 T-CON P703 Pin 16 or CN1 Pin 36 and P703 Pin 19 or CN1 Pin 33 T-CON P703 Pin 21 or CN1 Pin 31 T-CON
P703 Pin 32 or CN1 20 T-CON
Clock (RX~CK-)
2uSec per/div 611mV p/p 2uSec per/div 664mV p/p 2uSec per/div 638mV p/p 2uSec per/div 654mV p/p 2uSec per/div 716mV p/p
P703 Pin 12 or CN1 Pin 40 T-CON P703 Pin 14 or CN1 Pin 38 T-CON P703 Pin 20 or CN1 Pin 32 T-CON P703 Pin 22 or CN1 Pin 30 T-CON
P703 Pin 17 or CN1 Pin 33 and
P703 Pin 33 or CN1 19 T-CON
Clock (RX~CK+)
P703 Pin 23 or CN1 Pin 29 T-CON P703 Pin 27 or CN1 Pin 24 T-CON P703 Pin 29 or CN1 Pin 22 T-CON P703 Pin 35 or CN1 Pin 17 T-CON P703 Pin 37 or CN1 Pin 15 T-CON
P703 Pin 24 or CN1 Pin 28 T-CON P703 Pin 28 or CN1 Pin 23 T-CON P703 Pin 30 or CN1 Pin 21 T-CON P703 Pin 36 or CN1 Pin 16 T-CON P703 Pin 38 or CN1 Pin 14 T-CON
P703 Pin 39 or CN1 Pin 13 T-CON P703 Pin 40 or CN1 Pin 12 T-CON
LVDS CABLE WAVEFORMS:

Waveforms taken using SMTP Color Bar input.
All readings give the Scale 200mV and 2uSec per division Time Base related to scope settings.
2uSec per/div 811mV p/p 2uSec per/div 811mV p/p
Interconnect page 2 of 4
37LK450 Ballast (Inverter) Drawing

7 6
Q505
U1
BALLAST COMPONENT VOLTAGE TABLE To Backlight T10 U1 PIN Run PIN Run
1 5 D201 Q202
2) 9.12V 14) 1.98V
Q101 PIN Run Q202 PIN Run DU11 PIN Run DU55 PIN Run 5 1 Q201 3) 9.12V 15) 0.1V
1 1) 10.86V B
B) 2.9V 1
1) 0V 3
1) 0V
2) 24V E C) 0V 3 2) 1.58V 2 1 2) 1.6V To Backlight T9 5) 3.28V 17) 1.48V
Q801
3) 8.96V E) 0V 3) 0V 3) 2.61V 6) 3.3V 18) 2.33V
6 7
DU59 DU64 7) 5.48V 19) 0V
Q102 PIN Run Q311
C PIN Run DU12 PIN Run DU56 PIN Run DU15
DU61
DU63 8) 2.9V 20) 0V
2
DU58 DU62
1) 3.17V B) 0.58V 1
1) 0V 3
1) 0V DU57 9) 14.41V 21) 1.36V
2) 8.9V C) 0.06V 3 2) 1.59V 2 1 2) 1.26V To Backlight 10) 14.44V 22) 0V
1 3)
B E
6 5
0V E) 0V 3) 0V 3) 2.61V 11) 1.48V 23) 9.06V
T8
1 12) 0V 24) 14.7V
Q103 PIN Run Q505 PIN Run DU13 PIN Run DU57 PIN Run 7 8A
5 125V F1
24V
1) 11.23V B) 0V 1) 0V 1) 0V T7
1 C 1 2 3
2) 24V C) 1.51V 2) 1.57V 2 2) 0.91V To Backlight 1 270uF + -

DU14
3) 9.07V E) 0V 3) 0V 3) 2.65V DU56
35V
DU13 Q702 C164
Q104 PIN Run Q701 PIN Run DU14 PIN Run DU58 PIN Run
C
7 6 +-
1) 3.14V B) 11.03V 1) 0V 1) 0V
1
2) 9.08V C) 8.97V
2
2) 1.6V 2
3
2) 1.23V To Backlight 35V C163
1 3) 0V
B E 3 1
T6
E) 10.87V 3) 0V 3) 2.66V
Warning: Over 2.9Kv 1 5 Q107
1Q105 PIN Run Q702 PIN Run DU15 PIN Run DU59 PIN Run To each Backlight. 1 5
E
1) 10.86V B
B) 11.43V 3
1) 0V 3
1) 0V
C
2) 24V C) 9.08V 2 1 2) 1.54V 2 1 2) 1.41V T5
To Backlight Q107
3) 10.86V E) 11.26V 3) 0V 3) 2.66V 7 6
DU54
Q106 PIN Run Q703 PIN Run DU51 PIN Run DU61 PIN Run Ballast
1) 0V B
B) 3.29V 3
1) 2.6V 1
1) 0V
C
C) 0V 2) 0.52V
2
2) 0V To Backlight
2) 8.9V E 2 1 3 6 5
Q104
1 3) 0V E) 3.16V 3) 0V 3) 24.12V T4
C 2 7 1
6 5
Q107 PIN Run Q704 PIN Run DU52 PIN Run DU62 PIN Run
T3
1 1) 11.27V B) 3.27V 2
1) 0V 1) 0V 7 1
Q704
B 1
To Backlight
2) 24V E C) 0V 1 3 2) 0.8V 3 2) 3.09V DU53
3) 9.08V E) 3.14V 3) 2.6V 3) 24.12V DU12 Q701 +-
C 2
7 6
Q108 PIN Run Q801 PIN Run DU53 PIN Run DU63 PIN Run Q105 C162
1) 3.15V B) 5V 1) 0V 1) 0V Q101
1 2
To Backlight +-
2) 9.06V B E C) 0V 1 3 2) 1.66V 3 2) 3.32V T2
1 3) 0V 3) 24.12V
E) 0V 3) 2.63V C161
2 2 1 5
1 5 Q703
Q201 PIN Run D201 PIN Run DU54 PIN Run DU64 PIN Run
1) 15.49V 1) 2.6V 1) 0V Q106
E B
B) 0V 1 3 1 T1 DU52
To Backlight
C C) 1.49V 3 2) 5.48V 2 1 2) 0.9V 3 2) 3.15V Q102
E) 0V 3) 14.59V 3) 2.66V 3) 24.12V DU51
7 6
DU11
Interconnect page 4 of 4 August 2011 37LK450 LCD-DV

37LK450 +3.5V_ST Voltage Distribution Circuits

+3.5V_ST
+3.5V_ST
P401
2 1
PWR_ON Switch
3
1, 2, 1 6
From SMPS Q402
+3.5V_ST Pin 9~12 +3.5V_ST Not On
1.5V_DDR
1, 2, 16 Not On
IC403 +3.5V_ST in Additional Information
1.26V_DDR
Other components using 3.5V_ST
Not On
R1009 Model_OPT_1 pull up
+3.5V_ST
P1001 Debug R1075 Model1_OPT_2 pull up
4
Micom
MAIN BOARD R2404 Key1 pull up
Reset +3.5V_ST R2405 Key1 pull up
+3.5V_ST
R1046
C1010
Note: Components in Grey are on the
R1039 +3.5V_ST
X1002 back and are flipped for from view.
DS
HDMI 3
CEC Remote
48
IC1002 D825
+3.5V_ST
IC1001 EEPROM Q805 HDMI Side CEC
+3.5V_ST Q2406 IR Buffers Head Phone Mute Q1105
P2401 +3.5V_ST
To Ft IR
Pin 6 Amp Mute JK3301 HP
JK1104 (PC)
Driver
Q501
Q1106
Head Phone Mute Driver
+3.5V_ST JK1101 (RS232) +3.5V_ST
IC1101
RS232 Data
HDMI 2 CEC HDMI 1 CEC
JK801 JK802
LG TRAINING
CENTER 5 August 2011 37LK450 LCD-DV
37LK450 +12V Voltage Distribution Circuits
IC408 +12V Power Det

+12V IC408 IC401
P401
3
21
5V_USB
+12V
G S
Q409 +12V
Panel Vcc IC405 +12V

Switch
From SMPS 12V +5V_Normal
Pin 17, 19, 21
+12V
+3.3V_Normal
MAIN BOARD
6
LG TRAINING
CENTER
August 2011 37LK450 LCD-DV
37LK450 +24V Voltage Distribution Circuits
+24V
P401 3
IC 409
21
Power Det 24V
From SMPS
+24V
Pin 2, 3, 4
MAIN BOARD
Note: Components in Grey are on the

back and are flipped for from view.
Audio Amp
32~35
IC501
+24V
L509 L508
L507 49~52
L506
P501
R-R+L-L+
7
LG TRAINING
CENTER
August 2011 37LK450 LCD-DV
37LK450 Other Voltage Distribution Circuits

Additional circuits utilizing +3.5V_ST: Additional circuits utilizing +3.3V_Normal: Additional circuits utilizing +12V: Additional circuits utili
Reset for Microprocessor: C1010 and R1046 CEC Remote: Q806 IC408 Power_Det: R448 IC409 Power_Det: R482zing +24V:
Key 1 and Key 2 pull up: R2401, R2405 DSUB_Det: R1146 Panel Power Drivers: R431 to Q406, R439, R440 to Q407
S/T_SCL R4043, S/T_SDA R4035 HP_DET: R1155
Micom Model Option 0~3 pull up: Write Protect (WP): IC1401 pin 3 R1403
R1071, R1009, R1075, R1079 IC_AGC_MAIN Pull Up: L227 R4019
IR Buffers Q2405, Q2406 FRC_RESET: R205 Pins
CEC Remote: Q805 AV_CVBS_DET: R1660
L412
Q409 L702 1~4 P703
Pin 8 IC1105
Amp Mute: Q501 SC1/COMP1_DET: R1613 Panel_VCC Pin D LVDS to T-CON D1115
RGB PC EDID
Pin S
COMP2_DET: R1612
LED_DRIVER_D/L_SCL R2100 / SDA: R2101 L401 IC401 L406 IC1450
Pin 8
IC804
Additional circuits utilizing +5V_Normal:
PWM_1&2 Pull Up: R115, R117 +5V_USB USB OCP HDMI Side EDID
/PCM_IRQA Pull Up: R132, /PCM_Wait Pull Up: R133 Pin Pins D824
I2C Pull Up: R140~R145 Pin 2 7,8 2,3
Pin 8 IC801
HDMI 1 EDID
Pins D821
12V L417 IC406
7,8 L422
+5V_Normal Pin 8
IC802
+5V_Normal HDMI 2 EDID
Pin 2 D822
From SMPS P201 Q405 P401 pin 18 to
pins 17, 19 and 21 to P401 INV_CTL SW SMPS P201
L402 12V L416
IC405
+12V +3.3V_Normal
Through R419 to Collector
Pin 2
From SMPS P201 pins 9~12 IC104 EEPROM (Saturn)
Pin 8 L3702
to P401 JK1103 Optical Out
+3.3V_Normal
L404 L420 L423
+3.3V_ST IC407 Q408 L2404 Pin 2
+1.5V_DDR +1.5V_FRC_DDR Pin 6
P1402 to Ft. IR +5V_TU
Pin 1,2 Pin Pin D Pin S
10~12 IC1401 S-Flash Memory
Pin 11-12
P401 pin 1 to Q402 IC1002
IC102 NAND Flash Memory
SMPS P201 PWR_ON SW Micro L301
Pin 12, 37
Pin 3 Pin 1 Pin 48 VCC1.5V_U3_DDR
23 L210 L1203 IC1202 USB Select Pin 3
AVDD_DDR_FRC +3.3V_USB
Pin 5, 10, 23, 29, 36 Pin 14
L3703
+3.3V_Normal +3.3V_TU
P2402 L2403 IC1001 +3.3V_Normal Pin 3 TU3702
To Ft. IR EEPROM Micro TUNER
Pin 6 Pin 8 L217 IC3703
+1.2V_TU
AVDD_DMPLL +1.26V_TU
IC1101 Q1105 Pin 2
Pin 13
RS232 Side_HP_Mute +3.3V_Normal Pin 3
Collector IC101 VDD33
L204 IC404
Video Pin 1
Pin 16
FRC_VDD33_DDR Pin 12 Pin 13
Processor IC402
Pin 1,2 L217 +2.5_Normal L504
+3.3V_Normal Pin 13
IC403 AU33
Pin 3
+1.26V_VDDC AU25
L212
L211
L228 AVDD2P5 From SMPS P201 pins IC501 Audio Amp
MIU0VDDC L221 2, 3 and 4 to P401
L225 FRC_AVDD L407
FRCVDDC L219 +24V +24V Pin 32, 33, 34, 35 Right CH
AVDD25_PGA Pin 49, 50, 51, 52 Left CH
LG TRAINING
CENTER
8 August 2011 37LK450 LCD-DV
42CS560 INTERCONNECT DIAGRAM

VGL -5.3V pin 9, 13 VCC 3.3V pins 36, 67
(1) PVDD 16.46V VCC 3.3V PVDD 16.46V VCC 3.3V
PWR-On Pin 1: Turns on 12V, 24V (21V) to the Main and 398V to the on board Ballast circuit. VGH 27.53V pin 11
HVDD 8.04V HVDD 8.04V HVDD 8.04V pins 38, 39
(2)
INV-On Pin 18: Turns on the Backlights
(3)
Error_Out Pin 24: Goes high (3.3V) when the backlights are told to come on. Goes back low when they light. HVDD 8.04V pins 21, 22 TO TFT MODULE TO TFT MODULE VGL -5.3V pin 48, 52
If it goes high again on the 5th attempt to fire the backlights, the Ballast shuts off. VCC 3.3V pins 24, 25 CN5 CN4 VGH 27.53V pin 51
(5) C107 C103
P-DIM Pin 22 can vary according to incoming video IRE level and OSD Backlight setting Output from the HVDD 8.04V C105 C110 C101
Video Processor IC100. Range 0.95V to 2.64V. VGL -5.3V pin 9 X1 VGL -5.3V pin 52 PANEL TEST
U3
F4 and F5 are ground D10 D3
L3 remove the LVDS cable. Jump
3.44V protection EMI Filters. 12V from SMPS to the 12V fuse.
D202 Failure to return both US2 VGL -5.3V
UC1 VGH 27.53V (Use top leg of D202 for easy
screws with the shield PVDD 16.46V D11
D206 D202 FL5 D2 FL4 access to 12V)
removed can cause 1 VCC 3.3V D4 US1 Jump VCC 3.3V (Just left of L2)
D5
these to open. 2 to pin 44 on CN1. White, Red,
U6 3 F1 P401 to SMPS P201
12V Blue, Green and Black patterns
P201 LD0 Test L2 12V L1 show on screen.
Pin Diode
D201 CN1 1 OL
U5 12V
T701 T702 T501 Gnd 12V 2-4 2.92V
Hot Gnd D204
IC502 5-8 Gnd
(Shock Hazard)
9-12 0.64V
LVDS Video Signals removed for Service if Power is going to be applied. 13-16 Gnd
IC503 P201 "SMPS Board" To P401 "MAIN Board"
17 OL
Q709 SMPS D601 Pin Label STBY Run Diode Check 1.57V
18
P/N: EAY62769601 L600
24 ERROR 0V 0V Open 19 OL
Backlight Drive Q710 See LVDS waveforms on OL
23 n/c n/c n/c Open 20
Signal TP
Q602 Page 2 of Interconnect Diagram 21 OL
R403 Same as 22 P-DIM 0.02V 0.95V~2.64V Open
IC501 22 2.57V
F501
Q707 21 12V 0V 12.27V Open 23 n/c
100uF
450V
20 A-DIM n/c 1.53V Open 24 OL

R406 Q708
-
STBY: 1.24V See P201 SMPS

3.43V on ERROR
RUN: 396.8V
P703 LVDS
Panel_VCC
18 INV-ON/OFF 0V 2.96V Open line indicate a
Q409
Backlight firing P401 EEPROM
17 12V
D S
Backlight Drive F501 0V 12.27V Open E B
Signal TP
fault. Q405 G
C
12V out IC1000
P401 3.15A/250V IC104
16 Gnd
C
Gnd Gnd Open INV_CTL 3 Q407 Pins 48-51
Hot B E
IC408 Q402 1 2 PWR_ON
Q409 Driver Commercial
To Panel 13-15 Gnd Gnd Gnd Gnd 1
Q40
E Remote
BD101 PWR_Det 1C
9-12 3.5V (Stby) 3.41V
3 B
2
Backlights 3.39V Open
T704 Cold P2402 +3.3V_Normal IC407 3
2
1
5-8 Gnd Gnd Gnd Gnd S G

L
1.2Kv E C D
L415
P402 2-4 20V
2
0V 21.56V 0.82V Q403 Driver IC403 +2.5V_Normal
To Panel F100 To Front IR A IC1201
IC1450
5A/250V 1 PWR_ON 0V 3.24V 0.91V IC101
IC401 USB_OCP
Backlights IC5601 +1.10V_VDDC DDR Micro
P2402 "MAIN Board" To J1 "IR Board" D200
T703 Video +5V_Normal
AC In A2 Processor
15 S/T_SDA 3.34V 3.34V 3.0V
Serial Flash
14 S/T_SCL 3.34V 3.34V 3.1V X201 IC3703
120Hz SMPS TEST 1 : Forcing SMPS On. SMPS Test P201 Open 13 Gnd Gnd Gnd Gnd IC501 Main 1
2 2
TUNER PINS
Remove AC Power. Pin No Load 12 LED_R 0V 0V OL
AUDIO Amp Q802 P/N: EBR75140001 24Mhz
+1.8V_TU 1. n/c
Disconnect P401 on Main Board. 11 +3.3V_Normal 0.00V 3.26V 0.57V 2. Reset
24 0.03V HDMI Hot Swap
E B
Jump pin 1 (PWR_ON) to pin 9, 10, 11 or 12 . 10 Gnd Gnd Gnd Gnd C (AUSYLUR, AUSYLHR, 3. SCL
23 n/c L504 L506 E B
A1 A2
4. SDA
Apply AC Power. This should force the SMPS to the 9 IR 3.34V 3.34V 2.68V Q801 D821 AUSYLJR,)
22 3.25V
on state. All Voltages should be produced. 8 LED_R 0V 0V OL A1 A2
6. SIF
21 12.29V 7. +1.8V_TU
7 Gnd
C
(20V and 12V to Main). 397V Backlight Power. Gnd Gnd Gnd L503 L505 D822
2Msec per/div 8. CVBS
Backlights are not on. 20 1.64V 6 3.5V_ST 3.41V 3.35V 0.65V 9. IF AGC
4.03V p/p 48KHz TU3700
Disconnect AC Power. 19 12.29V 5 KEY 2 3.30V 3.31V OL 1
10. DIF (P)
80% P-DIM 1 11. DIF (N)
18 3.41V 4 KEY 1 3.30V 3.31V OL
R403 Bottom leg SMPS TEST 2 : Forcing Backlights On. 17 12.29V 3 Gnd Gnd Gnd Gnd
13-16 Gnd 1
Jump pin 18 (INV_ON) to pin 9, 10, 11 or 12. 1 Sensor_SCL 0V 3.23V 1.14V p/n: EBU61719708 p/n: EBT62114904
Apply AC Power. 9-12 3.41V Other p/n
(AUSYLUR and AUSYLHR) (AUSYLJR)
This should force the Backlights to come on. 5-8 Gnd
2-4 19.17V
P201 P201 To all Speakers
1 3.41V See DC Voltages for Main Board on
All pins 10.84V Page 3 of Interconnect Diagram
Front IR / Key Board Diode Test = OL
Intelligent Sensor Jumper Jumper
J1 Key 1 Line J1 or P2401 pin 4 Key 2 Line J1 or P2401 pin 5
Jumper Resistance Voltage Resistance Voltage
Volume (+) 1.96M Ω Volume (+) 1.68V CH (Up) 1.96M Ω CH (Up) 1.68V
Note: STBY 3.5V Must be Volume (-) 1.24M Ω Volume (-) 1.13V CH (Dn) 1.24M Ω CH (Dn) 1.13V
present when AC applied. Settings 540K Ω Menu 0.47V Power 540K Ω Power 0.47V
A Test 1 Test 2 OK 19.3 Ω Enter 0.01V Input 19.3 Ω Input 0.01V
Key 1 or 2, No Key Pressed, resistance: 15.85M Voltage 3.3V
42CS560 Main Board Component Voltages
IC1001 Micro IC403 +1.10V_VDDC IC408 Power_Det IC1450 5V Short Protection

Pin EEPROM Pin Regulator Pin 24V, 12V, 3.5V Pin for USB
[1] 0V (Gnd) [1] 3.33V (In) +3.3V_ST [1] 0V (Gnd) [1] 0V (Gnd)
[2] 0V (Gnd) [2] 3.33V (In) +3.3V_ST [2] 3.25V (Reset) [2] 4.98V (In)
[3] 0V (Gnd) [3] Do not Measure [3] 3.35V (In) +12V [3] 4.98V (In)
[4] 0V (Gnd) [4] 0V (Gnd) [4] 3.3V (USB-En)
[5] 3.25V (SDA) [5] 0V (Gnd) IC1000 Commercial [5] 4.96V
[6] 3.25V (SCL) [6] Do not Measure Pin Remote [6] 4.98V (Out)
[7] 0V (Gnd) [7] Do not Measure [1] 3.34V (C1+) [7] 4.98V (Out)
[8] 3.25V (B+) [8] Do not Measure [2] 8.8V (V+) [8] n/c (0V)
[9] 2.16V [3] 3.25V (C1-)
IC401 +5V_Normal [10] 1.23V (Out) [4] 3.34V (C2+) IC5601 Serial
Pin +5V_USB [11] 1.23V (Out) [5] V (V+) Pin Flash
Memory
[1] 0V (Gnd) [12] 1.23V (Out) [6] (-5.7V ) (C2-) [1] 3.28V (In)
[2] 12.23V (In) [13] 4.61V (BOOT) [7] 0V (n/c) [2] 3.28V (In)
[3] 0V (Gnd) [14] 0V (n/c) [8] 3.34V (n/c) [3] 0V (Gnd)
[4] 1.23V (FB) [15] 3.24V (EN) 3.3V_Normal [9] 3.36V (n/c) [4] 0V (Gnd)
[5] 3.26V (COMP) [16] 3.33V (In) +3.3V_ST [10] 5.79V (n/c) [5] 0V (Gnd)
[6] 12.22V (EN) [11] 0V (DN1) [6] 0.8V
[7] 2.14V (SS) IC407 (+1.5V_DDR) [12] 0.04V (ROut1) [7] 0.86V
[8] 0V (n/c) Pin Regulator [13] 0V (RIn1) [8] 0.54V
For Output, use L406 [1] 3.33V (In) +3.3V_ST [14] (-5.73V ) (DOut1) [9] 1.75V
[2] 6V (n/c) [15] 0V (Gnd) [10] 1.33V (Out)
IC402 +2.5V_Normal [3] 3.33V (In) +3.3V_ST [16] 3.33V (In) +3.3V_ST [11] 1.33V (Out)
Pin Regulator [4] 3.24V (EN) +3.3V_Normal [12] 1.33V (Out)
[1] 0V (Gnd) [5] 0V (Gnd) IC3703 +1.8V_TU [13] 4.72V
[2] 2.54V (Out) [6] 2.09V (SS) Pin Regulator [14] n/c
[3] 3.25V (In) [7] 0.79V (FB) [1] 0V (Gnd) [15]
3.29V
[8] 1.53V (Out) [2] 3.30V (Reset) [16] 3.28V (In)
[3] 3.33V (In)
Q401 Power On/Off Q402 Power On/Off Q403 +3.3V_Normal

Q400 +3.3V_Normal Pin Driver for Q402 Pin Switch Pin Switch
Pin Driver for Q403 B 0.49V (RL_ON) 1 3.33V (In) +3.3V_ST S 3.33V (In) +3.3V_ST
B 0.65V (POW ER_ON/OFF_1) C 0.07V (Ctrl) 2 3.35V (Ctl) G 0.07V (Enable)
C 0V (Ctrl) E Gnd 3 3.23V (Out) PW R_ON D 3.27V (Out)
+3.3V_Normal
E 0V (Gnd)
D200 SOC_Reset D821 DDC_SCL1/SDA1 Q405 Inverter On/Off
Q407 PANEL_VCC Pin Speed Up Pin Pull Up Pin Switch
Pin Drives Q409 [C] 0V [A1]
[ V (5V_HDMI_1) B 0.01V (INV_CTL)
B 0.0V [A] 0V A2] 5.32V (+5V_Normal) C 2.98V (INV_On)
C 0.68V [A-C] 0V (Gnd) [C] 5.14V (Pull_Up) E 0V (Gnd)
E Gnd
Q801 HDMI 2 Q802 HDMI 1 D822 DDC_SCL2/SDA2
Q409 PANEL_VCC Pin Hot Swap Pin Hot Swap Pin Pull Up
Pin Switch B 0.66V (HPD2) B 0.66V (HPD1) [A1] 5.32V (5V_HDMI_1)
S 12.2V (In) C 0.04V (HDMI HS) C 0.04V (HDMI HS) [A2] 5.32V (+5V_Normal)
G 1.84V (Enable) E Gnd E Gnd [C] 5.14V (Pull_Up)
42CS560 LVDS P703 WAVEFORMS
P703 Pin 12 Main or CN1 T-CON P703 Pin 14 or CN1 T-CON P703 Pin 16 or CN1 T-CON and P703 Pin 19 or CN1 Pin 19 T-CON P703 Pin 22 or CN1 Pin 22 T-CON
P703 Pin 32 or CN1 T-CON
Clock (RX~CK-)
P703 Pin 13 or CN1 T-CON P703 Pin 15 or CN1 T-CON P703 Pin 20 or CN1 Pin 20 T-CON P703 Pin 23 or CN1 Pin 23 T-CON
P703 Pin 17 or CN1 and
P703 Pin 33 or CN1 T-CON
Clock (RX~CK+)
P703 Pin 24 or CN1 T-CON P703 Pin 28 or CN1 T-CON P703 Pin 30 or CN1 T-CON P703 Pin 35 or CN1 T-CON P703 Pin 38 or CN1 T-CON
P703 Pin 25 or CN1 T-CON P703 Pin 29 or CN1 T-CON P703 Pin 31 or CN1 T-CON P703 Pin 36 or CN1 T-CON P703 Pin 39 or CN1 T-CON
P703 Pin 40 or CN1 T-CON P703 Pin 41 or CN1 T-CON
LVDS CABLE WAVEFORMS:

Waveforms taken using SMTP Color Bar input.
All readings give the Scale 200mV and 2uSec per division Time Base related to scope settings.
2uSec per/div 811mV p/p 2uSec per/div 811mV p/p

42CS560 Main Board +3.5V_ST Distribution

+3.5V_ST Input: Pins 9, 10, 11, 12
P401
Q402 Not On in STBY
Not Activated
Turned on by +3.3V_Normal IC1000
until 12V arrives 3
L404 Q402 PWR_ON Commercial
IC408 1
2
1 Remote
IC407 IC407 Not On in STBY

To Front P2402 Q403 Turned on by +3.3V_Normal
+3.5V_ST
D Q403 Not On in STBY Turned on by
Output: R2404 L413 POWER_ON/OFF_1
Pin 6 L2403 R2405 IC403 L206
IC101
Key 2 +1.10V_VDDC Micro AVDD_NODIE
Key 1 L2401
IC403 Not On in STBY Video R143
L2402 S/T_SCL
Turned on by +3.3V_Normal Processor R149
C200 S/T_SDA
IC5601
SOC_Reset Serial Flash
For IC403, IC407, Q403 Voltage Distribution

see “Other Voltage Distributions”
LG TRAINING
CENTER Page 4 of Interconnect Diagram August 2012 42CS560 LCD
42CS560 Main Board +12V Distribution PWR_ON Q402: Turned on by Q401 turned on by IC101 RL_ON.
+12V
Input: Pins 17,19,21 (For power to Q402, see +3.5V_ST Voltage Distribution) Panel_VCC
To T-CON
L412 R439
12V out Pins 48-51
P401 Panel_VCC Q409 R440
P703 LVDS
S
E B
PWR_ON Panel_VCC Q407 R430

3
L402 +3.5V_ST
Q402 Q409 Ctrl. RL_ON
2
1 Gnd R401
2 R406 C B
USB
IC408 R448
PWR_Det Q402 Ctrl. PANEL_CTL from IC101 via Q407 +5V_USB 4
L406
1
+5V_Normal
L425
IC101 To pin 1
L401
Micro L1451 USB
Video +5V_Normal IC401 IC1450
Processor +5V_Normal USB_OCP
+5V_USB
X201
24Mhz
DDC_SCL1/SDA1 Pull Up
D821
A1 A2
C
A1 A2
DDC_SCL2/SDA2 Pull Up D822 C
LG TRAINING
42CS560 Main Board +21V Distribution

NOTE: 20V is the label, but the Voltage is actually 21V
+20V (21V) PWR_ON:Q402: Turned on by Q401 turned on by IC101 RL_ON.

(For power to Q402, see +3.5V_ST Voltage Distribution)
Input: Pins 2 ~ 4
P401
PWR_ON
3
+3.5V_ST
Q402
1 2
E Gnd
L407 C B RL_ON
R406 R401
Q401
Q402 Ctrl.
AUDIO Amp
L501
IC501
22 +24V_AMP
23
24 37 38 39
L504 L506
L503 L505
P501
LG TRAINING
42CS560 Main Board Other Voltage Distributions

After all voltages are +3.5V_ST Input: Pins 9, 10, 11, 12
turned on on the Main
board, Q405 is turned Q405 turns on
Off supplying INV_ON backlights
to the power supply (via
INV_CTL
P401 EEPROM IC104
pin 18) turning on the From Q403
C
backlights. Collector
pulled up by Q405 B E 18
IC407 Not On in STBY +3.3V_Normal
L404 Turned on by +3.3V_Normal
+3.3V_Normal through INV_CTL
R419 R419 L420 IC407 L1209
+1.5V_DDR AVDD_MIU
To Front P2402 Q400
G
3 2 1
IR / Keyboard B C S Q403 L1202

R433 IC402
E D
AVDD_DRO 2
R428
+3.3V_Normal +3.3V_Normal
Output: L2404 IC1201 IC101 +2.5V_Normal
Pin 11 IC403 L415 DDR Micro
Turns on the IC403 Not On Video
Intelligent Q403 Turned on in STBY +1.10V_VDDC
Processor
Sensor by Q400 Turned on by MIUVDDC
POWER_ON/ +3.3V_Normal L228
OFF_1 IC3703
2 2
3
R206
IC501 L502 AVDD_AU33 MODEL_OPT_3 +1.8V_TU
R4027
L204 MODEL_OPT_4
R182
MODEL_OPT_5 TUNER PINS
URSA5_RESET L211 1. n/c
R226 AVDD2P5 2. Reset
MODEL_OPT_0
R211 L229 3. SCL
MODEL_OPT_1 AVDD2P5_MOD 4. SDA
R208
L219
TU3700 5.+3.3V_TU
MODEL_OPT_2
L227 R4019 AVDD25_PGA 11
6. SIF
IF_AGC_MAIN
R161 7. +1.8V_TU
Sensor_SDA
R160 Sensor_SCL +3.3V_TU 9. IF AGC
R1660 L3703 1 10. DIF (P)
AV_CVBS_DET 11. DIF (N)
R1612
COMP2_DET +3.3V_Normal
R141 From Q403
AMP_SDA
R140
AMP_SCL
R145
I2C_SDA
R144
I2C_SCL
LG TRAINING
CENTER
Page 7 of Interconnect Diagram August 2012 42CS560 LCD
42LG60 CIRCUIT INTERCONNECT DIAGRAM
TFT PANEL 16V Pin 89,90 TFT-Drive (T-CON) 16V Pin 2,3
D9 Q8 B (0V)
U11 U14
Common
CN5 CN4 1 Gnd 5 3.3V
3.3V Pin 86,87 3.3V Pin 5,6 A A (-6.05V) 1 1.8V 4 0V
LD1 Blue LED TFT Drive PWB Check Gnd
B C E (Gnd)
-4.3V Pin 84 1.8V -4.3V Pin 8 C C (Gnd) E 2 Gnd 5 Gnd 2 Gnd 6 2.9V
-4.3V Pin 84 3.2V 6.48V Pin 13 -4.3V Pin 8
24.38V Pin 80 16V Pin 89,90
US1 3.3V Pin 5,6 24.38V Pin 12 Common (-3.5V) C (9.47V) 3 1.55V 6 3.3V 3 Gnd 7 3.3V
24.38V Pin 80 24.38V Pin 12
3.3V Pin 86,87 4 8 3.3V
SET 0FF Lamp Assist SET ON 16V Pin 2,3 Gnd
6.48V Pin 78 6.48V Pin 78
VCOMLOUT
6.48V Pin 13
D10 Q2
LED OFF LED ON LED OFF FL22
D10 6.48V A (26.7V) 1 3.3V 4 Gnd
Anode 0V Anode 11.6V Anode 11.6V 3.3V C A A (14.5V)
FL101 U11 Neg Volt 2 0.6V 5 0V
Cathode0V Cathode0V Cathode 9.5V Gnd source
D9 24.38V
C (19.6V)
U15 UC1 R436 R430
FL102 3 Gnd 6 0V
FL20 Gnd
U18 1.83V -4.3V Pin 8
LD1 assist the backlights with firing in dimly lit rooms. Gnd U10 C411
Q2 FRONT SIDE OF MAIN PWB
The appearance of LD1 when the set is on appears to be lit dimly. 3.3V D31 16V BACK SIDE OF MAIN PWB
Pins Pin
FL21 3.3V
However there is a small hole in the back panel frame and the 42,43 IC800 IC807 IC802 (On Back) Q801 (On Back)
L2
23,24
D30
T-CON PWB that allows the backlight to make it appear lit. F1 (11.6V) 16.08V 5V Switching Regulator 2.6V Switching Regulator A2.6V-BCM 3.3V Regulator 5V Switch
U16 11.6V
FL103 3A/125V Pins 25,26
LD1 L1 Function Pin Volts Function Pin Volts Name Function Pin Volts Function Pin Volts
Gnd
Pins 37,38 11.6V In from IC806 1 8.95V In 6,7,8,10 5V Gnd 1 0V Source C ST-5V
U14 From F1 ZD2
Gnd On/Off 2 3.3V Out 1,2,3,4,5 2.6V Out 2 3.3V Control B RL-ON (PWR)
P2 "SMPS" to P801 "Main PWB" CN1 CN2 Q8 5V
Out (+5V-TU) 3 5.0V On/Off 17 Power Control In 3 5V Gnd E 0V
Pin Label STBY
Odd Pins Run Pin Label STBY Run
12V In n/c 4 0.0V Use L801 left side to test output IC805 (On Back) IC405 uP Reset (On Back)
1 16V 0V 16V 2 16V 0V 16V
Pins 47~50 Gnd 5 0.0V Use any top pin of IC807 to test input 3.3V Switching Regulator A3.3V-BCM Reset by Charge of C431
3 Gnd Gnd Gnd 4 Gnd Gnd Gnd IC806 IC820 Function Pin Volts Function Pin Volts
5 12V 0V 11.8V 6 12V 0V 11.8V In 2 5V In 1 3.3VST-MICOM
9V Regulator 1.2V Switching Regulator A1.2V-BCM
7 Gnd Gnd Gnd 8 Gnd Gnd Gnd Function Pin Volts Function Pin Volts Name
Pins 17, 23 and 24 Out 4 3.3V (A3.3V-BCM) Gnd 2 0.0V
9 5V 5V 5.15V 10 5V 5.15V 5.15V LVDS
Not Used In (+12V) 1 11.6V In 6,7,8,10 5V On/Off 1 Power Control-3.3V Out 3 Low to High to B Q400
11 5V 5V 5.15V 12 5V 5.15V 5.15V Gnd 2 0.0V Out 1,2,3,4,5 1.2V IC810 (On Back) Q902 (On Back)
13 Gnd Gnd Gnd 14 Gnd Gnd Gnd Pin 21 is a Out 3 9V On/Off 17 Power Control 1.8V Switching Regulator +1.8V-NTP 12V LVDS control to Q901
15 Gnd Gnd Gnd 16 Gnd Gnd Gnd Fixed Voltage IC404 Use L014 left side to test output Function Pin Volts Function Pin Volts
Left 17 ERR 3.19V 3.3V 18 ACD 4V 4.57V 3.3V Regulator Use any top pin of IC820 to test input In 3 3.3V from IC802 Source C 12V
Backlight 19 PWR 0V 2.86V 20 INV 0V 3.29V Function Pin Volts IC404 uP 3.3V Out 2 1.8V (+1.8V-NTP) Control B LVDS-Panel-Control
Plug 21 ADIM 0.1V 1.68V 22 *PDIM 0V 3.38V Gnd 1 0V 3.3VST-MICOM Gnd 1 0V Gnd E 0V
23 SEL 0V 3.2V 24 SYNC 0V 0V P103 X101
P104 Out 2 3.3V Function Pin Volts Name Q802 (On Back) Q901 (On Back)
20.25Mhz P101 In 3 5V In 3 5V ST_+5V 5V Switch control to Q801 12V LVDS On control to P900 Pins 1~4
PDIM Pin 22 can vary according to OSD Backlight IC103 Out 2 3.3V Reset Function Pin Volts Function Pin Volts
setting. 0.9V 0% to 3.3V 100% Gnd 1 0V Gnd In C ST-5V Source 1, 3 12V
IC101
P2
IC102 Control B RL-ON (PWR) Control 2, 4 Low from Q902
st LVDS
1 ” short either pin 9, 10, 11 or 12 (5V) to Pin 19 (PWR) using a 10K resistor. Gnd E 0V Output 5~8 12V
2 1
This turns on the power supply. TRU-MOTION P102
PANEL TEST: To run the T-CON without the Main board.
4 3
2nd: To test the Backlights, jump Pin 20 (INV) to Pin 19 (PWR) IC108 IC109 IC110
Tuner Pin 16 SMTE Color bar In Right
6 5 Observe the Backlights. With no power applied to the SMPS, disconnect both LVDS Backlight
8 7 If normal, the backlights should turn on and off 4 times. Then they go off. Cables CN1 and CN2.
Jump 12V from the SMPS (P201 pins 5 or 6) to F1 fuse on Plug
10 9 If only ½ the backlights light, (Right side or Left Side), confirm connectors are OK.
If yes, panel defective. IC108 IC109 IC110 the T-CON.
12 11
If no backlight activity, confirm the Fuse F700 has approx. 300V on both sides. 5 (1.2V) 5 (0V) 5 (2.5V) Jump 3.3V from the VCC Test point (Bottom of L2) to pin 44
14 13
If on one side, check fuse for open. 4 (1.3V) 4 (1.79V) 4 (0V) of CN1.
16 15 10K
3 (0V) 3 (0V) 3 (0V) Apply AC power to the SMPS.
18 17
If no 300V, replace Power Supply.
If 300V present, observe the center leg on the left hand side of ballast transformer 2 (3.37V) 2 (3.36V) 2 (3.3V) The T-CON will product patters on the screen, Red, Green,
20 19
T701. Look for 45Khz pulse at 8.7V p/p. 1 (3.29V) 1 (3.29V) 1 (3.37V) Blue, etc.
22 21
If yes, confirm connectors to backlight OK, if OK, then panel defective.
24 23 If no pulse, replace the Power Supply.
MAIN PWB P800 P900

IC807
IC1201
Pin 24 IC600 IC820
Pin 23 *Q902 *Q901
P2 P801
LD803 IC302 IC304
test point Backlight pulse over IC805
Reset See next page for
IC300
1000V p/p (45KhZ) BCM IC100 IC1200 Waveforms for
P402 POWER SUPPY Spk

Assy. J1 IC402 IC500 *IC805 IC303 IC202
Spk Color bar as the
F101
LG Pin 1 ~ 16 Input.
J2 IC301 IC404
F700 8A 250V TUNER 1 16
*IC802 X200 (54Mhz)
24Mhz
Ballast 5A 250V AC J3 IC900 IC806 X400
TUNER *IC810 IC1000 Q400
Section 5V Pin 3
335V J1
Video Pin 16 ATSC/QAM/ IC800
IC501
E B
P200
uP
P401 AC In Ft. TOUCH Audio SIF Pin 14 NTSC P501 P401
IC407 *IC405 Not Used
LED/Push Sw
F700 90V in Stand-By
Side Control Keys *Grayed out components on the back
P100
Pin 12
Pin 17
SOmV pfp 20mS perfdiv
Pin 18
70mV pfp 20mS perfdiv

280mV p/p 50uS per/div
1 11
'l" : ' 1 ,
1 1 •
' rt
¡ ,,..,. 11
1
l 1 ,, 1 ,1 1
11 , ' ••
•
-.1 •
pp p Pin 29
llE:IIII � "' mm:!1111 � • •
• Pin 36
50mV p/p 5mS per div
250mV p/p 50uS per/div l

��
LVDS CABLE P900 FROM MAIN BOARD TO TRU- � Tuner Pin 16 Tuner Pin 14
MOTION BOARD P101 USING SMTP COLOR BAR INPUT
Two Waveforms on the Right are Using the Tuner
Measurements +/- 5% L 1V p/p 20uS per/div

805mV p/p 500nS per/div
42LG60 :: Interconnect
TFT PANEL
LD1 Blue LED TFT Drive PWB Check
SET 0FF BOOT OK SET ON US1

FRONT SIDE OF MAIN PWB BACK SIDE OF MAIN PWB
LED OFF LED ON LED OFF 0V
1.8V IC800 IC807 IC802 (On Back) Q801 (On Back)
Anode 0V Anode 11.6V Anode 11.6V 3.2V
CN5 CN4 5V Switching Regulator 2.6V Switching Regulator A2.6V-BCM 3.3V Regulator 5V Switch
Cathode0V Cathode0V Cathode 9.5V
Function Pin Volts Function Pin Volts Name Function Pin Volts Function Pin Volts
The appearance of LD1 when the set is on appears to be lit dimly. U15 LD1 In from IC806 1 8.95V In 6,7,8,10 5V Gnd 1 0V Source C ST-5V
However there is a small hole in the back panel frame and the UC1 On/Off 2 3.3V Out 1,2,3,4,5 2.6V Out 2 3.3V Control B RL-ON (PWR)
Out (+5V-TU) 3 5.0V On/Off 17 Power Control In 3 5V Gnd E 0V
T-CON PWB that allows the backlight to make it appear lit.
U16 n/c 4 0.0V Use L801 left side to test output IC805 (On Back) IC405 uP Reset (On Back)
TFT-Drive (T-CON) Gnd 5 0.0V Use any top pin of IC807 to test input 3.3V Switching Regulator A3.3V-BCM Reset by Charge of C431
IC806 IC820 Function Pin Volts Function Pin Volts
P2 "SMPS" to P801 "Main PWB" CN1 F1 CN2 9V Regulator 1.2V Switching Regulator A1.2V-BCM In 2 5V In 1 3.3VST-MICOM
Pin Label STBY
Odd Pins Run Even Pins Function Pin Volts Function Pin Volts Name Out 4 3.3V (A3.3V-BCM) Gnd 2 0.0V
1 16V 0V 16V In (+12V) 1 11.6V In 6,7,8,10 5V On/Off 1 Power Control-3.3V Out 3 Low to High to B Q400
Pin Label STBY Run 3A 125V
3 Gnd Gnd Gnd Gnd 2 0.0V Out 1,2,3,4,5 1.2V IC810 (On Back) Q902 (On Back)
2 16V 0V 16V 11.6V
5 12V 0V 11.8V Out 3 9V On/Off 17 Power Control 1.8V Switching Regulator +1.8V-NTP 12V LVDS control to Q901
4 Gnd Gnd Gnd
7 Gnd Gnd Gnd IC404 Use L014 left side to test output Function Pin Volts Function Pin Volts
6 12V 0V 11.8V
9 5V 5V 5.15V 3.3V Regulator Use any top pin of IC820 to test input In 3 3.3V from IC802 Source C 12V
8 Gnd Gnd Gnd
11 5V 5V 5.15V Function Pin Volts IC404 uP 3.3V Out 2 1.8V (+1.8V-NTP) Control B LVDS-Panel-Control
10 5V 5.15V 5.15V LVDS 1 0V 3.3VST-MICOM Gnd 1 Gnd E 0V
Gnd 0V
13 Gnd Gnd Gnd 12 5V 5.15V 5.15V
Out 2 3.3V Function Pin Volts Name Q802 (On Back) Q901 (On Back)
15 Gnd Gnd Gnd 14 Gnd Gnd Gnd
In 3 5V In 3 5V ST_+5V 5V Switch control to Q801 12V LVDS On control to P900 Pins 1~4
Left 17 ERR 3.19V 3.3V 16 Gnd Gnd Gnd
Out 2 3.3V Reset Function Pin Volts Function Pin Volts
Backlight 19 PWR 0V 2.86V 18 ACD 4V 4.57V Gnd 1 0V Gnd In C ST-5V Source 1, 3 12V
Plug 21 *ADIM 0.1V 1.68V 20 INV 0V 3.29V Control B RL-ON (PWR) Control 2, 4 Low from Q902
23 SEL 0V 3.2V 22 PDIM 0V 3.38V P103 X101
P104 Gnd E 0V Output 5~8 12V
24 SYNC 0V 0V 20.25Mhz P101 LVDS
ADIM Pin 21 can vary according to OSD Backlight IC103
* setting. 0.9V 0% to 3.3V 100%
IC101
P2
IC102 Right
1st” short either pin 9, 10, 11 or 12 (5V) to Pin 19 (PWR) using a 10K resistor. Backlight
2 1
P102
4 3
This turns on the power supply.
nd
2 : To test the Backlights, jump Pin 20 (INV) to Pin 19 (PWR)
CONTROL Tuner Pin 16 SMTE Color bar In Plug
6 5 IC108 IC109 IC110
Observe the Backlights.
4
8 7 If normal, the backlights should turn on and off 4 times. Then they go off.
10 9 If only ½ the backlights light, (Right side or Left Side), confirm connectors are OK.
12 11 If yes, panel defective. IC108 IC109 IC110
If no backlight activity, confirm the Fuse F700 has approx. 300V on both sides. 5 (1.2V) 5 (0V) 5 (2.5V)
14 13
If on one side, check fuse for open. 4 (1.3V) 4 (1.79V) 4 (0V)
2
16 15 10K
If no 300V, replace Power Supply. 3 (0V) 3 (0V) 3 (0V)
18 17 See back side of
If 300V present, observe the center leg on the left hand side of ballast transformer 2 (3.37V) 2 (3.36V) 2 (3.3V)
20 19
T701. Look for 58Khz pulse at 8.7V p/p. 1 (3.29V) 1 (3.29V) 1 (3.37V) P900 using SMT
22 21
If yes, confirm connectors to backlight OK, if OK, then panel defective.
24 23 If no pulse, replace the Power Supply.
IC807
Pin 24
G
Pin 23 *Q902 *Q901
P2 P801
LD803 IC302 IC304
test point Backlight pulse over IC805 Reset
IC100 C300
1000V p/p (54KhZ) Ft. PWB OK LED
6
IC701 BCM
P402 POWER SUPPY Assy. J1 IC402 IC500 IC303
IC202
Spk Spk
*IC805
F101 Pin 1 ~ 16
hz
TUNER
F700 8A 250V J2 LG
0
*IC802 X200 (54Mhz) IC301 IC404
5V Pin 3 *IC810 IC1000
Ballast 5A 250V AC J3 ATSC/QAM/ IC900 IC806 24M X400 Q400
Video Pin 16 IC501 E B P200
P401 Section 335V J1 Audio SIF Pin 14 NTSC IC800 P401 Not Used
uP
AC In Ft. TOUCH P501
IC407 *IC405
LED/Push Sw
Side Control Keys *Grayed out components on the back
P100
PDP Training - Fall 2008 78 Schematics 78

42LG60 :: WaveForms
4
2
L
G
LVDS CABLE P900 FROM MAIN PWB TO CONTROL 6
0
PWB P101 USING SMTP COLOR BAR INPUT
LAST TWO WAVEFORMS ARE FROM THE TUNER
Measurements +/- 5%
PDP Training - Fall 2008 79 Schematics 79


LG
2017 Direct View TV Training
43LJ5000 WebOS 3.0 LED TV
MAIN BOARD LAYOUT
(Main Board and Component Voltages)
Published February 17th, 2017


Main Board Picture 65EF9500 (2015) T-CON Section
CN8831
CNB1
BA2
CN9
CNK9
February 2017 Page 01 LG

43LJ5000 Main Board Component Layout 43LJ5000 (2017) Main Board

Color Pin RUN (Voltage)
With Backlights unplugged. BL Power DB801 cathode
Red 1 Backlight Voltage: 125.3V ~ 126.6V
measures 64V Jumps to 150V then slowly bleeds down to 80V. n/a 2 N/C
Measures 56V (Even in Stand-by) with BL disconnected.
Black 3 Backlight Ground Return: 6.32V ~ 32V
AC CNB1
Backlights Bright to Dark
CN8831
(AC)
Ground
FB1 (5A/250V) LB802
DB4
DB3
In 125.9V
Cold Ground
Hot
QB801
54V
CXB1
MOVB1 DB801
3.41V Gnd Backlight Power
UB801
LCB1
DB805
DB1
DB2
6.31V 53.43V
Hot LCB4 QB804 DB802
DB105
6.79V Gnd
Ground QB806
QB802
HGnd Bridge
Rectifier
-
450V
28uF
DB103
+
161V
54V
Ground
HGnd
Cold
450V
-
28uF
Backlight Drive
CN13
USB
+
161V QB101 50% 36V p/p
2.88V 9.68V 5V (15.89Vdc)
DB101
T101
160V 160V 12V F2
HGnd UB102
Gnd
12V
HDMI2
HGnd
CN3
290V 10.69V 12.02V
2.06V
PCB101 5V_STBY
CNB2 N/C Y1
BA2 (SPK)CN9 (LVDS)

LD2 QH5 24MHz
QM32
All SKP
Pins 6.02V QM31 QH1 1.66V 1.63V
UD2 UT2
5.14V Gnd
UA1 UD1 24MHz
Panel_VCC QM2
12V Y1 3.31V
Pins 1-4
QM1 LD3 2.60V p/p 2.60V p/p
1.16V
CNK9 Main to Ft IR/Joystick
PIN LABEL STBY RUN DIODE UR1
QK2
1 Power 3.32V 3.32V OL CN1 N/C CN4
CNK9
Drops to 0V when Power Button is pressed. EB

UL1
2 VCC 5.12V 5.12V 2.23V C
UF1 QH2 HDMI1
Drops to 4.7V when IR is received 3 IR 5.11V 5.11V 1.99V CN5 CN10
4 Gnd Gnd Gnd Gnd Component Audio
5 LED 1.14V 0.45V OL
6 n/c n/c n/c n/c
IR Pulses 5.68V p/p
February 2017 Page 02 LG

43LJ5000 Main Board Component Voltages 43LJ5000 (2014) Main Board
PCB101 *Pins 3-4 UF1 EEPROM QB801 Backlight Power QH5 QM32 5V_Switched
Pin Hot Gnd Reference Pin Microprocessor Pin Doubler Pin Pin For USB
[1] 10.69V [1] 3.31V [1] 3.41V [1] 0V [1] 0.08V
[2] 9.68V [2] 0V [2] 54V (Out) [2] 5.13V [2] 5.14V (Out)
[3] *HGnd [3] 3.32V [3] 3.41V [3] 0.39V [3]
5.16V [4] *2.06V [4] Gnd
[5] 0V QB802 Backlight QK2 DB101 12V
UB102 [6] 0V Pin Driver Power Pin Pin Rectifier
Pin [7] 3.32V [1] 6.79V [B] 0.68V [1] T101 Pluse
[1] 9.62V [8] 3.32V [2] 6.31V (Out) [E] Gnd [2] 12.02V
(Out) [2] Gnd [3] Gnd [C] 0V [3] T101
Pluse [3] 2.49V UR1
Pin QB804 QM1 12V DB103 54V Backlight
UB801 1.5V [1] Gnd Pin Pin Panel VCC Pin Doubler
Pin Regulator [2] 3.32V [1] 0.31V [1] 0.10V [1] T101
Pluse [1] 11.22V [3] 0V [2] 4.40V [2] 12V [2] 54V
(Out) [2] 2.21V [3] Gnd [3] 12V [3] T101
Pluse [3] Gnd UL1 3.3V
[4] 0.09V Pin Regulator QB806 QM2 DB802
[5] 0.15V [1] 0.27V Pin Pin Pin
[6] 1.52V [2] 5.12V (In) [1] 0.31V [1] 0V [1]
11.98V [7] 1.56V [3] Gnd [2] 0.31V [2] 0V [2]
11.40V [8] 1.59V [4] 5.12V [3] Gnd [3] Gnd [3]
11.98V
[5] 3.33V (Out)
UD1 1.16V [6] 3.33V (Out) QH1 HDMI QM31
Pin Regulator [7] 1.54V Pin Hot Swap Pin
[1] 5.10V [8] 1.54V [1] 0.39V [1] 0.62V

[2] Gnd [2] 0V [2] 0.08V
[3] 1.21V UT2 3.3V_Tuner [3] 5.13V [3] Gnd
[4] 5.14V Pin Regulator
[5] 0.19V [1] Gnd QH2 HDMI
[2] 3.31V (Out) Pin Hot Swap
UD2 5V_STBY [3] 5.14V (In) [1] 0.61V
Pin Regulator [2] 0.01V
[1] 0.46V QB101 SMPS (Switch) [3] Gnd
[2] 12V Pin Hot Gnd Reference
[3] 5.19V [1] HGnd
[4] Gnd [2] 160V (Out)
[5] 9.90V [3] 2.88V
[6] 6.32V
[7] 4.87V
[8] 0.81V
February 2017 Page 03

47LV4400 INTERCONNECT DIAGRAM CN202 "SMPS Board" To CN4 "MAIN Board"

J4 "MAIN Board" To
CN202 "SMPS Board"
Note: If a particular area is exhibiting a dimmer backlight level than other areas or the overall brightness seems dim, be (1)
sure to first check the customer’s Menu setting for Backlights. Raise the percentage and see if the overall brightness PWM Pins 12~14 can vary according to incoming Pin Label STBY Run No Load Diode Check Pin Diode
returns to normal. If not, Check the P-DIM level, it should rise with the percentage shown on screen. video IRE level, OSD Backlight setting and then
100% = 3.3V. Follow the P-DIM signal all the way to the SMPS. LED Drive Signal 50 IRE Intelligent Sensor (room light condition). 14 (1)
P-DIM3 0V 0.69V~3.3V 3.36V OL 14 OL
You can also test each of the 16 blocks functionality by grounding the return path signal (using 220Ω resistor). Off Output from the Microprocessor.
13 (1)
P-DIM2 0V 0.72V~3.3V 3.36V OL 13 OL
Range 0.69V to 3.3V.
LED SINGLE BLOCK TEST (DIM OR DARK PICTURE AREA): For DC voltages for Main board
Turn the Brightness, Contrast and Backlights all the way up.
To the Panel Backlights PWR-ON: Starts 12V 12 (1)
P-DIM1 0V 0.69V~3.3V 3.36V OL 12 OL
components see pages 2, 3 and 4 of the
Confirm 50V on C700 +. On and 40V LED Power.
11 BL-ON/OFF 0V 3.27V 0V (4.77V) OL 11 OL Interconnect diagram.
Confirm P-DIM is approx. 3V. Using a 220Ω resistor, jump any of No Backlights.
7.51V p/p 2.5mSec
the blocks grounding pin on LCN1 or LCN2 while observing the 10 PWR_ON 0V 3.27V 4.77V OL 10 OL For LVDS video signal waveforms see
picture and each block should turn on maximum.
HGnd
BL-ON: Starts
8-9
page 5 of the Interconnect diagram.
LCN1 White Plug "SMPS Board" To "Panel LEDs" Backlights 8-9 12V 0V 12.81V 12.87V 1.64V 1.64V
Pin Label Run Diode Check

PFC R804A
6.23V LCN2 LCN1 LED Power goes to
4-7 Gnd
C800B
101V 50. 4-7 Gnd Gnd Gnd Gnd Gnd
1 VLED 0V HGnd
50V OL
Q800 1-3
-
1-3 +5VSB 5.24V 5.22V 5.24V OL OL 6.3V each
450V
450V
450V
68uF
68uF
68uF
2 n/c n/c OL HGnd 20.6V HS5
+
HS3
3 R8 *0.86V~11.67V OL
D800B 307V 21.24V To SMPS To Spk
4 R7 *0.86V~11.67V OL
Q600
170V 50V BL_PWR 100V To SPK
-
5 R6 *0.86V~11.67V OL L801 C701C CH
+
6 R5 *0.86V~11.67V OL
Q601 BL_PWR TU2
220uF
7 R4
Hot
100V
*0.86V~11.67V OL 165V C700 12V 5V_ST L41
D800A HGnd D700 TL4 C
E
C TQ21 L36 L44 L45
8 R3 *0.86V~11.67V OL Ground T601 B
B
J28
B
Q14 E C
U21
C C C
9 R2 Hot Ground
*0.86V~11.67V OL
112V 1 TL6 E
Q30
Reference BL_On/Off LVDS_VDD B E
10 R1 *0.86V~11.67V OL
TU3 TQ20 U51 Vol
Outside legs 25V Level Q47
U9
C
11 n/c n/c OL R915 Gnd C
Q8 Audio Amp
Shifter TU14 Q46 B E
B
E C
12 VLED Bridge 398V 398V Vol
TCN1
50V OL V E
C
DV33 L43
U50
560uF
*White to Black screen B
50V
T901
HS1 C961 C958 D120 TQ22
LCN2 Black Plug "SMPS Board" To "Panel LEDs" Do not
C120A TU13 VCCK D28
C A1 C Enter
VO A2
D25
Grayed out
C
Measure
Pin Label Run Diode Check 5V_ST 70 D27
U6
A2 A1
2200uF
C
2200uF
components
A2 A1
U52
10V
C
10V
BE
1 VLED 50V OL PC901 J9
IC901 are on the Q70
2 n/c n/c OL D950 5V_ST CN202 DDVR L42
F1 HGnd 3.89V 1 TFT_ back side. A V V Input
3 L1 Driver d O I 31 2
*0.86V~11.67V OL 5A/250V 3.38V 4.91V 5V_ST j
19.45V Gnd
4 L2 *0.86V~11.67V OL
19.6V 1.2V
Outside legs PWR
5 L3 *0.86V~11.67V OL PC903 Gnd HS4 3 F3
6 L4 TCN2 U48 U8
*0.86V~11.67V OL
Hot ZD301 U14 U46 +5VSB
7 n/c n/c OL Ground 12V
DDR
8 L5 N L USB
*0.86V~11.67V OL
Chassis Ground 70 VBS_Processor
9 L6 *0.86V~11.67V OL
CN101 MEDIATEK
Video/Micro
To Ft. IR J14 ARM Processor
U10 12V in
10 L7 *0.86V~11.67V OL AC MT5376JFMU
Q27
N d
I
U15
Gnd
E
+5V_Tuner
G
C
n
11 L8 B
Y1 HDMI 1
O
*0.86V~11.67V OL C E
B Q17 U18
C
U13 Q40
U34
C E
B B E
12 n/c n/c OL DC Voltages to the Panel DC Voltages to the Panel
Q16 Q15
E
U32 C
13 VLED
developed by on the Main Board, developed by on the Main Board,
B C
54MHz TUNE
Q29
50V OL D G EB
Output from TCN1 Output from TCN2
VCC pins 35, 36 from TL1 VCC pins 25, 26 from TL1
S
2 R U30
Made by TU1 pins 35, 26 (3.3V) Made by TU1 pins 35, 26 (3.3V) Q 41 U4 TDVW- HDMI 2
*White to Black screen Q71 C B E U53 H814F(A) C
H_VDD pins 38, 29 from TL4 H_VDD pins 22, 23 from TL4
U22
S
U43 3 2 1 Q36 B E A1 A2
MAIN BOARD
G
Made by TU1 pin 8 (7.88V) Made by TU1 pin 8 (7.88V) D
S
Q72 D54 C
CN202
D
G
Q69 B
Q18
C
VDD pins 40, 41 from TP12 VDD pins 20, 21 from TP12 C C
U31
C E
D11
C
D57 A2 A1
Test 1
Made by TU1 pin 18 (16.47V) Made by TU1 pin 18 (16.47V) p/n: COV31310701
E BE B
A2 A1
Q42
B
VST pin 47 from TU3 pin 15 VST pin 14 from TU3 pin 15
1) Disconnect Main Board. (-4.93V) (-4.93V)
Q37 E C
2) Using 10K resistor, jump 5V_ST

VGL_I pin 48 from TTP 14 VGL_I pin 13 from TTP 14
(pin 1) to PWR_ON (pin 10). Made by diode TD3 (-5V) Made by diode TD3 (-5V)
Optical
3) Apply AC power. HDMI 2
In RGB/DVI
Audio
Out
Audio
VGH_EVEN pin 49 from TU3 VGH_EVEN pin 12 from TU3
(PC)
RGB
Check 12V (pins 8-9).
Note; If there is a problem with a load from Pin 13 Pin 13
Y/V
Pb
Pr
R
10KΩ Check BL power (40V). Made by TU3 pin 13 (-5V to 26V) Made by TU3 pin 13 (-5V to 26V)
the panel backlights, you can remove AC and
No Backlights at this time. Toggles every second Toggles every second
Disconnect either LCN1 or LCN2. When AC is
reapplied, the Backlight LEDs should turn on VGH_ODD pin 50 from TU3 VGH_ODD pin 11 from TU3
Test 2 for about 2 seconds and then they turn off.
Pin 12 Pin 12
J14 "MAIN Board" to "IR Board" to J1
CN202 Made by TU3 pin 12 (-5V to 26V)
Toggles every second
Made by TU3 pin 12 (-5V to 26V)
Toggles every second
Pin Label STBY Run Diode Check
1) Remove AC Power. VGH_R pin 52 from TU3 VGH_R pin 52 from TU3 1 IR 3.96V 3.95V OL
2) Leave pin 1 to pin 10 connected. Pin 10 Pin 9
2 IR_LED_POWER 5.24V 5.19V 0.99V
Made by TU3 pin 12 (-5V to 26V) Made by TU3 pin 12 (-5V to 26V)
3) Using 10K resistor, jump 5V_ST Toggles every second Toggles every second 3 Gnd Gnd Gnd Gnd Ft. IR/Intelligent Sensor
J1
(pin 2) to BL_On (pin 11).
4) Apply AC power.
Video (LRLVRO-2+/-) pins 28-33 Video (RMLVO-2+/-) pins 28-33 4 LS_SCL 3.42V 3.37V OL Front IR
Video Clock (LMCLK+/-) 26, 27 Video Clock (RMCLK+/-) 34, 35
To the Panel 5 LS_SDA 3.42V 3.37V OL
Check BL power (50V).
10KΩ Check BLs come on. Video Signal Levels: p/p: Approx: 740mV Light_Sensor_Det
3.56V 3.47V OL p/n: COV31147501
(Backlights On). LED_R
3.62V 3.82V OL
PANEL p/n: COV31311201
8 LED_B 3.03V 3.86V OL
47LV4400 Main (Front Side) Flat Pack IC Voltages
U6 VCCK (Core PW R) U14 System U30 HDMI U43 RGB (PC) U51 Audio TU14 T-CON
Pin Regulator Pin EEPROM Pin EDID Pin Data Buffer Pin Amplifyer Pin EEPROM
[1] 5.19V [1] n/c [1] 0V (Gnd) [1] 3.30V [1] 12.64V (Mute) [1] 0V
(Gnd) [2] 0.8V

0V (Gnd) [2] n/c [2] 0V (Gnd) [2] 3.85V [2] 12.64V [2]
[3] Gnd [3] n/c [3] 0V (Gnd) [3] 4.94V [3] 2.98V (L In) [3] 0V (Gnd)
[4] 0.8V [4] 0V (Gnd) [4] 0V (Gnd) [4] 4.99V [4] 2.98V [4] 0V (Gnd)
[5] 5.19V (Enable) [5] 3.37V (SDA) [5] 4.99V (SDA) [5] 3.3V [5] 1.57V (n/c) [5] 4.99V (SDA)
[6] Gnd [6] 3.37V (SCL) [6] 4.94V (SCL) [6] 0V (Gnd) [6] 0V (n/c) [6] 4.94V (SCL)
[7] 1.14V (Out) [7] 3.37V (WP) [7] 4.92V (W P) [7] 0V (Gnd) [7] 12.7V (AVCC) [7] 4.92V (W P)
[8] 5.2V (In) [8] 3.37V (VCC) [8] 4.94V (VCC) [8] 0V (Gnd) [8] 0V (Gnd) [8] 4.94V (VCC)
[9] 4.99V [9] 6.92V
U8 AV125 (1.25V) U18 Serial U31 HDMI [10] 4.98V [10] 3.56V
Pin Regulator (Analog) Pin Flash Pin EDID [11] 4.98V [11] 2.99V
[1] 1.25V (Adj) [1] 3.37V [1] 0V (Gnd) [12] 3.3V [12] 2.99V
(R In) [2] 1.25V (Out) [2] 3.06V [2] 0V (Gnd) [13] 4.98V [13] 0V
(n/c)
[3] 3.37V (In) [3] 3.37V (WP) [3] 0V (Gnd) [14] 3.3V [14] 0V (Gnd)
[4] 0V (Gnd) [4] 0V (Gnd) [15] 3.28V [15] 12.79V (PVCC)
U9 DV33 (Core PW R) [5] 0V (Gnd) [5] 4.99V (SDA) [16] 4.99V (VCC) [16] 12.79V (PVCC)
Pin Regulator [6] 0V (Gnd) [6] 4.94V (SCL) [17] 12.9V
[1] 5.19V [7] 3.37V (VCC) [7] 4.92V (W P) U50 Audio [18] 6.3V (R Out)
[2] 0.8V [8] 3.37V (VCC) [8] 4.94V (VCC) Pin Op Amp [19] 0V (Gnd)
[3] Gnd [1] 6.06V (Left Out) [20] 6.3V (R Out)
[4] 0.8V U21 LVDS Power U32 HDMI [2] 6.06V (Left In) [21] 12.93V
[5] 5.19V (Enable) Pin Switch Pin EDID [3] 6V [22] 12.77V
[6] Gnd [1] 12.78V (In) [1] 0V (Gnd) [4] 0V (Gnd) [23] 6.12V (L Out)
[7] 1.14V (Out) [2] 0.05V (Ctrl) [2] 0V (Gnd) [5] 6V [24] 0V (Gnd)
[8] 5.2V (In) [3] 12.78V (In) [3] 0V (Gnd) [6] 6.02V (Right In) [25] 6.19V (L Out)
[4] 0.07V (Ctrl) [4] 0V (Gnd) [7] 6.02V (Right Out) [26] 12.75V
U10 +5V_Tuner [5] 12.77V (Out) [5] 4.99V (SDA) [8] 12.06V (VCC) [27] 12.79V (PVCC)
Pin Regulator [6] 12.77V (Out) [6] 4.94V (SCL) [28] 12.79V (PVCC)
In 12.78V (In) [7] 12.77V (Out) [7] 4.92V (W P)
G 0V (Gnd) [8] 12.77V (Out) [8] 4.94V (VCC) U53 Head Phone Audio
Out 4.9V (Out) Pin Amplifyer
U22 HDMI U52 DDVR [1] 0V (Gnd) [14] 0V
U13 System Pin EDID Pin Regulator [2] 0V (R In) [13] 0V (L In)
Pin Reset [1] 0V (Gnd) [1] 3.37V (In) [3] 0V (R Out) [12] 0V (L Out)
1 Gnd [2] 0V (Gnd) [2] 1.80V (Out) [4] 0V [11] 3.25V
2 5.18V (Reset) [3] 0V (Gnd) [3] 0.55V (Adj) [5] 3.23V (Mute) [10] 0V (Gnd)
3 5.12V (In) [4] 0V (Gnd) [6] -3.12V [9] 3.25V
[5] 4.99V (SDA) [7] -1.57V [8] -0.07V
[6] 4.94V (SCL)
[7] 4.92V (W P)
[8] 4.94V (VCC)
47LV4400 Main (Front Side) Transistor Voltages
TQ20 VGH Reg Q17 RED_LED Q47 3V3_Enable D28 Lineout_Mute

Pin (Panel Power) Pin Driver Pin Switch Pin Routing
[B] 3.0V (CTRLP) [B] 0.75V (OPC_CTRL) [1] 0V (Gnd) [A1] 0.06V (A_Mute)
[C] 26.85V (Out) [C] 0.02V (LED Control) [2] 0V (VCCK) [A2] 0.37V (Lineout_Mute)
[E] 30.68V (In) [E] 0V (Gnd) [3] 6.19V (3V3_EN) [C] 0.19V (Mute_Lineout)
TQ21 VGL SW Q27 RED_LED Q66 Audio_Mute D54 HDMI 5V

Pin (Panel Power) Pin Control Pin 12V Det Pin Routing
[B] 0.6V (CTRLN) [B] 0.02V (From Q17) [1] 11.7V (Off_Mute) [A1] 0.0V (HDMI_5V_In)
[C] 4.0V (SW) [C] 3.78V (LED Control) [2] 11.7V (To Q70) [A2] 5.12V ('+5VSB)
[E] 0V (Gnd) [E] 0V (Gnd) [3] -0.03V (HW_Mute) [C] 4.97V (HDMI_5V_Out)
TQ22 T-CON Q30 AMPVCC_OP Q69 Line_Out D57 HDMI 5V

Pin Write Protect Pin Regulator Pin Mute_Enable Pin Routing
[B] 0V (TCON_WP) [B] 12.71V [1] 0V (Gnd) [A1] 0.0V (HDMI_5V_3IN)
[C] 3.3V (WP1) [C] 12.78V (AMPVCC_AP) [2] 0.16V (Lineout_Mute) [A2] 0.0V
(HDMI_5V_2IN)
[E] 0V (Gnd) [E] 12.06V (AMPVCC_OP) [3] -3.23V (Enable) [C] 4.97V (HDMI_5V_Out)
Q8 MUTE_AMP Q36 HDMI3_Hot_Swap Q70 Audio_Mute

Pin (Audio Mute) Pin Switch Pin 12V / 5V Det
[B] 0V (Mute_Amp) [1] 0V (Gnd) [1] 11.7V (To

Q66) [C] 12.63V (Mute) [2] 0V (3_HOTPLUG) [2] 12.73V
[E] 0V (Gnd) [3] 0V [3] -0.03V (Off_Mute)
Q14 LVDS_PWR Q37 HDMI3_Hot_Swap D25 Mute_Amp

Pin Driver Pin Switch Pin Routing
[B] 0.65V (LVDS_PWR_ON) [1] 0V (Gnd) [A1] 0.04V
[C] 0.04V (U21 Control) [2] 0V (2_HOTPLUG) [A2] 0.04V
[E] 0V (Gnd) [3] 0V [C] 0V (Mute_Amp)
Q16 BLUE_LED Q46 3V3_Enable D27 A_Mute

Pin Control Pin Driver Pin Routing
[B] 0.08V (OPWM2) [1] 0V (Gnd) [A1] 0.03V (Off_Mute)
[C] 2.56V (LED Control) [2] 0.67V (VCCK) [A2] 0.03V (HW_Mute)
[E] 0V (Gnd) [3] 0V (To Q47) [C] 0V (A_Mute)
47LV4400 Main (Front Side) Panel Voltage IC Voltages
TU1 Panel DC-to-DC TU3 PaneL

Converter Level Shifter
Pin Pin Pin Pin
[1] 4.98V (VL) [21] 26.84V (VGH) [1] 26.84V (VGH2) [13] *(-5V~26V) (VGH_EVEN)
[2] 1.49V (TCOMP) [22] 0.9V (VGL_FB) [2] -5V (VGL) [14] -5V (DISCHG)
[3] 4.98V (VL) [23] n/c [3] 26.84V (VGH1) [15] (-4.93V) (VST)
[4] 0V (Gnd) [24] 0.6V (CTRLN) [4] 8.44V (CLK1) [16] (-5V) (GIP_RST)
[5] 12.75V (P_12V) [25] n/c [5] 8.44V (CLK2) [17] 0V (Gnd)
[6] 12.75V (P_12V) [26] 3.3V (TCON_Reset) [6] 8.44V (CLK3) [18] 7.51V (RE)
[7] n/c [27] 0V (Gnd) [7] 8.44V (CLK4) [19] 3.2V (VSENSE)
[8] 7.88V (HVDD_ SWB3) [28] 3.3V (SCL_TPS) [8] 8.44V (CLK5) [20] 0V (EO)
[9] 7.81V (HVDD_FB) [29] 3.3V (SDA_TPS) [9] 8.45V (CLK6) [21] 0V (GST)
[10] 0V (Gnd) [30] 1.8V (Vcore_FB) [10] 26.83V (VGH_R) [22] 1.13V (MCLK)
[11] 4.93V (SS) [31] 0V (Gnd) [11] -5V (VGH_F) [23] 1.62V (GCLK)
[12] 0.06V (COMP) [32] 1.8V (Vcore_Out) [12] *(-5V~26V) (VGH_ODD) [24] 3.23V (REVERSE)
[13] 0V (Gnd) [33] 3.3V (VCC_FB)
[14] 0V (Gnd) [34] n/c *Toggels every second
[15] 12.73V (SW) [35] 3.31V (VCC_SW_Out)
[16] 12.73V (SW) [36] 3.31V (VCC_SW_Out)
[17] 16.52V (SW_In) [37] 0V
[18] 16.47V (VDD) [38] 12.75V (P_12V)
[19] n/c [39] 12.75V (P_12V)
[20] 30.06V (CTRLP) [40] n/c
TU2 Panel
Gamma
Pin Pin
[1] 3.3V (SDA_TPS) [11] 12.42V (GMA4)
[2] 0V (Gnd) [12] 11.36V (GMA5)
[3] 3.3V (VCC) [13] 9.86V (GMA7)
[4] 0V (Gnd) [14] 6.03V (GMA12)
[5] 6.45V (VCOM_PG) [15] 4.01V (GMA14)
[6] 6.43V (VCOM_FB) [16] 7.88V (HVDD)
[7] 15.62V (VCOM_AVDD) [17] 7.88V (HVDD)
[8] 15.62V (AVDD) [18] 3.24V (GMA15)
[9] 0V (Gnd) [19] 2.63V (GMA16)
[10] 13.05V (GMA3) [20] 3.3V (SCL_TPS)
47LV4400 Main (Back Side) Component Voltages
Q15 Controls Q41 VGA (PC) U4 3V3SV

Pin Q29 Pin Sorce Select Pin Regulator
[B] 0.68V (Ctrl) [B] 0.0V (VGA_11) [1] 2.05V
(Reg) [C] 0V (Out) [C] 5.0V (S1 U43 p9) [2] 3.29V
(Out)
[E] 0V (Gnd) [E] 0.0V (Gnd) [3] 5.21V (In)
Q18 HDMI Q42 RGB (PC) D11 RGB (PC)

Pin Write Protect Pin SO Switch Pin PWR Routing
[B] 0.0V (Ctrl GPIO0) [B] 0.0V (VGA_4 Mon ID) [A1] 0.58V (RGB
p9) [C] 5V (WP) [C] 5.0V (SO) [A2] 5.20V
(+5VSB)
[E] 0V (Gnd) [E] 0.0V (Gnd) [C] 5V (VGA_PLUGPWR)
Q29 AV_3V3 Q71 SDA

Pin Source Switch Pin Switch
[G] 0.09V (From Q15) [G] 3.38V (DV33)
[S] 3.28V (+3V3SB) [S] 3.38V (SDA_SW)
[D] 2.27V (AV_3V3) [D] 5.0V (VGASDA_SW)
Q40 HDMI Q72 SCL

Pin HOT SWAP Pin Switch
[B] 0.0V (1_HOTPLUG) [G] 3.38V (DV33)
[C] 0.0V (HDMI p19) [S] 3.38V (SCL_SW)
[E] 0.0V (Gnd) [D] 5.0V (VGASCL_SW)
47LV4400 LVDS Waveforms TCN1 and TCN2
TCN1 PIN 28 LRLVOP TCN1 PIN 29 LRLVOP TCN1 PIN 30 LRLVOP TCN1 PIN 31 LRLVOP
TCN2 PIN 28 RMLVOP TCN2 PIN 29 RMLVOP TCN2 PIN 30 RMLVOP TCN2 PIN 31 RMLVOP
724mV p/p 764mV p/p 760mV p/p 740mV p/p
TCN1 PIN 32 LRLVOP TCN1 PIN 33 LRLVOP TCN1 PIN 26 LRLVOP TCN1 PIN 27 LRLVOP
TCN2 PIN 32 RMLVOP TCN2 PIN 33 RMLVOP TCN2 PIN 34 RMLVOP TCN2 PIN 35 RMLVOP
752mV p/p 804mV p/p 378mV p/p 350mV p/p

49UH6100 INTERCONNECT DIAGRAM 49UH6100 (2016) Interconnect

P2502 "MAIN Board" to "SMPS Board" P201
P801 "SMPS Board" To "LED Backlights"
PIN LABEL STBY RUN Diode
PIN LABEL RUN Diode (2) 1
No Stand-By Voltages Backlights *0% to 100% DRV_ON 0V 2.03V OL
1 LED- 78.4V~55.78V OL P201 "SMPS Board" To P2502 "MAIN Board"
Pins 2, 4, 6 are n/c. (3) P_DIM#1 0V *0.18V-3.24V OL
(1) PWR-On Pin 1: Turns on 13.2V to the Main. No
2
3 LED+ Pins 3-5 shorted Pins 3 and 5 are jumped together PIN LABEL STBY RUN Diode
together on SMPS OL Direct Lit Backlights (LED Array Strips) backlights at this time. Backlight Power is 160.8V. 3-4 Gnd Gnd Gnd Gnd
5 LED- 123.7V~109.4V (3) 12 P_DIM1 0V *0.18V-3.24V OL
36 Total LEDs. 4 Strips with 9 LEDs per/strip. (2) MS
(2) MS (Drv_On) 0V 2.03V OL (DRV_On) Pin 11: Turns on the Backlights. 5-8 13.2V 7.90V 13.11V OL
7 LED+ 169.0V~163.6V OL 11
Backlight power goes to 169V.
9-10 Gnd Gnd Gnd Gnd 9 Gnd Gnd Gnd Gnd
In Out Dim to Bright
(3)
4-8 13.2V 7.90V 13.11V OL P_DIM#1 Pin 12 and P_DIM#2 Pin 2: Will vary 10 13.2V 7.90V 13.11V OL
according to incoming video IRE level and OSD Backlight
To Panel Backlights (Dim to Bright) Gnd Gnd Gnd (1) 11
3 Gnd setting Output from the Video Processor. It is then routed PWR_ON 0V 3.29V OL
Backlight Power 169.0V~163.6V pin 7
(3) out P2300 to P201 and sent to the LED Driver IC on the
Pin 1 goes to Backlight Driver Q801 (Back of SMPS) 2 N/C n/c n/c n/c 12 N/C n/c n/c n/c
Back of the SMPS.
(1) 1 PWR_ON 0V 3.29V 0.87V The Range is: 0.18V~3.24V. *0% to 100%
*Dim to Bright
P801
D802
Gnd Can not use Smart Test Jig on

D803
D201
L801 13.12V this model for SMPS test mode. SW300
JTAG RS232C_Debug
P100 n/c
Gnd 0
Backlight P1 n/c
Power IC2500
Gnd +5V_Normal
D204
D206
D205
IC2301
D202
13.12V
D203
80V Gnd
+1.8V
T101 IC102 IC103 C E
Q2500
IC100
B
IC102 1) 11.54V 1) 1.10V PWR_ON
IC103 Gnd Gnd Q2503

C
Video
Main Board
23.40V SMPS Hot Hot Processor
E B
Gnd 3) Hot Gnd Gnd 3) 16.87V

C
P/N: EAY64388811 AUSWLOR

D107 Panel_VCC
4) 1.50V 4) 20.96V p/n: EBT64237702
BUSFLJR / BUSFLOR
D101 p/n: EAD63787803
Can’t Read
To T-CON
p/n: EBT64138308
3.15A / 250V
Run: 400V D602 BUSWLOR
D109
USB
200V 400V TO MAIN (1.81V)
Warning Do Not Use Jig CN1 (3.28V) (Gnd)

+
C611
460V
JK4400
68uF
T-CON comes with the Panel VIN: (PANEL_VCC 12V)
CN1 From Main

-
CX101 T-CON is operating, damage may occur without them. RS232

Panel_VCC Supply (1.81V) P101
n/c Audio
D601 IC11200
106V L601
Gnd 23 Gnd B B C HDMI 2 HDMI 3
(7.70V) VCC F1
(12.90V)
E
HVDD (VIN) F1 SPK Ft Right Q5800 Q3001

TH101
LF103 Vcore R111

CX102
5A/125V
(1.20V)
34 81 4
5 7 1 1
VGL1 4
U5 U1 U4 SPK Ft Left
4
5
7
Composite/Component Audio TU6700
BD101
F100
15
AC 6
R- R+ L- L+
Q3
2 9
D2
UC1
LF102 To Speakers P5800
11
5A / 250V VGH
VGL2 GCLK
MCLK
10Mhz
RS1
VCC18 (1.81V)
HDMI 1
HGnd (-7.05V) GST
VDD
Source IC4100
VST EQ
8
1
1 3
(-7.01V ~ 28.09V) (15.84V) All Speaker JK5000 Serv Only
Optical
Access
(-7.01V)
8 8
3 3 VGH-ODD VGH-EVEN VDD +3.5V_WIFI
Tuner pins
B C
9
Q3302
CN2 2
CN3 LAN From the
1 E
SK100 AC
VGH-ODD and VGH-EVEN
plug pins HDMI 1
back side.
1 1 2 2 3 3 4 4 5 5 6 Toggles between 1 1 2 2 3 3 4 4 5 5 6
P4100
5 0 5 0 5 0 5 0 5 0 5 0 5 0
5 0 5 0 5 0 5 0 5 0 29.09V to -7.05V every
second.
1.44V JK3801 JK3800
Hot Swap
CN2 Key Voltages CN3 Key Voltages Diode Check (OL)
To the Panel To the Panel
All 6 screws are M3X5L (Silver) Vcore Pin 33 RS1 Vcore Pin 28
1.63Vdc
VCC18 Pin 34, 35 3.72V p/p VCC18 Pin 26, 27
U1
SMPS TEST: Forcing SMPS On. Hot Gnd HVDD Pin 36
Top Legs
HVDD Pin 25 KEY VOLAGES
P4000 "MAIN" to "Joy Stick, WiFi"
1.56Vdc Pin 1 Gnd
This test requires simple 3V jig. See below.. (Shock Hazard) VDD Pin 37-40
3.58V p/p
VDD Pin 21-24 Pin 2
Pin 3
Gnd
Gnd
VGL1 Pin 45 Bottom Legs VGL1 Pin 16 Gnd
Pin 4
VGH_EVEN Pin 49 VGH_EVEN Pin 12 Pin 5
Pin 6
3.27V
3.26V
PIN LABEL STBY RUN Diode Check
Remove AC Power. VGH_ODD Pin 50 CLK1 – CLK8
32.8V - 33.0V p/p
GCLK
3.56V p/p
MCLK
3.60V p/p
GST
3.24V p/p
VGH_ODD Pin 11 Pin 7 3.29V
1 3.5V_WiFi
Pin 8 3.30V
Disconnect P2502 on Main Board. VGH Pin 51 VGH Pin 10
0V 3.37V OL
Test 1: Using a 3V jig, Jump 3V to pin 1 (PWR_ON). P201 Note: 15 IR 3.39V 3.37V 1.83V
Apply AC Power. (No Backlights in Test 1)
Test 2 11 12
All have similar
P201 still inserted. P2502 removed. waveforms EQ: No Waveform
(Pins 4-8) rises to 13.14V.
Use P2502 side to insert resistors. PANEL TEST: ROLLING TEST PATTERNS 18 3.5V_ST 3.41V 3.40V 1.12V
2 AA (3V)
Backlight Power 160.8V. Note: 7.90V (Pins 4-8)

Remove AC Power. P_DIM will be 10.12V
Must be present when AC is applied before
1) With no Power, remove CN1 (Vx1 Cable)
2) Jump 12V from SMPS to Fuse F1.
Front IR/Joy Stick WiFi 19 Key 2 3.41V 3.40V 1.86V
beginning test indicating Standby is OK.
Test 2: Using a 3V jig, Jump 3V to pin 11 3
For 12V from SMPS use D202 (center leg) Top right hand heat sink. Ground: Pins 4, 6, 8, 14, 17, 20, 21
(DRV_ON). 3) Jump VCC (3.3V) to pin 23 of CN1. For easier contact to pin 23, use top side of R111.
No Connection (Not Used): Pins 9, 10, 11
Apply AC Power. All Voltages should be produced. Test 1 3V JIG: Made from 2 (AA) batteries.
1 2 Jump + to – on one side. SMART JIG: Other Pin Functions: WiFi_DM 0.03V pin 2,
(13.14V to Main and 149.7V to the Backlights).
Can not run normal Panel Test by removing Vx1 cable on T-CON and supplying 12V to WiFI_DP 0.03V pin 3, WOL_PWR_On 0V pin 5,
This will also force the Backlights to come on. Test Set Up On the other side, solder two red wires
(needle tipped) to the + and one black wire T-CON fuse. It will not work. Can not use Smart Test Jig on this model for T-CON test. Bottom Center of Set M_Reset 0V pin 7
P_DIM will be 10.12V Bottom Right (Rear View)
(needle tipped) to the – side. Front IR WiFi Module SDA 3.41V pin 12, SCL 3.41V pin 13
p/n: EBR78925201 p/n: EBR78925201
October 2016 Page 01 LG

LG
2015 Direct View UHD Training
55UF7600 WebOS 2.0 UHD LCD TV
MAIN BOARD INFORMATION
Main Board Layout and

Voltage Measurements
55UF7600 Main Board (Photo) 55UF7600 (2015) Main Board Section
September 2016 Page 01 LG

55UF7600 Main Board Component Layout 55UF7600 (2015) Main Board Section 08
Heatsink Clip
P2300 "MAIN Board" to "SMPS Board" P201 X1900
LD12900: Indicates VX1 Signal to (24MHz)
T-CON is good if LD12900 is illuminated. IC13408
PIN LABEL STBY RUN Diode Check Q12900
+1.1V_U_VDDC
If Off, possible causes: LD12901
23-24 GND Gnd Gnd Gnd
E
B
Improper seated or defective Vx1 cable C
N/C
18-22 24V 0V 25.46V OL IC1901
or problem with signal processing. LD1900
IC2500 DDR P1905
16-17 GND
B E
CORE_VIDO Selector
Gnd Gnd Gnd IC2600
LD12901 turned on by Q12900 C
URSA9 D
Q2500
Q1901 G S
11-15 12V 0V 11.88V OL Note: With top 3 screws left out of the SPI FLASH
DDR
IC2700
IC2501 CORE_VID1 Selector
board, video looks double image like it's
9-10 GND
D
Gnd Gnd Gnd IC2900 IC2800 +1.5V_U_DDR Q2501 G S
7-8 3.5V 3.54V 3.52V 1.23V DDR DDR IC13403 +1.1V_VDDC
6 GND Gnd Gnd Gnd DDR_VTT_URSA Heatsink

IC13100
5 3.5V 3.54V 3.52V 1.23V IC407
Clip
Q402 M2_DDR_RESET_N
P7100 DDR_VTT_1 IC405 IC406 M13507 +5V_Normal
4 P-DIM2 0V 0.92V OL +3.3V_Normal USB_+5V
To the IC2303 Q402 DDR DDR
IC201
3 P-DIM IC2305
3
0V 0.17V-2.55V OL T-CON 1
2
Q7100 I2C_SCL6 Buffer

+1.5V_DDR AVDD_3P3 IC200
+3.5V_WOL IC2302
13.2V
2 DRV_ON 0V 3.46V 1.54V Q7101 I2C_SDA6 Buffer
Pins 48-51 Q7101 FET
Processor
Q7102 HTPDAn Driver
Q7103 LOCKAn Driver Q7100 FET X600
1 PWR_ON 0V 3.51V OL (24MHz)
Q7104 HTPDAn Switch Q7102 Q7104 IC4300
Q7105 LOCKAn Switch Q7103 Q7105
+5V_USB_3
Dim to Bright
IC2307 12V
PWR_Det IC2307
2
3
1
IC600 DDR IC100 JK4300
Panel_VCC
(1) PWR_ON: turns on the 12V and 24V lines.
USB3
Backlight power goes to 63.62V. IC2309 IC602 DDR
Q2302 CPU_VID1 Select
(2) INV_CTL: (DRV_ON on SMPS) turns on the IC2300 IC2300 D Q401 Q400 M0_DDR_RESET_N Select
+1.1V_VDDC_CPU Q2301 G S
Q2302 C
Q400
Backlights. Backlight power goes to 80V. Q2321 DDR-VTT E B
IC8100
IC402
USB2
B E
Q401 M1_DDR_RESET_N Select

(3) P-DIM: controls the backlight brightness. Controlled
C
IC401
P2300
IC400
MEMC
by Cust. Menu, Video, Backlights. Range 0% to To In
JK4302
+1.8V Out
/FRC
100% directly proportional to DC voltage to Backlight SMPS Adj
IC2301 JK4500
Q2300 3 1 Q2300 IC102 Head Phone Amp
USB1
brightness. P-DIM is actually a PWM signal. PWR_ON
2
NVRAM
(4) P-DIM2: Fixed Voltage. X3000 RS232 P101 Main Board
X3000
P3000
(32.768KHz) IC3000 IC6100 Optical p/n: EBT63818912 AUSYLJR
p/n: EAJ63109901 BUSYMJR
KEY VOLAGES Q3001 S IC6801 JK5000 JK3803 JK3800
p/n: EAY63729101 BUSYLJR
P4100 "MAIN" to "Joy Stick J1, M-Remote/WiFi"
D
G
LAN
CEC Q3001 p/n: EBT63990602 AUSYMJR
Micro
HDMI3
SW3000 p/n: EBT63990603 AUSYMJR
PIN LABEL STBY RUN Diode Check Micom Reset SW3000 JK3801
Head
RS232
2 3.5V_WOL 0V 3.49V OL WiFi pin 1 Q5800 Mute
E B Phone JK3203
TUNER PINS
12 Key 1
C
3.55V 3.52V 1.98V Joy Stick pin 2 IC5800

MAIN BOARD
TU_CVBS
HDMI2
9. CVBS
Q6502 8. SIF
14 Key 2 3.55V 3.52V 1.98V Joy Stick pin 3 Audio TU6705
B
C
E 7. DIF (N)
15 IR 9 JK3200 6. DIF (P)
3.54V 3.78V 1.89V Joy Stick pin 7 TDJH-H301F
+3.5V_WiFi AcTceUssN
TuEneRr JK3202 5. SDA_RF
16 3.5V_ST 3.56V 3.52V 1.25V Joy Stick pin 4 IC4100
pins from the
TU 64 01
back
1 Hot 4. SCL_RF
HDMI1
Swap 3. DIF AGC
P5800
side
B
2. N/C
Pin 2 is power for the M-Remote / WiFi Board JK3802 E
C
1. +3.3V_LNA_TU
Q3300
Pin 16 is power for the IR/Joy Stick Board PP4010000
IR peak/peak 3.80V All Speaker plug pins To
(Min) 2.83V-3.20V (Max) Ft. Joy Stick /
Diode Check (OL) IR

55UF7600 Main Board Crystals Measurements 55UF7600 (2015) Main Board Section
X1900
(24MHz)
Top Right
2.92V / 25nSec
X1900 Top Right Leg P/P
1.35VDC Bottom 2.92V p/p
Left Leg Bottom Left

3.6V / 25nSec
24Mhz 1.42VDC 3.6V p/p
X600 Top Left

(24MHz) 3.04V / 10nSec
X600 Top Left Leg P/P Bottom Right

3.72V / 10nSec
1.70VDC 3.04V p/p
Bottom Right Leg
24Mhz 1.68VDC 3.72V p/p
Right Leg
X3000 1.08V / 10uSec
X3000 Right Leg P/P

Left Leg
0.68VDC 1.08mV p/p 856mV / 10uSec
Left Leg
24Mhz 0.15VDC 856mV p/p

55UF7600 Main Board (Small) Component Voltages 55UF7600 (2015) Main Board Section
Pin Memory Pin Regulator Pin Regulator Pin LD1900 Pin Driver
[1] Gnd [1] Gnd [1] 3.49V (Out) [E] 0.67V [B] 0V
[2] Gnd [2] 11.85V (Vcc In) [2] Gnd [B] 0.52V [C] 3.29V
[3] Gnd [3] Gnd [3] 0.43V (n/c) [C] Gnd [E] Gnd
[4] Gnd [4] 0.80V (FB) [4] 3.51V (En)
[5] 3.30V [5] 1.36V (Comp) [5] 3.51V (Vcc In) Q2300 PWR_On Q6502 TU_CVBS
[6] 3.30V [6] 3.47V (Enable) Pin Switch Pin Buffer
[7] Gnd [7] 1.07V (Out) IC4300 +5V_USB_1 [1] 3.50V [B] 1.52V
[8] 3.30V [8] 1.07V (Out) Pin Regulator [2] 2.84V [C] Gnd
[1] 5.11V (In) [3] 3.49V [E] 2.23V
IC200 +3.5V_WOL IC2301 +1.8V_DDR [2] Gnd
Pin Regulator Pin Regulator [3] 3.28V (Enable) Q2301 CPU_VID0 Q7100 I2C_SCL6
[1] 3.49V (Out) [In] 3.29V (In) [4] 3.30V (USB_OCD3) Pin Select Pin Switch
[2] Gnd [Out] 1.79V (Out) [5] 0.40V [G] 0.31V [G] 3.05V
[3] 0.17V n/c

3.27V [Adj] 0.54V [6] 5.11V (Out) [S] Gnd [S]
[4] 3.51V (WOL_CTL) [D] 0.07V [D] 3.26V
[5] 3.50V (Vcc In) IC2302 (+3.3V_NORMAL) IC13100 DDR_VTT_URSA
Pin Regulator Pin Regulator Q2302 CPU_VID1 Q7101 I2C_SDA6
IC201 AVDD_3P3 [1] Gnd [1] 1.52V (In) Pin Select Pin Switch
Pin Regulator [2] 11.82V (Vcc In) [2] Gnd [G] 3.29V [G] 3.05V
[1] Gnd
3.27V [3] Gnd [3] 0.76V [S] Gnd [S]
[2] 3.31V (Out) [4] 0.70V (FB) [4] 0.76V (Out) [D] 0.07V [D] 3.26V
[3] 3.50V (In) [5] 1.97V (Comp) [5] n/c
[6] 3.47V (Enable) [6] 3.29V (Enable) Q2321 Driver for Q7102 HTPDAn
IC402 DDR_VTT [7] 3.31V (Out) [7] n/c Pin IC2309 Pin Driver
Pin Switch [8] 3.31V (Out) [8] n/c [B] 0.66V [G] 0.18V
[1] 1.51V (in) [E] Gnd [S]

0.0V
1.96V [2] Gnd IC2303 +1.5V_DDR IC13403 (+1.5V_U_DDR) [C] 0.60V [D]
[3] 0.76V Pin Regulator Pin Regulator
[4] 0.76V (out) [1] 3.40V (Enable) [1] 3.49V (Enable) Q2500 CORE_VIDO Q7103 LOCKAn
[5] n/c [2] 0.76V [2] 0.77V Pin Select Pin Driver
[6] 3.29V (Enable) [3] 5.23V [3] 5.23V [G] 3.31V [G] 0.18V
[7] n/c [4] 2.49V [4] 2.51V [S] Gnd [S] 0.0V
[8] n/c [5] Gnd [5] Gnd [D] 0.07V [D] 1.97V
[6] 1.57V (Out) [6] 1.53V (Out)
IC407 DDR_VTT_1 [7] 6.60V [7] 6.47V Q2501 CORE_VID1 Q7104 HTPDAn
Pin Switch [8] 11.84V (Vcc In) [8] 11.84V (In) Pin Select Pin Switch
[1] 1.52V (in) [G] 3.31V [G] 0.63V
[2] Gnd
0.0V IC2307 PWR_Det Q400 M0_DDR_RESET_N [S] Gnd [S]
[3] 0.76V Pin 12V Sense Pin Select [D] 0.07V [D] 0.04V
[4] 0.76V (out) [1] Gnd [E] Gnd
[5] n/c [2] 3.61V (Out) [B] 0.0V Q3001 CEC Q7105 LOCKAn
[6] 3.29V (Enable) [3] 3.64V (In) [C] Do Not Measure Pin Bi-Directional Pin Switch
[7] n/c [G] 3.51V [G] 0.0V
[8] n/c Q2309 Panel_VCC Q401 M1_DDR_RESET_N [S] 3.48V [S]

0.64V Pin Switch Pin Select [D] 3.43V [D] 0.05V
IC1901 SPI FLASH [1] 11.85V (Vcc In) [E] Gnd
Pin Memory [2] 11.85V (Vcc In) [B] 0.64V Q3300 HDMI Q12900 Drives
[1] 3.29V (CS) [3] 11.85V (Vcc In) [C] 0.07V Pin Hot Swap Pin LD12901
[2] 3.28V (SO) [4] 1.86V (CTL) [B] 0V [E] 0.63V
[3] 0V (WP) [5] 11.84V (Out) Q402 M2_DDR_RESET_N [E] Gnd [B] 0.02V
[4] Gnd [6] 11.84V (Out) Pin Select [C] 0.63V [C] Gnd
[5] 3.29V (SPI_DI) [7] 11.84V (Out) [E] Gnd
[6] 0V (SPI_CK) [8] 11.84V (Out) [B]

0.0V [7] 3.29V (Hold) [C]
1.56V
[8] 3.29V (In)
September 2016 Page 4

55UF7600 Main Board (Large) Component Voltages 55UF7600 (2015) Main Board Section
IC2305 IC3000 IC5800

+5V_NORMAL / +5V_USB Micro Audio
Regulator Pin Processor Pin Pin Amp Pin
Pin Pin [1] 3.23V [25] 0V [1] n/c [21] 2.16V (Out R+)
[1] 25.35V (In) [15] 3.43V (OCP2) [2] 3.23V [26] 3.51V [2] 1.24V [22] Gnd
[2] 25.35V (In) [16] 5.11V [3] 2.69V [27] 3.51V [3] n/c [23] 4.71V
[3] 25.35V (In) [17] 5.11V [4] 2.09V [28] 0.03V [4] Gnd [24] 5.12V
[4] Gnd [18] 11.53V [5] 3.46V [29] 0.1V [5] n/c [25] 5.14V
[5] Gnd [19] 5.11V (Out) [6] 3.5V [30] 0V [6] 1.26V [26] n/c
[6] Gnd [20] 5.11V (Out) [7] 3.49V [31] 3.34V [7] 0V [27] 5.11V
[7] 6.30V [21] 5.11V (Out) [8] 3.51V [32] 3.51V [8] 1.62V [28] 4.72V
[8] 6.30V [22] 1.94V [9] 0V [33] 3.51V [9] n/c [29] Gnd
[9] 3.51V (Enable) [23] 0.60V [10] 3.51V [34] 3.75V [10] 2.62V [30] 2.16V (Out L-)
[10] 5.10V (Out USB2) [24] 0.35V [11] 3.51V [35] 0V [11] 2.43V [31-32] 18.67V (L B+)
[11] 5.10V (Out USB3) [25] 1.24V [12] 0V [36] 0V [12] 3.30V (Mute) [33] 2.16V (Out L+)
[12] 3.28V (USB2 Ctrl) [26] 0.45V [13] 3.51V [37] 0.02V [13] n/c [34] Gnd
[13] 3.28V (USB3 Ctrl) [27] 0.45V [14] 3.72V [38] 0V [14] 0.0V [35] 4.71V
[14] 3.43V (OCP2) [28] Gnd [15] 3.53V [39] 3.51V [15] n/c [36] 3.03V (Reset)
[16] 0V [40] 3.51V [16] 4.71V [37] Gnd
IC2501 [17] 3.51V [41] 0.65V [17] Gnd [38] 1.61V
+1.1V_VDDC [18] 3.51V [42] 0.13V [18] 2.16V (Out R-) [39] Gnd
Pin Regulator [19] 3.29V [43] 0V [19-20] 18.67V (R B+) [40] 3.31V (In)
[1] 3.51V (EN) [9] 11.83V (In) [20] 3.09V [44] 0.14V
[2] 0.43V (Freq) [10] Gnd [21] 3.06V [45] 0V
[3] 0.63V (FB) [11] Gnd [22] 0V [46] 2.09V IC13408
[4] 4.84V (SS) [12] Gnd [23] 0V [47] Gnd +1.1V_U_VDDC
[5] Gnd [13] Gnd [24] 0.1V [48] 3.51V Pin Regulator
[6] 4.83V (PG) [14] 11.83V (In) [1] 3.51V (EN) [9] 11.83V (12V In)
[7] 4.87V (VCC) [15] 1.02V (Out) IC6801 [2] 0.43V (Freq) [10] Gnd
[8] 5.79V (BST) [16] 1.02V (Out) RS232 [3] 0.63V (FB) [11] Gnd
Pin Data [4] 4.84V (SS) [12] Gnd
IC6100 [1] 3.52V [9] n/c [5] Gnd [13] Gnd
Head Phone [2] 5.39V [10] n/c [6] 4.83V (PG) [14] 11.83V (12V In)
Pin Amp Pin [3] 0V [11] 3.09V [7] 4.87V (VCC) [15] 1.18V
(Out) [1] Gnd [8] 1.66V [4] 0.02V [12] 3.52V [8] 5.95V (BST) [16] 1.18V
(Out)
[2] 0V (R In) [9] 3.31V (3.3V_Normal In) [5] (-5.33V) [13] 0V
[3] 0V (R Out) [10] Gnd [6] (-5.34V) [14] (-5.24V)
[4] Gnd [11] n/c [7] n/c [15] Gnd
[5] 3.49V (Mute) [12] 0V (L Out) [8] n/c [16] 3.52V (3.5V_ST In)
[6] (-3.18V) [13] 0V (L In)
[7] (-1.59V) [14] Gnd
September 2016 Page 5

LG
2016 4K UHD Training
65UH5500 WebOS 3.0 4K UHD TV
MAIN BOARD LAYOUT
(Main Circuit Board Layout)

65UH5500 Main Board Picture 65UH5500 (2016) Main Section
P2501
To Inverter
MAIN BOARD
EBR82959601
P1 N/C
USB
HDMI 3
P7100
ToP7100
T-CON
HDMI 2
P101 N/C
HDMI 1
P4100
To IR/Joystick
and WiFi
P5800 RF In
To Speakers
To Speakers
HP
Optical LAN
Component/Composite Audio
March 2017 Page 01

LG
65UH5500 Main Board Component Layout 65UH5500 (2016) Main Board Section
To Inverter Heat Sink is Not Removable
P5201 Main to Inverter CN402 JTAG
Pin Label STBY Run Diode P2501 P1 N/C
1 PWR_ON 0.0V 3.20V OL
2 N/C
3
n/c n/c n/c
2 1
+5V_Normal JK4400
3 Gnd Gnd Gnd Gnd Q2500
IC2500 USB
4-8 13.2V 10.48V 13.34V OL PWR_ON
USB
9-10 Gnd Gnd Gnd Gnd
Q2503E B
IC100
11 DRV_ON 0V 3.36V 1.91V C
(Drives Q2504) LGE6551-CA1 +5V_USB_2
12 P_DIM 0V 0.16V – 3.36V OL S G
+1.5V_DDR IC2301
D
Q2504 Video Processor
(Dim to Bright) +1.8V IC4400
Panel_VCC IC2303
Note: Backlight Power is 64.4V in STBY.
HDMI 1
(1) PWR_ON = (STB) Pin 1: Turns on the Power
JK3302
Supply. Backlight power goes to 84.6V.
P7100
C
To T-CON
Backlights are not on at this time. D3309 A2 A1 B
C
(2) DRV_ON (Pin 11): Turns on the Backlights. (I2C_SCL6 Buffer) E
G D
Q7100 HDMI 1 Q3302
Backlight power goes to 78V. Note: P_DIM Must S
G Hot Swap
also be active. (3.3V) Max Brightness. S
D
Q7101
HDMI 2
(Pulse Width Modulation Dimming). (I2C_SDA6 Buffer)
(3) P_DIM (Pin 12) = Controls the backlight 13V to T-CON
Pins 44-51
MAIN BOARD C
JK3300
brightness. Controlled by Cust.: Menu --> Video -- D3305
> Backlights and by average brightness levels of P101 A2 A1 B
C
Main Board
E
n/c
the Video content. HDMI 2 Q3301
Range 0% to 100% directly proportional to DC
RS232C
p/n: EBR82959601 Hot Swap
voltage to Backlight brightness. (0.16V~3.36V)
HDMI 3
P-DIM is actually a PWM 4.76V p/p signal.
To IR and
+3.5V_WIFI JK3301
Joystick
IC4100 D3308
IC200 ST_A1V0 Q3300
IC101 C
A1
B
P4100
A2 C
E
HDMI 3
Q5800 Memory
E B
Hot Swap
Mute
To Speakers
TU6700 11 1
R- R+ L- L+
IC5800
P5800
1.8V
Diode Check (OL) RS232 Tuner
JK5000
P4100 "MAIN" to "Joy Stick, WiFi" Audio JK3801 JK3803 Access Tuner pins
From the back side.
Optical
JK3808 JK3809
PIN LABEL STBY RUN Diode Check LAN
HP
2 3.5V_WiFi 0V 3.42V OL Component / Composite Audio

10 Key 2 3.44V 3.43V 1.86V
11 IR 3.42V 3.42V 1.73V
12 3.5V_ST 3.44V 3.44V 0.92V P4100 "Main" WiFi Board P4100 "MAIN" IR Board
Pins 1, 5, 14: Ground Pin Pin Pin Pin
Pins 7, 8, 9: No Connection (Not Used) 1 6 10 1
Pin 3: WOL_PWR_On 0.24V IR Signal 2 1 11 2
Pin 10: Key2: 0.59V when Power Button Pressed 3.76V p/p 3 5 12 5
Pin 11: IR: 2.99V when IR Received 4 2 13 3
Pin 13: LED_R (0V) LED Off/TV On. (3V) LED On/TV Off. 10mSec / 1V 5 4 14 4
6 3
March 2017 Page 02 LG
65UH5500 Main Board IC Voltages 65UH5500 (2016) Main Board Section
IC101 NVRAM IC2303 +1.5V_DDR IC4100 +3.5V_WiFI IC5800 Audio

Pin Memory Pin Regulator Pin Regulator Pin Amp Pin
[1] Gnd [1] 3.44V (In 3.5V_ST) [1] 3.44V (In 3.5V_ST) [1] n/c [21] 1.81V (SPK_R+)
[2] Gnd [2] 3.44V (In 3.5V_ST) [2] Gnd [2] 1.29V (VDD_PLL) [22] Gnd
[3] Gnd [3] Gnd [3] 3.44V (EN) [3] n/c [23]
6.38V [4] Gnd [4] Gnd [4] 0.03V (OC) [4] Gnd [24]
5.11V [5] 3.42V (SDA) [5] Gnd [5] 0.19V [5] n/c [25]
Gnd [6] 3.22V (SCL) [6] 0.83V (FB) [6] 3.34V (Out) [6] 1.24V (DVDD) [26]
n/c
[7] Gnd [7] 0.34V (ITH) [7] 1.40V (SDATA) [27]
5.09V [8] 3.40V (In +3.3V_Normal) [8] 0.0V IC4400 +5V_USB_2 [8] 1.79V (W CK) [28]
6.33V
[9] 2.26V (SS) Pin Regulator [9] n/c [29] Gnd
IC200 ST_A1V0 [10] 1.53V (Out) [1] 5.02V (In +5V_Normal) [10] 3.42V (SDA) [30] 1.81V (SPK_L-)
Pin Regulator [11] 1.53V (Out) [2] Gnd [11] 3.42V (SCL) [31] 13.2V (13V_AMP In)
[1] 3.44V (EN) [12] 1.53V (Out) [3] 3.40V (EN) [12] 3.37V (Mute) [32] 13.2V (13V_AMP In)
[2] Gnd [13] 5.06V (Boot) [4] 3.39V (OC) [13] n/c [33] 1.81V (SPK_L+)
[3] 0.79V (ADJ) [14] n/c [5] 0.40V (ILIM) [14] n/c [34] Gnd
[4] 3.44V (In 3.5V_ST) [15] 3.49V (EN: POW ER_ON/OFF2_3) [6] 5.03V (Out) [15] n/c [35] 6.40V
[5] 1.0V (Out) [16] 3.44V (In 3.5V_ST) [16] 0V [36] 3.33V (AMP_Reset)
IC11200 RS232 [17] Gnd [37] Gnd
IC2301 +1.8V IC2500 +5V_Normal Pin Data Buffer [18] 1.81V (SPK_R-) [38] 1.08V (AUD_SCK)
Pin Regulator Pin Regulator [1] 3.31V (C1+) [19] 13.2V (13V_AMP In) [39] Gnd
[1] n/c [1] 3.44V (EN: POW ER_ON/OFF1) [2] 5.52V (V+) [20] 13.2V (13V_AMP In) [40] 3.3V (+3.3V_Normal)
[2] 3.44V (EN Power_On/Off2_2) [2] 0.77V (FB) [3] 0V (C1-)

[3] 3.39V (In +3.3V_Normal) [3] 5.07V (VREG5) [4] 0V (C2+)
[4] 5.03V (Bias) [4] 4.86V (SS) [5] (-5.43V ) (C2-)
[5] 0.60V (SS) [5] n/c [6] (-5.46V ) (V2-)
[6] 1.80V (Out) [6] +5.03V (Out) [7] (n/c)
[7] 0.60V (FB) [7] +5.03V (Out) [8] (n/c)
[8] Gnd [8] 9.72V (Boot) [9] (n/c)
[9] 13.2V (In +13V) [10] (n/c)
Q2500 PWR_On [10] 13.2V (In +13V) [11] 3.27V (DIN2)
Pin Switch [12] 3.3V (ROut1)
[1] 3.45V (In) Q7100 [13] 0V (RIn1)
[2] 279V Q7101 I2C_SCL6 Buffer [14] (-5.46V ) (DOut1)
[3] 3.43V (Out) Pin I2C_SDA6 Buffer [15] 0V (Gnd)
[G] 3.42V (T_CON_EN) [16] 0V (In) +3.3V_ST
Q2503 Drives (Controls) Q2504 [S] 3.14V (Out)
Pin (Panel_VCC) [D] 3.39V (In) Q3301
[B] 0.62V (PANEL_CTL) Q3302 HDMI-2 Hot Swap (Pin 19 JK3300)
[C] 0.05V Q5800 Audio Mute Pin HDMI-1 Hot Swap (Pin 19 JK3302)
[E] Gnd Pin ("C" To pin 12 IC5800) [B] 0V (HDMI_HPD_CBUS_1)
[B] 0.0V (AMP_MUTE) [C] 0V (5V_DET_HDMI_1 and 2)
Q2504 Panel_VCC [C] 3.37V (Low Active) [E] Gnd
Pin Switch [E] Gnd
[G] 10.57V
[S] 13.13V (+13V_In)
[D] 13.08V (Out)
March 2017 03
5 4 3 2 1
Buyer: Jose Tavarez Castillo ID:
Buyer:JoseTavarez Castillo(jk011831@gmail.com)Transaction (jk011831@gmail.com)
j-p0qn5l7dccb0b1a
TP_TCON RN260 3.3V

TP 8
3
100R
2 MFIO_15
RN263 1k 1 VN5
MAIN1V2
2
VDD_12 10k
8
AMLV_C KN
BMLV_4P 8
BMLV_CKN
BMLV_18N
BMLV_3N8
8
AMLV_CK8P
BMLV_CKP
BMLV_5N8
8
AMLV_3N8
AMLV_0N
AMLV_1N
AMLV_2N
AMLV_3P8
AMLV_4N 8
AMLV_5N
BMLV_0N 8
BMLV_2N 8
BMLV_3P8
BMLV_4N
AMLV_0P
AMLV_1P
AMLV_2P
AMLV_4P
AMLV_5P
BMLV_0P
BMLV_18P
BMLV_2P
BMLV_5P
8
8
8
8
8
8
8
8
8
CN33 RN32 RN30
100n/16V
VDD_MLVDS_33
VDD_MLVDS_33
VDD_MLVDS_3
VDD_IO_33
D VDD_LVDS_12 D
CN30 RN231 PI Resistor Must Close IC Pin
CN35 CN36 1u/10V 100R/1%
BMLV_CKN
BMLV_CKP
AMLV_CKP
AMLV_CKN
BMLV_3N
BMLV_0N
BMLV_0P
BMLV_1N
BMLV_2N
BMLV_1P
BMLV_2P
100n/16V
BMLV_3P
BMLV_4N
BMLV_5N
BMLV_4P
BMLV_5P
AMLV_0N
AMLV_1N
AMLV_2N
AMLV_3N
AMLV_4N
AMLV_5N
AMLV_0P
AMLV_1P
AMLV_2P
AMLV_3P
AMLV_4P
AMLV_5P
100p/50V
MFIO_13
3
VDD_DDR_33R
PI
MAIN3V3
CN1
VDD_IO_33
M2
M6
M1
M5
G1
G2
G3
U2
U3
R1
R2
R3
N2
N1
N3
H2
H1
H3
D2
N5
D1
P2
P3
E2
E1
E3
Y8
T2
T1
T3
F2
F3
L2
L1
J2
J3
NN1B 100n/16V
CN114 CN107 RN170 NC/0R GPO_5
BMLV_CKP
BMLV_CKN
BMLV_5N
BMLV_4N
BMLV_3N
BMLV_2N
BMLV_1N
BMLV_0N
AMLV_5N
AMLV_2N
AMLV_1N
AMLV_0N
AMLV_5P
AMLV_2P
BMLV_5P
BMLV_4P
BMLV_3P
BMLV_2P
BMLV_1P
AMLV_1P
AMLV_0P
GPO_5
GNDAM_MLVDS-M2
3.3V_MLVDS_VCCAM-M6
GNDAM_MLVDS-L2
3.3V_MLVDS_VCCAM-M5
GNDAM_MLVDS-L1
3.3V_MLVDS_VCCAM-N5
3.3V_VCCIO-Y8
AMLV_4N
AMLV_3N
AMLV_CKN
AMLV_CKP
BMLV_0P
AMLV_4P
AMLV_3P
PI
100n/16V RN168 NC/0R POL_TCON
100p/50V 5,8 GSEL POL_TCON 5
RN173 NC/0R
VDD_MLVDS_33 RN174 0R
CN118 CN86 7 Terminate GPO_5 T7 B1 BIST
GND-T7 BIST B2 LVDS_TYP_TCON
RN162 0R VDD_12 H5 LVDS_TYP
100n/16V 7 STV STV_D_TCON VDD_IO_33 AA8 1.2V_VCC-H5 A2 LVDS_BIT
100p/50V RN239 NC/0R 3.3V_VCCIO-AA8 LVDS_BIT
STV_D_1D1G 2,4 VDD_DDR_33L V7 B3 CABC_EN
STV_D_TCON V1 3.3V_DDR-V7 CABC_EN A3 OD_EN
RN122 0R CPV_2 STV_D/VSYNC OD_EN
VDD_LVDS_33 7 CPV CPV_1 V2 A4 UD_SEL
OE1 W1 CPV UD_SEL U5 VDD_DDR_33R
CN103 CN104
OE1 3.3V_DDR-U5
RN40 NC/0R STV_U OE2 1 W2 J6 VDD_12
7 Terminate 1 W3 OE2 1.2V_VCC-J6 G6 VDD_12
100n/16V STV_U
100p/50V STV_U 1.2V_VCC-G6
VDD_DDR_33L V5 R7
K8 3.3V_DDR-V5 GND-R7 AA7 VDD_LVDS_33
RN38 0R GPO_4 1 W4 GND-K8 3.3V_LVDS-RX-AA7 AC6
VDD_DDR_33L 8 POL GOA1 GOA1 VDD_LVDS_33
1 CPV_2 Y2 GOA1_DE 3.3V_LVDS-RX-AC6 Y6
CN105 CN108 GOA2_CLK VDD_LVDS_33
1 GPO_3 Y3 3.3V_LVDS-RX-Y6
100n/16V 100p/50V
VDD_DDR_33R
MAIN3V3
GPO3 1 GPO_4
GPO_5
VDD_DDR_33L
Y4
Y5
U6
L8
GOA3_GPO3
GOA4_GPO4
GOA5_HSYNC
3.3V_DDR-U6
NT71790-
VCC 5
NN17 GND-L8
CN109
CN117
4 B
1 CPV_1 VDD_12
TP_TCON
H6
AA1 1.2V_VCC-H6
TCON
GND
100n/16V 7 CPV Y POL_TCON AA2 TP

2 CPV_2 POL
C 100p/50V A PWMO AA3 C
8 PWMO PWMO
3.3V VDD_IO_33 AB8 P7
3
3.3V NC/74LVC1G32 VDD_DDR_33L V6 3.3V_VCCIO-ABB GND-P7 J8 VDD_LVDS_12

PWMI AA4 3.3V_DDR-V6 1.2V_LVDS-RX-J8 J10 VDD_LVDS_12
CN119 CN121 8 PWMI PWMI 1.2V_LVDS-RX-J10
M8 J9 VDD_LVDS_12
AB1 GND-M8 1.2V_LVDS-RX-J9 J4
100n/16V EN_2TCON EN_2TCON GNDAM_MLVDS-J4
100p/50V 1 TCON_SYNC1 AB2 H4
2D1G CPV Option SYNC1 1 TTCON_MST_SYNC1 GNDAM_MLVDS-H4
SYNC2 1 TCON_SYNC2 AB3 G4
1 TTCON_Mute_M2S_SYNC2 GNDAM_MLVDS-G4 V4
SYNC3 1 TCON_SYNC3 AC2
1 TCON_SYNC4 AC3 TTCON_Mute_M2S_SYNC3 GNDAM_MLVDS-V4
SYNC4 1 V3
放在正面 Terminate 1
1
Te POL 1
1
POL 1
VDD_IO_33 AC8 TTCON_OSC_SYNC4
3.3V_VCCIO-AC8
GNDAM_MLVDS-V3
GNDAM_MLVDS-U4
U4
3.3V_MLVDS_VCCAM-T5
3.3V_MLVDS_VCCAM-T6
VDD_DDR_33L U7
3.3V_MLVDS_VCCAM-N6
3.3V_MLVDS_VCCAM-R5
3.3V_MLVDS_VCCAM-R6
T4
3.3V_MLVDS_VCCAM-P5
3.3V_MLVDS_VCCAM-P6
CPV 1 CPV 3.3V_DDR-U7 GNDAM_MLVDS-T4
3.3V_LVDS-RX-AB6
VDD_12 H7 R4
3.3V_LVDS-RX-AC7
3.3V_LVDS-RX-AA6
3.3V_LVDS-RX-AB7
3.3V_LVDS-RX-W7
3.3V_LVDS-RX-W6
1
3.3V_LVDS-RX-Y7
N8 1.2V_VCC-H7 GNDAM_MLVDS-R4 P4
VDD_LVDS_12 H101.2V_LVDS-RX-H10
3.3V_VCCIO-W8
1 GSEL OE GND-N8 GNDAM_MLVDS-P4
1.2V_LVDS-RX-H8
1.2V_LVDS-RX-H9
GSEL OE1 1 P8 N4
1.2V_VCC-G5
1
3.3V_DDR-U8
GNDAM_MLVDS-N4
3.3V_DDR-V8
1 GND-P8
1.2V_VCC-J7
1.2V_VCC-J5
M4
STV 1 STV TP 1 TP GNDAM_MLVDS-M4 L4
1 1
750TEST
GNDAM_MLVDS-L4
EE_SDA
GND-N7
EE_SCL
GND-K7
M3
GNDAM_MLVDS-M3 L3
RSTN
GND-K6
3.3V 3.3V GNDAM_MLVDS-L3
NT71322_AAC-Final_22
AB6
AC7
J7
H8
H9
G5
J5
K7
W6
Y7
AB5
N6
P5
P6
R5
R6
T5
T6
AC5
AA5
AB4
W8
K6
AA6
AB7
W7
U8
V8
N7
EEPROM RN33RN31
VDD_MLVDS_33
VDD_MLVDS_33
VDD_MLVDS_33
VDD_MLVDS_33
VDD_MLVDS_33
VDD_MLVDS_33
VDD_MLVDS_33
NN6 4.7k 4.7k
VDD_LVDS_12
VDD_LVDS_12
TEST
1 8
EE_SCL
EE_SDA
RSTN
VDD_IO_33
VDD_LVDS_33
VDD_LVDS_33
VDD_LVDS_33
VDD_LVDS_33
VDD_LVDS_33
VDD_LVDS_33
VDD_LVDS_33
VDD_DDR_33L
VDD_DDR_33L
3.3V 2 A0 VCC 7
VDD_12
VDD_12
VDD_12
3 A1 WP 6
TEST RN36 1k/NC A2 SCL EE_SCL 2
4 5 EE_SDA 2
BIST RN37 1k/NC Vss SDA
LVDS_TYP_TCON RN39 1k/NC NC/24LC64I/SN
LVDS_BIT RN43 1k/NC CN29 2,4 GPIO_10 GPIO_10 RN113 1k
CABC_EN RN44 1k/NC
OD_EN RN45 1k/NC 100n/16V
UD_SEL RN47 1k
EN_2TCON RN49 1k/NC
RN50
RN52
RN105
RN53
RN103
RN91
RN90
RN83
B B
By pass capacitor
VDD_IO_33 VDD_LVDS_12
10k10k10k10k10k10k10k 10k CN110 VDD_LVDS_33 CN87
CN113 CN120 CN106 CN101
100n/25V 100n/25V 100n/25V 100n/25V 100n/25V 100n/25V
VDD_DDR_33L VDD_MLVDS_33 VDD_12

CN112 CN111 CN116 CN115 CN99 CN98
100n/25V 100n/25V 100n/25V 100n/25V 100n/25V 100n/25V
A A
<OrgName>
Title
<Title>
Size Document Number Rev

C <Doc> ?
Date: Wednesday, February 06, 2013 Sheet 1 of 9
5 4 3 2 1
5 4 3 2 1
j-p0qn5l7dccb0b1a
RN164 0R
5,8 GA_SCL GA_SCL SCK_Master
GPIO1G5PIO14
RN165 0R VDD_OSC_2.5V VDD_MMU_1.8V
1
1
5,8 GA_SDA GA_SDA SDA_Master
MDQS1N
MDQS0N
MDQS1
MDQS0
SCK_Master
SDA_Master
GPIO_15 1
GPIO_14 1
SCK_Slaver
SDA_Slaver
VDD_3.3V
OSCO
MDM1
MDM0
MD05
MD02
MD00
MD07
MD13
MD10
MD08
MD15
MD11
MD09
MD14
MD12
MD06
MD01
MD03
MD04
OSCI
GPIO_13
GPIO_12
GPIO_11
GPIO_10
RN147 0R
GPIO_9
GPIO_8
GPIO_7
1 EE_SCL EE_SCL SCK_Master VDD_MMU_1.8V
MWEN RN126 22R DDR2_WEN DDR2_WEN 4
RN157 0R MBA1 RN129 22R DDR2_BA1
1 EE_SDA EE_SDA SDA_Master VCC_CORE_1.0V DDR2_BA1 4
1,4 GPIO_10 GPIO_10 VCCA_DDR_1.0V MBA0 RP1N9 822R DDR2_BA0 DDR2_BA0 4
GPIO_12 1 LC MA10 2 7 DDR2_A10
7 LC 1 MA3
MA1 4
3 5
6 DDR2_A3
DDR2_A1
B16
B14
A15
G15
G19
G21
G12
G13
H17
D12
D11
D10
H18
C10
C11
D17
C12
C13
C14
C15
C16
E12
E11
E10
B10
B12
B13
B15
A16
B17
B18
A18
A19
B19
B20
B21
A21
A22
B22
F15
F19
F20
F12
F13
W9
GPIO_15
C7
D9
C8
D8
D7
B8
A7
B7
E9
E8
E7
B9
A9
5 GPIO_15
MFIO_0 NN1A RN128 MA7 RP1N8 822R DDR2_A7
D 8 MFIO_0 D
MDQ13
MDQ10
MDQ15
MDQ11
MDQ14
MDQ12
VCC_1.0V_CORE-H17
SCK_MASTER-C7
VCC_1.0V_CORE-H18
VDD_OSC_2.5V-D8
VDD_OSC_2.5V-D7
MDQ8
MDQ1
MDQ3
MDQ4
OSCI
GND_OSC-F15
GND_OSC-G15
MDQ5
MDQ2
MDQ0
MDQ7
MDM1
VDD_MMU_1.8V-F19
GND_CLK-F20
MDQ9
MDM0
MDQ6
GND-F12
OSCO
GND-B16
SDA_MASTER-B8
MA12 2 7 DDR2_A12
SCK_SLAVE-A7
SDA_SLAVE-B7
GPIO_15
GPIO_14
VDD_IO_3.3V-W9
GPIO_13
GPIO_12
GPIO_11
GPIO_10
GPIO_09
GPIO_08
GPIO_07
VDD_OSC_2.5V-E8
VDD_OSC_2.5V-E7
VDD_MMU_1.8V-D17
VDD_MMU_1.8V-G19
GND_APLL
MDQS1#
MDQS0#
GND-G12
GND-F13
GND-G13
GND-B14
GND-A15
R13 H12 0R/NC
MDQS1
MDQS0
T12 GND-R13 GND-H12 H13 MA5 3 6 DDR2_A5
8 MFIO_1 MFIO_1 T13 GND-T12 GND-H13 C23 MA9 4 5 DDR2_A9
GND-T13 DDR_CKE-C23 F17 MCKE 4
U12 VCCA_DDR_1.0V
MFIO_2 U13 GND-U12 VCCA_1.0V-F17 G20 RP1N7
8 MFIO_2 GND-U13 GND_CLK-G20 B23 MRASN 822R DDR2_RASN
MWE# D22 MWEN MA2 2 7 DDR2_A2
MFIO_3 MBA1 DDR2_RASN 4
8 MFIO_3 MBA1 D21 MA11 3 6 DDR2_A11
MBA0 MA8 4 5 DDR2_A8
MFIO_4 MBA0 E22 MA10
8 MFIO_4 VDDD MA10 F18
VCCA_1.0V-F18 H19 VCCA_DDR_1.0V MA6 RP1N6 822R DDR2_A6
8 MFIO_5 MFIO_5 RN268 VDD_MMU_1.8V-H19 E21 MA4 2 7 DDR2_A4
MFIO_6 MA1 DDR2_A[0..12] 4
MFIO_6 3.3k MA1 F23 MA3 MA0 3 6 DDR2_A0
MA3 F21 MA7 MCASN 4 5 DDR2_CASN
8 MEMC ON/OFF MFIO_7 MA7 G22 DDR2_CASN 4
MA12
MA12 H22 MA5 MCLK0N RN145 22R DDR2_CLK0N DDR2_CLK0N
8 MFIO_8 MFIO_8 MA5 H23 4
MA9 MCLK0 RN155 22R DDR2_CLK0
MA9 F7 DDR2_CLK0 4
MFIO_9 VDD_DLL_2.5V-F7 E17 VDD_DLL_2.5V
7,8 3D_EN F9 VDD_MMU_1.8V
LVDSTX_2.5V LVDSTX_2.5V-F9 VDD_MMU_1.8V-E17 P21
MFIO_10 MODT 4 MDM0 RN93 22R DDR2_DM0
8 MFIO_10 DDR_ODT J23 MCLK0N DDR2_DM0 4
MFIO_11 MCLK# J22 VDD_MMU_1.8V MDM1 RN114 22R DDR2_DM1 DDR2_DM1 4
8 MFIO_11 MCLK0
MCLK H20 RP1N3
8 MFIO_12 MFIO_12 VDD_MMU_1.8V-H20 H21 RN19 MDQS1N 822R DDR2_DQS1N
F14 MVREF MDQS1 2 7 DDR2_DQS1N 4
DDR2_DQS1
GND-F14 DDR_VREF-H21 K22 MRASN DDR2_DQS1 4
MRAS# MDQS0N 3 6 DDR2_DQS0N
1 MFIO_13
1,4 STV_D_1D1G
MFIO_13
GPIO_9 VDDD
NT71790-MEMC MA2
MA11
M23
MA8 M22
L22
L23 MA2
MA11
MA8
CN128
100n/10V
RN35
1k
1k CN122
1u/10V
MDQS0
MD05
4
RP1N2
5
822R
DDR2_DQS0
DDR2_DQ5
DDR2_DQS0N
DDR2_DQS0
4
4
3.3k RN272
MA6 MD02 2 7 DDR2_DQ2

MA6 N22 MA4 DDR2_DQ[0..15] 4
1 MFIO_15 MFIO_15 MD00 3 6 DDR2_DQ0
MA4 N21 MA0
MA0 J19 MD07 4 5 DDR2_DQ7
8 LVDS_TYP GPIO_14 VDD_MMU_1.8V-J19 P23
MCAS# J20 MCASN MD13 RP1N1 822R DDR2_DQ13
8 GPIO_13 GPIO_13 VDD_MMU_1.8V-J20 K19 MD10 2 7 DDR2_DQ10
VDD_MMU_1.8V-K19 MD08 3 6 DDR2_DQ8
L18 K20 MD15 4 5 DDR2_DQ15
G14 VCC_1.0V_CORE-L18 VDD_MMU_1.8V-K20 D18
C
GND-G14 VDD_MMU_1.8V-D18 J21 MVREF MD11 RP1N5 822R DDR2_DQ11 C
DDR_VREF-J21 F8
VDD_DLL_2.5V-F8 MD09 2 7 DDR2_DQ9
VDD_DLL_2.5V-G7 G7
G8
VDD_DLL_2.5V MD14 3 6 DDR2_DQ14
VDD_DLL_2.5V-G8 J17 MD12 4 5 DDR2_DQ12
MAIN1V
VCC_1.0V_CORE-J17 V20 TEST_EN
312TEST Y23 MD06 RP1N4 822R DDR2_DQ6
RX_VMM_1.0V RESETN MD01 2 7 DDR2_DQ1
RESET# V23 SPI_DI
SPI_DI V22 MD03 3 6 DDR2_DQ3
VCC_CORE_1.0V SPI_DO MD04 4 5 DDR2_DQ4
G9 SPI_DO V21 SPI_CLK
LVDSTX_2.5V-G9 SPI_CK W21 SPI_CS
SPI_CS Y9
VCC_CORE_1.0V VDD_IO_3.3V-Y9 W22
GPIO_06 Y22 GPIO_6
GPIO_05 AB23 GPIO_5
VCCA_DDR_1.0V MFIO_15
MFIO_15 AA23
MFIO_14 1 CN145
MFIO_14 AC22 1 MFIO14 OSCI RN132 100R
MFIO_13 1
MFIO13
2
MFIO_12
RN110
DDR_72310_1V8 AA22 MFIO_11 1 1 JAM12D 22p/50V
VCC_1.0V_CORE-L17
VCC_1.0V_CORE-J18
VCC_1.0V_CORE-K18
VCC_1.0V_CORE-K17
MFIO11
LVDSRX_VMM_1.0V
LVDSRX_2.5V-P11
CN148
VDD_IO_3.3V-AC9
VDD_IO_3.3V-AA9
MFIO_10 1 MFIO10
VDD_IO_3.3V-AB9
1M
ZN1
ICE-DSU_TX ICE-
Y20 MFIO_9
GNDA_RX-AA17
MFIO_09
GNDA_RX-W10
H14 W20 MFIO_8 1
GNDA_RX-V10
1
J14 GND-H14 MFIO_08 T14 1 MFIO8 RN156 100R
VDD_MMU_1.8V GND-J14 GND-T14
UART_RX1
UART_TX1
K14 J12 22p/50V

GND-M12
GND-M13
GND-N12
GND-N13
GND-R12
GND-J12
GND-K13
GND-P12
GND-P13
GND-K14
GND-L12
GND-L13
GPIO_00
GPIO_01
GPIO_02
GPIO_03
GPIO_04
MFIO_00
MFIO_01
MFIO_02
MFIO_03
MFIO_04
MFIO_05
MFIO_06
MFIO_07
DSU_RX
ROCLK+
R14
RECLK+
L14
ROCLK-
RECLK-
DDR_VDD_CLK_1.8V M14 GND-L14 GND-R14 J13
RO0+
RO1+
RO2+
RO3+
RO4+
RE0+
RE1+
RE2+
RE3+
RE4+
RO0-
RO1-
RO2-
RO3-
RO4-
RE0-
RE1-
RE2-
RE3-
RE4-
N14 GND-M14 GND-J13 K12
P14 GND-N14 GND-K12
GND-P14 VDD_3.3V_MIS
VDD_3.3V_MIS
AA12
W12
AB9
W13
W14
W15
K13
L12
L13
M12
M13
L17
Y14
Y12
Y13
Y15
K18
AA17
AB12
LVDS_RO0+ AA13
AB13
LVDS_RO1+ AA14
LVDS_RO2+ AB14
AA15
AB15
AA16
LVDS_RO3+ AB16
AB17
AA18
AB18
AA19
AB19
AA20
AB20
AA21
AB21
T15
AC13
AC14
LVDS_RO4- AC16
P11
V10
AC18
AC19
AC21
W10
W16
Y16
W17
Y17
W18
Y18
W19
Y19
AA9
K17
AC9
P12
P13
J18
N12
N13
R12
LVDS_ROCLK+
LVDS_ROCLK-
RN124 4.7k
RN94 4.7k
RN125 4.7k
LVDS_RO4+
LVDS_RO3-
RN136 4.7k
RN141 4.7k
LVDS_RO0-
LVDS_RO1-
LVDS_RO2-
RN137 4.7k
RN138 4.7k
XSN9
4.7k
LVDS_RECLK+
LVDS_RECLK-
ICE-DSU_RX
ICE-DSU_TX
MFIO_2
MFIO_3
8 1MFIO_4
8 MFIO_5
1MFIO_6
MFIO_7
1
LVDS_RE0+
LVDS_RE1+
LVDS_RE2+
LVDS_RE3+
LVDS_RE4+
LVDS_RE0LVDS_RE0-
LVDS_RE1-
LVDS_RE2-
LVDS_RE3-
LVDS_RE4-
UART-RX1
UART-TX1
B 2 B
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
1MFIO_0
1MFIO_1
3 ICE-DSU_RX SCK_Master
RN133
4 ICE-DSU_TX SDA_Master
5 UART-RX1
LVDS_RO38+
LVDS_RO48+
8
8
8
8
8
LVDS_RO38-
LVDS_RO0+
LVDS_RO1+
8-
-
8
8
8
8
LVDS_RO0-
LVDS_RO48-
LVDS_RO2-
LVDS_ROCLK-
LVDS_RE0+
LVDS_RE1+
LVDS_RE2+
LVDS_RO2+
8
8
8
LVDS_RE1-
LVDS_RE2-
LVDS_ROCLK+
LVDS_RECLK-
LVDS_RECLK+
LVDS_RE3+
LVDS_RE4+
6
LVDS_RO1-
UART-TX1
LVDS_RE3
LVDS_RE4
VDD_3.3V_MIS
1
MFIO0 MFIO4 MFIO6
1
8
7
RN143
1
10k 8 SCK_Slaver SCK_Slaver
1N4148W 8 SDA_Slaver SDA_Slaver
MFIO1 MFIO5MFIO7
RX:NEAR CHIP SIDE RN127
1
RESETN
0R/NC RX_VMM_1.0V LVDSRX_2.5V
LVDS_RO0+ RN134 100R LVDS_RO0-
LVDS_RO1+ RN108 100R LVDS_RO1- CN161
LVDS_RO2+ RN117 100R LVDS_RO2- 10u/25V
VDD_3.3V_MIS
LVDS_ROCLK+ RN130 100R LVDS_ROCLK-
LVDS_RO3+ RN135 100R LVDS_RO3- NN5 CN152 1,4,8 GPIO_[0..11]
LVDS_RO4+ RN148 100R LVDS_RO4- RN106 GPIO_0
SPI_CS 1 8 SPI_VCC RN109 100n/10V LN3 NT72312_+2.5V GPIO_1
10k SPI_DI 2 CS#_0 VCC 7 SPI_HOLD
LVDS_RE0+ RN158 100R LVDS_RE0- RN77 DOHOLD#_6 6 BLM18PG181SN1 GPIO_2
MFIO_14 SPI_WP 3 SPI_CLK GPIO_3
LVDS_RE1+ RN107 100R LVDS_RE1- 4 WP#_2 CLK 5 10k
0R SPI_DO VDD_DLL_2.5V GPIO_4
LVDS_RE2+ RN151 100R LVDS_RE2- VSS DI
GPIO_5
LVDS_RECLK+ RN116 100R LVDS_RECLK- EN25B40EN25F40-100GCP VDD_OSC_2.5V
LVDS_RE3+ RN131 100R LVDS_RE3-
LVDS_RE4+ RN142 100R LVDS_RE4- LVDSTX_2.5V
CO-LAYOUT DIP 8PIN LN2 GPIO_6
BLM18PG181SN1 GPIO_7
GPIO_8
LVDSRX_2.5V GPIO_9
GPIO_10
GPIO_11
VCCA_DDR_1.0V RX_VMM_1.0V VDD_DLL_2.5V VDD_OSC_2.5V LVDSTX_2.5V

TEST_EN VDD_MMU_1.8V DDR_VDD_CLK_1.8V VCC_CORE_1.0V VCC_CORE_1.0V LVDSTX_2.5V LVDSRX_2.5V VDD_3.3V CN127
100n/10V CN154
100n/10V CN178
100n/10V CN192
10u/10V CN177
10u/10V CN191
A 10u/10V A
10u/10V CN123
10u/10V CN142
10u/10V CN151
10u/10V CN156
10u/10V CN124
RN149 4.7k
10u/10V CN159
10u/10V CN147
100n/10V CN157
100n/10V CN173
100n/10V CN184
100n/10V CN193
100n/10V CN176
100n/10V CN153
100n/10V CN163
100n/10V CN179
100n/10V CN194
100n/10V CN125
100n/10V CN149
100n/10V CN160
100n/10V CN162
100n/10V CN175
100n/10V CN169
100n/10V CN166
100n/10V CN168
100n/10V CN171
100n/10V CN172
100n/10V CN164
100n/10V CN165
100n/10V CN167
10u/10V CN174
10u/10V CN146
10u/10V CN230
CN126 CN141 CN150 CN155 CN158 CN170
100n/10V 100n/10V 100n/10V 100n/10V 100n/10V

100n/10V
<OrgName>
Title
<Title>

C <Doc> ?
5 4 3 2 1
5 4 3 2 1
j-p0qn5l7dccb0b1a
VCC_CORE_1.0V LVDSTX_2.5V
D RX_VMM_1.0V D
LVDSRX_2.5V
R18
U16
U17
U18
U19
U20
U21
U22
U23
T16
T17
T18
T19
T20
T21
T22
T23
NN1C
R17
LVDSRX_VMM_1.0V-U15
M11
LVDSTX_2.5V-F10
LVDSTX_2.5V-F11
LVDSTX_2.5V-G10
LVDSTX_2.5V-G11
LVDSTX_2.5V-H11
LVDSTX_2.5V-J11
LVDSTX_2.5V-K11
LVDSTX_2.5V-L11
LVDSTX_2.5V-N11
G10
G11
VCC_1.0V_CORE-T16
VCC_1.0V_CORE-T17
VCC_1.0V_CORE-T18
VCC_1.0V_CORE-T19
VCC_1.0V_CORE-T20
VCC_1.0V_CORE-T21
VCC_1.0V_CORE-T22
VCC_1.0V_CORE-T23
LVDSTX_2.5V-M11
VCC_1.0V_CORE-R18
VCC_1.0V_CORE-U16
VCC_1.0V_CORE-U17
VCC_1.0V_CORE-U18
VCC_1.0V_CORE-U19
VCC_1.0V_CORE-U20
VCC_1.0V_CORE-U21
VCC_1.0V_CORE-U22
VCC_1.0V_CORE-U23
H11
N11
U15
R11
K11
F10
F11
L11
J11
LVDSRX_2.5V-R11
P18 VCC_1.0V_CORE-R17
P17 VCC_1.0V_CORE-P18 V11
N18 VCC_1.0V_CORE-P17 GNDA_RX-V11
VCC_1.0V_CORE-N18 V12
N17 GNDA_RX-V12 V13
M18 VCC_1.0V_CORE-N17 GNDA_RX-V13
VCC_1.0V_CORE-M18 V14
M17 GNDA_RX-V14 V15
VCC_1.0V_CORE-M17 GNDA_RX-V15 V16
GNDA_RX-V16 V17
GNDA_RX-V17 V18
GNDA_RX-V18 V19
D15 GNDA_RX-V19 W11
D16 VDD_MMU_1.8V-D15 GNDA_RX-W11 Y10
VDD_MMU_1.8V-D16 GNDA_RX-Y10 Y11
E19
VDD_MMU_1.8V-E19 GNDA_RX-Y11 AA10
GNDA_RX-AA10 AA11
E15 GNDA_RX-AA11
E16 VDD_MMU_1.8V-E15 AB10
VDD_MMU_1.8V VDD_MMU_1.8V-E16 GNDA_RX-AB10
L19 AB11
L20 VDD_MMU_1.8V-L19 GNDA_RX-AB11 AC10
VDD_MMU_1.8V-L20 GNDA_RX-AC10
AC11
GNDA_RX-AC11
D19
VDD_MMU_1.8V-D19
NT71790- GND-N15
GND-N16
GND-P15
N15
N16
P15
C
E18
VDD_MMU_1.8V-E18
Power GND-P16
GND-R15
GND-R16
GND-U14
GND-K21
P16
R15
R16
U14
K21
L21
C
G17 GND-L21 M21

VCCA_DDR_1.0V VCCA_1.0V-G17 GND-M21
G18 P22
VCCA_1.0V-G18 GND-P22 R21
GND-R21 R22
GND-R22 R23
D20 GND-R23
VDD_CLK_1.8V-D20
DDR_VDD_CLK_1.8V R20
GND-R20 R19
E20 GND-R19
VDD_CLK_1.8V-E20 P20
GND-P20 P19
GND-P19 N20
F16 GND-N20 N19
G16 GND_OSC-F16-F16 GND-N19
N9 GND-M10
M16 GND-M15
D13 GND-M16
M20
P9 GND-N10
T8 GND-R10
U11 GND-U10
V9 GND-U11
C18 GND-C17
C19 GND-C18
C20 GND-C19
C21 GND-C20
C22 GND-C21
H15 GND-C22
H16 GND-H15
J15 GND-H16
D14 GND-D13
E13 GND-D14
L9 GND-K10
R8 GND-P10
K16 GND-K15
L15 GND-K16
E14 GND-E13
GND-E14
T11 GND-T10
U9 GND-T11
M9 GND-L10
L16 GND-L15
M15 GND-L16
J16 GND-J15
K15 GND-J16
GND_OSC-G16-G16
M10 GND-M9
N10 GND-N9
R9 GND-R8
R10 GND-R9
U10 GND-U9
GND-M20
K10 GND-K9
P10 GND-P9
C17 GND-V9
T9 GND-T8
T10 GND-T9
L10 GND-L9
M19
GND-M19
NT71322_AAC-Final_22
K9
B B
A A
<OrgName>
Title
<Title>

C <Doc> ?
5 4 3 2 1
5 4 3 2 1
j-p0qn5l7dccb0b1a
DDRII 512Mb/1Gb layout compatible VCC3.3V MAIN3V3

VDDD VCC3.3V
512Mb:BA2 NC, 1Gb:BA2 used RN48
MAIN3V3 VDD_3.3V
0R RN56
0R
NN2 3.3V
2 DDR2_A[0..12] DDR2_DQ[0..15] 2 CN26 LN1 NC/10.0 uH
DDR2_A0 M8 B9 DDR2_DQ15 VCC-Panel 1
DDR2_A1 M3 A0 DQ15 B1 DDR2_DQ14 10u/10V 1
A1 DQ14 RN55 NC/0R RN235 100k
D DDR2_A2 M7 D9 DDR2_DQ13 VDD_3.3V_MIS NN12 D
A2 DQ13 D1 DDR2_DQ12
DDR2_A3 N2 1 8 CN7 RN1
A3 DQ12
22u/6.3CVN12
22u/6.3VCN9
CN6
DDR2_A4 N8 D3 DDR2_DQ11 BS SS 26.1k
A4 DQ11 CN27
DDR2_A5 N3 D7 DDR2_DQ10 100n/16V
100n/16V
A5 DQ10 10u/10V RN96 NC/100K
NC/10u/16VCN8
DDR2_A6 N7 C2 DDR2_DQ9
10u/16CVN13
CN3
A6 DQ9 2 7
DDR2_A7 P2 C8 DDR2_DQ8 CN10 IN EN
100n/16V
DDR2_A8 P8 A7 DQ8 DDR_72310_1V8 CN102 100n/16V
10n/50V
DDR2_A9 P3 A8 A8 DDR2_DQS1N DDR2_DQS1N 2 +V_SW4
A9 UDQS#_47 3 6 CN2 RN2 RN3
DDR2_A10 M2 B7 DDR2_DQS1 DDR2_DQS1 SW COMP
A10/AP_10 UDQS 2 10k
DDR2_A11 P7 B3 DDR2_DM1 CN28 GND
TGND
A11 UDM DDR2_DM1 2 3.3n/50V 6.8k
DDR2_A12 R2 10u/10V
A12 4 5
DDR2_CLK0 RN13 100R DDR2_CLK0N R8 GND FB
DDR2_DQ[0..15] 2
R3 NC F9 DDR2_DQ7 VDD_DDR2_1V8 NC/MP1484 3.3=0.923(1+R4/R6)
9
R7 NC_14 DQ7 F1 DDR2_DQ6
NC_15 DQ6 DDR2_DQ5
H9
DDR2_BA1 L3 H3 DDR2_DQ3 10u/10V

2 DDR2_BA1 BA1 DQ3
DDR2_BA0 L2 H7 DDR2_DQ2
2 DDR2_BA0 BA0 DQ2
DQ1 G8
RN10 2 DDR2_RASN DDR2_RASN K7 DDR2_DQ0
0R/NC DDR2_CASN L7 RAS#_44 DQ0
2 DDR2_CASN CN25
2 DDR2_WEN DDR2_WEN K3 E8 DDR2_DQS0N
WE#_76 LDQS#_33 DDR2_DQS0N 2 10u/10V
L8 F7 DDR2_DQS0 DDR2_DQS0 2
CS#_42 LDQS
J2 MAIN1V2
K2 VRef_57
RN11 VDD_DM1 1k/NC RN8 CKE
1k 2 MCKE
RN76 2 DDR2_CLK0 DDR2_CLK0 J8 A2
CK NC_82 RN51
2 DDR2_CLK0N CK#_40 NC_83 VCC3.3V
NN13 NC/0R
VDD_DM1
100n/16VCN225
22u/6.3VCN231
VDD_DM1 J7 J1 3 4 1 1.2V
VSSDL VDDL VIN VOUT 1
10u/16 CN232
100n/16VCN233
A7A9 VDD_3.3V_MIS
VSSQ_77 VDDQ_58
B2C1 2
GND
VSSQ_74 VDDQ_59 VOUT
VSSQ_78 VDDQ_60 B8C3
10u/16V
VSSQ_75 VDDQ_61 D2C7 1
VSSQ_73 VDDQ_62 D8C9 BS_7 2
1
VSSQ_72 VDDQ_63 E7E9 GPIO_0 3
AP1122E
C
C
VSSQ_79 VDDQ F2G1 VDD_DDR2_1V8
4
F8 G3
VSSQ VDDQ_54
CN140 RN12 100n/10V
VSSQ_80 VDDQ_55 H2G7 XSN10
1u/10V 1k/1% H8 G9
CN139 P9 VSSQ_81 VDDQ_56 R1
N1 VSS_69 VDD_52 M9 CN100
J3 VSS_68 VDD_51 J9 10u/10V
RN9 +V_SW6
1k/1% E3 VSS_67
VSS_66
VDD_50
VDD_49
E1 For Debug Update Code 1V
A3 A1
VSS VDD
VDD_DM1 RN216
H5PS5162GFR-G7C
NC/0R
VCC-Panel LN6 10.0 uH
1 1V
VDD_DM1 1
RN234 100k
100n/10V 100n/10V 100n/10V 100n/10V 100n/10V 100n/10V 100n/10V NN14
CN18 CN22 CN37 CN31 CN131 CN133 CN135 1 8 CN42 RN4
100n/16CVN41
BS SS
22u/6.3CVN45
22u/6.3CVN43
2k
RN111NC/100K
VN44
10u/16CVN47
100n/16CVN40
CN32 CN129 2 7
CN46 IN EN
100n/16V 100n/16V
10u/16C
CN17 CN136 CN137 CN19 CN23 CN24 CN130 CN132 CN134 3 6 CN39 RN6 RN5
100n/10V 100n/10V 100n/10V 100n/10V 100n/10V 100n/10V 100n/10V 100n/10V 100n/10V SW COMP
GND 12k
TGND
3.3n/50V 6.8k
4 5
GND FB
VDD_3.3V_MIS MP1484
1=0.923(1+R10/R11)
9
GPIO_[0..11] 1,2,8
BS_0 RN14 1k GPIO_0
BS_1 RN15 1k GPIO_1
BS_2 RN16 1k GPIO_2
BS_3 GPIO_3
BS_4 GPIO_4
BS_5 GPIO_5
+V_SW4
NT72312_+2.5V
B B
RN18
BS_6
BS_7
GPIO_6
GPIO_7
3.3V NN15 选用小封装的
RN95
3.3V RN115
MAIN3V3 0R 选用小封装的 NC/0R
1k/NC BS_8 GPIO_8 AP1084DGAZ1084D-ADJ MAIN3V3
BS_9 GPIO_9 1.8V NN16 2.5V
BS_10 GPIO_10 2 3 1 1 5
Vin_2 VOUT 1 1
ADJ
BS_11 GPIO_11 VIN VOUT 1
CN227 CN38
CN228100n/16V
RN20
RN21
RN22
RN23
RN24
RN25
RN26
RN27
RN28
CN4 RN194 CN226 CN5 RN198 CN229
GND
RN34 10u/10V100n/16V 1.5k 10u/10V 100n/16V CN143
10u/10V 3 4 10u/10V 100n/16V
1
0R/NC ShutD ADJ 2.55k
TO-252 RN119 681R
RN118
NC AP2127K-ADJ
2
GND GND
10k
10k
10k
10k
10k
10k
10k
10k
10k
Vout=1.25(1+R162/R236)+0.000055*R162 GND GND

1.2k
GND GND
GND
VOUT=0.8*(1+R237/R163) V
A A
<OrgName>
Title
<Title>

C <Doc> ?
5 4 3 2 1
5 4 3 2 1
j-p0qn5l7dccb0b1a
VDDA
VDD_GA POL_TCON 1 GSEL OP CIRCUIT
NN10
VDDA VDD_GA RN221
RN213 9
RN82 VDD_OP 15.2 NC/10k/1% 0R 1
NC1
EP
NC2 8
VDDA
0R 2 7
1 VDD_OP 3 IN- VDD
IN+ 6 RN215 0R
1 4 OUT GSEL 1,8
5
D RN84 RN85 CN74 GND NC3 D
NC/0R NC/10u/25V CN189
MAX9650
CN183CN187 CN188
10.2k RN197
1 NC/9.31k CN185 NC/10u/25V
100n/25V NC/10u/25V
2 VZN1 100n/25V
TL431BCDBZR
RN87
3
2k NC/100n/25V
VCOMADJ
RN89 VDD_GA
VDD_GA RN185
0R
RN58 82k RN187
VCOM 82k RN59
CN85
CN51 CN56 100k GMA1 1 GMA1
CN52 100k 1u/25V 100n/25V 1 GMA1 8
1u/25V 100n/25V
RN256 GMA2 1 GMA2
0R VCOMB RN182 24.9k 1 GMA2 8
RN60 24.9k 1 RN180
1 GMA3 1 GMA3
RN61 10R CN82 10R 1 GMA3 8
RN54 CN238 CN58 GMA4 1 GMA4
100n/16V 1 GMA4 8
47k 10u/16V 100n/16V
GMA5 1 GMA5
1 GMA5 8
33
32
31
30
29
28
27
26
25
GMA6 1 GMA6
33
32
31
30
29
28
27
26
25
NN8 1 GMA6 8
VCOM_OUT
AVDD_24
AVDD_25
AGND_27
AGND_31
EPAD
VCOM_FB
VCOM_ADJ
SET
NN7 IML7991ID
VCOM_ADJ
VCOM_FB
VCOM_OUT
AGND_27
AGND_31
AVDD_24
AVDD_25
EPAD
1 GMA7
SET
GMA7
IML7991ID 24 RN178 10R GMB14 CN55 100n/16V
100n/16V 1 GMA7 8
100n/16V CN83 OUT14
24 RN62 10R GMA14 CN53 CN84 100n/25V GMB1 RN191 10R 1 23 RN192 10R GMB13 CN92 100n/16V
OUT14 GMA13 100n/16V CN89 OUT1 OUT13 GMA8 1 1 GMA8
CN57
CN59 100n/25V GMA1 RN63 10R 1 23 RN64 10R CN54 100n/25V GMB2 RN184 10R 2 22 RN193 10R GMB12 CN81 100n/16V GMA8 8
100n/25V GMA2 RN66 10R 2 OUT1 OUT13 22 RN65 10R GMA12 CN60 100n/16V CN88 100n/25V GMB3 RN92 10R 3 OUT2 OUT12 21 RN181 10R GMB11 CN76
CN61 OUT2 OUT12 OUT3 OUT11 100n/16V GMA9 1 1 GMA9
100n/25V GMA3 RN67 10R 3 21 RN68 10R GMA11 CN62 100n/16V CN95 100n/25V GMB4 RN179 10R 4 20 RN88 10R GMB10 CN79 GMA9 8
CN64 4 OUT3 OUT11 20 CN91 5 OUT4 OUT10 19 100n/16V
100n/25V GMA4 RN70 10R RN69 10R GMA10 CN63 100n/16V 100n/16V GMB5 RN150 10R RN186 10R GMB9 CN90 100n/16V GMA10 1GMA10
CN66 GMA5 RN72 5 OUT4 OUT10 19 GMA9 CN93 GMB6 RN176 6 OUT5 OUT9 GMB8
CN70 100n/16V 10R RN71 10R CN65 100n/16V 100n/16V 10R 18 RN190 10R CN77 1 GMA10 8
GMA6 RN73 10R 6 OUT5 OUT9 18 RN74 10R GMA8 GMB7 RN86 10R 7 OUT6 OUT8 17
CN71 100n/16V CN69 100n/16V DVDD VDDD 1GMA11
OUT6 OUT8 OUT7 GMA11
BANK_SEL
STATIC_HI
BANK_SEL
STATIC_HI
nWR_23
8 AVDD CN80 GMA12 1GMA12
VDD_GA CN68
DGND
AGND
CN67
nWR_23
1 GMA12 8
SDA
SCL
DGND
AGND
A0
SDA
SCL
1u/25V 100n/16V CN237CN236 1 GMA13 8

A0
GMA14 1GMA14
9
10
11
BANK_SEL 12
13
14
15
16
VDD_OP
100n/25V
XSN8 1 GMA14 8
100n/25V
9
10
11
12
13
14
15
16
VDD_OP
100n/25V
100n/25V
GMB1 1 GMB1
5
6
1 GMB1 8
4 GA_SDA GMB2 1 GMB2
GA_SDA 3 GA_SCL 1 GMB2 8
CN72 CN73 nWR 1 1 GMB3 8

1u/25V RN139 3.3k GMB4 1 GMB4
100n/25V 1 GMB4 8
RN189 3.3k
RN183 3.3k GMB5 1 GMB5
RN78 NC/3.3kBANK_SEL RN79 NC/3.3k VDDD VDDD 1 GMB5 8
RN80 3.3k RN188 3.3k GMB6 1 GMB6
1 GMB6 8
GMB7 1 GMB7
1 GMB7 8
GMB8 1 GMB8
VCC3.3V 1 GMB8 8
GMB9 1 GMB9
1 GMB9 8
GMB10 1GMB10
RN218 nWR 1 GMB10 8
2.2k nWR 8
RN46 100R/NC RN207 BANK_SEL GA_SDA GMB11 1GMB11
GA_SDA 2,8 1 GMB11 8
3
100R GA_SCL
GA_SCL 2,8 GMB12 1GMB12
2 GPIO_15 GPIO_15 RN17 47k 1 1 GMB12 8
MMBT3904LT1 GMB13 1GMB13
1 GMB13 8
2
GMB14 1GMB14
1 GMB14 8
VCOM 1VCOM
1
B B
A A
<OrgName>
Title
<Title>

C <Doc> ?
5 4 3 2 1
5 4 3 2 1
j-p0qn5l7dccb0b1a
2
VDN2
NC/APD340VRTR-G1NC/APD340VRTR-G1
VDN3
1
D D
CN198
NC/470n/50V
2
CN199
APD340VRTR-G1\TP\JK
VDN4
8
NN20
1
RN238
NC/0R
NC/100n/50V
layout 特别注意
1
7 D1 S1 2
6 D1_5 S2 3 LN510.0 uH
D2 S3 CN200 RN206
5 4
D2_7 G
10u/25V NC/6.8k
AVDD1 NC/P2003EVG VGH VGH
16V VCC-Panel V1 1
VDN5
2
VDDA 1
3
AO3401L
1
VS VS
RN199 1 1 RN219
3 2
1
CN254 CN255 CN20C 1 N202 NC/0R

0R CN203 RN232 NC/MMBT2907ALT1 2SA2071
CN204 CN205 CN206
2
3
10u/25V 10u/25V 10u/2150Vu/25V 100n/25V 1M VN2
10u/25V 10u/25V NC/220n/50V RN233
1
RN222 CN207 CN208 CN209

51k
NC/80.6k
CN411 NC/0805/1u/50V
AVDD=1.25*(1+(RN189+RN193)/RN196)=15.728V NC/10u/50V NC/470n/50V
NC/220p/50V
29
27
26
25
24
23
22
28
RN209 10k RN220
RN400 NN3
ENA2
EPAD
GND1
GND1
SW
SW
RN204
DRP
NC/3.48k
ENA1
1M 6.8k VGH=1.25*(1+R298/R302)
1 21
OS FBP RN205 RN210
2 20
AGND FSW 3k 130k
RN225 RN236 3 19
FB DLY1 CN210
0R RN223 CN211 RN200
4.99k 47n/16V
4 18 10.2k
GD COMPB 2.2n/50V
C RN217 CN212 30k C
5 17
COMP FBB
30k 2.2n/50V
CN213 16
AAT16133 SS AVIN VCC-Panel
CBOOT
33n/16V
SWB1
CN214 7 15
SWB
DLY2
DRN
VCC
FBN
VREF VINB RN202
100n/25V CN215 16.9k
100n/25V
10
11
14
13
12
LN7 10.0 uH RN203
VDDD
RN230 CN216 0R
1
10k
100n/25V
1
layout 特别注意 CN217 CN218 CN220 CN221
VDDD1
RN227 VDN6
0u/10V 10u/10V 10u/10V
NC/10n/501V
2
59k CN219 RB160M-30TR
100n/25V
1
CN222
1u/10V VDDD=1.25*(1+RN201/R199)
VN6 VN7
2
2
1 1 RN224
VSS 2DD1664R-13 0R
2DD1664R-13
3
3
RN208
RN228
VSS
1
6.8k
1
0R
B CN223 B
RN237 CN224 470n/25V

1k 4.7u/10V
VGL
1
VN8 VDN7
RN229 2 MMBT23907ALT1 1 2
VGL
1
0R RB160M-30TR
1
1.5k VDN8
CN241 CN240 2 1
2.2u/25V 100n/25V
CN234
RN214 100n/25V RB160M-30TR
120R
1
VDN9
BZT52C10
2
A A
<OrgName>
Title
<Title>

C <Doc> ?
5 4 3 2 1
5 4 3 2 1
j-p0qn5l7dccb0b1a
VDDD
RN252 CN256
0R/0402 120p/50V
CN264
RN298
1u/10V 191k
1 1 CPV STV
VDN10
FBG
D LN8 10.0 uH RN246 D
VCC-Panel 1 2 VGH
3DEN
END
REF
0R
VT
RB160L-90 RN295 CN263 CN259
CN258
100k NC 1u/50V 1u/50V
CN257
1u/25V 1u/25V RN245
34
32
31
FBG
41
40
39
38
37
36
35
33
NN19
NC NC
COMPG
FBG
PGND
REF
3DEN
VT
VST
END
VIN
VCE
G1
RN297
1 Terminate Terminate 1 30 3.48k
Teminate LXG
LC 2 29
2 LC LC PMS VCC-Panel REF
RN296 3 28 RN276 RN273
set3 CN246
RN287 0R/0402 Rotate SET1 VDDA
1u/25V
4 27 set2
NC/16.2k Ratio SET2 4.32k 51k
RN247 RN290
VCOMADJ 5 26 set1 CN262
RN293NC/0R/0402 VcomADJ SET3 4.99k RN292
100n/50V 60.4k
CN260 RN248NC/0R/0402 6 25 120k
AGND SHD
1u/25V
VSS RN250 7 24 END
VSS GOAL VGON VGH VT
RN249 0R/0402 8 23
VSS_XON_L VSS_XON_L XON NC3 CN265 CN267 CN242 CN243
0R/0402 9 22 100n/50V 1u/50V 1u/50V 1u/50V RN240 RN291
VSS STH1 ST_L 8 620k 100k
RN253 RN2890R/0402
VGL VGL 10 21 LC_L1 8
VGOFF LC1
CKH6
CKH5
CKH4
CKH3
CKH2
STH2
CKH1
NC2
0R/0402
NC1
RN2770R/0402
LC2
CN261 RN242
RN241
10u/25V 10K 130k
11
12
13
14
15
16
17
18
19
20
RT8922
VDDD
C C
set1 RN281 10k
0R/0402RN243
0R/0402RN286
0R/0402RN294
0R/0402RN299
0R/0402RN274
RN280 NC/10k
0R/0402RN255
VGL
0R/0402RN244
VDDD
1
set2 RN279 10k
RB160M-30TR
RN278 NC/10k RB160M-30TR
VDN11
VDN12
2
8
HC_L28
8
HC_L1
HC_L38
LC_L2
8
8
HC_L6
HC_L5
HC_L4
2
VDDD
VSS HC_R6 HC_L6
1 HC_R6 HC_L6 1
set3 RN285 NC/10k 1 1
HC_R5 RN315 NC/0R/0402 HC_L5
RN284 10k 1 HC_R5 HC_L5 1
1 1
HC_R4 RN316NC/0R/0402 HC_L4
1 1 HC_R4 HC_L4 1 1
HC_R3 RN317NC/0R/0402 HC_L3
VDDD VDDD 1 HC_R3
1 HC_L3 1 1
HC_R2 RN318 NC/0R/0402 HC_L2
1 1 HC_R2 1
3DEN RN283 NC/10k HC_L2 1
RN282 10k HC_R1 RN319NC/0R/0402 HC_L1
RN251 1 1 HC_R1 1
0R/0402 RN320NC/0R/0402 HC_L1 1
CN266 LC_R2 1 LC_R2 LC_L2
1 1
LC_R1 RN321NC/0R/0402 LC_L2 1 LC_L1
RN275 NC/1k 3DEN 1 1 LC_R1 1
3D_EN RN322NC/0R/0402
2,8 3D_EN 1u/10V LC_L1 1
1 1 CPV STV VSS_XON_R VSS_XON_L
RN323NC/0R/0402
ST_R 1ST_R ST_L 1 ST_L
3DEN
1 1
RN324NC/0R/0402
B B
41
40
39
38
37
36
35
34
33
32
31
VT
COMPG
PGND
REF
FBG
3DEN
NN21
Terminate 1 30
VST
VCE
G1
END
VIN
1 Terminate Teminate LXG

LC 2 29
2 LC LC PMS VCC-Panel
RN303 3 28 RN254 RN257
set3 CN245
RN288 0R/0402 Rotate SET1 VDDA
1u/25V
4 27 set2
0R/0402 Ratio SET2 4.32k 51k
RN258
VCOMADJ RN3010R/0402 5 26 set1 CN253
VcomADJ SET3 4.99k
100n/50V
CN248 RN259NC/0R/0402 6 25
AGND SHD
1u/25V
VSS RN262 7 24
VSS GOAL VGON VGH
RN261 0R/0402 8 23
VSS_XON_R VSS_XON_R XON NC3 CN268 CN249 CN250 CN251
0R/0402 9 22 100n/50V 1u/50V 1u/50V 1u/50V
VSS STH1 ST_R 8
RN264 10 21 RN3000R/0402
VGL VGL VGOFF LC1 LC_R1 8
CKH6
CKH5
CKH4
CKH3
CKH1
STH2
CKH2
NC1
0R/0402
LC2
NC2
RN2670R/0402
CN252
17
18
20
10u/25V
19
11
12
13
14
15
16
RT8922
0R/0402RN270
0R/0402RN266
0R/0402RN269
0R/0402RN302
0R/0402RN304
0R/0402RN271
0R/0402RN265
A A
<OrgName>
8
8
HC_R38
HC_R28
HC_R18
8
LC_R2
HC_R6
HC_R5
HC_R4
Title
<Title>

C <Doc> ?
5 4 3 2 1
5 4
3 2 1

XSN1
55
54
56 53
57 52 CN269 10u/16V XSN3
Layout place Left XSNN4 Layout place Right
58 51
59 50 FN1 MFIO_0 LED_PWM1
60 49 2 MFIO_0 RN313 100R
1 AMLV_5PO 1 HC_L6 HC_L6 7
61 48 VCC-Panel
2 MFIO_1 MFIO_1 RN312 100R LED_PWM2
47 F1206FA3000V032TM 2 AMLV_5NO 2 HC_L5 HC_L5 7
46 MFIO_3 LED_PWM3
2 MFIO_3 RN310 100R
45 3 AMLV_4PO 3 HC_L4 HC_L4 7
44 MFIO_2 LED_PWM4
FN2 2 MFIO_2 RN311 100R
43 RN347 0R BITSEL 4 AMLV_4NO 4 HC_L3 HC_L3 7 LVDS_RE3+ LVDS_RE4+
42 RN345 0R TEST_EN 1 6
GPIO_13 2 I/O1_3 IC2 2 MFIO_4 MFIO_4 RN305 100R LED_PWM5
41 LVDS_RE4+ LVDS_RE4+ 2 5 AMLV_3PO 5 HC_L2 HC_L2 7
40 LVDS_RE4- 2 5
LVDS_RE4- 2 GND VCC MFIO_5 RN314 100R LED_PWM6
39 LVDS_RE3+ 6 AMLV_3NO 6 HC_L1 HC_L1 7 2 MFIO_5
D LVDS_RE3+ 2 LVDS_RE3- 4 LVDS_RE4- D
38 LVDS_RE3- 3
LVDS_RE3- 2 I/O3_2 IC1
37 7 7 LC_L2 LC_L2 7 MFIO_10 RN326 100R 3D_Enable_High
36 LVDS_RECLK+ ESDA6V8UF 2 MFIO_10
LVDS_RECLK+ 2 FN3
35 LVDS_RECLK- + LVDS_RECLK+
34 LVDS_RECLK- 2 8 AMLV_CKPO 8 1 6 MFIO_11 LED_PWM7
I/O1_3 IC2 2 MFIO_11 RN364 100R
33 LVDS_RE2+ LVDS_RE2+ 2
9 AMLV_CKNO 9 2 5
32 LVDS_RE2- LVDS_RE2- 2 GND VCC 2 MFIO_12 MFIO_12 RN309 100R LED_PWM8
31 LVDS_RE1+ LVDS_RE1+ 2 2- LVDS_RECLK-
30 LVDS_RE1- LVDS_RE1- 2 10 10 3 4
I/O3_2 IC1
29 LVDS_RE0+ LVDS_RE0+ 2 ESDA6V8UF
28 LVDS_RE0- 82 GND 11 AMLV_2PO 82 GND 11
LVDS_RE0- 2 FN4
11
27 RN344 0R 3D_LR_FLAG +1 6
81 GND 12 AMLV_2NO 81 GND 12 I/O1_3 IC2 LVDS_RE1+
26 RN346 0R 3D_EN GPIO_5 2,4 1
10 LED_PWM8 PWM8
25 LVDS_RO4+ LVDS_RO4+ 2 3D_EN 2,7 9 LED_PWM7 1 1
24 LVDS_RO4- 7 HC_R1 HC_R1 80 13 AMLV_1PO BMLV_0NO 80 13
LVDS_RO4- 2
23 LVDS_RO3+ LVDS_RO3+ 2 HC_R2 79 14 AMLV_1NO BMLV_0PO 79 14 LVDS_RE0- LVDS_RE1- 7 LED_PWM5 1
7 HC_R2 3 4 1 PWM5
22 LVDS_RO3- VDDD I/O3_2 IC1 6 LED_PWM4
21 LVDS_RO3- 2
HC_R3 78 15 AMLV_0PO BMLV_1NO 78 15 ESDA6V8UF 5 LED_PWM3 1 PWM3
20 LVDS_ROCLK+ 7 HC_R3 1
LVDS_ROCLK+ 2 FN5 4 LED_PWM2
LVDS_ROCLK- 2 7 HC_R4
18 I/O1_3 IC2 2 3D_Enable_High 1 1
16 LVDS_RO2- LVDS_RO2- 2 7 HC_R5 2 5 3D_En_H
GND VCC XSN6
15 LVDS_RO1+ LVDS_RO1+ 2 HC_R6 75 18 GMA1 BMLV_2PO 75 18 LVDS_RO3- 3 LVDS_RO4-
7 HC_R6 GMA1 5 4
12
14 LVDS_RO1- LVDS_RO1- 2 I/O3_2 IC1
13 LVDS_RO0+ LVDS_RO0+ 2 LC_R1 74 19 GMA2 74 19 ESDA6V8UF
7 LC_R1 GMA2 5
12 LVDS_RO0- LVDS_RO0- 2 FN6
11 LC_R2 73 20 GMA3 BMLV_CKNO 73 20 LVDS_RO2+ LVDS_ROCLK+
10 LD_EN 7 LC_R2 GMA3 5 VDDA 1 6
RN354 0R I/O1_3 IC2
9 I2C-SCL-MMS RN342 NC/0R PWM_OUT PWMO 72 21 GMA4 BMLV_CKPO 72 21
PWMO 1 GMA4 5 2 5
8 I2C-SDA-MMS RN343 NC/0R PWM_IN PWMI PWMI 1 GND VCC
5
4
7 RN341 0R LVDS_SEL VSS_XON_R VSS_XON_R 71 22 71 22 LVDS_RO2- 3 4 LVDS_ROCLK- 3 3D_Enable_High
6 nWR 5 I/O3_2 IC1
5 RN358 100R RN353 0R L/R_OUT 70 23 GMA5 BMLV_3NO 70 23
2 LED_PWM1
4 RN340 0R GMA5 5 ESDA6V8UF 1
MEMC ON/OFF MEMC ON/OFF 2
3 RN349 0R I2C-SDA-MS ST_R 69 24 GMA6 24 TP LVDS_RO0+ FN7 LVDS_RO1+
7 ST_R BMLV_3PO
5 69 1 XSN11
2 RN348 0R I2C-SCL-MS GMA6 6
I/O1_3 IC2
1 68 25 GMA7 BMLV_4NO
5 68 25 POL
GMA7 2 5
GND VCC
67 26 GMB1 BMLV_4PO
5 67 26 POLS LVDS_RO0- 4 LVDS_RO1-
C
GMB1 3
I/O3_2 IC1 C
VDDD 66 27 GMB2 BMLV_5NO 66 27 GSEL ESDA6V8UF
GMB2 5
65 28 GMB3 BMLV_5PO 65 28
POLS RN327 10k GMB3 5
64 29 64 29 GMA1
PWM_IN RN331 NC/100R PWM_OUT 63 30 GMB4 GMB14 63 30 GMA2 VCC3.3V VCC3.3V

VCOM GMB4 5
62 31 GMB5 GMB13
5 62 31 GMA3
VDDD GMB5
61 32 GMB12 61 32 GMA4 RN334 RN351
DP_SEL2 RN307 10k 1k 1k
RN306 NC/10k VDDA 60 33 GMB6 60 33 VN9 RN333 LVDS_TYP 2 VN12 RN350 GPIO_0 2,4
GMB6 5
3
100R 100R
3
H 120Hz L 60Hz 59 34 GMB7 GMB11 59 34 GMA5 LVDS_SEL RN335 1k 1 LD_EN RN352 1k 1
GMB7 5 MMBT3904LT1 MMBT3904LT1
I2C-SDA-MMS RN328 0R 58 35 GMA8 GMB10 58 35 GMA6
GA_SDA 2,5 GMA8 5
2
I2C-SCL-MMS RN332 0R 2,5 TP 57 36 GMA9 57 36 GMA7
GA_SCL 1 TP GMA9 5
GSEL1 OL POL 56 37 GMA10 GMB9 56 37 GMB1 VCC3.3V
1 P GMA10 5
1 POLS 55 38 GMB8 55 38 GMB2
1
54 39 GMA11 5GMA14 54 39 GMB3 RN356
1,5 GSEL GMA11 1k
53 40 GMA12 GMA13 53 40 VN13 RN355 MFIO_8 2
GMA12 5
3
100R
52 41 52 41 GMB4 BITSEL RN357 1k 1
5 GMB14
MMBT3904LT1
42 GMA13 42 GMB5
2
GMA13 5
43 GMA14 43
VN10 RN338 GMA14 5
0R/NC
44 GMB8 GMB8 5 44 GMB6
I2C-SCL-MS 3 2 RN336 100R
SCK_Slaver 2 45 GMB9 45 GMB7
GMB9 5
2N7002 46 46 GMA8
1
B 47 GMB10 47 GMA9 M1 M2 B
Add: GMB10 5
VCC3.3V From SOC to FRC(Function control option) 48 GMB11 48 GMA10 1 1
GMB11 5
VN11 RN339 0R/NC 49 49
VCC3.3V M3 M4
I2C-SDA-MS 3 R
2 N337 100R 50 GMB12 GMA11
50
SDA_Slaver 2 GMB12 5 1 1
51 GMB13 GMA12
51
VCC3.3V GMB13 5
2N7002
M5 M6
1
4
5
XSN7 HX0.5x80A HX0.5x80A

RN329 3 1 1
VCC3.3V
NC/2.2k 2
2,4 GPIO_6 Glass_Vsync L/R_OUT 1
RN330
100R
Layout place L
Layout place Right
XSN33 XSN44
62
61
COF 62
61
9
8
7
6
5
4
3
2
1
9
8
7
6
5
4
3
2
1
VSS_XON_L 60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
BMLV_3NO
5 AMLV_CKNO
1LV_CKNO
AMLV_CKPO
1LV_CKPO
1 LV_1NO
1 LV_1PO
1 LV_2NO
1LV_0NO
8 AMLV_0NO
6 AMLV_1NO
AMLV_3N R1PN12 8 AMLV_3NO
6 AMLV_4NO
8 AMLV_5NO
BMLV_5NO
7 AMLV_0PO
7 AMLV_2PO
AMLV_3PO
5 AMLV_4PO
7 AMLV_5PO
1LV_0PO
BMLV_5PO
BMLV_4NO
BMLV_4PO
1 LV_2PO
BMLV_3PO
DP_SEL2
DP_SEL2
HC_L6
HC_L5
HC_L4
HC_L3
HC_L2
HC_L1
LC_L2
VSS_XON_L
LC_L1
TP POL
GMA10
GMA13
GMA12
GMA11
GMA10
GMA9
GMA14
GMA13
GMA12
GMA11
AMLV_2NO
AMLV_1PO
GMA8
GMA7
GMA6
GMA5
GMA4
GMA3
GMA2
GMA1
GMA1
GMA9
GMA8
GMA7
GMA6
GMA5
GMA4
GMA3
GMA2
POL
71 BM
8 1 BM
61 BM
GMA14
BM
RPN14 0R 1 BM
HC_L1
HC_L2
HC_L3
HC_L4
HC_L5
HC_L6
7 LC_L2
0R 8 BM
7 BM
51 BM
7 LC_L1
VDDA
TP
VSS_XON_L
0R
0R
1
1
5
8
6
5
6
5
5
7
8
0RRPN11
R PN16 0R
RPN13 0R
A A
VCOM
M
VDDD
ST_7L
ST_L
VDD7D
VDDA
VCO7
7
VSS_XON_L 7
0N0P1N1P2N2P CKCNKP
HC_L17
7
7
7
7
7
7
7
HC_L1
HC_L2
HC_L3
HC_L4
HC_L5
HC_L6
LC_L2
LC_L1
LC_L2
HC_L6
HC_L5
HC_L4
HC_L3
HC_L2
RPN15
1
RPN10
AMLV_CKN3
AMLV_CKP4
AMLV_0P 2
AMLV_1N 3
AMLV_1P 4
AMLV_2N 1
AMLV_2P 2
BMLV_0N 3
BMLV_1P 2
1
BMLV_CKP2
3
4
AMLV_0N 1
AMLV_3P 2
AMLV_4N 3
AMLV_4P 4
AMLV_5N 1
AMLV_5P 2
BMLV_0P 4
BMLV_1N 1
BMLV_2N 3
BMLV_2P 4
BMLV_3N 3
BMLV_3P 4
2
1
BMLV_CKN
LC_L1
BMLV_5N
BMLV_5P
BMLV_4P
BMLV_4N
AMLV_CKN
AMLV_1P
AMLV_2P
BMLV_3P
BMLV_4P
BMLV_5P
AMLV_2N
AMLV_3P
AMLV_4P
AMLV_5P
1
1
1
1
1
AMLV_3N
AMLV_4N
AMLV_5N
BMLV_3N
BMLV_4N
BMLV_5N
AMLV_CKP
1
1
1
1
1
1
1
1
1
1
1
1
1
BMLV_1N
BMLV_2N
BMLV_CKN
BMLV_CKP
BMLV_1P
BMLV_2P
AMLV_1N
AMLV_0P
BMLV_0P
AMLV_0N
BMLV_0N
1
1
1
1
<OrgName>
Title
<Title>

A2 <Doc> ?
5 4 3 2 1
10
Buyer:JoseTavarez 9 8 7 6 ID: j-p0qn5l7dccb0b1a
5
Castillo(jk011831@gmail.com)Transaction
4 3 2 1
Himax Solution
D
D
Panel Type: VA_IPS-alpha 315

Resolution: 1366*768
Scan direction:
Dummy Channel:
Tcon: HX6710 _Single in/Dual out_ SD1 SD3 SD4 SD6
C C
SD: COF_HX8031-N42_684CH*6_
GD: COF_HX8651-FCU29 _256CH*3_
GD1
PWM: TPS65161
P-OP: HX5200
VIN: 12V
VDDD: 3.3V
B B
VDDA: 12.5V
GD3
VDDD_TCON: 3.3V
VDDA_TCON: 3.3V
VDDP_TCON: 3.3V
VDDM_TCON: 3.3V
VGH: 23V
VGL: -8V
A VCOM: 6V A
Vref: 12.4V
Τ春筿そ
Title
Hisense IPS-alpha T-con board_V1.0_100428
DWG NO <OrgName> DATE
Size Checked Designer Drawer Rev SHEET

1
A1 <OrgAddr1> < OrgAddr2> <OrgAddr3> < RevCode>
6
" Himax" COP Y RIG H T 2001 , ALL RIGHTS RE SE RE V D, COP Y ING FORB IDDE N
10 9 8 7 6 5 4 3 2 1
5
Buyer:JoseTavarez 4
Castillo(jk011831@gmail.com)Transaction 3
ID: j-p0qn5l7dccb0b1a Buyer: Jose Tavarez Castillo (jk011831@gmail.com) 2 1
D Distance of the both test pad center is 2.00mm D

GND
XP1
Screw holes
31
1 XP4 VCCI
3 CPV CPV 2
3 2 PP2 STV
3 STV 3 5 GM1 GM1
4 3 1
R5 VDDD 4 5 GM2 GM2 2
5 4 VDDD
6 5 GND 1 GND VGH 5 5 GM3 GM3 3
1 VGH VGL 6 GM4 4
7 6 VGL 5 GM4
7 VCOM 7 5 GM5 GM5 5
8 0603/0R/5% VCOM GM1 GM6
8 6
9 8 5 GM1 GM2 9 5 GM6 GM7 7
9 R24 0402/0R/5% S_SCL Screw Hole 5 GM2 GM3 5 GM7 POL_OUT
10 10 8
10 R23 0402/0R/5% S_SDA S_SCL 3 5 GM3 3 POL_OUT
11
12 11 GND S_SDA 3 Ellipse 5 GM4 GM4 11 3 TP1 TP1 9
RX0N 5 GM5 GM5 12 3 STV STV 10
13 12 PP3 GM6
RX0P RX0N 3 5 GM6 13 11
14 13 RX0P 3 GM7 14 BLV0P 12
15 14 GND R4 5 GM7 POL_OUT 15 3 BLV0P BLV0N 13
16 15 RX1N 1 GND 3 POL_OUT TP1 16 3 BLV0N 14
RX1P RX1N 3 1 3 TP1
17 16
GND RX1P 3 0603/0R/5% 3 BLV1P BLV1P 15
18 17 PWMI 17
RX2N 3 FLV0P FLV0P 3 BLV1N BLV1N 16
19 18 RX2N 3 Screw Hole 18
RX2P Test Pad 3 FLV0N FLV0N 17
20 19 19 BLV2P 18
GND RX2P 3
21 20 Circle 20 3 BLV2P BLV2N 19
1
22 21 RXCLKN PWMO 21 3 BLV2N 20
RXCLKN 3
1
23 22 RXCLKP Test Pad 3 FLV1P FLV1P 22 BCLKP 21
PP4
1
GND RXCLKP 3 FLV1N 3 BCLKP BCLKN 22
24 23 3 FLV1N 23
1
25 24 RX3N R2 24 3 BCLKN 23
RX3N 3 GND 24
26 25 RX3P 1 25
RX3P 3 1
27 26 GND 3 FLV2P FLV2P 26
28 27 R13 0402/0R/5% 0603/0R/5% 3 FLV2N FLV2N 27 25
R12 0402/0R/5% PWM_I 3 VDDD
29 28 PWM_O Screw Hole 28 26
3
30 29 29 27
32 3 FCLKN FCLKN 31 5 GM8 GM8 29

R243 GM9
32 5 GM9 30
32
PWM_I PP5 R230 33 5 GM10 GM10 31

VCOM
34
33
C GND 4.7k 1 1
R3
GND VCOMS
VREF
VCOMS
VREF
0402/0R/5%
0402/0R/5%
34
35
5
5
5
GM11
GM12
GM11
GM12
GM13
32
33 C
1
36 GM13 34
0603/0R/5% R234 VDDD 37 5 GM14 GM14 35
1
N14 Screw Hole 38 VDDA 36
RX0N GM8 39
VCOM
1 5 GM8 37
I/O1_3 IC2 6 Circle 5 GM9
GM9
GM10
40 38
41 VCOM 39
2 5 5 GM10 GM11 42
GND VCC 5 GM11 40
RX0P GM12 43
3 4 5 GM12 GM13 44
I/O3_2 IC1 GM14 45
41
42
5 GM13
ESDA6V8UF 5 GM14 46
VDDA 47
VDDA 48
49
VCOM 50
N12
RX1N RX2N
1 I/O1_3 IC2 6
XP2
51
52
2 5
GND VCC LVDS Test pad XR
RX1P RX2P
RX0N
XL
Test Pad ESDA6V8UF RX0N
VIN12V 1
1
1
Test Pad
N13
1
VIN12V RX0P
VCCI F1 RXCLKN 1 6 RX3N
I/O1_3 IC2 RX0P 1
1
1
1
3216FF/1206/3A 2 5
C3 GND VCC Test Pad
C1 C2
RXCLKP RX3P
Distance of the both test pad center is 2.0mm
2
0603/100n/25V/X5R 3 I/O3_2 IC1 4 RX1N

RX1N
ESDA6V8UF 1 1
1206/22u/16V/X5R Test Pad
1206/22u/16V/X5R RX1P
GND
RX1P 1 SCL SDA GND3
1
XP5
Test Pad
1
1 S_SDA R29 0402/0R/5% M_SDA M_SDA
RX2N
S_SCL M_SCL 3
S_SCL 1
S_SDA 1
1
2 R28 0402/0R/5% M_SCL RX2N
1
B 3 R30 0402/0R/5% WP
WP
3
3
1
B
GND
4 Test Pad
5 GMI2C_SCL GMI2C_SCL5
6 GMI2C_SDA RX2P
7 GMI2C_SDA5
RX2P 1
8 1
9 Test Pad
RXCLKN
RXCLKN
11
10
1
1
WP Test Pad
WP 3 RXCLKP
RXCLKP 1
1
Test Pad
RX3N
RX3N
1
1
Test Pad
春筿 Τ そ
RX3P
Title
RX3P 1 HE315DH-B11
1
Test Pad DWG NO <OrgName> DATE
2010.9.13
2
A2 D
6
"Himax" COPYRIGHT 2000 , ALL RIGHTS RESEREVD, COPYING FORBIDDEN
A A
5 4 3 2 1
5 4 3 2 1
Buyer:JoseTavarez Castillo(jk011831@gmail.com)Transaction ID: j-p0qn5l7dccb0b1a Transaction ID: j-p0qn5l7dccb0b1a
GMI2C_SCL 5
GMI2C_SDA 5
T33V
LVDS terminator, close to TCON
PWM_I 2
PWM_O 2
T33V
BCLKP BCLKP 2
BLV2N 2
BLV2P 2
BCLKN 2
R7
RX0P RX0N
C78
T18V
T33V
XTAL_O
T18V
XTAL_I
0402/100nF/16V/X5R
OD_CTL
PWM_O
GMI2C_SDA
0402/100R/1%
M_SDA
GMI2C_SCL
M_SCL
PWM_I
R141
BLV2N
BLV2P
NC/0402/4.7K/5%
BCLKN
R8 N8
D RX1P RX1N 1 8 D
A0 VCC WP
2 A1 WP 7
0402/100R/1% 3 6
4 A2 SCL 5
R9 Vss SDA R74
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
N7 RX2P RX2N 24LC256-I/SNAT24C256N 0402/51K/5%
0402/100R/1%
I2C1_SCL
GMI2C_SCL
VCCIO33
XTAL_I
XTAL_O
DPWM_I
I2C1_SDA
GMI2C_SDA
VDD_PLL
OC_CTL
VDD18
DPWM_O
RSB2N
RSB1N
RSB2P
RSB1P
R18 0603/13K/1% R11
TST_PGM 1 48 PI
RESET TEST PI RX3P RX3N
T33V
2 S_SCL S_SCL EE_SCL R15 0402/0R/5%
M_SCL
2 47 T18V M_SCL
2 S_SDA S_SDA 3
HWRSTN AVDD3V_LV
46
0402/100R/1% 3
RX0N I2C2_SCL PVDD_LV/VDDD_LV18 BLV1N
4 45 R14 0402/0R/5%
RX0P I2C2_SDA A/VSSD_LV/PVSS_LV BLV1P R10 EE_SDA M_SDA
2 RX0N RX1N 5 LV0N RSB0N 44 BLV0N BLV1N 2 M_SDA
RXCLKP RXCLKN 3
2 RX0P RX1P 6 LV0P RSB0P 43 BLV0P BLV1P 2
2 RX1N RX2N 7 42 FCLKN BLV0N 2 R76
LV1N RSG2N 0402/100R/1% T33V
2 RX1P 8
9 41
40 BLV0P 2
2 RX2N LV1P
LV2N RSG2P
RSG1N FCLKN 2 0402/4.7K/5%
2 RX2P RX2P 10 39 FCLKP FCLKP 2 R75
LV2P RSG1P FLV2N
2 RXCLKN RXCLKN 11 LVCLKN
EVEN_FRAME/FSTH
RSG0N 38 FLV2N 2 0402/4.7K/5%
2 RXCLKP RXCLKP 12 LVCLKP RSG0P 37 FLV2P
FLV2P 2
RX3N 13 36 FLV1N WP
2 RX3N LV3N RSCLKN FLV1N 2
RX3P 14 35 FLV1P WP 3
2 RX3P LV3P RSCLKP FLV1P 2
15 34 FLV0N
VSSIO/VSS
16 VSSPHX/VSSLHX RSR2N 33 FLV0P FLV0N 2

HX6710 Crystal
PWR_ON
VDDLHX33 RSR2P
VCCIO33
T33V FLV0P 2
GVOFF
RSR0N
RSR1N
RSR0P
RSR1P
VDD18
EE_SCL1 EE_WP1
AGEN
CPV
POL
STV
WP
OE
EE_SCL 1 1
TP
C7 1 1
C HX6710-B00MLAG 0402/1M3/5% XTAL_O Test Pad Test Pad C
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
EE_SDA1 GND2
2
0402/22pF/50V/X5R
Z2 EE_SDA GND
R27 JAS14C
FSTH
C6 Test Pad Test Pad

FSTH1
1
XTAL_I
T18V
T33V
TST_AGE
VDDD1
TGVOFF
1 1
0402/22pF/50V/X5R T33V 1
TCPV
TTP1
1
TOE
POL
STV
Test Pad Test Pad
Distance of the both test pad center is 2.0mm
TCON option function Close to TCON

HX6710 Power & Decoupling _close to each pin_
T33V T33V T33V T33V T33V T33V T33V T33V T33V T33V
V33V_TCON
PIN54 PIN47 PIN23 PIN16
R63 R71 R77
1
B 0402/4.7K/5% B
R22 R17 R20 R66 R69 0402/4.7K/5% 0402/4.7 K/5%
/5%
C13 C12 C54 C56 0603/4.7K/5%
0402/100n/6.3V/X5R 0402/100n/6.3V/X5R 0402/100n/6.3V/X5R0402/100n/6.3V/X5R NC/0402/4.7K/5% NC/0402/4.7K/5% NC/0402/4.7K/5%
2
OD_CTL TST_AGE TST_PGM POL CPV PWM_I GMI2C_SCL GMI2C_S DA RESET
NC/0603/1u/6.3V/X5R
V18V
R21 R73 C11
T18V R68 R70 R72
PIN53 PIN46 PIN21 PIN62 0402/4.7K/5% 0402/4.7K/5% 0402/4.7K/5% 0603/1u/16V/X5R
L7 BLM18PG121SN1 NC/0402/4.7K/5% NC/0402/4.7K/5%
C77 C19 C20 C53

0402/100n/6.3V/X5R0402/100n/6.3V/X5R 0402/100n/6.3V/X5R 0603/1u/6.3V/X5R
Control signal & test pad _Close to TCON_

N9 V18V N11
T33V 1 VDD VSS 8 TP STV
VDDD VDD3D VIN VOUT 4 V18V
Test Pad Test Pad
R235 100R
2 C74 2 7
VOUT 2 TP1 CLKIN ICSPDAT
ADJ
C5
1
R32 0402/22R/5%
R32
1
1
0805/10u/6.3V/X5R0402/100n/6.3V/X5R R236 100R R238 100R TTP1
T33V 2 TP1 2 STV
1
2 POL 3 CLKOUT ICSPCLK 6 POL_OU2T POL CPV

LD1117A-1.8AZ1117H-1.8 R237 100R R240 4.7k Test Pad Test Pad
A A
4 5
2 STV VPP COUT
春筿 Τ そ
1
1
R35 0402/22R/5%
PIC12F609-I R241 TCPV
2 POL 2 CPV
1
1
4.7k Title
VGH_CTL OE HE315DH-B11
STV
3
R242 NC/4.7k 1 C80 DWG NO <D<oO

c>rgName> DATE 2010.9.13
VD8
1
1
0402/22R/5% R213 0402/22R/5%
POL POL_OUT
2
R214
1
MMBT3904LT1 0402/100n/6.3V/X5R TGVOFF TOE Size Checked Designer Drawer Rev SHEET
4 VGH_CTL
1
3
A3 D
6
5 4 3 2 1
10
Buyer:JoseTavarez 9 8 7
Castillo(jk011831@gmail.com)Transaction6 ID: j-p0qn5l7dccb0b1a
5 Buyer: Jose Tavarez Castillo (jk011831@gmail.com)
4 3 2 1
R38
2 1
PWM POWER NC/0805/0R/5%
VDDA1
Test Pad VDDA
VIN12V
1
R39 L4 LTRH6D28-100 VD1 VD2 AO3401L
13.5V
1
VIN12V +12V 1 2 VFB 2 3 R40
VFB2 VDDA
1206/0R/5% B340 C25 C32
C22 C23 C24 R41 C26 C27 0805/0R/5%
R42 0603/100n/25V/X5R
0805/10u/16V/X5R 0603/100n/25V/X5R 0402/0R/5% 0805/10u/16V/X5R 0805/10u/16V/X5R C28 C29
0805/10u/16V/X5R 0603/47K/5% 0805/1u/16V/X5R C30
D 0805/10u/16V/X5R
0805/10u/16V/X5R
D
1
0603/100n/25V/X5R R43
0603/100K/5%
2
R44
C31 0402/750K/1%
0402/22p/50V/X7R VDDA=1.146*(1+R44/(R46+R47))
1
R45
0603/100K/5%
2
R46
0402/68K/1%
GD
R47 0402/750/1%
2 1
1
R48 0402/0R/5% C34 0402/22n/25V/X7R
C33 0402/22n/25V/X7R N3
1 SS 28 C35 0402/22n/25V/X7R
C145 0603/470n/25V/X7R 2 FB 27 GD
COMP GD
VFB
2 1 3 26 C36 0402/10n/25V/X5R
SW 4 OS DLY2 25
5 SW1 DLY1 24 REF
SW2 REF
GND 6 23 GND
PGND GND C37 0603/1u/16V/X5R
C38 0805/1u/50V/X7R 7 PGND AVIN 22 +12V
+12V 8 21 +12V
1
SUP VINB
9 EN2 VINB 20
+12V R49 0402/0R/5% 10 DRP NC 19
C65 2 1 11 18
NC/0603/470n/25V/X7R DRN SWB
BAV99LT1
2
C39 0402/100n/25V/X5R 12 17 C40 C41
2NC/0402/0R1/5% 2 FREQ BOOT
13 16
14 FBN EN1 0805/10u/16V/X5R 0805/10u/16V/X5R
15
GND
VGHP 3 FBP FBB
R59 1
Test Pad 31V
VGHP VD7 BD8160
VD3
29
1
R60 0402/0R/5% VFB2 1 C42 0603/470n/25V/X7R

C
1
3 2 1 V33V1
2
3.3V
C C44
C43 0603/470n/25V/X7R Test Pad
2
BAV99LT1 2 1 V33V
1
1206/10u/25V R50
0402/825K/1% C79
1
C66 0805/1u/50V/X5R +12V C45 L5 LTRH6D28-100 R51 R52 0603/0R/5%
1206/10u/25V FBP V33V V33V_TCON
2 1
R53 R54 FBN 0402/100n/16V/X7R 0805/0R/5%

R56
2
0402/0R/5% +12V C46 C47 C48 R57 0603/0R/5%
2
0402/33K/1% VD4 VDDD VDDD
R55 0603/47K/5%
FBP 0805/10u/10V/X5R 0805/10u/10V/X5R
2
B340 0805/10u/10V/X5R
C49 0402/0R/1%
VGHP=1.213*(1+R50/(R53+R58))
1
1
2
1
-5.76 V R58
0402/1.5K/1%
R228
NC/0402/1K/5%
VGL
VGL 0402/100n/25V/X5R
1
Test Pad
C50
1
R219 0402/10n/25V/X7R
BAV99LT1
1
R217 0603/0R/5% 0402/2.2K/1%

GND 2
3
V33V=1.213*(1+R219/(R220+R221))
2
R227 0603/0R/5% R220
1
0402/1.16K/1%
2
VD5
2
R231
C51 C52 C143 R216 0402/560K/1%
21
NC/0603/220n/25V/X5R 0805/10u/16V/X5R 0805/10u/16V/X5R 0603/47K/5% R221
1
FBN
0402/51R/1%
2 1
CLOSE to SD1 R232
1
0402/110K/1%
1
B VGL=-1.213*(R231/(R232+R218)) R218
0402/1.5K/1%
B
REF
2
C140
0603/220n/25V/X5R
1
VGH 3-State
VGH VGHP
R223
_High active_ VGH
NC/0402/0R/5% N4 VGH
1 1
R225 0603/0R/5% 1 8 VGH_CTL
2 VGH VFLK 7 GND VGH_CTL 3 Test Pad
R224 0603/0R/5% VGHM GND
3 DRN NC2 6 R233
4 5
EP
NC1 THR VDDD

VDDD
HA5402P
1
0603/16.2K/1%
9
R229 R226 R222

0805/2K/1% 0805/2K/1% C142 0603/32.4K/1%
C141
0805/1u/50V/X5R
1 2
0805/1u/50V/X5R
A R215
0603/20.5K/1%
A
2
春筿 Τ そ
Title HE315DH-B11
DWG NO <OrgName> DATE

4
Custom D
6
10 9 8 7 6 5 4 3 2 1
5
Buyer:JoseTavarez 4
Castillo(jk011831@gmail.com)Transaction 3
ID: j-p0qn5l7dccb0b1a Buyer: Jose Tavarez Castillo (jk011831@gmail.com)
2 1
HX5200 Power EXT-GAMMA VOLTAGE _ Gamma

PROGRAMMING GAMMA PIN9 PIN9 PIN20 PIN20
GM1
VREF
VREF
G8
G7
G6
G5
G4
1
2 GM1 1 11.95 R165 R158
1
G1 G8
C124 GM2 2 GM8 2
GND
C125 C115 C126 GM1
D 2 GM2 1
10.58 0603/5R1/5% 0603/5R1/5%
D
2
0402/100nF/16V/X5R 1
2
0402/100nF/16V/X5R
N1
18
17
16
15
21
20
19
HX5200-A03BDCG GM3
1206/22u/16V/X5R 1
9.28
AVDD
GMA8
GMA7
GMA6
GMA5
GMA4
2 GM3 1
AGND
1206/22u/16V/X5R R150 R148
G2 G9
GM4 2 GM9 2
GM2
G9 G3 VDDD 0603/5R1/5% 0603/5R1/5%
22
GMA9 GMA3
14 VDDD 2 GM4 1
1 8.64
G10 23 13 G2
GMA10 GMA2 GM5
C123
C122
G11 24
GMA11 GMA1
12 G1
0805/10u/6.3V/X5R 0402/100n/6.3V/X5R 2 GM5 1
1 8.10 R166 R145
P-GAMMA
HX5200
G12 25 11 GND G3 G10

GMA12 AGND GM6 2 GM10 2
GM3
G13 VREF 0603/5R1/5% 0603/5R1/5%
26
GMA13 AVDD
10 2 GM6 1
1 6.317
G14 9 VREF
27 AVDD_AMP GM7
GMA14 R79
TG1 8 VCOM
AGND_AMP
28
GMA15 VCOM_FB 2 GM7 1
1 6.317 R172 R168
NC/0603/5R1/5% G4 G11
VREF
GMA16
VCOM
GM8 GM11 2
DVDD
GND 29 GM4 2
SDA
SCL
EP_GND
0603/5R1/5% 0603/5R1/5%
13.5V 12.4 4.5
A0
2 GM8 1
1
VDDA VREF
5
7
1
VREF GM9
2 GM9 1
1 3.946
C R78
R103
G5
R175
G12
R160
GM12 2
C
0805/68R/5% GM10 2
VDDD
GM5
SCL
SDA
TG1
TG2
TG1 0402/0R/5% 0603/5R1/5% 0603/5R1/5%

1 1 2 GM10 1
3.29
A0
VREF 1
VREF1 1
TG2 1 GM11
TG2 1 1
R104
SCL R100 0402/0R/5% R88 0402/0R/5%
2 GM11 1
1 1.978 R157 R174
GMI2C_SCL 3 0603/8.2K/1% C57 G6 G13
GM12 2 GM13 2
0805/10u/25V/X5R GM6
1
SDA R101 0402/0R/5%
GMI2C_SDA 3
2 VD6
2 GM12 1
1 0.573 0603/5R1/5% 0603/5R1/5%
GM13
TL431BCDBZR
2 GM13 1
1
3
VREF=2.495*(1+R88/(R94+R100))
R94 R163 R164
GM14 G7 G14
0603/2.05K/1%
GM14 2
Reset IC for XAO function 2 GM14 1
1 0603/5R1/5%
GM7 2
0603/5R1/5%
R147 R102
VDDD XAO 0603/19R1/1%
XAO
0402/10k/5%
GAMMA Decoupling C
B B
GM1 GM2 GM3 GM4 GM5 GM6 GM7
VDDA
VCOM Voltage
C59 C60 C61 C62 C63 C64 C72
R117
VREF 0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R
0603/0R/5%
R116 VOP
0603/8.66K/1% GM8 GM9 GM10 GM11 GM12 GM13 GM14
C58
0603/100n/25V/X5R
C67 C68 C69 C70 C71 C73 C75

2
0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R 0402/100nF/16V/X5R

VR1
VCOMS R128 0402/10R/5%
NC/2k 3
VCOMS
HX5200 Setting N10
RANGE=4.77~6.3V 1 8 VOP
1
VDDD VDDD OUTA VDD VCOM

R126
2 7 VCOM
INNA OUTB
R118 VCOMS 0402/10R/5%
R25 R26 0603/6.8K/1%
GND 4 5 VCOMS 0805/10u/10V/X5R G_SCL1 G_SDA1 GND5
0402/4.7K/5% 0402/4.7K/5% VSS INPB
A A
1
1
HX8902-C02AMAG
SCL SDA A0
春筿そ
1
1
Τ
GMI2C_SDA
GMI2C_SCL
R31 GND HE315DH-B11

0402/0R/5% DATE
DWG NO <OrgName>
2010.9.13
5
Custom D
Distance of the both test pad center is 2.0mm 6
5 4 3 2 1
1 2 3 4
CN3 CON43 CON42

TCON CON51 FFC_60PIN FFC_60PIN RNF37 22x4
Connector62 BLVN0 1 2
BL0P
SHIELD BLVP0 3 4 BL0N
1
Bank2_ Sel 60
61 VSS_XON 60
61
BLVN1 5 6 BL1P
1 POL_TCON0 2 FL0P
POL ~ TCON0 59 59 BLVP1 7
RNF34 22x4 8
BL1N
A STB_TCON5 FL0N A
STB ~ TCON5 58
LC2 58 R BLVN2 1 2
BL2P
1 3
VST_TCON1 TCON1
FL1P
VST ~ 57
LC1 3 4
1 4
1
VCE_TCON3 5
FL1N 57 BLVP2 BL2N
VCE ~ TCON3 56 56 BLVCKN 5 6
BLCKP
TERM~INATE
1
TERMINATE_TCON8 6
TCON8 FL2P 55
HC6 55 BLVCKP 7 8 BLCKN
LC ~
1 LC_TCON7 7
TCON7
FL2N 54
HC5 54
1
3D_EN 8
TCON2 HC4
3D_E~
N 53 53
9
TCON4 CLCKP 52
HC3 52 FLVN0 1
RNF39 22x4 2 FL0P
BANK~_SEL_B
1
BANK_SEL_B 10 Bank1_Sel CLCKN HC2
1
SCL 11
51
HC1
51 FLVP0 3 4
FL0N
SCL ~ SCL 50 50 FLVN1 5 6
FL1P
SDA ~
1
SDA 12
SDA ST1 49
49
1
nWR WP FLVP1
13 RNF38
7
22x4
8
FL1N L
nWR~
14
WP 48 48 FLVN2 1 2
FL2P
LOCK6 47 47 FLVP2 3 4
FL2N
ROTATE
ROTATE
ROTA 46
VCC 5 6
1 15
~ 46 FLVCKN CLCKP
16
GPIO 45
VCC 45 FLVCKP 7 8 CLCKN
17
B GPIO 44 44
B
18
19 GND 43
VCOM 43
GND 42 42
VGMA14
C23 100nF/50V
20 GND
1
STB_TCON5
GMA14~ 41 41
LVSYNC
BLVN0 21
RV0N GMA13~
1 VGMA13 40 POL_TCON0 40
1
1 3
3
BLVP0 22
RV0P
1 VGMA12 DP_sel
LHSYNC GMA12~ 39 39
BLVN1 23
RV1N
1 VGMA11
LDE GMA11~ 38 AVDD 38
BLVP1 24
RV1P
1 VGMA10
LCK GMA10~ 37 37
R7_RXO0-_LV-
BLVN2 25
RV2N GMA9 ~
1 VGMA9 36 36
2
2 4
4
R6_RXO0+_LV+
BLVP2 26
RV2P GMA8 ~
1 VGMA8 35 35
27
GND
1 VGMA7
GMA7 ~ 34 34
BLVCKN 28
RVCKN
1 VGMA6 VGMA14
R5_RXO1-_LV- GMA6 ~ 33 33
H5 HOLE
R4_RXO1+_LV+
BLVCKP 29
RVCKP GMA5 ~
1 VGMA5 32 VGMA13 32
30 GND
1 VGMA4 VGMA12
GMA4 ~ 31 31
BLVN3 31
RV3N 1 VGMA3 VGMA11
R3_RXO2-_LV-
BLVP3
GMA3 ~
VGMA2
30 XL 30 XR
R2_RXO2+_LV+ RV3P GMA2 ~ 29
VGMA10
32
C24
1 1 3
29 1 3
BLVN4 33
RV4N
1 VGMA1 VGMA9
C R1_RXOC-_LV- GMA1 ~ 28 28 C
BLVP4 34
RV4P AVDD VGMA8
R0_RXOC+_LV+ 27 27
BLVN5 35
RV5N VGMA7
G7_RXO3-_LV- 26 26
BLVP5 36
RV5P VGMA6 2 4
G6_RXO3+_LV+ 25 25 2 4
FLVN0 37
LV0N VGMA5
G5_RXO4-_LV- 24 24
FLVP0 38
LV0P VGMA4
G4_RXO4+_LV+ 23 23
FLVN1 39
LV1N DP_sel
1 DP_sel VGMA3
G3_RXE0-_LV- ~ 22 22
H6 HOLE
G2_RXE0+_LV+
FLVP1 40 LV1P POL_TCON0 21 VGMA2 21
G1_RXE1-_LV-
FLVN2 41
LV2N STB_TCON5 20 VGMA1
FLVP2 42 20
G0_RXE1+_LV+ LV2P 19 19
43
GND
1 VCOM 1 3
VCOM ~ 18 18 1 3
FLVCKN 44
LVCKN BL0P
B7_RXE2-_LV- 17 17
FLVCKP 45
LVCKP VCC BL0N
B6_RXE2+_LV+ 16 16
46
GND VCC 15 BL1P 15
FLVN3 47
LV3N BL1N 2 4
B5_RXEC-_LV- 14 14 2 4
B 4_RXEC+_LV+
FLVP3 48
LV3P 13 BL2P
D B3_RXE3-_LV-
FLVN4 49
LV4N ST1 ~
1 ST1 12 BL2N
13
12 D
FLVP4 50 LV4P 1 HC1
B2_RXE3+_LV+ HC1 ~ 11 11 H7 HOLE
FLVN5 HC2
B1_RXE4-_LV- LV5N HC2 ~ 10 BLCKP 10
LVP5
51
1
F 1 HC3
BLCKN
52
B0_RXE4+_LV+ LV5P HC3 ~ 9
9
1 53
GND 1 HC4 2 3 4
HC4 ~ 8 8
1 54
GND 1 HC5 1 1 3
TP171 ~
1 55
HC5 ~
HC6
7
TP167 ~
1
7 1 3
TP170 ~ GND HC6 ~

1
6
TP151 ~ 6
56
NC 5
12V_PANEL 57
1 LC1
5
1 2 3 4
A A
AVDD AVDD
L18 VS TP (+15.77V@1.2A)
12V_PANEL NR6045T100M D70 (+16V) Q8
22uF/25V
22uF/25V
22uF/25V
22uF/25V
22uF/25V
22uF/25V
22uF/25V
AO3407
220nF/25V
L-22UH
10uF/16V
10uF/16V
10uF/16V
1N5822 SOT23
0.1uF
C3216
C3216
C3216
C3216
C3216
R739
NC
DO-214AA
330K
R697
R698
C3216
C78
C79
C73
C74
C75
C76
C77
C94 NC
0
C42
C44
C37
C72
C1
R704 R700 VS
330K NC
0.1uF
25
24
23
22
28
27
26
39K 1%
R699
PGND_2
PGND_1
GD
SW_2
SW_1
VIN_2
VIN_1
29
PGND
C40
B C32 1uF/16V 1 21 B
VL CTRLP
3.3K 1%
C33 0.1uF
R701
2 20 R741 VCC
VCC VCC BOOT FBP
L17
TP 10K
NR6045T100M L1
(+3.3V@1A)
22uF/6.3V
22uF/6.3V
3 19
SWB FB
1N5822
L-22UH
0.1uF
R732
NC
R733 U8 R738 C92

4 18 2.2nF
R736
5.1K
1uF/50V
DO-214AA
CTRLN RT9990 COMP

C86 NC
0 47K
C36
C35
C34
R734
100K
GND
D69
QFN50P500X500X80-29
5 FBN SS 17 C91 0.1uF C93 10pF
主题：创维5800-TCON6-0P10 TCON板之电源管理电路
C81
VGL VGL VGL=-(VCC-Vfbn)R726/R731+FBN

6
FBB
绘制：袁亚文 CRST
16 C90 0.1uF
TP FBN=0 日期：2014年8 月6日
D8
10uF/16V
C (-9.39V@0.12A) 7 15 C89 0.1uF C

RST DLY VGOALVgoal
AGND
0.1uF
1N5819
TP
NC_3
NC_4
NC_5
NC_6
NC_1
NC_2
1N4448HWS
Q6
D9
1N5819 Vg oal
R742
VGL NC/FMMT3906
3.6K
1N4448HWS
NC
5.6K 1%
C84
C83
10
11
12
13
14
SOT23
R726
9
R737
5.1K
NC/1uF
SOT23
R174 R779
C85
C82
R740
200
R0402
NC
1uF/16V
1uF/16V
0
Q9 Q7 R0603
C55 0.1uF
R176
1uF/6.3V
VCC
0
R735 R731
C0603
BZX284C6V2D
FMMT3904/PZT3904
SOD-80
10 2K 1%
NC
C52
C51
FMMT3904/PZT3904
ZD2
VCC
C88
C87
D D
1 2 3 4
1 2 3 4
A A
R281VS_BUFFER R259 10R R0402

Panel_VDD=16V VS_BUFFER VS_BUFFER GMA14 VGMA14
R771 100K 1% R260 10R
L36 GMA13 R0402
VGMA13
0.10uF/50V
VS_BUFFER VCOM_A
0.1uF/50V
22uF/50V
100K 1%
FB/60R/3A 10K 1% R261 10R
GMA12 R0402
VGMA12
R280
GMA11 R262 10R R0402
VGMA11
C496
C462
C463
GMA10 R263 10R R0402
VGMA10
32 31 30 29 28 27 26 25 33
GMA9 R265 10R VGMA9
VCOM_OUT
R0402
VCOM_ADJ
VCOM_FB
AVDD
AVDD
AGND
SET
AGND
EPAD
GMA8 R266 10R R0402 VGMA8
GMA1 1 24 GMA14
OUT1 OUT14 GMA7 R268 10R R0402 VGMA7
B GMA2 2 23 GMA13 B
GMA3 3 22 GMA12
GMA4 4 U9 21 GMA11
GMA5 5 OUT5 iML7991 OUT10 20 GMA10
GMA6 6 19 GMA9
OUT6 OUT9 GMA2 R277 10R VGMA2
主题：创维5800-TCON6-0P10 TCON板之伽玛校正电路 R0402
GMA7 7 18 GMA8
OUT7 绘制：袁亚文 OUT8
VS_BUFFER 日期：2014年8月7日 17 VSD
AVDD DVDD
Tuner I2C 3.3V to 5V
R272 3.0K 1%
R346 0
AGND
DGND
STATIC_HI
nWR
SDA
SCL
BANK_SEL
AD
QFT3
R768 4.7K
R773 4.7K
R774 4.7K
NC_2N7002
10
11
12
13
14
15
16
NC/4.7K
BUF_SDA SDA
R772
C C
nWR
R770 200K 1%
1uF/50V
BANK_SEL_B
DGND
BUF_SDA
VSD
R769 NC/4.7K
R767 BUF_SCL R345 0

VCOM_A VCOM
C523
R274 4.7K
R282 VSD L37 VCC

QFT4
10R
0.1uF/25V
NC_2N7002
10uF/25V
10uF/25V
10uF/25V
0.1uF/16V
2.2uF/10V
NC FB/60R/3A
BUF_SCL SCL
R283 4.7K
C505
C524
C525
C526
C459
C459
VSD
VSD
D D
1 2 3 4
1 2 3 4
L113 L115
L19 22uH CBW3216U800T VCC
R73 R117 AVDD 12V_PANEL CBW3216U800T 12V_PANEL VGH
NC
NC
NC
NC
R 743 NC
SHD
2
L3216 SMD_10UH_6X6
470 1% 54.9K 1%
10uF/16V
C0603
C0805
1uF/50V
NR6045T100M
R 52
R 33
R 36
R 37
CBW3216U800T
C68
C70
C62 1uF/50V
4.99K 1%
A A
0.1uF
R169
C71
VST VST_TCON1
L114
C63 1uF/50V
L3216
VCE VCE_TCON3
10uF/50V
VGH VGH C64 1uF/50V TERMINATE TERMINATE_TCON8
(+29.74V@0.12A) TP D72 LC LC_TCON7
C66 1uF/50V C65 1uF/50V
DP_sel
NC/22uF/35V
R53 4.7K
R27 4.7K
R30 4.7K
R31 4.7K
R744 4.7K
IN5822
10uF/50V
10uF/50V
1uF/50V
R226 NC
100K 1%
DO-214AA
R223
C67
C61
C80
NC
C2
C3
SET1
SHD
LC1_1
STH1
SET2
SET3
C69
NC
41
30
29
28
27
26
25
24
23
STH1 22
21
3.48K 1%
R225
SET1
SHD
LC1
PMS
NC
GND
LXG
SET2
SET3
VGON
STH_1 R227 0 R0402
ST1
B R64 0 B
31 20 LC1_1 R0402
LC1
PGND NC
32 19 LC2_1 LC2_1 R71 0 R0402
LC2
FBG LC2
C50 2.2nFR56 12K 33 COMPG CKH1 18 HC1_1 HC1_1 R201 0 R0402
HC1
R59 NCP15WL683E03RC R62 120K REF 34 REF R208 0 R0402
R66 60.4K CKH2 17 HC2_1 HC2_1 HC2

R63 130K R61 620K VT 35
U4 16 HC3_1 HC3_1 R210 0 R0402 HC3
VT RT8922 CKH3
R65 100K 36 15
END GND NC
QFN40P500X500X80-41
3D_EN 37 14 HC4_1 HC4_1 R212 0 R0402 HC4

SET4 CKH4
VCC L117 主题：创维5800-TCON6-0P10 TCON板之电平移相转换电路 R214 0
VIN 38 VIN CKH5 13 HC5_1 HC5_1 R0402 HC5
CBW3216U800T 绘制：袁亚文
39 VST R217 0
CKH6 12 HC6_1 HC6_1 HC6
L3216
日期：2014年8月9日
0.1uF/6.3V
1uF/6.3V R0402
R196 0
C49
C48
40 11 STH2_1 STH2_1 R0402
TERMINATE
VCE STH2
C C
VGOFF
VCADJ
RATIO
AGND
GOAL
R130 0
XON
ROT
VCC VIN VST R0402
VST_1 VST_1
VSS
LC
L116
R131 0
10
VCE R0402
VCE_1 VCE_1 CBW3216U800T
9
VGL
L3216
NC/4.7K
NC/4.7K
R187 NC/0
R206 NC/0
TERMINATE R118 0 TERMINATE_1 TERMINATE_1
R0402
R129
R135
R209
R207
R128
10uF/16V
4.7K
4.7K
4.7K
ROTATE
0.1uF
C53
C54
ROTATE ROTATE R121 0
LC R0402
LC_1 LC_1
CLK INV SET3
Vgoal XON R177 0 VSS_XON
Phase SEL SET2
NC/10uF/16V
Pre-Charge SEL SET1
NC/1uF/16V
C527
C528
3D SEL 3D_EN
0.1uF
C56
D5 D5
NC/4.7K
NC/4.7K
NC/4.7K
SOD-80
D D
R198
4.7K
R194
R193
R195
R192
4.7K
1N4448HWS 1N4448HWS
SOD-80
Vgoal
1 2 3 4

v2 Led LCD Screen Panel Repair Mirko 153 213

Uploaded by

Copyright:

Available Formats

v2 Led LCD Screen Panel Repair Mirko 153 213

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

v2 Led LCD Screen Panel Repair Mirko 153 213

Uploaded by

Copyright:

Available Formats

What are the different voltage distributions in the TV?

What are the different voltage distributions in the TV?

What is the purpose of the SMPS test described?

What is the purpose of the SMPS test described?

Buyer: Jose Tavarez Castillo (jk011831@gmail.

32LS3500 Main Board +24V Distribution

+24V PWR_ON:Q402: Turned on by Q401 turned on by IC101 RL_ON.

32LS3500 Main Board Other Voltage Distributions

37LK450 INTERCONNECT DIAGRAM VCC 3.3V pins 52, 53

To Backlight 1 270uF + - P/N: EAY62170001 Page 3 of Interconnect Diagram

(Set up SMPS in Test 2 mode). P401

See Table for P2401 3.15A/250V STBY: 163V 3.3V_TU in

Q806 G B Note: Components in Grey are on the

To Backlight DU52 JK3301 HP

For Ballast Component Voltages and drive in JK1101 (RS232) IC1101

37LK450 MAIN (FRONT SIDE) SIMICONDUCTORS

37LK450 MAIN (BACK SIDE) SIMICONDUCTORS

[2] 0V (Gnd) [2] 0V (Gnd) [2] 0V (Gnd) C 0V C 0V

[16] 3.3V C 3.35V

37LK450 LVDS P703 WAVEFORMS

LVDS CABLE WAVEFORMS:

2uSec per/div 811mV p/p 2uSec per/div 811mV p/p

37LK450 Ballast (Inverter) Drawing

2) 24V C) 1.51V 2) 1.57V 2 2) 0.91V To Backlight 1 270uF + -

Interconnect page 4 of 4 August 2011 37LK450 LCD-DV

37LK450 +3.5V_ST Voltage Distribution Circuits

+3.5V_ST Q2406 IR Buffers Head Phone Mute Q1105

37LK450 +12V Voltage Distribution Circuits

IC408 +12V Power Det

Panel Vcc IC405 +12V

37LK450 +24V Voltage Distribution Circuits

Note: Components in Grey are on the

37LK450 Other Voltage Distribution Circuits

42CS560 INTERCONNECT DIAGRAM

20 A-DIM n/c 1.53V Open 24 OL

STBY: 1.24V See P201 SMPS

5-8 Gnd Gnd Gnd Gnd S G

42CS560 Main Board Component Voltages

IC1001 Micro IC403 +1.10V_VDDC IC408 Power_Det IC1450 5V Short Protection

Q401 Power On/Off Q402 Power On/Off Q403 +3.3V_Normal

42CS560 LVDS P703 WAVEFORMS

P703 Pin 40 or CN1 T-CON P703 Pin 41 or CN1 T-CON

LVDS CABLE WAVEFORMS:

2uSec per/div 811mV p/p 2uSec per/div 811mV p/p

42CS560 Main Board +3.5V_ST Distribution

IC407 IC407 Not On in STBY

For IC403, IC407, Q403 Voltage Distribution

PWR_ON Panel_VCC Q407 R430

42CS560 Main Board +21V Distribution

+20V (21V) PWR_ON:Q402: Turned on by Q401 turned on by IC101 RL_ON.

42CS560 Main Board Other Voltage Distributions

IR / Keyboard B C S Q403 L1202

42LG60 CIRCUIT INTERCONNECT DIAGRAM

MAIN PWB P800 P900

P402 POWER SUPPY Spk

SOmV pfp 20mS perfdiv

70mV pfp 20mS perfdiv

50mV p/p 5mS per div