Scribd
Upload
70 views2 pages

Vipin Resume

Resume

Uploaded by

Vipin Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
70 views2 pages

Vipin Resume

Resume

Uploaded by

Vipin Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

VIPIN KUMAR

ADDRESS : Nathupur,Jadipur Kapasi Koraon,Allahabad-212306,UP

MOBILE : +919793404227

E-mail : vipinjisingh5@gmail.com

▪ CAREER OBJECTIVE
Working with an organization which inspires me to enhance my potentials and enrich my talents.

▪ EDUCATIONAL QUALIFICATIONS
Year Degree/Course College/School University/ %Marks/CGPA
Board
2018-2020 M.tech in NIT SIKKIM NIT SIKKIM 8.36(til 2nd sem)
MICROELECTRONICS
AND VLSI DESIGN
2014-2018 B.Tech in Babu Banarasi Dr. A.P.J Abdul 77.80
ElectricalEngineering Das National Kalam
Institute Of Technical
Technology & University
Management
2013 Intermediate Gopal vidyalay U.P. 83.6
inter collage Board
2011 High School Gopal vidyalay U.P. 74.33
inter collage Board

▪ AREA OF INTEREST
• DIGITAL IC DESIGN
• VLSI TESTING AND VERIFICATION
• VLSI PHYSICAL DESIGN
• RTL BASED DESIGN USING VERILOG
• SKILLS
• PROGRAMMING LANGUAGE: C
• HDL LANGUAGE: VERILOG
• SOFTWARE TOOLS :XILINX ISE 14.1,MULTISIM,MODELSIM,MATLAB,SILVACO
• EDA TOOLS: CADENCE(VIRTUOSO)
▪ INDUSTRIAL TRAINING
• B.TECH Vocational Training in Research Designs & Standards Organisation (RDSO),
(Traction and installation Directorate),LUCKNOW from 19june2017 to 14july2017

• M.TECH Summer Training in ARDENT COMPUTECH PVT. LTD. On FPGA


BASED VLSI DESIGN AND IMPLEMENTATION from 3june2019 to 17july2019
• B.TECH PROJECT
• Speed Control Of DC Motor by Using 6-Step Inverter(Major Project)
• Water Level Indicator Using Sensor(Mini Project)
▪ M.TECH PROJECT
• Traffic Light Controller by using VERILOG HDL Under the guidance of Dr. Sanjay
Kumar Jhana (Mini Project)

▪ TENURE OF INTERNSHIP
AUGUST 2019 – JULY 2020
▪ EXPECTED COURSE COMPLETION DATE
31st May 2020
▪ CO-CURRICULAR ACTIVITIES
• Embedded system using Arduino Uno microcontroller By Orane labs SIIC IIT
KANPUR,from July,2015 to May,2017
• Participated in Rastriya bal vigyan congress at district level
• Participate in the Workshop of ‘’VLSI TESTING’’ conducted by ELECTRONICS & ICT
ACADEMY,IIT ROORKEE from 26April-28April,2019
• Have a valid GATE Score 2018 & 2019
▪ HOBBIES
• Playing cricket,football,basketball
• Listening to music
▪ PERSONAL DETAILS
Date of Birth: 16 july 1996
Age: 22
Father’s Name: Akhilesh kumar singh
Mother’s Name: Sudha Singh
Gender: Male
Marital Status: Single
Languages Known: English & Hindi
▪ PERSONAL STRENGTHS
• Optimistic
• Hard Working
• Eager To Learn
• Team Worker
▪ DECLARATION
I hereby declare that the above mentioned information is true to the best of my knowledge and I
bear the responsibility for any incorrectness, if found in the above data.

Date:

Place: SIKKIM VIPIN KUMAR

You might also like