A Non-Control Transformer Inrush Current Limiter

M. Abapour, M. Tarafdar haqh

Department of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran
E-mail: mehdi.abapourggmail.com

Abstract- A new method is proposed for inrush current However air-gap windings cause some problems for
reduction of under load transformers. The proposed limiter transformer design such as production difficulties and worsen
consists of a control-less diode-bridge and a single coil that some of the characteristics of the transformer [1].
connects in series with each-phase of transformer. It is necessary This study proposes a new external control circuit for inrush
using three similar circuits for three-phase transformers. The current reducing using a control-less diode-bridge type DC
limiter has almost no effect in normal operation of transformer.
The simplicity of proposed circuit, easy to build and absence of reactor. The device connects in series with transformer and it
control circuits are the main attractive points of circuit. The uses a single coil with any other control or measurement
equivalent instantaneous inductance of transformer is used for circuits. Construction simplicity and its low cost is the main
instantaneous analysis of circuit operation. The analytical analysis advantageous of proposed system. Also it is possible using
and designing characteristics for DC reactor inrush current superconducting coil for reduction of power losses. This paper
limiter are presented. The overall circuit operation in transient is focused on reduction of inrush current of under-load
and steady state cases are studied in detail. The paper is focused transformers. The analytical analysis of inrush current at on-
on reduction of inrush current of under-load transformers. load condition and its reduction with current limiter are
Simulation results are obtained using PSCAD/EMTDC software
presentedeinadetail.cTheasimulation reslse obtain
p
to verify the valuable operation of proposed circuit in reduction of
inrush current. The results are used for comparison of inrush
current with and without using the limiter.
verify the valuable characteristlcs of proposed limiter in
transient cases and steady state. Also the presented circuit
proposed to fault current limiting in power systems in different
Index Terms-inrush current limiter, power transformer, DC papers [2-3].
reactor, diode bridge type
II. Power Circuit Topology and Proposed Limiter
Fig. 1 shows the power circuit topology. The system has no
I. INTRODUCTION control circuit. The resistance of DC reactor is modeled with a
An inrush current that is a transient current occurs in an small series resistor rd and its inductance is shown by Ld. Using
electric circuit when a transformer is energized. This current superconducting coil the DC reactor resistance would be equal
depends upon different parameters such as the magnitude of with zero. By choosing appropriate value for inductor Ld, it is
voltage in switching instant, the remanent flux, the i-z possible to achieve a nearly DC current in DC reactor at steady
hysteresis characteristics of the core, the resistance in the state operation of transformer. Obviously, by increasing the
primary circuit, and others. The magnitude of the inrush inductance of Ld we can decrease the ripple currents of id.
current may be as high as ten or more times of transformer Therefore DC reactor have not significant rule on normal
rated current. This could result in a huge mechanical and operation of system. Existence of rd would result in negligible
thermal stresses on transformer in addition to inadvertent power losses and voltage drop (these items can be decreased by
operation of the circuit's over-current protection systems. This increasing the cross section area of copper coil) [3]. There
means that the transformer is forced to be made big, heavy and would be a forward voltage drop across rectifier diodes VDF,
expensive. If the inrush current is suppressed by some method, too. The source is assumed to be a sinusoidal source with R-L
this problem may be substantially avoided. load with rs and Ls as its resistor and inductor, respectively
There are two major methods for limiting the inrush current as including any line impedance. Also the load is assumed a R-L
follows: load.
Source DC Reactor Transformer Load
(a) External control circuits
(b) Internal control circuits I
D1 D2 LL

External control circuits usually need additional current and AC(S) ZH L ii> ezI
voltage measurement circuits and some control strategies. D4
These circuits are usually expensive and sometimes those are
very difficult to be used practically [1]. ' A
Internal control circuits usually make use of magnetizing s,
characteristics of transformer core. One idea iS using air-gap
windings that are based on the use of a core with an air gap. Fig. 1. Power circuit topology and main circuit of limiter with Diode-Bridge

1-4244-0726-5/06/$20.OO '2006 IEEE 2390

 When transformer energized the inrush current passes The equations of the primary side in Fig. 2 can be expressed
through DC reactor that increases voltage drop and decreases as follows:
the inrush current magnitude. Even the presented circuit is
proposed to limiting fault current. In normal operation of _ri +Lkk dim 12 L di2dt (4)
circuit and transformer, voltage drop on limiter is negligible tm
and if limiter uses only as inrush current limiter, we can retreat L mLLS
it from power system using a paralleled circuit breaker, without Lk L + L LS (5)
any breaker switching stress.
Lk is defined as the ElI, which is obviously a nonlinear
III. MODEL OF TRANSFORMER function of Lm with constant L1, and LLS. The solution of ElI
For power circuit analysis we must model the Equivalent can be found from (4) by using the measured instantaneous
Instantaneous Inductance (ElI) of transformer, which shows currents and voltages of the primary and secondary windings in
the nonlinear characteristic of transformer when inrush current the transformer. An approximation is necessary to simplify the
occurred. ElI modeling of transformer is made as subsections A calculation. In this paper we used the approximate solution
and technical aspect in detail of ElI modeling is extensively shown in Eq. (6) can be obtained when the voltage drops in
discussed in [4]. L1I and r1 are ignored, because they are almost negligible for
A. Mathematical Modelfor Transformer large transformers.
For a T-type equivalent circuit of two-winding transformer u
that is shown in Fig. 2, equations in the primary side can be Lk = d dt (6)
expressed as: m

ui = r1i, + Li1di, d(p dim

d9+ (1) At KT instant, its digital realization based on the trapezoid
dt dim dt principle is written as:
imilni2
= (2)
Lk 2T ui (K)(7
/'1 L,52 L2 k im (K+1) - irn(K-1) 1(7)
where, T is sampling cycle. The computational error is
inevitable despite of its simple form. But it does not change the
drastic variable property of Ell in the case of inrush current
Ul j U2 presence, i.e., nonlinearity of the Ell is unchanged
1 Lm i i LLS Fig. 3 shows the equivalent instantaneous impedance in load
side (impedance of load and transformer). In this figure we
define
XJ LI M = Lk - LI5 (8)
FLNS iron core is not saturated
Fig. 2 General equivalent circuit for a two-winding transformer LM = (9)
LSa iron core is saturated
where, L1,5, r1, u1, and il are the leakage inductance, resistance,
terminal voltage, and line current in the primary winding,
respectively. im and f are the magnetizing current and the
mutual flux linkage, respectively. i2 is the secondary winding Generalequivalentcircuitfor a two-winding
current, which has been converted by the transformation ratio. r a.1-----------------
We define: ZrZe
m
di, (3) 1

Then, Lm represents the Instantaneous Magnetizing I

Inductance (IMI) of the transformer. u2, '2, L2 andr2 are
terminal voltage, current, leakage inductance, and resistance in -_I-
the secondary winding, respectively. i1LS and LLs are the current I
and the leakage inductance in the short-circuit winding, where
LLS = ° and iLS-0 during normal operation. Fig. 3 equivalent impedance of transformer and load

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 However, the inrush current is a result of the transformer The produced voltage across Ld has resulted in limiting the
core saturation. Furthermore, the iron core will alternate inrush current.
between the saturation and nonsaturation during the inrush Faulft and inrush currentlimiter
current, which causes a drastic variation of the IMI, as shown model in charging mode
in Fig. 4. LNS are the magnetizing inductance when the iron
core is not saturated, and Lsa corresponds to a high degree of /
saturation in the iron. x
Circuit breaker D

x
~~L
LNs ~~~~~~~~~~~~~~~D
-~~~~~~~~ ~~~N

N~~~~~~~~~~~~~~~~~~~~
JC V Vsin cot

5 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~(a)
g J \ / \ rX Fault and inrush current limiter
.5 ~~~~~~~~~~~~~~~~~~~~~model/in
discharging mode

02 0.21 0.23 0.25 6 Circuit6breaker!

Time (s) /x l<>

Fig. 4. Schematic diagram of IMI waveform during the inrush current

IV. CIRCUIT ANALYSIS

The analysis is presented for inrush current reduction when 4C % V= V sincot
transformer is at on-load condition. Fig. 5 shows the line and
DC reactor current waveforms during energizing transformer
with using inrush current limiter. The reactor current id, is a (b)
rectified current in normal operation. The circuit has two
modes of operation as follows: Fig. 6. Analyzed power circuit topology (a) charging mode (b) discharging
mode
(a) Charging mode
Equivalent impedance of transformer and load as shown in
DC reactor current Fig. 3 defined as follows
Line current
Zej=(ZLoad+Zsec) (/LjMO)}W+Zpr (1 0)

The operation of DC reactor leads inrush current limiting

between to to t2. At t=t1 the transformer coil saturates and LM
changes its value from LNS to Lsa The current equation in
charging mode, between to to t2 is shown by Eq. (11) as
follows:
to t] t2 ta\, /

i (t) = e { sin(cto 2V- F }

z r J
Fig. 5. Line and DC reactor currents when transformer energized v 2VDF
+ -sin(ot - 9) -
z r
Charging mode begins at to and it continues until t2. At to the
diodes Dl and D3 turns on and DC reactor connects in series 12 2
with utility as shown in Fig. 6(a). The transformner energized at where: r = S+ rd + re, L =LS + Ld + Le, Z: r + (Lw))
t=to and the line current begins to increase (inrush current). i(to0) 0 , 1(t) =di(t) = L (t)

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 show the load voltage in charging and discharging modes,
With using superconductor resistance of DC reactor will be respectively at steady state condition.
equal with zero (rd=O).
-(r/L)(t-t)-f V 2VDF
(b) Discharging mode VLoad (t) =(rL + ILL f){e , - -sin(cYto -_p) +
At t=t2 discharging mode starts until t=t3 and inrush current
limiter retreat from power circuit as shown in fig. 6(b). The DC
V
+ -sin(t (p _ DF
2VDF (15)
reactor current equation in discharging mode, between t2 to t3 is z r
as follows:

id (t)= e-(rd/Ld)(t-t2) i2 + 2VI)F } 2VF(12) VLoad (t) = (rL + JLLW){e {i

) K)iSiflt2-(
rd rd v
+ -sin(ct - )
~~~~~~~~~~
z
The DC reactor current equation in discharging mode with
using superconductor define as follows L
Where: tan9(L = L (17)
2 VDF rL
id (t) = i2- D (t-t2) (13)
Ld The voltage and current distortions are because of charging
and discharging of DC reactor. It should be noticed that these
Also line current between t2 to ta is as fallows: distortions will exist even in superconductor limiter. Compares
the load voltage distortion with using superconductor limiter
IL (t)7-Vi((r/L)(t-t2)-)+
() - sin(-t j -) and with using non-superconductor limiter shows a deeper
L12- _Sin(0t2 -)((14) voltage distortion for non-superconductor limiter.
The results of this part have been obtained using power
circuit topology of Fig. 1 while the parameters values are listed
where: r = rs +re, L = Ls +Le z = r2 + (L)2, (t2) '2 in "simulation results" of this article.
At t=t3 the reactor current reached again to line current as
shown in Fig. 7. Even the presented circuit is proposed to
limiting fault current. In normal operation of circuit and 75
transformer, voltage drop on limiter is negligible and if limiter 65
uses only inrush current limiting we can retreat it from power 5
system using a paralleled circuit breaker without any breaker 0.945 0.946 0.947 0.948
switching stress. Although in steady sate voltage drop on 019 0.1 02 0. 04 0.9 06
inrush current limiter is negligible but the existence of limiter
would result in some current and voltage distortion on load
side. Tm

DC reactor current Fig. 8. Distortion on load voltage with using inrush current limiter in steady
Primary line current state condition

V. DESIGNING FORMULAS OF INRUSH CURRENT LIMITER

CHARACTERISTICS

0.8 .1
l 2 3J .8 .3 .3 .8H 2 < Fig. 9. Shows inrush current magnitude versus inductance of
DC reactor with increasing Ld in different tests.
It is possible calculate the desired value of Ld. If the
maximum permitted inrush current considered being equal to
AAi i2 - io then it is possible to write Eq. (18) as fallows:
t3
ri2-VDS +2VDF =-InriV s+V
Fig. 7. Line and DC reactor currents when transformer energized L
t2-t0 r - VDS+2- VDF
F(18)
Fig. 8 shows load voltage due to existence of an inrush
current limiter. The current distortion will be near to its peak
value, while the power factor of load determines the place of where; r = + rd +re, L Ls +Ld +Le and 12 is the first
voltage distortion in voltage waveform. Eq.s (15) and (16) peak of inrush current after limiting. Also we substitute DC

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voltage source where V sin ct 2V/1 = VDS 3.53 5 Primary line current without limiter
3500 3500~~ >25 ~ 3 ~~~~~
~ -Primary line current with using limiter
2.5-
-Z 3000 2

2 500 _*
2000 - 4-10.5 Tm s
~ $ 1500 -~
~~~~ 1000 ~~~~~~~~~~~~~~~~~~~~~~~~~~~Time
-1
(s)
500-
0- ~~~~~~~~~~~~~~~~Fig.
10. Inrush current without limiter and using limiter at on-load condition
0 15 30 45 60 75 90 105 120 135 150
Inductance of DC Reactor (mH) With low DC reactor inductance
Fig. 9. Variation of inrush current magnitude verses inductance of DC reactor 2 - With high DC reactor inductance
with changing Ld

With using superconductor DC reactor resistance will be equal e1

with zero and r rs + re Using this equation, it is possible O
=

calculate the desired value of Ldusing Eq. (19).

rKT ~~~~~~~~~~~~~~~~~~~ ~~~0.195 .45 0.94
d
lnri2 - VDS +2VDF L -LL
(19)
- VDS + 2VDF -1 Time (s)

where Lk=Lsa is assumed. Fig. 11. Effect of DC reactor impedance in inrush current limiting quality

VI. SIMULATION RESULT

Load voltage without limiter
The power circuit topology of Fig. 1 is used for analyzing of 10 - load voltage with using limiter
the transformer energizing. The parameters of a two-winding 8
single phase transformer and the simulation parameters are as 6
follows: 4

ZLoad 9.24+jO.022(2
z, O.O+jpo0.001
4Q)o /\

z*~O.O1±jqO.OO1 X1. 95
=
(Q)
0.205 0.215 0.225 0.235 0.245
vs(t) =9.5 Sin(314t) (kV) 7 \ l
VDF=vDF
6 6 ~~~~~~~~~~~~~~~(V)
(V) °4\/\/Time(s)
rd =0.01 (Q) -8
Ld = 0.02 (H) -10
Leakage reactance =0.1 (pu)
Air core reactance =0. 1 (pu)
Inrush decay time =0.2 (s) Fig. 12. Effect of using inrush current limiter at load voltage disturbance in
Power system frequency =50 (Hz) first cycle
Magnetizing current =2o Also using inrush current limiter would result in some
Transformer ratio =1 current and voltage distortion on load side in first cycle. Fig.
12 shows load voltage due to existence of inrush current limiter
Fig. 10. shows the simulation results of the transformer in first period.
inrush current without limiter and using limiter. The results
show that the amplitude of inrush current was very low with
using limiter. With greater DC reactor inductance it is possible VII. CONCLUSION
that iron core of transformer generally not saturated at This paper has-proposed a novel approach for reducing the
energizing. This is shown in Fig. 11. inrush current of a power transformer using fault current
limiter based on DC reactor. Furthermore the inrush-current-
limiting element may also work as the fault current limiter
when the short-circuit fault occurs. The analytical analysis and

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designing characteristics for DC reactor inrush current limiter
presented. It seems that the lower initial cost and simpler
technology make this kind of limiters as a good alternative for
more researches in this field. At the design stage of the limiting
element, it is important to estimate the level of the inrush
current flowing at the point where the limiting element is
installed.
REFERENCES
[1] C. K. Cheng, T. J. Liang, J. F. Chen and W. H. Yang, "Novel approach
to reducing the inrush current of a power transformer" IEE Proceedings
Electric Power Applications, vol. 151, pp. 289-295, May 2004.
[2] T. Hoshino, K. M. Salim, A. Kawasaki, I. Muta, T. Nakamura and M.
Yamada, "Design of 6.6kV, 100A saturated DC reactor type
superconducting fault current limiter", IEEE Trans. on Applied
Superconductivity, vol. 13, Part 2, pp. 2012 - 2015, June 2003.
[3] M. Tarafdar Haque and M. Abapour, "Power loss analysis of single and
three phase fault current limiters", WSEAS Transaction on System, vol.
5, pp. 1208-1213, May 2006.
[4] G. Baoming, A. T. de Almeida, Q. Zheng and X. Wang, "An equivalent
instantaneous inductance-based technique for discrimination between
inrush current and internal faults in power transformers", IEEE Trans.
on Power Delivery, vol. 20, no. 4, pp. 2473-2482, October 2005.

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