68HC11 Assembly Programming

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The 68HC11 Microcontroller

Chapter 2: 68HC11 Assembly Programming

The 68HC11 Microcontroller

Han-Way Huang

Minnesota State University, Mankato

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The 68HC11 Microcontroller

Assembly Program Structure

C program

main ()
{
int i, j, k; ; i, j, k are integer variables
i = 75; ; assign 75 to i
j = 10; ; assign 10 to j
k = i + j - 6;
}

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The 68HC11 Microcontroller

Assembly Program

(1) * Data storage declaration section


(2) ORG $00
(3) i RMB 1 ; variable i
(4) j RMB 1 ; variable j
(5) k RMB 1 ; variable k
(6) * program instruction section
(7) start ORG $C000 ; starting address of program
(8) LDAA #75
(9) STAA i ; initialize i to 75
(10) LDAA #10
(11) STAA j ; initialize j to 10
(12) ADDA i ; compute i + j
(13) SUBA #6 ; compute i + j -6
(14) STAA k ; store i + j - 6 to k
(15) END

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The 68HC11 Microcontroller

Global View of a 68HC11 Assembly Program

1. Assembler Directives

- define data and symbol


- reserve and initialize memory locations
- set assembler and linking condition
- specify output format
- etc.

2. Assembly Language Instructions

3. END directive

- last statement of a program


- any statement after END will be ignored

4. Comments

- explain the function of a single or a group of instructions

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The 68HC11 Microcontroller

Fields of a 68HC11 Instruction

1. Label field
- is optional
- starts with a letter and followed by letters, digits, or special symbols (_ or .)
- can start from any column if ended with “:” (not true for Motorola freeware as11)
- must start from column 1 if not ended with “:”

2. Operation field
- contains the mnemonic of a machine instruction or a directive
- is separated from the label by at least one space

3. Operand field
- follows the operation field and is separated from the operation field
by at least one space
- contains operands for instructions or arguments for assembler directives

4. Comment field
- a whole line comment starts with a *
- is separated from the operand and operation field for at least one space

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Identify the Four Fields of an Instruction

Example 2.3

loop ADDA #$40 ; add 40 to accumulator A

(1) “loop” is a label


(2) “ADDA” is an instruction mnemonic
(3) “#$40” is the operand
(4) “add #$40 to accumulator A” is a comment

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The 68HC11 Microcontroller

Assembler Directives -- a sample


1. END
- ends a program to be processed by an assembler
- any statement following the END directive is ignored
- not supported by the Motorola freeware as11

2. ORG
- sets a new value for the location counter of the assembler
- tells the assembler where to put the next byte it generates after the ORG directive

The sequence
ORG $C000
LDAB #$FF
will put the opcode byte for the instruction LDAB #$FF at location $C000.

3. RMB -- reserve memory bytes


- reserve memory bytes without initialization
- syntax is
[<label>] RMB <expression> [<comment>]
The statement
buffer RMB 100
allocates 100 bytes for data and can be referred to by the label “buffer”.

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BSZ -- block storage of zeros

- causes the assembler to allocate a block of bytes that are initialized to zeros
- syntax is
[<label>] BSZ <expression> [<comment>]
The statement

buffer BSZ 80

reserves a block of 80 bytes and their value are initialized to 0.

FCB -- form constant byte

- reserves as many bytes as the number of arguments in the directive


- each argument specifies the initial value of the corresponding byte
- syntax is
[<label>] FCB [<expression>][,<expression>,...,<expression>][<comment>]

The statement

ABC FCB $11,$22,$33

reserves three consecutive memory bytes and initializes their values to $11, $22, and $33.

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The 68HC11 Microcontroller

FDB -- form double byte


- reserves 2 bytes for each argument of the directive
- each argument specifies the initial value of the corresponding double bytes
- syntax is
[<label>] FDB [<expression>][,<expression>,...,<expression>] [comment>]

The directive

ABC FDB $11,$22,$33

will initialize 6 consecutive bytes in memory to $00 $11 $00 $22 $00 $33

FCC -- form constant character


- generates ASCII code bytes for the letters in the arguments
- syntax is
[label] FCC “<string>“ [<comment>]

The directive

ALPHA FCC “DEF”

will generate the values $44 $45 $46 in memory

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DCB -- define constant block


- reserve an area of memory and initialize each byte to the same constant value
- syntax is
[label] DCB <length>,<value>
- not supported by the Motorola freeware as11

The directive

space DCB 80,$20

will generate a line of 80 space characters.

FILL -- fill a block of constant values


- serve as the same purpose as does the DCB directive
- syntax
[<label>] FILL <value>,<length>

The directive

ones FILL 1,40

will force the freeware assembler to fill each of the 40 memory locations with a 1.

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The 68HC11 Microcontroller

EQU -- equate
- allows the user to use a symbolic name in place of a number
- syntax is
<label> EQU <expression> [<comment>]

The directive

ROM EQU $E000

tells the assembler that wherever ROM appears in the program, the value $E000
is to be substituted.

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The 68HC11 Microcontroller

Flowchart
- is a form of program documentation
- is a tool for developing program logic flow

Symbols of Flowchart

Terminal A

Process
Subroutine

Input or
output
B

yes Off-page connector


Decision A
On-page
no
connector

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Procedure of Using Computer in Solving the Problem

start

analyze the problem

Express the solution to the


problem using flowchart or
other method

Convert the flowchart into


source code

Compile or assemble to
generate machine code

Place the executable code


Refine the solution in the computer

Run the program and


evaluate the result

No Is the result
satisfactory?
Yes
Stop

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Programs to do simple arithmetic

Example 2.4 Write a program to add the values of memory locations at $00, $01, and $02, and
save the result at $03.

LDAA $00 ; load the contents of memory location at $00 into A


ADDA $01 ; add the contents of memory location at $01 to A
ADDA $02 ; add the contents of memory location at $02 to A
STAA $03 ; save the result at memory location at $03

Example 2.5 Write a program to subtract 6 from three 8-bit numbers stored at $00, $01, and
$02 respectively.

LDAA $00 ; load the first number into A


SUBA #06 ; subtract 6 from the first number
STAA $00 ; store the decremented value back to $00
LDAA $01 ; load the second number into A
SUBA #06 ; subtract 6 from the second number
STAA $01 ; store the decremented value back to $01
LDAA $02 ; load the third number into A
SUBA #06 ; subtract 6 from the third number
STAA $02 ; store the decremented value back to $02

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The Carry Flag


- bit 0 of the CCR register
- set to 1 when the addition operation produces a carry 1
- set to 1 when the subtraction operation produces a borrow 1
- enables the user to implement multi-precision arithmetic

Example 2.6 Write a program to add the 3-byte numbers stored at $00-$02 and
$03-$05 and save the result at $06-$08.
Solution: The addition starts from the least significant byte.

LDAA $02 ; add the LSBs


ADDA $05 ; “
STAA $08 ; “
LDAA $01 ; add the middle bytes
ADCA $04 ; “
STAA $07 ; “
LDAA $00 ; add the MSBs
ADCA $03 ; “
STAA $06 ; “

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Example 2.7 Write a program to subtract the 3-byte number stored at $03-$05
from the 3-byte number stored at $00-$02 and save the result at $10-$12.
Solution: The subtraction starts from the LSBs.

LDAA $02 ; subtract the LSBs


SUBA $05 ; “
STAA $12 ; “
LDAA $01 ; subtract the middle bytes
SUBA $04 ; “
STAA $11 ; “
LDAA $00 ; subtract the MSBs
SUBA $03 ; “
STAA $10 ; “

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BCD numbers and addition

- each digit is encoded by 4 bits


- two digits are packed into one byte
- the addition of two BCD numbers is performed by binary addition and an adjust
operation using the DAA instruction
- the instruction DAA can be applied after the instructions ADDA, ADCA,
and ABA
- simplifies I/O conversion

For example, the instruction sequence

LDAA $00
ADDA $01
DAA
STAA $02

adds the BCD numbers stored at $00 and $01 and saves the sum at $02.

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Multiplication

- MUL computes the product of A and B and leaves the result in D


- multi-byte multiplication can be performed by using a method similar to the
pen-and-pencil method (partial products are generated and added together)

Example 2.10 Multiply the two 16-bit numbers stored at M and N and save the
product at location P.

Solution: Rewrite M and N as MHML and NHNL


where
MH and NH are upper 8 bits of M and N respectively
ML and NL are lower 8 bits of M and N respectively

MH and ML are stored at M and M+1 respectively


NH and NL are stored at N and N+1 respectively

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Illustration of 16-bit by 16-bit Multiplication

8-bit 8-bit 8-bit 8-bit

upper byte lower byte MLNL

upper byte lower byte MHNL

upper byte lower byte MLNH

upper byte lower byte MHNH

address P P+1 P+2 P+3


M×N
MSB LSB

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Example 2.10 Program for multiplying two 16-bit numbers

ldaa M+1 ; place ML in A


ldab N+1 ; place NL in B
mul ; compute ML × NL
std P+2 ; save ML × NL to memory locations P+2 and P+3
ldaa M ; place MH in A
ldab N ; place NH in B
mul ; compute MH × NH
std P ; save MH × NH to memory locations P and P+1
ldaa M ; place MH in A
ldab N+1 ; place NL in B
mul ; compute MH × NL
addd P+1 ; add MH × NL to memory locations P+1 and P+2
std P+1 ; “
ldaa P ; add the C flag to memory location P
adca #0 ; “
staa P ; “
ldaa M+1 ; place ML in A
ldab N ; place NH in B
mul ; compute ML × NH
addd P+1 ; add ML × NH to memory locations P+1 and P+2
ldaa P ; add the C flag to memory location P
adca ; “
staa P ; “

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Divide Instructions
1. IDIV: integer division

- D is the dividend and X is the divisor


- Quotient is left in X and remainder is left in D
- The quotient is set to $FFFF in the case of divide by 0

2. FDIV: fractional division

- D is the dividend, X is the divisor


- Quotient is left in X and remainder is left in D
- The radix point is assumed to be in the same place for both the dividend and divisor
- The radix is to the left of bit 15
- The dividend must be smaller than the divisor
- The quotient is set to $FFFF in the case of divide by 0 or overflow

3. Example 2.12 Divide the fractional number $.2222 by $.4444

LDD #$2222 ; divide $0.2222 by $0.4444


LDX #$4444 ; “
FIDV ; “

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The 68HC11 provides swap instructions so that further division to the quotient
can be performed.

- XGDX: swap the contents of D and X


- XGDY: swap the contents of D and Y

Example 2.13 Write a program to convert the 16-bit number stored at $00-$01 to BCD
format and store the result at $02-$06. Each BCD digit is stored in one byte.

Solution:

- A binary number can be converted to BCD format by using repeated division by 10.
- The largest 16-bit binary number is 65535 which has five decimal digits.
- The first division by 10 obtains the least significant digit, the second division by 10
obtains the second least significant digit, and so on.

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LDD $00 ; place the 16-bit number in D


LDX #10
IDIV ; compute the least significant digit
STAB $06 ; save the least significant BCD digit
XGDX ; place the quotient in D
LDX #10
IDIV ; compute the second least significant BCD digit
STAB $05 ; save the second least significant BCD digit
XGDX ; place the quotient in D
LDX #10
IDIV ; compute the middle BCD digit
STAB $04 ; save the middle BCD digit
XGDX
LDX #10
IDIV ; compute the second most significant digit
STAB $03 ; the second most significant BCD digit
XGDX
STAB $02 ; save the most significant BCD digit
END

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Program Loops

Types of program loops: finite and infinite loops

Looping mechanisms:

1. DO statement S forever

2. FOR i = n1 to n2 DO statement S or FOR i = n2 downto n1 DO statement S

3. WHILE C DO statement S

4. REPEAT statement S until C

Program loops are implemented by using the conditional branch instructions and
the execution of these instructions depends on the contents of the CCR register.

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Condition Code Register

S X H I N Z V C

- C: carry flag
- V: overflow flag
- Z: zero flag
- N: negative flag
- H: half carry flag

Conditional Branch Instruction

[<label>] Bcc rel [<comment>]

where cc is a condition code listed in Table 2.1.

Unconditional Branch Instruction

[<label>] BRA rel [<comment>]

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Table 2.1 Branch Condition Codes

Condition code Meaning


CC carry clear
CS carry set
EQ equal to 0
GE greater than or equal to 0 (signed comparison)
GT greater than 0 (signed comparison)
HI higher (unsigned comparison)
HS higher or same (unsigned comparison)
LE less than or equal to 0
LO lower (unsigned comparison)
LS lower or same (unsigned comparison)
LT less than 0 (signed comparison)
MI minus (signed comparison)
NE not equal to 0
PL plus (signed comparison)
VC overflow bit clear
VS overflow bit set

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Conditional Branch Instructions that check only one condition flag

- C flag: BCC branch if C flag is 0


BCS branch if C flag is 1
BLO branch if C flag is 1
BHS branch if C flag is 0
- Z flag BEQ branch if Z flag is 1
BNE branch if Z flag is 0
- N flag BPL branch if N flag is 0
BMI branch if N flag is 1
- V flag BVS branch if V flag is 1
BVC branch if V flag is 0

Conditional Branch Instructions that check more than one condition flag

- BGE branch if (N ⊕ V) = 0
- BGT branch if (Z + (N ⊕ V)) = 0
- BHI branch if (C + Z) = 0
- BLE branch if (Z + (N ⊕ V)) = 1
- BLS branch if (C + Z) = 1
- BLT branch if (N ⊕ V) = 1

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Decrementing and Incrementing Instructions

- DECA: A ← [A] - 1
- DECB: B ← [B] - 1
- DEC opr: mem[opr] ← [mem[opr]] - 1
- DES: SP ← [SP] - 1
- DEX: X ← [X] - 1
- DEY: Y ← [Y] - 1
- INCA: A ← [A] + 1
− INCB: B ← [B] + 1
- INC opr: mem[opr] ← [mem[opr]] + 1
- INS: SP ← [SP] + 1
- INX: X ← [X] + 1
- INY: Y ← [Y] + 1

Note 1. Incrementing and decrementing instructions can be used to update the loop
indices.
Note 2. The memory operand opr is specified in either extended or index addressing mode.

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Example 2.15 Write a program to compute 1 + 2 + ... + 20 and save the sum at $00.

Solution:

Start * The following program use accumulator B as the loop index


* i and A as the sum.
i =0
sum = 0 N equ 20

i=i+1 ldab #0 ; initialize loop index i to 0


ldaa #0 ; initialize sum to 0
sum = sum + i again incb ; increment i
aba ; add i to sum
no cmpb #20 ; compare i with the upper limit
i = 20 ?
bne again ; continue if i is less than 20
yes staa $00 ; save the sum
Stop end

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Example 2.16 Write a program to find the largest number from an array of 20
8-bit numbers. The array is stored at $00-$13. Save the result at $20.
Solution:

Start

array max ← array [0]


i←1

yes
array max < array [i] ? array max ← array [i]
i←i+1
no

no
i = array count - 1?
yes
Stop

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* The following program uses A to hold the temporary array max and uses B
* as the loop index.

N equ 20 ; array count


org $00
array fcb .... ; array

ldaa array ; set array[0] as the temporary array max


ldab #1 ; initialize loop index to 1
loop ldx #array ; point X to array[0]
abx ; compute the address of array[i]
cmpa 0,X ; compare temp. array max to the next element
bhs chkend ; do we need to update the temporary array max?
ldaa 0,X ; update the temporary array max
chkend cmpb #N-1 ; compare loop index with loop limit
beq exit ; is the whole array checked yet?
incb ; increment loop index
bra loop
exit staa $20 ; save the array max
end

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Compare Instructions

- are executed to set the condition flags of the CCR register


- are often used to implement the program loop
Table 2.2 68HC11 Compare Instructions

Instruction format
[<label>] CBA [<comment>] compare A to B
[<label>] CMPA opr [<comment>] compare A to a memory location or value
[<label>] CMPB opr [<comment>] compare B to a memory location or value
[<label>] CPD opr [<comment>] compare D to a memory location or value
[<label>] CPX opr [<comment>] compare X to a memory location or value
[<label>] CPY opr [<comment>] compare Y to a memory location or value
[<label>] TST opr [<comment>] test a memory location for negative or zero
[<label>] TSTA [<comment>] test A for negative or zero
[<label>] TSTB [<comment>] test B for negative or zero

opr is specified in one of the following addressing modes:


- EXT
- INDX
- INDY
- IMM (not applicable to “TST opr”)
- DIR (not applicable to “TST opr”)
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Special Conditional Branch Instructions

[<label>] BRCLR (opr) (msk) (rel) [<comment>]


[<label>] BRSET (opr) (msk) (rel) [<comment>]

where

opr specifies the memory location to be checked and must be specified using either
the direct or index addressing mode.
msk is an 8-bit mask that specifies the bits of the memory location to be checked.
The bits of the memory byte to be checked correspond to those bit positions
that are 1s in the mask.
rel is the branch offset and is specified in the relative mode.

For example, the sequence

ldx #$1000
here brclr $30,X %10000000 here
ldaa $31,X

will force the 68HC11 continue to execute the second instruction until the bit 7 is set to 1.

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Example 2.17 Write a program to compute the sum of the odd numbers in an array
with 20 8-bit elements. The array is stored at $00-$13. Save the sum at
$20-$21.
Solution:

Start

sum ← 0
ptr ← 0

bit 0 of mem[ptr] = 0?
no
sum ← sum + [mem[ptr]]

no
ptr ← ptr + 1 ptr = $13?
yes
Stop

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* The index register X is used as the pointer to the array element.

N equ $13
org $20
sum rmb 2

org $C000
ldaa #$00
staa sum ; initialize sum to 0
staa sum+1 ; “
ldx #$00 ; point X to array[0]
loop brclr 0,X $01 chkend ; is it an odd number?
ldd sum ; add the odd number to the sum
addb 0,X ; “
adca #0 ; “
std sum ; “
chkend cpx #N ; compare the pointer to the address of the last element
bhs exit ; is this the end?
inx
bra loop ; not yet done, continue
exit end

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Instructions for Variable Initialization

1. [<label>] CLR opr [<comment>]

where opr is specified using the extended or index addressing mode. The
specified memory location is cleared.

2. [<label>] CLRA [<comment>]

Accumulator A is cleared to 0

3. [<label>] CLRB [<comment>]

Accumulator B is cleared to 0

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Shift and Rotate Instructions

The 68HC11 has shift and rotate instructions that apply to a memory location, accumulators
A, B and D. A memory operand must be specified using the extended or index
addressing mode.

There are three 8-bit arithmetic shift left instructions:

[<label>] ASL opr [<comment>] -- memory location opr is shifted left one place
[<label>] ASLA [<comment>] -- accumulator A is shifted left one place
[<label>] ASLB [<comment>] -- accumulator B is shifted left one place

The operation is

C b7 ----------------- b0 0

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The 68HC11 has one 16-bit arithmetic shift left instruction:

[<label>] ASLD [<comment>]

The operation is

C b7 ----------------- b0 b7 ----------------- b0 0
accumulator A accumulator B

The 68HC11 has arithmetic shift right instructions that apply to a memory location and
accumulators A and B.

[<label>] ASR opr [<comment>] -- memory location opr is shifted right one place
[<label>] ASRA [<comment>] -- accumulator A is shifted right one place
[<label>] ASRB [<comment>] -- accumulator B is shifted right one place

The operation is

b7 ----------------- b0 C

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The 68HC11 Microcontroller

The 68HC11 has logical shift left instructions that apply to a memory location and
accumulators A and B.

[<label>] LSL opr [<comment>] -- memory location opr is shifted left one place
[<label>] LSLA [<comment>] -- accumulator A is shifted left one place
[<label>] LSLB [<comment>] -- accumulator B is shifted left one place

The operation is

C b7 ----------------- b0 0

The 68HC11 has one 16-bit logical shift left instruction:

[<label>] LSLD [<comment>]

The operation is

C b7 ----------------- b0 b7 ----------------- b0 0
accumulator A accumulator B

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The 68HC11 has three logical shift right instructions that apply to 8-bit operands.

[<label>] LSR opr [<comment>] -- memory location opr is shifted right one place
[<label>] LSRA [<comment>] -- accumulator A is shifted right one place
[<label>] LSRB [<comment>] -- accumulator B is shifted right one place

The operation is

0 b7 ----------------- b0 C

The 68HC11 has one 16-bit logical shift right instruction:

[<label>] LSRD [<comment>]

The operation is

0 b7 ----------------- b0 b7 ----------------- b0 C
accumulator A accumulator B

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The 68HC11 has three rotate left instructions that operate on 9-bit operands.

[<label>] ROL opr [<comment>] -- memory location opr is rotated left one place
[<label>] ROLA [<comment>] -- accumulator A is rotated left one place
[<label>] ROLB [<comment>] -- accumulator B is rotated left one place

The operation is

b7 ----------------- b0 C

The 68HC11 has three rotate right instructions that operate on 9-bit operands.

[<label>] ROR opr [<comment>] -- memory location opr is rotated right one place
[<label>] RORA [<comment>] -- accumulator A is rotated right one place
[<label>] RORB [<comment>] -- accumulator B is rotated right one place

The operation is

C b7 ----------------- b0

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Example 2.18 Suppose that [A] = $74 and C = 1. Compute the new values of A and C
after the execution of the instruction ASLA.
Solution:
The operation is
0 1 1 1 0 1 0 0 0

0 1 1 1 0 1 0 0 0
C A
Result: [A] = %11101000 C = 0

Example 2.19 Suppose that [mem[$00]] = $F6 and C = 1. Compute the new values of
mem[$00] and the C flag after the execution of the instruction ASR $00.
Solution:
The operation is
1 1 1 1 0 1 1 0

1 1 1 1 1 0 1 1 0
mem[$00] C
Result: [mem[$00]] = %11111011 C = 0

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Example 2.20 Suppose that [mem[$00]] = $F6 and C = 1. Compute the new contents of
mem[$00] and the C flag after the execution of the instruction LSR $00.
Solution:
The operation is
0 1 1 1 1 0 1 1 0

0 1 1 1 1 0 1 1 0
mem[$00] C
Result: [mem[$00]] = % 01111011 C = 0

Example 2.21 Suppose that [B] = $BE and C = 1. Compute the new values of
B after the execution of the instruction ROLB.
Solution:
The operation is

1 0 1 1 1 1 1 0 1

0 1 1 1 1 1 0 1 1
B C
Result: [B] = % 01111101 C = 1

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Example 2.22 Suppose that [B] = $BE and C = 1. Compute the new values of
mem[$00] after the execution of the instruction RORB.
Solution:
The operation is

1 1 0 1 1 1 1 1 0

0 1 1 0 1 1 1 1 1
C B

Result: [B] = % 11011111 C = 0

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Example 2.23 Write a program to count the number of 1s in the 16-bit number stored
at $00-$01 and save the result in $02.
Solution:

* The 16-bit number is shifted to the right up to 16 time or until the shifted value becomes 0.
* If the bit shifted out is a 1 then increment the 1s count by 1.

org $C000
ldaa #$00 ; initialize the 1s count to 0
staa $02 ; “
ldd $00 ; place the number in D
loop lsrd ; shift the lsb of D to the C flag
bcc testzero ; is the C flag a 0?
inc $02 ; increment 1s count if the lsb is a 1
testzero cpd #0 ; check to see if D is already 0
bne loop
end

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Shift a multi-byte number

For shifting right

1. The bit 7 of each byte will receive the bit 0 of its immediate left byte with the
exception of the most significant byte which will receive a 0.
2. Each byte will be shifted to the right by 1 bit. The bit 0 of the least significant byte
will be lost.

Suppose there is a k-byte number that is stored at loc to loc+k-1.

method for shifting right

Step 1: Shift the byte at loc to the right one place.


Step 2: Rotate the byte at loc+1 to the right one place.
Step 3: Repeat Step 2 for the remaining bytes.

H. Huang Transparency No.2-46


The 68HC11 Microcontroller

For shifting left

1. The bit 0 of each byte will receive the bit 7 of its immediate right byte with the
exception of the least significant byte which will receive a 0.
2. Each byte will be shifted to the left by 1 bit. The bit 7 of the most significant byte
will be lost.

Suppose there is a k-byte number that is stored at loc to loc+k-1.

method for shifting left

Step 1: Shift the byte at loc+k-1 to the leftt one place.


Step 2: Rotate the byte at loc+K-2 to the left one place.
Step 3: Repeat Step 2 for the remaining bytes.

H. Huang Transparency No.2-47


The 68HC11 Microcontroller

Example 2.24 Write a program to shift the 32-bit number stored at $20-$23 to the
right four places.
Solution:

ldab #4 ; set up the loop count


ldx #$20 ; use X as the pointer to the left most byte
again lsr 0,X
ror 1,X
ror 2,X
ror 3,X
decb
bne again
end

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The 68HC11 Microcontroller

Program Execution Time

An easy way to create a delay is to use program loops. Use the instructions in Table 2.3 as
an example.
Table 2.3 Execution times of a sample of instructions
Instruction Execution time (E clock cycles)
BNE <rel> 3
DECB 2
DEX 3
LDAB <imme> 2
LDX <imme> 3
NOP 2

The following instruction sequence takes 5 µs to execute for 2 MHz E clock signal.

again nop ; 2 E cycles


nop ; 2 E cycles
dex ; 3 E cycles
bne again ; 3 E cycles

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The 68HC11 Microcontroller

Example 2.25 Write a program loop to create a delay of 100 ms.


Solution: A delay of 100 ms can be created by repeating the previous loop 20000 times.

The following instruction sequence creates a delay of 100 ms.


ldx #20000
again nop
nop
dex
bne again

Longer delays can be created by using nested program loops.

Example 2.26 Write a program to create a 10-second delay.


Solution: A 10-second delay can be created by repeating the loop in example 2.25 100 times.

ldab #100
outer ldx #20000
inner nop
nop
dex
bne inner
decb
bne outer

H. Huang Transparency No.2-50

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