HP54201AD Service Manual

W.J.
fiORD SUIiIPbUS ENTERPRISES

l DIVISION Of3125611 CANlDllNC.
2111lRkET ST. N. (comer 1IalUt' W11ti1!!lJ
P.O. Box 606. SMITHS FALLS, ONT. K7Am
TELEPHONE (813) ~~ S5 FAX (613)
SERVICE MANUAL
.~ HEWLETT
mg PACKARD
r/l;' HEWLETT
~~PACKARD
W.J. FORD SURPLUS ENTERPRISE'

A DIVISION OF 3125651 CANADA INC.
21 MARKET ST. N. (corner Market Ir Willilm)
SERVICE MANUAL P.O. Box 60S, SMITHS FALLS, ONT. K7A 4T1
TELEPHONE (613) 283-5195 FAX (613) 283-06
HP 54201A/D
DIGITIZING OSCILLOSCOPE
SERIAL NUMBERS
This manual applies directly to

instruments with serial number prefixes:
HP 54201 A; 2602A
Hp 54201 D; 2602A
For additional important information about serial numbers, see

INSTRUMENTS COVERED BY MANUAL in Section I.
@ COPYRIGHT HEWLETT·PACKARD COMPANY/COLORADO SPRINGS DIVISION 1986

1900 GARDEN OF THE GODS ROAD, COLORADO SPRINGS, COLORADO U.S.A
ALL RIGHTS RESERVED
Manual Part No. 54201-90902

Microfiche Part No. 54201-90802 PRINTED: JANUARY 1986
SAFETY
This product has been designed and tested according to international Safety Requirements. To ensure
safe operation and to keep {he product safe, the information, cautions, and warnings in this manual,
must be heeded. Refer to Section i and the Safety Summary for general safety considerations
applicable to this product.
This apparatus has been designed and tested in accordance with IEC publication 348, safety
requirements for electronic measuring apparatus, and has been supptiea in a safe condition. This
manuai contains some information and warnings which have to be tottowea by the user to ensure safe
operation and to retain the apparatus in safe condition.
CERTIFICATION
Hewtett-Peckert: Company certifies that this product met its published specifications at the time of
silipment from tile factory. Hewlett-Packard further certifies that its calibration measurements are
traceable to the United States National Bureau of Standards, to the extent euowea by the Bureau's
caiibration facility, and to the calibration facilities of other Internationat Standards Organization
members.
WARRANTY
This Hewlett-Packard product is warranted against defects in material and workmanship for a
period of one year from date of shipment. During the warranty period, Hewlett-Packard Company
will, at its option, either repair or replace products which prove to be defective.
For warranty service or repair, this product must be returned to a service facility designated by HP.
However, warranty service for products installed by HP and certain other products designated by
HP will be performed at Buyer's facility at no charge within the HP service travel area. Outside HP
service travel areas, warranty service will be performed at Buyer's facility only upon HP's prior
agreement and Buyer shall pay HP's round trip travel expenses.
For products returned to HP for warranty service, Buyer shall prepay shipping charges to HP and
HP shall pay shipping charges to return the product to Buyer. However, Buyer shall pay all
shipping charges, duties, and taxes for products returned to HP from another country.
LIMITATION OF WARRANTY
The foregoing warranty shall not apply to defects resulting from imp~oper or .inadequate
maintenance by Buyer, Buyer-supplied software or interfacing, unauthortzed modification or
misuse, operation outside of the environmental specifications for the product, or Improper site
preparation or maintenance.
NO OTHER WARRANTY IS EXPRESSED OR IMPLIED. HP SPECIFICALLY DISCLAIMS THE

IMPLIED WARRANTIES OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
EXCLUSIVE REMEDIES
THE REMEDIES PROVIDED HEREIN ARE BUYER'S SOLE AND EXCLUSIVE REMEDIES. HP
SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL INCIDENTAL, OR
CONSEQUENTIAL DAMAGES, WHETHER BASED ON CONTRACT, TORT, OR ANY OTHER LEGAL
THEORY.
ASSISTANCE
Product maintenance agreements and other customer assistance agreements are avaiiabie for
Hewlett-Packard products.
For any assistance, contact your nearest Hewiett-Packard Sales and Service Office. Addresses are
provided at the back of this manuai.
SCWA984
UP 54201A/D SERVICE MANUAL
Your Comments Please
Your comments assist us in improving the usefulness of our publications. Please complete this questionnaire
and return it to us. Feel free to add any additional comments that you might have. All comments and suggestions
become the property of HP.
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a. If so, please identify the areas.
b. What can we do to clarify these areas? _
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DEasy 0 Fairly Easy 0 Difficult 0 Quite Difficult
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4. What did you find to be most helpful in this manual? _
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SAFETY CONSIDERATIONS
GENERAL • This is a Safety Class I Instrument (provided o Do not Install substitute parts or perform any unauthorIzed
with terminal for protective earthing). modification to the Instrument.
OPERATION ~ BEFORE APPLYING POWER verify that the o Adjustments described In the manual are performed with
power transformer primary is matched to the available line power supplied to the Instrument while protective covers
voltage, the correct fuse Is Installed, and Safety Precautions are removed. Energy available at many points may, If
are taken (see the following warnings). In addition, note the contacted, result In personal Injury.
instrument's external markings which are described under
"Safety Symbols."
a Any adjustment, maintenance, and repair of the opened
instrument under voltage should be avoided as much as
I WARNING I possible, and when Inevitable, should be carried out only by

a skilled person who Is aware of the hazard Involved.
o Ser....lclng Instructions are for use by servlce-trarned o Capacitors Inside the Instrument may still be charged even
personnel. To avoid dangerous electric shock, do not If the Instrument has been disconnected from Its source of
perform any servicing unless qualified to do so. supply.
o BEFORE SWITCHING ON THE INSTRUMENT, the

protective earth terminal of the Instrument must be
connected to the protective conductor of the (mains) SAFETY SYMBOLS
powercord. The mains plug shall only be inserted In a
socket outlet provided with a protective earth contact. The ;';\ Instruction manual symbol. The product wllf be
protective action must not be negated by the use of an ill marked with this symbol when It Is necessary for
extension cord (power cable) without a protecttve the user to refer to the Instruction manual in order
conductor (grounding). Grounding one conductor of a two- to protect against damage to the product.
conductor outlet Is not sufficient protection.
a If this Instrument is to be energized via an Indicates hazardous voltages.

auto-transformer (for voltage reduction) make sure the
common terminal Is connected to the earth terminal of the
power source. -L Earth terminal (sometimes used in manual to
indicate circuit common connected to grounded
o Any interruption of the protective (grounding) conductor chassis).
(Inside or outside the Instrument) or dlsconnecttng the
protective earth terminal will cause a potential shock
hazard that could result in personal Injury.
IWARNING I The WARNING sign denotes a hazard. It
calls attenlion to a procedure, practice,
or the like, which, if not correctly
o Whenever it Is likely that the protection has been impaired,
performed or adhered to, could result In personal Injury. Do
the Instrument must be made Inoperative and be secured
not proceed beyond a WARNING sign until the Indicated
against any unintended operation.
conditions are fully understood and met.
o Only fuses With the required rated current, voltage, and

specified type (normal blow, time delay, etc.) should be ~ The CAUTION sign denotes a hazard. It
used. Do not use repaired fuses or short clrculted ~ calls attention to an operating procedure,
fuseholders. To do so could cause a shock or fire hazard. practice, or the like, which, if not
correctly performed or adhered to, could result in damage to
o Do not operate the instrument in the presence of flammable or destruction of part or all of the product. Do not proceed
gasses or fumes. Operation of any electrical instrument In beyond a CAUTION sign until the Indicated conditlons are
such an environment constitutes a definite safety hazard. fully understood or met.
S010984
HP 54201A/D-Table of Contents
TABLE OF CONTENTS
SECTION 1. GENERAL INFORMATION
Introduction 1-1
Manual Organization 1-1
Instruments Covered by This Manual 1-2
Description '" , " .. , 1-2
Accessories Supplied 1-3
Specifications , " , 1-3
General Characteristics 1-7
Operating Characteristics 1-9
Recommended Test Equipment 1-13
SECTION 2. INSTALLATION
Introduction , '" ., 2-1

Preparation for Use , , 2-1
Power Requirements 2-1
Line Voltage Selection 2-1
Power Cable , .. " .. , 2-1
Operating Environment 2-2
Cieaning Requirements 2-2 . ~~
Storage and Shipment 2-2
Environment , ,. '" 2-2
Packaging 2-3
SECTION 3. PERFORMANCE TESTS
Introduction , , , 3-1
Equipment Required 3-1
Test Record , , , 3-1
Calibration Interval 3-1
Recommended Test Equipment 3-1
Self Test Function Verification 3-3
DC Offset Accuracy Test 3-4
Voltage Measurement Accuracy Test 3-6
Bandwidth (-3dB) Test 3-8
Time Measurement Accuracy Test (Single and Dual Cursor) 3-11
Trigger (Analog) Level Accuracy Test 3-13
Trigger Sensitivity Test 3-15
Minimum Setup Time Test (HP 54201 D Only) 3-20
Minimum Hold Time Test (HP 54201 D Only) 3-25
Minimum Ciock Pulse Width Test (HP 54201 D Only) 3-30
Clock Repetition Rate Test (HP 54201 D) Only 3-35
Minimum Input Test (HP 54201 D Only) 3-39
Threshold Accuracy Test (HP 54201 D) 3-43
Performance Test Record 3-49
iv
HP 54201 AjD - Table of Contents
SECTION 4. ADJUSTMENT PROCEDURES
Introduction " , .. , '" , , .. , 4-1

Calibration Interval 4-1
Front-Panel Calibration 4-2
SYSTEM Calibration Menu 4-2
SYSTEM Test & Service Menu Calibration , , , 4-3
Equipment Required for Adjustments 4-5
Power Supply Adjustment , , 4-6
Display System Adjustment 4-8
Yoke Adjustment Procedure 4-8
Display Driver Adjustment Procedure 4-11
Analog Board Adjustments 4-14
Offset Adjustment Procedures 4-14
Input Compensation and Gain Adjustments 4-16
State Trigger Board Adjustment (54201D Only) 4-20
SECTION 5. REPLACEABLE PARTS
Introduction " ., , '" , , '" '" .. , 5-1

Abbreviations 5-1
Replaceable Parts List 5-1
Ordering Information 5-2
Direct Maii Order System 5-2
SECTION 6. SERVICE
Introduction , , , , , , , 6-1
Safety Considerations 6-1
logic Convention , '" ., , , 6-1
ECl Attributes ·· .. ·· · ·· .. · · 6-1
Removal and Installation of Mainframe Components 6-2
State Trigger Board Removal (HP 54201 D only) 6-3
CPU Board Removal 6-3
Power Supply Board Removal ·· .. ···················· 6-3
Analog Board Removal , 6-5
Motherboard Removal 6-5
Keyboard and CRT Removal , , , , , .. , , '" 6-5
Display Driver Board Removal 6-7
Troubleshooting 6-8
Self Test Failures 6-9
Board Replacement · · ··· 6-11
Product Support Kit 6-13
Key-Down Power-Up Reset 6-16
Troubleshooting Flowchart 6-18
Power Supply Voltage Check 6-23
Interface Stimulus Test , '" , , 6-24
Display Driver Signals 6-26
Keyboard Test 6-27
v
HP 54201A/D - Table of Contents
SERVICE GROUP GA. POWER SUPPLY
Introduction 6A-1
Safety Considerations 6A-1
Specifications 6A-2
Power Supply Block Diagram 6A-2
Power Suppiy Theory Of Operation , , " ., .. .. 6A-5
Primary Section 6A-5
Control Section 6A-6
Control Power Supply 6A-?
PWM Failure Modes 6A-?
Secondary Section 6A-1O
LED Failure Indications 6A-1O
Mnemonics 6A-13
APPENDIX A. SELF-TEST DOCUMENTATION
Introduction A-1
Self Test 0 - CPU/Memory A-1
Self Test 1 - Acquisition/Trigger A-2
Analog Board Self Tests A-3
State Board Self Tests A-4
Self Test 2 - Input A-8
vi
HP 54201A/D - General Information
SECTION 1
GENERAL INFORMATION
I WARNING I
Service information tnctuaeo in this manuai is for use of trained service
oersonnet. To avoid etectrtcet shock, do not perform any service
procedures in the manual or do any servicing to the HP 54201AID
unless you are qualified.
1-1. INTRODUCTION
This manual contains technical information concerning the installation, performance testing,
adjustments, and servicing of the HP 54201A and HP 54201 D Digitizing Oscilloscopes. When
information concerns both models the system will be referred to as the HP 54201AfD.
1-2. MANUAL ORGANIZATION

Section 1, General Information. This section contains a description of this manual and the
Instrument. This section also gives the specifications, general characteristics, operating
characteristics and recommended test equipment for the HP 54201A/D.
Section 2, Installation. This section explains how to prepare the HP 54201 AID for use.
Section 3, Performance Tests. This section describes both the self test capabilities of the HP
54201 AID as well as the procedures for the full Performance Test.
Section 4, Adjustments. The HP 54201 AID requires several adjustments to restore specified
performance after some major repairs have been made. This section provides the necessary
adjustment procedures.
Section 5, Replaceable Parts. This section contains ordering information and a list of all
replaceable parts in the HP 54201A/D system.
Section 6, Service. This section contains disassembly and assembly procedures and
documentation and procedures for isolation and replacement of faulty circuit boards.
Service Group 6A, Power Supply. This section contains block diagrams and component level
theory, troubleshooting and schematic information necessary to service the HP 54201 AID power
supply.
Appendix A, Self Test Documentation. This section contains an overview of how the HP 54201A/D
self tests we rk and what portions of the HP 54201 AID circuitry they check.
1-1
HP 54201 AID - General Information
1-3. INSTRUMENTS COVERED BY THIS MANUAL
Attached to the instrument is a serial number sticker. The serial number is in the form
OOOOAOOOOO. It is in two parts; the first four digits and the ietter are the serial prefix and the last
five digits are the suffix. The prefix is the same for all identical HP 54201A or HP 54201 D
instruments; the prefix only changes when a change is made to the instrument. The suffix,
however, is assigned sequentially and is different for each instrument. The contents of this manual
applies to instruments with serial number prefix(es) listed under SERIAL NUMBERS on the title
page. The serial number is also displayed on the HP 54201 AID screen when the SYSTEM
Peripherals menu is selected.
An instrument manufactured after the printing of this manual may have a serial number prefix not
listed on the title page. This unlisted serial prefix indicates the instrument is different from those
described in this manual. The manual for this newer instrument is accompanied by a yellow
Manual Changes supplement. The supplement contains "change information" that explains how to
adapt the manual to the newer instrument.
In addition to change information, the supplement may contain information for correcting errors in
the manual. To keep this manual as current and accurate as possible, Hewlett-Packard
recommends that you periodically request the latest Manual Changes supplement. The
supplement is identified by the manual print date and part number, both of which appear on the
manual title page. Complimentary copies of this supplement are available on request.
Shown on the title page is a microfiche part number. This number can be used to order 4 X 6 inch
microfilm transparencies of this manual. Each microfiche contains up to 96 photoduplicates of the
manual pages.
1-4. DESCRIPTION
The HP 54201A and HP 54201D Digitizing Oscilloscopes are dedicated, two-channel,
simultaneous, waveform acquiring digital storage oscilloscopes with full HP-IB programmability,
digitized waveform data output, and resident parametric waveform measurements.
The HP 54201A/D is a generai purpose digitizing oscilioscope with 300 MHz repetitive ?andV1dd.th
and a single-shot digital storage bandwidth of 50 MHz (200 rneqesamptes/secono) With Infinite
store time and waveform data output. It also provides parametric information about the analog
characteristics of waveforms.
The HP 54201 D has all the features of the HP 54201A with the addition of parallel and serial logic
trigger qualification capabilities. The HP 54201 D includes 3 pods, each containing 8 bit + 1 parity
bit + clock organization.
1-2
HP 54201AjD - General Information
The key features of the HP 54201AjD Digitizing Oscilloscopes are:
• 300 MHz repetitive bandwidth with ±200 ps lime-interval accuracy.
• 200 megasamplesjsecond sample rate, 50 MHz single-shot bandwidth using post capture
data interpolation.
• Capture two channels simultaneously.
• Holdoff-by-events to trigger acquisition alter a specified number of events.
• Pre-trigger viewing.
• All front panel controllabie parameters can be programmed via HP-IB.
• Continuously updated automatic waveform parameter measurements with user-defined

thresholds.
• Waveform math: Ch1+Ch2 and Ch1-Ch2.
• Set up aids such as automatic waverform scaling, ECl/TTl preset levels, and save/recall of
front-panel setups.
• One button hardcopy to HP-IB printers and plotters.
• Digital logic trigger qualification (HP 54201 D only).
1-5. ACCESSORIES SUPPLIED
The following accessories are supplied with the instruments:
HP 54201AjD: Two HP 10017A 10:1 divider probes.

One BNC to probe tip adapter.
One 2.3 meter (7.5 It) power cord.
One Operating and Programming Manual.
One Service Manual.
HP 542010 (only): Three HP 10271A 10-bit State Data Probes.
1-6. SPECIFICATIONS
Instrument specifications are listed in table 1-1. These specifications are the performance
standards or limits against which the instrument is tested.
1-3
Table 1-1. Specifications
HP 54201 A and HP 542010 1,2
VERTICAL (CHANNEL 1 AND 2)
Range: 40 mV to 16 V full-scale, calibrated with two digit resolution.
Gain Accuracy: ±2% of full-scale. 3
Analog to Digital Conversion (ADC) Accuracy: ±1.6% of full-scale.
Dc Offset Accuracy: Channel Range Offset Accuracy
40 mV to 790 mV ±1% of offset ±5 mv

800mVt016V ±1% of offset ±100 mV
Dc Offset Range/Resolution: Channel Range Offset Range Offset Resolution
40 mV to 790 mV ±1.5 V 1 mV
800mVt016V ±30 V 20 mV
Voltage Measurement Accuracy (DC):
Single Cursor (X or 0): Gain Accuracy + ADC Accuracy + Offset Accuracy
Dual Cursor (X to 0 measurements on the same waveform): Gain Accuracy + 2 * (ADC Accuracy)
Bandwidth (-3 dB): Coupling Real Time Sampling Repetitive Sampling
Dc Dc to 50 MHz Dc to 300 MHz

Ac 10 Hz to 50 MHz 10 Hz to 300 MHz
Transition Time (10% to 90%): Real Time Sampling: 7 ns

(Calculated from: Bandwidth X Transition Time = 0.35) Repetitive Sampling: 1.2 ns
Input Coupling: ac or de.
Input RC (Nominal): 1 MQ shunted by approximately 10 pF (ae or de)

50Q de
Input Operating Range (dc + peak ae): ±1 vertical range from center.
Maximum Safe Input Voltage: 1 MQ ae or de: ±40 V (de + peak ae)

50Q de: 5 Vrms or ±40 V (de + peak ac), whichever is less
1-4
Table 1-1. Specifications (continued)
TIME BASE (HORIZONTAL)
Range (10 divisions, in a 1-2-5 sequence): Real Time Sampling: 50 ns to 10 s full-scale

Repetitive Sampling: 10 ns to 20 /.Is full-scale
Time Base Accuracy (Single and Dual Cursors):

Real time: ±2 ns or ±0.2% of time range, whichever is greater. 4
Repetitive Sampling: ±200 ps or ±0.2% of time range, whichever is greater. 4
DELAY (TIME OFFSET)
Pre-Trigger Range:
Sampling Mode Time Range Pre-Trigger Range
Real Time 50 ns to 5 /.IS Up to 10 /.IS

10 /.Is to 10 s Up to 2 screen diameters
Repetitive 10 ns to 20 /.IS Up to 2 screen diameters
Post-Trigger Range: At least 200 screen diameters.
Pre/Post.Trigger Resolution: Adjustable in steps of 0.1 (coarse) and 0.001 (fine) screen
diameters, or the least significant digit, whichever is greater.
TRIGGER (ANALOG)
Sources: Channel 1, channel 2, or External trigger input.
Channel 1, Channel 2 External Trigger
Level Accuracy: ±3% ±5 mV (40 mV to 790 mv) ±3% ±30 mV

(full scale) ±3% ±100 mV (800 mV to 16 V)
Sensitivity: 1/8 of full scale 100 mVp-p (de to 250 MHz, 500 coupled)
(de to 250 MHz) 1 Vp-p (de to 100 MHz, .2 MO 5 coupled)
Range: 1.5 times full scale ±2 V
Resolution: 0.02 times full scale 20 mV
External Trigger Input:
Input Coupling: Dc
Input Resistance: 500 or .2 Mo 5
Maximum Safe Input Voltage: .2 MQ de: ±40 V (de + peak ac)

50Q de: 5 Vrms or ±40 V (de + peak ac), whichever is less
Input Operating Range: ±5 V (de + peak ae)
1-5
Table 1-1. Specifications (continued)
HP 542010 (only)
STATE TRIGGER MODE
Clock Repetition Rate:
Single Phase: 25 MHz maximum with single clock and single edge specified; 20 MHz
maximum with any ORed combination of clocks and edges.
Multiplexed: Master-slave clock timing; master clock must follow slave clock by at least 10
ns and precede next slave clock by 50 ns or more.
Minimum Clock Pulse Width: 20 ns at threshold.
Minimum Setup Time: 20 ns, the time data must be present prior to the clock transition.
Minimum Hold Time: 0 seconds, the time data must be present after the clock transition.
HP 10271A STATE PROBES
Input RC: 100 kQ ±2% shunted by approximately 5 pF at the probe body.
Minimum Input: 600 mV p-p,
Minimum Input Overdrive: 250 mV or 30% of input amplitude whichever is greater.
Maximum Sale Input: ±40 V peak.
Threshold Range: -9.9 V to +9.9 V in 100 mV increments.
Threshold Accuracy: ±2.5% ±120 mY.
Dynamic Range: ±10 V about threshold.
Notes
1. Specifications apply after a 30 minute warm up period.

2. Real-time reconstruction uncertainty ±1 ns (applies to time ranges of 50 ns to 2I1s).
3. Specifications apply within ±10° C of Auto-calibration temperature.
4. Duai cursor specifications apply for measurements made on the same or simultaneously acquired
waveforms.
5. Provides 10:1,1 MQ input at HP 10017A or HP 10018A probe tip.
1-6
1-7. GENERAL CHARACTERISTICS

Table 1-2 lists general characteristics, not specifications, but typical characteristics included as
additional information for the user.
Table 1-2. General Characteristics
REAR-PANEL BNC OUTPUTS
One output BNC is located on the rear panel with TTL output levels. High is ,,2 V into 50Q;
low is ~0.4 V into 50Q. This output maybe programmed from the front panel or remotely via
HP-IB to provide the following output waveforms:
HP 54201A and HP 54201D
• Constant low
• Constant high
• 2.000 kHz probe compensation source
(If used without 50Q de coupling, falling edge must be used for compensation)
• High on trigger
• High on frame complete
• High on acquisition complete
HP 54201D only
• Pulse on state sequence true

• High on state sequence true
• Pulse on state master clock
POWER REQUIREMENTS
Voltage: 115/230 Vac, -22% to +10%; 48 to 66 Hz.
Power: 275 W maximum.
ENVIRONMENTAL CONDITIONS
Temperature: Operating: 0 to +55°C (+32 to +131° F).

Non-operating: -40 to +75°C (-40 to +167° F).
Humidity: Operating: Up to 90% relative humidity at +400 C (non-condensing).
Non-operating: Up to 95% relative humidity at +65 0 C.

Altitude: Operating: Up to 4600 meters (15 000 feet).
Non-operating: Up to 15 300 meters (50 000 feet).
Vibration: Vibrated in three planes for 15 minutes each with 0.38 mm (0.015 inch)
excursions at 5 to 55 Hz.
X-RAY EMISSION: Less than 0.05 mr/hr measured with Victorean Model 440RF/C.
1-7
Table 1-2. General Characteristics (Continued)
WEIGHT
HP 54201A: net 11.4 kg (25 Ibs); shipping 15.9 kg (35 Ibs).

HP 542010: net 12.7 kg (28 Ibs); shipping 21.8 kg (38 Ibs).
DIMENSIONS
Notes:
1. Dimensions are for general information only.

If dimensions are required for building special
enclosures, contact your HP field engineer.
2. Dimensions are In mltltrnetres and (Inches).
f\ fF I
TOP
?lr.CCl:lIccccl!
1>- ClCCDCC
I- 447(17-%) 1 I I- 426(16-%) -I
I 1
° DOl
A SIDE
0
L...J
=
I
c::::J =0
REAR
0 '--
1-8
HP 54201 A/D - General Information
1-8. OPERATING CHARACTERISTICS
Table 1-3 lists the Operating Characteristics, a summary of the HP 54201 AID operating
capabilities.
Table 1-3. Operating Characteristics
HP 54201A and HP 54201D
DIGITIZER
Digitizing Technique:
Real-Time Digitizing: all data points are acquired on a single acquisition.
Random Repetitive Digitizing: data points are acquired on multiple acquisitions.
Digitizing Rate: 100 samples/second to 200 rneqasamples/second (determined by the time

base range setting and acquisition mode).
Resolution: 6 bits; 1 part in 64; effective resolution may be increased up to 7 bits by using
data filtering and averaging.
Acquisition Record Length: 1001 samples (1000 intervals).
CHANNEL 1 and 2 INPUTS (VERTICAL)
Probe Factors: 1:1,2:1,5:1,10:1,20:1,50:1, or 100:1 probe attenuation factors may be

entered to scale the voltages as seen by the probe tips.
Channel Isolation: 50 dB from de to 50 MHz

40 dB from 50 MHz to 300 MHz
with channels set to equal voltage ranges
TIMEBASE (HORIZONTAL)
Expand Mode: X and 0 cursors can be used to window an area of interest and expand
it to full screen.
Reference Location: The reference point can be positioned at the left edge, center, or right
edge of the display. The reference point is that point where the time is
offset from the trigger point by the delay time.
1-9
Table 1-3. Operating Characteristics (Continued)
TRIGGER (ANALOG)
Level Range:
Centered Mode: Trigger level tracks the offset level of the internal trigger source selected
(tracks either channel 1 or 2).
Adjust Mode: Trigger level may be adjusted independently of the offset level, when an
internal trigger source has been selected.
Edge: Positive or negative slope may be selected for any source.
Holdoff-by-events: Range of events counter is from 1 to 59999 events. Maximum counting

rate is 50 MHz. An event is defined as anything that satisfies the
triggering conditions selected.
DISPLAY
Data Display Formats: One, two or four waveforms can be displayed at the same time. They
can be live waveforms (Channel 1 or Channel 2) or stored waveforms
(from waveform memories O. 1,2, or 3) in any combination.
Display/Store Modes:
Normal: The display is repetitively updated with each new waveform acquisition.
Accumulate: All successive waveform acqulsitlcns are displayed until erased. Erasure
modes are manual. slow (after 64 acquisitions) and fast (after 16 acquisitions).
Envelope: Provides a display of fhe running maximum and minimum voltage at each
sample point for a repetitive input waveform.
Average: Provides a display of the average voltage at each sample point for 4, 16, 64, or
256 user defined waveform acquisitions. On each acquisition, 1/n times the
new data is added to (n-t )/n of the previous value at each time coordinate.
Operates in a continuous mode.
connect-the-dots. Provides a display of the sample points connected by straight lines.
Reference Lines: Two horizontal reference lines may be defined and displayed for each
graph. Reference lines may be positioned in terms of voltage or percent of
waveform amplitude. When making automatic measurements, these lines
indicate the upper and lower measurement thresholds.
Gralicules: Full grid or frame with lie marks.
1-10
MEASUREMENT AIDS
Automatic Measurements: The following waveform measurements can be performed

automatically on real-time or stored waveforms. The standard
measurement thresholds are the 10%, 50%, and 90% points of the
waveform. In the User Defined mode; voltages, percentages, or
ECl and TTL presets may be used to define the upper and lower
thresholds. Measurements are continuously updated with each
new acquisition.
Frequency Duty Cycle

Period Delay (average, max, min, and last)
Positive Pulse Width Vamplitude
Negative Pulse Width Vmaximum
Rise Time Vminimum
Fall Time Vrms
Waveform Math: Waveform subtraction (channel 1 - channel 2) and waveform addition

(channel 1 + channel 2) may be selected as an acquisition mode.
Cursors: Two cursors (X and 0) are provided for making voltage and time measurements on
displayed waveforms. Both absolute and differntial vaiues are provided. Dual
cursor measurements can be made between two points on the same waveform or
between two points on different waveforms.
Waveform Memories: Four memories are provided for waveform storage. All memories are
non- volatile. labels may be assigned to each memory.
SETUP AIDS
Auto-Scale: Pressing the Auto-Scale key sets the vertical and horizontal ranges, offset level,
and trigger level to display the input signals. Period, + pulse, - pulse, rising edge,
or falling edge may be selected as the horizontai display criteria. Requires a duty
cycle of >1%, frequency >50 Hz, and amplitude >20 mV peak. Vertical,
horizontal, and trigger auto scaling functions may be selectively enabled or
disabled.
Presets: Scales the vertical range, offset and trigger level to predetermined values for
displaying ECl or TTL waveforms.
Setup Memories: Four front panel setups (O through 3) may be saved in non-volatile
memory. Labels may be assigned to each setup.
1-11
HP 54201AjD - General Information
PROGRAMMABILITY
All instrument settings and operating modes including automatic waveform measurements
may be remotely programmed via HP-IB (IEEE-488). HP-IB programming complies with the
recommendations of IEEE Std. 728-1982, "Recommended Practice for Code and Format
Conventions" .
HARDCOPY OUTPUT
The CRT display, including menus, can be transferred directly to HP-GL compatible digital
plotters and HP-IB raster graphics printers. The peripheral used must have listen-only mode.
HP 542010 (Only)
STATE TRIGGER MODES1
Slale Only: Triggers waveform acquisition immediately after the state sequence specification
has been fulfilled.
State Arms Analog: Arms the analog trigger when the state sequence specification has been
fulfilled.
ASSIGNMENT
Stale Modes:
Normal: State patterns up to 27 channels wide may be defined as trigger qualification.

Up to four unique state patterns can be qualified on in a user defined sequence.
Qualified: State sequence search does not begin until after the qualify clock has occurred.
The slave clock is defined as the qualify clock.
Missing Bil: Predefines the last state in the sequence specification to detect a missing bit in
a string of serial data and triggers the acquisition.
Extra Bit: Predefines the last state in the sequence specification to detect an extra bit in a
string of serial data and triggers the acquisition.
Clocks: Three ORed clocks operate in a single-phase or two-phase demultiplexing mode.

Clock edge is selectable as positive, negative, or both edges for each clock.
Different edge selections may be made on the same clock if it is used in each
phase of the multiplexed mode.
Labeling: Up to eight different five-character labels may be designated for any combination
of input lines for ease in setting specifications.
1-12
HP 54201A/D - General Information HP 54201A/D - General Information
Table 1-3. Operating Ctierecteristtcs (Continued)
SEQUENCE
Resources: Four user-defined terms (a.b,c, and d) plus the "not equal" of these terms ("a, seb,
"c, "d), Any State, or No State may be used in any combination. A term is the
AND combination of bit patterns in each label. Each term can be the
combination of up to eight user defined labels. Terms may be used as often as
desired.
Trigger: Up to four resource terms may be used in any sequence to establish the state
trigger specification. The last term in the sequence may use up to four resource
terms in an ORed or ANDed format.
Occurrence: Occurrence of the last event in the sequence may be specified up to n = 59999.
Restart: One to four resource terms may be used in an ORed condition for a sequence
restart condition.
Nofes
1. State Trigger Modes use HP 10271A probes for state inputs.
1-9. RECOMMENDED TEST EQUIPMENT
Table 1-4 lists the equipment required to adjust, performance test, and troubleshoot the HP
54201A/D. Other equipment may be substituted if it meets or exceeds the critical specifications
given in table 1-4.
1-13
Table 1-4. Recommended Test Equipment "
~J
INSTRUMENT CRITICAL SPECIFICATIONS RECOMMENDED USE'
MODEL
Signature HP-IB controllable, with DVM HP 5005B A,T

Multimeter Range: -50 V to +50 V DC
Accuracy: 0.5%
Pulse Generator Dual channel HP 8161A P,A

Repetition rate: 100 MHz opt 020
Transition time: 1.3 ns, variable
Amplitude: 5 volts
Basic timing accuracy: ~3%
Signal Generator Frequency: 100 kHz to 300 MHz HP 8656B P

Output Level Accuracy: ±1 dB
Power Meter Accuracy: ±3% to 300 MHz HP 436A P

(must match power sensor used)
Power Sensor HP 8482A P
Power Splitter 50Q HP 11667A P
Dc Power Supply Range: ±100 mV to ±5 V HP 6114A P

Accuracy: ±0.1 %
Blocking capacitor 0.18 jJ.F, 200V HP 10240B P
50Q Terminator Accuracy: <:1 % HP 10100C P,A
Product Support Kit No Substitute HP Part No. 54200-69501 P,A,T
Resistive Divider Kit 100:1 resistive divider HP 10020A A
Adapter BNC(f)-to-Dual banana HP Part No. 1251-2277 P
Adapter Type N(m)-to-BNC(f) HP Part No. 1250-1476 P
Adapter Type N(m)-to-BNC(m) HP Part No. 1250-0082 P
Adapter BNC(f)-tO-BNC(f) HP Part No. 1250-0080 P,A
BNC Tee (Qty 2) 1 male, 2 female HP Part No. 1250-0781 P,A
BNC Cable (Qty 2) 9-inch HP 10502A P,A
BNC Cable (Qty 4) 48-inch HP 10503A P,A
Type N(m) Cable 24-inch HP 11500B P
, P=Performance Testing, A=Adjustments, T=Troubleshooting
1-14
HP 54201 AID - Installation
SECTION 2
INSTALLATION
2-1. INTRODUCTION
This section contains the initial operation information for the HP 54201AfD. Included are power
and grounding requirements, operating environment requirements, cleaning methods and storage
and shipment requirements.
2-2. PREPARATION FOR USE

2-3. Power Requirements
The HP 54201A/D requires a power source of either 115 or 230 VAC -22% to +10%; single phase,
48 to 66 Hz; 275 watts maximum.
[:~~~~]
The instrument may be damaged if the Line Voitage Select Switch
is not properly set to match the input voitage.
2-4. Line Voltage Selection
Before turning ON the instrument verify that the Line Voltage Select Switch on the rear panel
matches the input line voltage. The 6 Amp fuse installed satisfies both voltage settings of 115 and
230 VAC.
2-5. Power Cable
This instrument is equipped with a three-wire power cable. When connected to an appropriate AC
power outlet, this cable grounds the instrument cabinet. The type of power cable plug shipped
with the instrument depends on the country of destination. See figure 2-1 for option numbers of
power cables and plug configurations available. Part numbers for each cable option are listed in
the replaceable parts section of this manual.
CPT[OO 992 (PTIm STD.

CAEl£_ toP e12B~16g2
""""'"
C(NTltOIT
c:fITICH 912
CA9..E)t toP 8120-2951
~ OPTlQIl 913&
CAELEII loP 9120-2'296
SWITZERLFI\lD
CAIl.,E:* loP 812a--1521
u.s.~
~ 250Y OPERArICN
~ 220\1' (IF'ERATJCN
~
~EIV CPERATtCN
~
iasv Cf'ERFITiON
OPTION 9131 fl./S1"RAILIA CPTION 904 U.S.~ OF'riOl 9 . .....IiED K[t«i[k)1
CAEIl..E:i1 Hl' 812B-e;96 foEW Z<flA<D CAa..E:1t I-P 812B-BS98 (ABL.£11 tF' 8120-1103
~
250V OF'ERATIQII
~ ~.
2S0V <l"ERATlON
Q 250V OF'£RAT ION
Figure 2-1. Power Cord Configurations
2-1
HP 54201 A/D - Installation
<:>
2-6. OPERATING ENVIRONMENT
The operating environment is noted in table 1-2. Note should be made of the non-condensing
humidity limitation. Condensation within the instrument can cause poor operation or malfunction.
Protection should be provided against internal condensation.
The HP 54201A/D will operate to all specifications, within the temperature and humidity range
given in table 1-2. However, reliability is enhanced by operating the instrument within the following
ranges.
Recommended Temperature: +20 to +35° C (+68 to +95° F)

Recommended Humidity: 20% to 80% non-condensing
High temperature/humidity combinations should be avoided.
2-7. CLEANING REQUIREMENTS
When cleaning the HP 54201 A/D, CAUTION must be exercised on which cieaning agents are used.
USE MILD SOAP AND WATER. If a harsh soap or solvent is used, the water-base paint finish
WILL BE damaged.
BE CAREFUL when cleaning the keyboard. Water can damage the

keyboard circuitry if it seeps under the keys.
2-8. STORAGE AND SHIPMENT
2-9. Environment
The instrument may be stored or shipped in environments within the following limits:
Temperature: _40°C to ,-75°C

Humidity: Up to 90% at 65°C
Altitude:... Up to 15 300 metres (50 000 Feet)
The instrument should also be protected from temperature extremes which cause condensation
within the instrument. Condensation within the instrument may cause malfunction if the
instrument is operated under these conditions.
2-2
HP 54201A/D - Installation
2-10. Packaging
2-11. TAGGING FOR SERVICE. If the instrument is to be shipped to a Hewlett-Packard office for
service or repair, attach a tag showing owner (with address), complete instrument serial number,
and a description of the service required.
2·12. ORIGINAL PACKAGING. If the original packing material is not available or is unserviceable,
material identical to those used in factory packaging are available through Hewlett-Packard offices.
If the instrument is to be shipped to a Hewlett-Packard office for servicing, attach a tag showing
owner (with address), model number, complete instrument serial number, and a description of the
service required. Mark the container FRAGILE to ensure careful handling. In any correspondence,
refer to the instrument by model number and serial number.
2-13. OTHER PACKAGING. The following general instructions should be used for repacking with
commercially available materials.
a. Wrap instrument in heavy paper or plastic.
b. Use a strong shipping container. A double-wall carton made of 350 lb. test material is
adequate.
c. Use a layer of shock-absorbing material 70 to 100 mm (3 to 4 inch) thick around all sides of
the instrument to provide firm cushioning and prevent movement inside the container.
Protect control panel with cardboard.
d. Seal Shipping container securely.
e. Mark shipping container FRAGILE to ensure careful handling.
f. In any correspondence, refer to instrument by model number and full serial number.
2-3/(2-4 blank)
,
.:»
HP 54201 AID - Performance Tests
SECTION 3
PERFORMANCE TESTS
3-1. INTRODUCTION
This section describes the HP 54201AfD Self Tests and Performance Test Procedures. The Self
Tests, resident in ROM, are a series of tests that confirm proper function of the mainframe
hardware and firmware. While the Self Tests provide the user with a confidence level of greater
than 90%, it does not verify the critical specifications given in table 1-1 of Section 1. The
Performance Tests test for complete instrument compliance to these critical specifications.
3-2. EQUIPMENT REQUIRED
The only equipment required for the Self Test is a standard BNC cable, 1 meter in iength. The
equipment required to perform the Performance Tests is listed in table 3-1. Other equipment may
be substituted if it meets or exceeds the critical specifications listed in table 3-1.
3-3. TEST RECORD
Results of performance tests may be tabulated on the Performance Test Record (table 3-2) at the
end of this section. The Test Record lists all of the tested specifications and their acceptable
limits. The results recorded at incoming inspection can be used for comparison in periodic
maintenance and troubleshooting and after repairs or adjustments.
Note
AI/ow instrument to warm up for at least 30 minutes prior to beginning

performance tests.
3-4. RECOMMENDED TEST EQUIPMENT

Table 3-1 lists the equipment required to performance test the HP 54201A/D. Other equipment
may be substituted if it meets or exceeds the critical specifications given in table 3-1.
3-1
HP 54201A/D - Performance Tests
Table 3-1. Recommended Test Equipment
INSTRUMENT CRITICAL SPECIFICATIONS RECOMMENDED

MODEL
Pulse Generator Dual channel HP 8161A opt 020

Repetition rate: 100 MHz
Transition time: 1.3 ns, variable
Amplitude: 5 volts
Basic timing accuracy: ;;3%
Signal Generator Frequency: 100 kHZ to 300 MHz HP 8656B

Output level accuracy: ±1 dB
Power Meter Accuracy: ±3% to 300 MHz HP 436A

(must match power sensor used)
Power Sensor HP 8482A
Power Splitter 50n, de to 300 MHz HP11667A
Dc Power Supply Range: ±100 mV to ±5 V HP 6114A

Accuracy: ±0.1%
Blocking capacitor 0.18 fJ.F, 200V HP 10240B
50Q Terminator Accuracy: ;;1% HP 10100C
Product Support Kit No Substitute HP Part No. 54200-69501
Adapter BNC(f)-to-Dual banana HP Part No. 1251-2277
Adapter Type N(m)-to-BNC(f) HP Part No. 1250-1476
Adapter Type N(m)-to-BNC(m) HP Part No. 1250-0082
Adapter BNC(f)-to-BNC(f) HP Part No. 1250-0080
BNC Tee (Qty 2) 1 male, 2 female HP Part No. 1250-0781
BNC Cable (Qty 2) 9-inch HP 10502A
BNC Cable (Qty 4) 48-inch HP 10503A
Type N(m) Cable 24-inch HP11500B
3-2
HP 54201AjD - Performance Tests
3-5. SELF TEST FUNCTIONAL VERIFICATION
The Self Tests, resident in ROM, are a series of tests that confirm proper function of the mainframe
hardware and firmware. While the Self Tests provide the user with a confidence level of greater
than 90%, they do not verify the critical specifications given in table 1-1 of Section 1. Perform the
Performance Tests for complete instrument compiiance to these critical specifications.
To execute the self tests, press the SYSTEM menu key, then press the NEXTjPREV key until the
Test & Service menu is displayed as shown below. Using the Field arrow keys, move the biinking
cursor to the Execute Selftest field. Enter either 0, 1, or 2 and follow the instructions displayed on
screen. An audible beep will be heard when each self test has been completed.
A failure of a seif test should be followed by resident SYSTEM menu calibration routines 0, 5, and 6
(in this order). The self tests snould then be re-selected to check whether the self-calibration
routines corrected the error. Repeated failure of a self-test, or faiiure of a self-caiibration routine
may dictate the need of a particular hardware adjustment.
System SpeCification Status: Acquired Frame 01181 __ .

TALk OI1L ,,'
[ Test & SerVice ]
Execute Self test •
o CPU/I\1emorl~
1 AcqUiBiti~n/Trigger
'2 Input
Execute Service.
o TirneHull
1 Ext Trigger Null
2 Ext Trigger HystereSiS
3 Hardware Service
Figure 3-1. SYSTEM Self Tests Menu
PERFORMANCE TESTS
After the instrument has warmed up at least 30 minutes, perform a key-down power-up reset. This
will preset the HP 54201 AID to a predetermined condition and clear the display memory. Hold any
front panel key down while applying power to the instrument. Hold the key down long enough for
the power-up tune to be completed.
3-3
PERFORMANCE TESTS
3-6. DC OFFSET ACCURACY TEST
Specification:
Channel Range Offset Accuracy
40 mV to 790 mV ±1% of offset ±5 mV

800mVt016V ±1% of offset ±100 mV
Equipment Required:
DC Supply HP 6114A
BNC(f)-to-Dual Banana Adapter HP Part No. 1251-2277
Procedure:
1. Configure STATUS Configuration menu as shown in figure 3-2.
2. Connect the output of the DC Supply to Channel 1 input of the HP 54201 A/D.
3. Apply +1.00 V from DC Supply to Channel 1 input.
4. Press the DISPLAY menu key and select one graph with Channel 1 displayed.
5. The display should appear similar to figure 3-3.
6. Select the Vmin and Vmax measurements for Channel 1 on the HP 54201 A/D. The limits are
0.98 V and 1.02 V.
7. Apply -1.00 V from the DC Supply to Channel 1 input.
8. Set HP 54201 A/D Channel 1 offset to -1.00 V.
9. The limits of Vmin and Vmax for Channel 1 are -0.98 V and -1.02 V.
10. Set HP 54201A/D Channel 1 voltage range to 800 mY.
11. The limits of Vmln and Vmax for Channel 1 are -0.89 V and -1.11 V.
12. Apply +1.00 V from the DC Supply to Channel 1 input.
13. Set HP 54201A/D Channel 1 offset to +1.00 V.
14. Limits of Vmin and Vmax for Channel 1 are 0.89 V and 1.11 V.
15. Repeat steps 3 through 14 substitutinq Channel 2 for Channel 1.
3-4
PERFORMANCE TESTS
Confl uratlOn] _________Status: Acquired Frame 00258 __

TALK OIelL'i
Setup Label
Input 2
Pange 40 mV CPR [ Auto ]
Offset 1. 0 0 V 1. 000 V 1. 00 us
Probe [ 1: 1 [ 1: 1 ] [Real TIme
Coupl ing [de J [1 MoJ [de J t i rto 0.00000 S
S'tore tlcce [Ave [4 J [Ave] [4 ] [ Center
Auto Sc el e [Enabled J [ Enabled [ PerIod
Labe 1
.,m_
Tr' igger------~----~-----------------~
~ Refer to State Trigger Menus
Analo Onl ] for Ass iqnmen t and Sequence
-~- ,'.1···dW
Analog Son-c e Auto Scale
Level 1.
[I II On Even t
Pr- ob e [ 1: 1 ] Coupling [de ] t i Mn
Figure 3-2. STATUS Configuration Menu
________________________________ Status: Acquired Frame 00173 _

TALK ONLY
II max 999 mil D
V min D~ 998 mV
Gr-eph . . . 5.00 mV/div 1. 0[1 \I 1[10 ns/di'J 100.[1 Fie
1: '..;F....'
Figure 3-3e DISPLAY Waveform
3-5
HP 54201 A/D - Performance Tests
PERFORMANCE TESTS
3-7. VOLTAGE MEASUREMENT ACCURACY TEST

Single Cursor (X or 0)
Specification:
Gain Accuracy + ADC Accuracy + Offset Accuracy
= (±2% of + (±1.6% of + (±1% of offset ±5 mY) 40 mV to 790 mV range

full scale) full scale) (±1% of offset ±100 mY) 800 mV to 16 V range
Equipment Required:
DC Supply HP 6114A
Procedure:
2. Connect the output of the DC Supply to Channelt input of the HP 54201 AID.
3. Apply +100 mV from DC Supply to Channel 1 input.
4. Press the DISPLAY menu key and select one graph with Channel 1 displayed. I
-..:»
5. The display should appear similar to figure 3-5.
6. Display the cursor values by pressing the VALUES key on the 54201 A/D. The limits of Vx are
84 mV to 116 mY.
7. Apply·1 00 mV from DC supply to Channel 1 input.
8. Limits of Vx are -84 mV to -116 mY.
9. Apply -5.00 V from DC Supply to Channel 1 input.
10. Set HP 54201A/D Channel 1 voltage range to 16 V.
11. Limits of Vx are -4.32 V to -5.68 V.
12. Apply +5.00 V from DC Supply to Channel 1 input.
13. Limits of Vx are 4.32 V to 5.68 V.
14. Repeat steps 2 through 13 substituting Channel 2 for Channel 1.
3-6
PERFORMANCE TESTS
Stetus If.on F 1 urat Ion] _________Status: No Trigger Found .

TALI; O~IL 'r'
Se t up Label
- - - - - - - - - - - T i rnebase----------,
1 Input 2 SamplIng @ 200 MH=
Panqe 3 0 mV tloce [ uto ]
Offset Range 1. 0 s
Probe Ac:qu i roe [Real 1me
Loup I i nq Ire 181.j 0.00000 s
St.or e Flode Reference [ enter
Auto Sc a I e Auto Scale [ erlod
Label
T~~ i 9£1er - - - - - - - - - - - - - - - - - - - - - - - - - - -
* Refer to State Trigger Menus
110de [ Rnalo Onl~ ] for ASSignment and Sequence
Analog Sour-ce
Pr-cb e [ 1, 1
'1..=.
I."m••,""G'dWi
Q
Leve 1 '''#11,,4'4;"
]
O.lI V
Auto Scale [ Enable
On Event
Co up 1 i ng
Imm.l
[de ] [l ~Il"i
________________________________Status: Acquired Frame 00490 _

TALK om,'(
V ma)~ D 99.2 mV
V min D = 96.8 mV
[I. 00 V 1013 ns/div iaa. [I ru
x Se l ec t.ed I!l-~-._----------
~~-.~~-- .
ClW80r~ X
98.0 mV
1130 ns
Cur-eor- 0
98.0 mV
1813 ns
Cur-e cr- 0-><
13.130 \I
13.013 s
Figure 3-5. DiSPLAY Waveform
3-7
HP 54201AID - Performance Tests
PERFORMANCE TESTS
3-8. BANDWIDTH (-3dB) TEST
Specification:
Coupling Real Time Sampling Repetitive Sampling
Dc Dc to 50 MHz Dc to 300 MHz

Ac 10 Hz to 50 MHz 10 Hz to 300 MHz
Equipment Required:
Signal Generator HP 8656B

Power Meter HP 436A
SOn Power Splitter ,... ... . HP 11667A
Type N(m) Cable. 24-inch HP 11500B
Type N(m)-to-BNC(m) Adapter HP Part No. 1250-0082
Note
Ensure that Power Meter has been zeroed and calibrated to match Power Sensor.
Procedure:
Real Time
1. Configure STATUS configuration menu as shown in figure 3-6.
2. Configure test equipment as shown in figure 3-7.
3. Set Signal Generator sinewave output to 200 kHz, 0.5 V amplitude.
4. Set Power Meter Cal Factor % to 200 kHz value from cal chart, then press dB[REF] to set a 0
dB reference.
5. Put the HP 54201 AID a cursor on maximum peak of displayed waveform and put X cursor on
minimum peak of displayed waveform. Record this vo-x voltage number.
6. Change frequency of Signal Generator to 50 MHz and change Cal Factor % on Power Meter to
the 50 MHz value from cal chart.
7. Change Timebase Range of HP 54201 AID to 200 ns Real Time.
8. Put a cursor on maximum peak of waveform and X cursor on minimum peak of waveform.
9. Adjust amplitude of Signal Generator so that vo-x has same reading as the number recorded in
step 5. Step 8 may need to be repeated to keep the cursors at the waveform peaks. The
Power Meter reading must be 63 dB.
10. Repeat steps 1 through 9 for Channel 2, specifying Channel 2 as the trigger source.
3-8
PERFORMANCE TESTS
Status [Confl ur-at r cn I _________ St arus.. IJaitinfl for' Ir ic qer- _

TAL~ onC,;,
Setup Labe 1
Char.ne I UI.l!iI!ElImlO_III':---;-----::-----:--Tiroebase-------
Input 1 2 Sampling @ 100 rlHz
Ranfl8 - Hoce [ Tr t c ' ]
Offset 10.0
U
Rance ",S
Probe • Hcqu Ir e [Rea 1 T Hoe
2:}:~ence
Coup 1 ing 0.00000 s
St.ore ilcc e [ Cente!r
Aut oSca 1e Bu t.c SC;9.le [ Per-f ad
Lebe 1
T~-· i
gger-----------------------------,
* Refer to St'at,e Tr igger Plenu s
Mode [ Anala Onl ] for Assignment and Sequence
Analog Source
Lave I _".i.~dSl
0. [1 Ii
Auto Scale [ Ena led
On Event ~
Probe [ 1: 1 ] Coup I in'j [dc] [SO n
HP 8656B
SIGNAL
GENERATOR
-Type N(m)
Cable
HP 8482A
POWER
SENSOR
( in)
HP 436A
POWER I
i HP 1I667A --I
HP 54201A/D
METER POWER (Channel Input)

I SPLITTER -
r
Power Sensor Cable j
N(m)-BNC(m)
Adapter
Figure 3-7. Bandwidth Test Connections.
3-9
PERFORMANCE TESTS
Repetitive
11. Change frequency of Signal Generator to 200 kHz, 0.5 V amplitude.
12. Change Timebase Range of HP 54201A/D to 10 us Repetitive mode.
13. Set Power Meter Cal Factor % to 200 kHz value from cal chart, then press dB[REF] to set a 0
dB reference.
14. Put the HP 54201AjD 0 cursor on maximum peak of displayed waveform and put X cursor on
minimum peak of displayed waveform. Record this Vo-x voltage number.
15. Change frequency of Signal Generator to 300 MHz and change Cal Factor % on Power Meter
to the 300 MHz value from cal chart.
16. Change Timebase Range of HP 54201AjD to 10 ns.
17. Put 0 cursor on maximum peak of waveform and X cursor on minimum peak of waveform.
18. Adjust amplitude of Signal Generator so that Vo-x has same reading as the number recorded
in step 14. Step 17 may need to be repeated to keep the cursors at the waveform peaks. The
Power Meter reading must be ,;3 dB.
3-10
PERFORMANCE TESTS
3-9. TIME MEASUREMENT ACCURACY TEST (DUAL CURSORS)
Specification: Real Time Sampling: ±2 ns or ±0.2% of time range, whichever is greater.

Repetitive Sampling: ±200 ps or ±0.2% of time range, whichever is greater.
Equipment Required:
Signal Generator HP 8656B

Type N(m)-to-BNC(f) Adapter HP Part No. 1250-1476
Procedure:
1. Set the output of Signal Generator to 2.5 MHz, 500 mV amplitude.
3. Connect a BNC cable from the RF output of the Signal Generator to Channel 1 input of the HP
54201A/D.
4. Press the VALUES key to display cursor values.
5. Position the X cursor approximately halfway up the first rising slope, and position the 0 cursor
on the second rising slope such that Vo-x is as small a value as possible. The display should
appear similar to figure 3-9.
6. Read the Cursor O-X time value on the display. The limits of Cursor O-X time are 398 ns and
402 ns.
7. Change the frequency of the Signal Generator to 250 MHz.
8. Change the 54201AfD time range to 10 ns, and set Data Filter in DISPLAY menu to OFF.
9. Position the X cursor approximately halfway up the first rising slope, and position the 0 cursor
on the second rising slope such that Vo-x is as small a value as possible.
10. Read the Cursor O-X time value on the display. The limits of Cursor O-X time are 3.8 ns and
4.2 ns.
3-11
PERFORMANCE TESTS
Stat U:;:: [Confl ur-a t i on I _________ Status: No Trigger Found .

TAU~ OI'lL \'
Setup Label
1I!1!I!I..1t:~-------=-----=---Ti me b8.8 e - - - - - - - - ,
Samp 1 i ng @ 280 r'1Hz
Range 110de [Auto ]
Offset F'ange 1.0 US
Pr-obs Acquire [Real TIme
Coupling Delat.! 0.00000 s
Stnr a lqods Refe;'ence [ Center
AutC:1 Scale Auto ScaLe [ PerIod
Label
TI" i g g e , - - - - - - - - - - - - - - - - - - - - - - - - - - - - ,
Flode [ Ana loOn I ] for Assignment and Sequence
Analog Scur-c a
Leva I
I.';"••'
'..4";;;;;11 ~1I;!!~1mI.
''''lima
0.0 Ii
Auto Scale [ Enabled
On Event ~
Pr-obe [ 1: 1 ] Coup ling [de ] [50 n
[ Off ]
[Dlsa led]
On
Graph _ 200 rnV/dl"o" 0.0D II -500.0 rt:

1: r-=-=-~-=...:..=-----=-=...:..=------=-:=------"---I
o Selected
Cur-eor- x
0.00 V
-412 ns
Cur-cor- 0
0.00 Ii
-12 ns
Cur-sor- o-x
D.OD V
40D n:
Figure 3-9. DISPLAY Waveform
3-12
PERFORMANCE TESTS
3-10. TRIGGER (ANALOG) LEVEL ACCURACY TEST
Specification: Channel 1, Channel 2 Trigger
±3% of channel range ±5 mV (40 mV to 790 mV channel range)

±3% of channel range ±100 mV (800 mV to 16 V channel range)
Equipment Required::
Pulse Generator __ HP 8161A

BNC Tee HP Part No. 1250-0781
BNC Cable, 9-inch (my 2) HP 10502A
BNC Cable, 48-inch HP 10503A
BNC(f)-to-BNC(f) Adapter HP Part No. 1250-0080
Equipment Setup: HP 8161A
Period (PER): 10 f.lS
A Output B Output
Width (WID): 5 fJ.s 5 us
Leading Edge (LEE): 2.49 f.ls 2.49 us
Trailing Edge (TRE): 2.49 f.ls 2.49 us
High Level (HILl: +1.5 V +1.5 V
Low Level (LOL): -1.5 V -1.5 V
Delay (DEL): 0.00 ns 0.00 ns
Output mode: Enable Disable
Procedure:

2. Connect a BNC cable from the A output of Pulse Generator to Channel 1 input of HP
54201AjD.
3. Press DISPLAY menu key and select one graph with Channel 1 displayed. The waveform
should appear similar to figure 3-11.
4. Move the X cursor to the position where Tx is equal to O.
5. Limits of VX are 283 mV and 317 mV.
6. Change HP 54201AjD Channel 1 offset to -300 mV and trigger slope to negative.
7. With the X cursor at the position where Tx = 0, the limits of Vx are -283 mV and -317 mV.
8. Change HP 54201AfD Channel 1 voltage range to 800 mV.
9. With the X cursor at the position where Tx is equal to 0, the limits of Vx are -176 mV and
-424 mV.
10. Change HP 5420"IAjD Channel 1 offset to 300 mV and trigger slope to positive.
11. With the X cursor at the position where Tx = 0, the limits of Vx are 176 mV and 424 mV.
3-13
PERFORMANCE TESTS
Status [Confl uratlonJ _________Status: Acquired Frame 00017 _

TALK ONL \'
Setup Lab e I
1 Input 2 200 11Hz

Pange .'llliiM [ Trl 'd ]
Offoet _IIIIID. 200 ns
Prob e
Coupling
Store Mode
Auto Scale [Enabled
P."'"
IDDIIC
] [Enabled ]
I
[Real TIme
[
0,00oOO s
Center
Label

Noc e [ Analo Onl ] for Assignment and Sequence
Analog
Sour'c.e '1111
,-,cil··'
'13;;;;;14.
,'.,nda
IIJ~ID~III Put.o Sea 1e [ Enabled
Leve I Q 11mV 300 On Event l!Imll
Pr-obe [ 1: 1 ] Coupling [de ] [1 Mn
Figure 3-10, STATUS Configuration Menu
Graph UlOID 50.0 mV/div 3DO mV 20.0 ns/div -100,0 n

1:
-----~------
X ~3e lee ted 1
Cur-ecr- ~< -----
294 mV
0,00 s ---------.>:
Cur-eor- 0 x---
100 mV
-100,0 ns -----.--. >
»<
Cur-ssor- 0->:',
-194 mV
-. >-- -- - - -
-100,0 ns
----
Figure 3-11, DISPLAY Waveform
3-14
PERFORMANCE TESTS
3-11. TRIGGER SENSITIVITY TEST
Specification: Internal: 1/8 of full scale.
External: 100 mVp.p (de to 250 MHz, 50n coupled)

1 VP.p (de to 100 MHz, .2 Mn coupled)
Equipment Required:
Pulse Generator HP 8161A

Signal Generator , , HP 8656B
Power Meter HP 436A
Power Splitter HP 11667A
50n Terminator HP 10100C
Type N(m)-to-BNC(f) Adapter HP Part No. 1250-1476
Type N(m)-to-BNC(m) Adapter HP Part No. 1250-0082
Type N(m) Cable, 24-inch HP 11500B
Equipment Setup:
HP 8161A
Period (PER): 1 ms
A Output B Output
Width (WID): 500 f.ls 500 J.1.s
Leading Edge (LEE): 249 us 1 ns
Trailing Edge (TRE): 249 J.1.s 1 ns
Hiqh Level (HIL): +2.5 V +2.5 V
Low Level (LOL): -2.5 V -2.5 V
Delay (DEL): 0.00 ns 0.00 ns
Procedure:
Internal Trigger
2. Connect 48-inch BNC cable from the A output of Pulse Generator to Channel 1 input of the HP
54201 A/D.
3. Display Channel 1. The triggered waveform should appear similar to figure 3-13.
4. Move the X cursor to the Tx = 0.0 s position.
5. Note the value of Vx.
6. Change the trigger slope to [-SlOpe] and note the value of vx.
3-15
PERFORMANCE TESTS
Status [[onfl uratlon] _________ Status: Waiting for Trigger _

TRU~ CW,L Y'
Setup Label
II!Il!I!D.;--~;_--~--___;:~-T i rneb 8.S e--------~

Sampling @ 10.0 MHz
Range I'loce [ Tr-t 'd ]
OfFce-. Ran£1e 100 ~s
Pr- 0 b e Acquire [Peal Time
Coup ling De I,,~ 0.08000 s
St.or-e Mode Refer-ence [ Center
Auto Scal a Auto Sc al e [ PerIod
Labe I
Tr- i g g e r - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ,
* Refer to State Triqqer Menus
tloce [ Analo Onl ] for Assignment and~§equence
Ana 1og Sour-ce

Leve I
1.";;••'".'.Iaw
[Centered] [1.0 Ii
Auto Scale
On Event
Rdm-
Pr-obe [ 1 : 1 Cuup l t nq [de ] [5[1 n
-50.00 11'
x 5e l e c t ed
Cur-s or- :< --------

_-_'7""-
226 mV
[1.0[1 8 ----+:--...,...---..,....,....---
-------_.
Cur-s or- I)
-645 mV 1;.-------------'
-5[1.0 >'3
Cu-eor- 0-><
-871 m\i
-5[1. [I 1'8
Figure 3-13. DISPLAY Waveform
3-16
PERFORMANCE TESTS
7. The difference in the Vx value (Vx[+slope) minus Vx[-slope) } should be no more than 2V.
9. Disconnect Pulse Generator from HP 54201AjD.
External Trigger
Nole
Ensure that Power Meter has been zeroed and calibrated to match Power Sensor.
11. Connect test equipment as shown in figure 3-15, except without the 50Q terminator.
12. Set Signal Generator sinewave output to 250 MHz, 70 mV amplitude.
13. Set Power Meter Cal Factor % to 250 MHz value from cal chart.
14. Adjust Signal Generator outpul for a reading of 25 fJ.W on Power Meter (25 fJ.W into 50Q
provides 100 mVp-p).
15. Disconnect Power Sensor from Power Splitter and connect that port of Power Splitter to
Channell input of HP 54201A/D using the Type N(m)-to-BNC(f) adapter and the 9-inch BNC
cable.
16. Display Channel 1 and verify that a stable sine wave is displayed.
18. Connect test equipment as shown in figure 3-15.
19. Set Signal Generator output to 100 MHz, 700 mV amplitude.
20. Set Power Meter Cal Factor % to 100 MHz value from cal chart.
21. Adjust Signal Generator output for a reading of 2.5 mW on Power Meter (2.5 mW into 50Q
provides 1 Vp-p).
22. Repeat steps 15 and 16 to verify triggering.
3-17
HP 54201AfD - Performance Tests
PERFORMANCE TESTS
Status _________Status: No Trigger Found .

TALK ONL'I
Setup l.abe l
Ch an ne I IlIilll"lill.~1:-:-:----:--.------;:-:-:----:----::;--T i mebas e - - - - - - - - - ,
Input 1
Range l'lc de
Offset Range
Probe Acquire
Coupling De 1 <=(~
Store Mode Reference
Auto Scale Auto Scale
Label
Tr i g g e r - - - - - - - - - - - - - - - - - - - - - - - - - ,
Mode for Assignment and Sequence
Analog Source _
Leve 1
'IM'.'aw Auto Scale [ Enabled
On Event ~
Probe Coupl ing Cdc ] ~
HP 86566
SIGNAL
GENERATOR
+---Type N(m) Cable
HP 8482A
POWER 50Q Terminator
SENSOR
HP 436A
POWER
I
! HP 11667A
( in)
1
HP 54201A/D
METER POWER (EXT TRIG input)

I I
SPLITTER
r
Power Sensor Cable r
N(m) -6NC(m)
Adapter
Figure 3-15. Externai Trigger Sensitivity Test Connections.
3-18
PERFORMANCE TESTS
Stat.u s [Confl ur at t on I ~ St atus r rio TI- igget~ Found .

TALK ONLY
Setup Lab e 1
Channel II!I!I!DII-:----:-----::----::---T i me b8 5 1 2 - - - - - - - - - - - - ,
1
Range 110de
Offset Range
Pr ob e Hcqu ir-e CRe etltlve
Coupling Dele!) 0.00000 s
St or-e l'lode Reference [ Center
Auto '3c81e [Enabled ] Auto Scale [ PerIod
Label
Tr i f H J e l - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ,
.~ Refer to State Trigger Menus
l'lcds [ Analo On I ] for Assignment and Sequence
Ftna l oq Sour-ce 1I.'¥i"6111 "Mi.law Auto ~c3le [ Enabled

Level '.111111- On Event mJm
Pr-obe [ 10d ] Coupling Ld c ] ImiliI
3-19
PERFORMANCE TESTS
3-12. MINIMUM SETUP TIME TEST (HP 542010 Only)
Specifications: 20 ns, The time data must be present prior to the clock transition.
Equipment Required:
Pulse Generator HP 8161A Opt. 020

Product Support Kit HP Part No. 54200-69501
BNC Tee (Qty 2) HP Part No. 1250-0781
BNC Cable, 9-inch (Qty 2) HP 10502A
Equipment Setup:
HP 8161A
Ext Slope: Pos

Period (PER): 200 ns
A Output B Output
Width (WID): 100 ns 50 ns
Leading Edge (LEE): 1.3 ns 1.3 ns
Trailing Edge (TRE): 1.3 ns 1.3 ns
High Level (HIL): +4 V +4 V
Low Level (LOL): OV OV
Delay (DEL): 75 ns 0.00 ns
Output mode: Enable Enable
Procedure:
1. configure the STATUS Configuration menu as shown in figure 3-17.
2. Configure the STATUS Measurement menu as shown in figure 3-18.
3. In the SYSTEM Peripherals menu select Rear panel BNC: [Pulse On State Sequence True].
4. Configure the TRIGGER State I Define [Assignment] menu as shown in figure 3-19. Use the
INSERT key to insert new line for POD1 and POD2.
5. Configure the TRIGGER State I Define [Sequence] menu as shown in figure 3-20.
6. Connect POD 0 to the State Board Test fixture, HP Part No 54200-63801 (part of Product
Support Kit).
7. Connect a BNC tee to the BNC labeled "CLOCK" on the State Board Test fixture.
8. Connect a BNC cable from the "B" output of the pulse generator to the "CLOCK" BNC tee, and
a short BNC cable from the "CLOCK" BNC tee to the Channel 2 input of the HP 54201 D.
9. Connect a BNC tee to the BNC labeled "DATA" on the State Board Test fixture.
10. Connect a BNC cable from the "A" output of the pulse generator to the "DATA" BNC tee, and
a short BNC cable from the "DATA" BNC tee to the Channel 1 input of the HP 54201 D.
3-20
PERFORMANCE TESTS
11. Connect a BNC cable from the rear panel BNC of the HP 54201 D to the front panel EXT TRIG
input of the HP 54201 D.
12. Configure the display as shown in figure 3-21. Observe the waveforms displayed. They
should appear similar to those shown in figure 3-21. If not, repeat steps 1 through 11.
13. Exchange the BNC cables connected to Channel 2 and External Trigger inputs. The display
14. While observing the pulses displayed on Channel 2, increment the pulse generator output "A"
delay in 1 ns steps until the pulses on Channel 2 display disappear.
15. Now decrement the delay in 1 ns steps until the pulses reappear on that channel.
16. Exchange the BNC cables conencted to Channel 2 and External Trigger inputs. The display
17. Select the DELAY measurement on the HP 54201D and set to "Delay 1 to 2". The DELAY
measurement should read ';20 ns.
18. Change the output "A" delay of the pulse generator to 75 ns.
19. Reconfigure the TRIGGER State/Define [Sequence] menu in figure 3-20 with "Occurrences of
[b r.
20. Connect POD 1 to the State Board Test fixture and repeat steps 12 through 17 for POD 1.
[c )".
3-21
PERFORMANCE TESTS
Status [ o nf t ur a t.r on I _________ Statu8: fio Trigger Found .

TALK OnL I'
Setup Label
wm"I1-;---:---:--:---:--~----;::--T i me as e - - - - - - - - ,
Sampling @ 200 MHz
b
Panqe l'tode [Auto ]
Offset Range II
Pt~D be Hc qu ir e
Coup ling De L3_1d I !Ii
St.or-e Flode [ normal ] Reference [ Center
Auto Scale Auto Scale [ PerIod
LabeL
Tr'iggel-----------------------------,
[ State Onl ] for Assignment and Sequence
So.n-c a Auto Scale [ Enabled

Level On Event I!DIl
Pr-obe Coup l I nq [ de] IEIDIiI
Status [ 'le as ur emen t } _________Status: No Trigger Founcl _

TALK OnLI'
l'lode Ujeer- Detlllecl ]
Tht-esh al d s s Gr-aph 1 Graph 2 Gr ep h 3 Graph 4

Soeci Fu as "_g_4g..l. lI+g_4g,GI "..4- 44"1' "-4-~% .. '
44 1
Up pel~
11 i dd 1o
~/
50 X
",","
....SO "% ~%
50 >: SO %
Lower !I!I :, !I!I>: !I!I% !I!I%
DefinitiDrts: An Edge <f,1) MUST Cross Both Upper and Lower
Freq 1 i" Period
Per t od ~T, First t Pl l d d l e to Hex- Like Edge
+ ld l d t h ~T, Ft r- s t T IIAmnIEl' to riaxt. J Middle
l.l r dt h ~T, Ft r-e t J. "AmnlEl' to Nex't T Middle
Pi se 6T, First 1 Lourer- to Upper-
Fa 11 6T, Ft r-s t J Upper to Lcure r-
Duty + Width / Period
Delay 6 T, F i r' S t lUI IIAmp'A' to Fir s t _ IIAmplEl'
'Ii amp 1 .b.V, 10D >: - o;~ Using Histogram
V rna>: Absolute Maximum Voltage
V mln Absolute Minimum Voltage
V r rns Root Mean Square Voltage Over 1 Period
Figure 3-18. STATUS Measurement Menu
3-22
PERFORMANCE TESTS
Trigger State ] _____________Status: No Trigger Found _

TALK OIil'!,
Define [ASSl nmentJ Tr t qqe- Node [ State On 1
Clock
In
S't e t e Mode C Normal ] ---------- UDDUD ----------
F'od 2 Pod 1 F'ocl 0
I'lu 1 tip l e x inq C Off ] 1DI!!!E1l IDI _ 1DI!!!E1l
8 0 8 08 0
Leb e I Po 1
III """"'"
I .........
Figure 3-19. TRIGGER State j Define [Assignment} Menu
Tr-Lqqer- '.,,+. _____________Status: rio Trigger Found

TAlr. Olil'(
_
..
De fine [ Se uence ] Trigger Mode [ State Oni l
In Sequence,
find ~ Occur-r-ence e of
then Trigger Acquisition
Sequence Restart on no state
Label> PODO PODl POD2
- -
IDIJBI IDIJBI WIB
Base
--
I
a
b m
c
d II
Figure 3-20. TRIGGER State j Define [Sequence} Menu
3-23
PERFORMANCE TESTS
Display ------------- Statu8: Acquired Frame 00083 _

TALK OKIL \'
Fe Fere-ice L 1 ne s [ Off ]
Accumulate l'lode [DIsabled]
Data Filter On
Graph . . 1. 50 V/d i v 2.00 'i 50.0 nsv'd rv -250.0 n'
1: "",,,• •, .... --------,
'~--
2: IM,e"• •,
, '
\~./ '~---~
Figure 3-21. Display Configuration and Minimum Setup Time Test Waveforms
Display Stat-us: Acquired Frame 00108 _

TALK 011L'1
Iir a't Lcu l e Type Pe Fer ence Lt ne s [ Off ]
Number of Graphs Accumu late l'loc e
Connect Ilo t s Data Fi 1ter On
Graph . . ~
'" 2 00 \/ 50 n n svd i v
~
-250 0 It'
1: IP'i¥IIW., ! ! -.
',---~ \... J '~
2: !U4F"• •'
" ,r....
__.I
.:» \ ',---
Figure 3-22. Minimum Setup Time Waveforms
3-24
PERFORMANCE TESTS
3-13. MINIMUM HOLD TIME TEST (HP 542010 Only)

Specifications: 0 seconds, the time data must be present after the clock transition.
Equipment Required:

BNC Tee (Qty 2) HP Part No. 1250-0781
Equipment Setup:
HP 8161A
Ext Slope: Pas

A Output B Output
Delay (DEL): 105 ns 0.00 ns
Procedure:
1. Configure the STATUS Configuration menu as shown in figure 3-23.
2. Configure the STATUS Measurement menu as shown in figure 3-24.
3. In the SYSTEM peripherals menu select Rear Panel BNC: [Pulse On State Sequence True].
4. Configure the TRIGGER State / Define [Assignment] menu as shown in figure 3-25.
5. Configure the TRIGGER State / Define [Sequence] menu as shown in figure 3-26.
6. Connect POD 0 to the State Board Test fixture. HP Part No. 54200-63801 (part of Product
Support Kit).
a short BNC cable from the "CLOCK" BNC tee to the Channel 2 input of the HP 54201 D.
9. Connect a BNC tee to the BNC labeled "DATA" on the State Board Test fixture.
10. Connect a BNC cable from the "A" output of the pulse generator to the "DATA" BNC tee, and
a short BNC cable from the "DATA" BNC tee to the Channell input of the HP 54201 D.
3-25
PERFORMANCE TESTS
12. Configure the display as shown in figure 3-27. Observe the waveforms displayed. They
should appear similar to those shown in figure 3-27. If not, repeat steps 1 through 11.
14. While observing the pulses displayed on Channel 2, decrement the pulse generator output "A"
delay in 1 ns steps until the pulses on Channel 2 display disappear.
15. Now increment the delay in 1 ns steps until the pulses reappear on that channel.
17. Select the DELAY measurement on the HP 54201 D and set to "Delay 2 to 1". The DELAY
measurement should read ~O ns.
[b]".
22. Reconfigure the STATE Sequence menu in figure 3-26 with "Occurrences of [c ]".
3-26
PERFORMANCE TESTS
Status Con F t ur a't 10n] _________ St8tUS: No Trigger Found .

TALK OKIL \'
Se t.up Lab e I
lI.m.,
..
Channel
Ranqe [Auto ]
Offset 500 ns
Pr-ob e [Real TIme
Couplinq
Auto Scale [Enabled

_'H'.'
Store r1~de [ l'lor-ma I ] [ Normal
] [Enabled
]
] [ PerIod
Label
Tr i g g e T - - - - - - - - - - - - - - - - - - - - - - - - - " - - -
* Refer to State Triqqer Menus
110de State On I ] for Assignment and-§equence
-
Analog Source Auto Sca l e [ Enabled
Le ve 1 On Event I!I!mI
Fir ob a Coupling [d c ] I!8DIiJ
Figure 3-23" STATUS Configuration Menu
[ Measurement ] _________ Status: IJo Trigger Found _

TALK ONL'i
[User Ile f t ned ]
Thresholds: Iir-e.ph 2 Gr-aph 3 Gr-aph 4

Spec i f',,1 as .I..Gr-aph 1
#;_g;,••, 'I"!!i-;;"I' "#4-;4,,1' "#4-;4;·'
rmI/
Uppe~ rmI/ rmI/ rmI/
Pl iddl e 50 / 5EI X 50 / 50 ,
LOIJJet~ 111/ 111/ 111/ 111/
Definitions: Hn Edqe <l, L) P1U~,T Cr-oe.s Both Upper and LOiJ.ler
Fr-eq 1 Per iod
Per- i od
+ ld r dt.h
- hhd t h
d, First I
6 T, Fi r et 1
mllil
aT, First I Middle to Next Like Edge
to Hext 1 l'l td d l e
~-=- to Next 1 111 dd Ie
Rise ..::.T, Fir-st r- LOI.J.ler to Upper
Fall e.T, Fr r-s t J Upper' to LOIJJer~
Ilutu + Width / Period
De L~!) F Lr s t l1li IIpmp.I'I' t I] F i r s t IIIJ
ti T 0 "Amp'ElI
'Ii amp 1 tiV, 100 ~: - D X Ust nq His toqram
V max Ab~olute Maximum Voltage
V min Absolute Plinimum Voltage
V r me Root Mean Square Voltage Over 1 Period
Figure 3-24. STATUS Measurement Menu
3-27
PERFORMANCE TESTS
Tr Lqq er- 'M"+·

_____________Status: No Trigger Found .
TALK mil \'
Define [Assl nmentJ Trigger Mode [ State Oni
Clock
JKl
',;tate 010de ---------- IIIIIJ ----------
Pod 2 Pod 1 Pod iJ
~I u I tip l e x i n,~ l1li a;m l1li a;m l1li a;m
:=: 08 0 8 0
Labe J Po I
*********]
III ..... ' " .. ]
Figure 3-25. TRIGGER State I Define [Assignment] Menu
T r- i gget~ 1l•
1 •IJAIl!-IJ'g-.1I Statu s : No Trigger Found _
TALK Olll Y
Define [ 5e uenee ] Trigger Mode [ State Oni
In Sequence,
UIIII
.-
find ~ ucc.ur re nc ee of

Trigger Terl
Label> PODiJ PODl POD2
-- -- --
Base IGIB IGIB IGIB
a lID
b lID
c lID
d
Figure 3-26. TRiGGER State I Define [Sequence] Menu
3-28
HP 54201 A(D - Performance Tests
PERFORMANCE TESTS
Display - Status: Acquired Frame 80289 _

TALK Ol1lY
Gr a tf cu l e Type • Refet~ence Lines [ Off ]
Number of Graphs Accumu late l'lode [DIsabled]
Connect Ilc ts Data Filter On ]
Graph JIIIIJ 1.50 V/d i v 2.00 V 50.0 ns/div -2SB.n r.
1: In.pi'• •' [t--,_
2: 'd'M· A'
Figure 3-27. Dispiay Configuration and Minimum Hold Time Test Waveforms
Displa!j ________________________ Status: Acquired Frame 00327 _

TALK oru.v
•
Graticule Type Reference Lr ne e [ Off ]
Number of Graphs Accumulate lqoc e [DIsabled]
Ccnne ct Dots Data Fr l t er- [ On ]
1 50 \IJc!-\!
I r'")
G no
- ,
\1
o' ~- -
1: I.;@I,• •' II-~, ,~------\

~ -,
\ , '.....---------',
" \
2: !u.p' A'
, c
" i
\ ,:
,---~~ \..
Figure 3-28. Minimum Hold Time Test Waveform
3-29
PERFORMANCE TESTS
3-14. MINIMUM CLOCK PULSE WIDTH TEST (HP 542010 Only)
Specifications: 20 ns at threshold.
Equipment Required:
Pulse Generator HP 8161 A Opt. 020

Equipment Setup:
HP8161A
A Output B Output
Delay (DEL): o ns o ns
Output mode: Disable Enable
Procedure:
2. Configure the STATUS Measurement menu in Standard mode.
3. In the SYSTEM Peripherals menu select Rear Panel BNC: [Pulse On State Sequence True].
4. Configure the TRIGGER State I Define [Assignment] menu as shown in figure 3-30.
6. Connect POD 0 to the State Board Test fixture, HP Part No. 54200-63801 (part of Product
Support Kit).
a short BNC cable from the "CLOCK" BNC tee to Channel 2 input of the HP 54201 D.
3-30
PERFORMANCE TESTS
Note
The 9 data channels of the POD do not have a signal input during this
test.
9. Connect a 8NC cable from the rear panel 8NC of the HP 54201 D to the front panel Channel 1
input on the HP 54201 D.
10. Configure the display as shown in figure 3-32. Observe the two waveforms displayed on the
HP 54201 D. The two waveforms should appear similar to those shown in figure 3-32.
11. While observing the pulses displayed on Channel 1, decrement the pulse generator output "8"
width in 1 ns steps until the pulses on Channei 1 display disappear, or until the pulse
generator reaches its narrowest width.
12. Increment the width until Channel 1 pulses reappear (if necessary).
13. Select the + WIDTH measurement on the HP 54201 D and insert "2".
14. The measurement should read "20 ns.
15. Change the "8" output width of the pulse generator to 25 ns.
16. Disconnect POD 0 and connect POD 1. Repeat steps 10 through 14.
20. Select the complement mode for the "8" output of the pulse generator.
21. In the TRIGGER State / Define [Assignment] menu (figure 3-30), change the J, K, and L clocks
to the falling (+) edge.
3-31
PERFORMANCE TESTS
22. Disconnect POD 2 and connect POD O.
23. The waveforms displayed on screen should be similar to figure 3-33.
24. Repeat steps 11 through 15 using the - WIDTH measurement of the HP 54201 D instead of the
+ WIDTH measurement.
25. Disconnect POD 0 and connect POD 1.
27. Repeat steps 11 through 15 using the - WIDTH measurement of the HP 54201D instead of the
28. Disconnect POD 1 and connect POD 2.
30. Repeat steps 11 through 14 using the - WIDTH measurement of the HP 54201 D instead of the
Status [Confl ur-a t.t on I _________ Ststus: No Trigger Found .

TALK CJrIL'l'
Ch an n e 1 11I.!!lI.!El!l.EI:--__:~--_:_-__:~-T i me base- - - - - - - - ,
200 ~IHz
Range
Offset
'.t:iMt
Input 1
_1:i!mUi_
Input 2
_11111_
Sarnp 1 i ng
Hoce
Range
@
[ Auto
ns
]
Pr-ob e !!!!iI- - . Acquire [Real Time

Coupling
S't.or-e Node [ Normal ] [
'''IM']
.......... IIimIIIII ..........
Normal
De l ai,
Re Fe re nc e [
G.GGGGG s
Center
Auto Scale [Enabled ] Auto Scale [ Period
Label
Tr t qqe r - - - - - - - - - - - - - - - - - - - - - - - - - - - ,
[ State Onl ] for Assignment and Sequence
[810 9
!':lode
Sour-ce Auto Scale [ Enabled
Le-.. . 'e 1 On Event
Pr-obe Coupling
, ,J
.-/
3-32
PERFORMANCE TESTS
Tr'igger- 'M'" _____________Status: liD Trigger Found

TAU Oljl'l
_
Define [Ass 1 nmentJ Tr'iggel- l'lude [ State nl
Clock
JKl
State Hods [ Normal ] ---------- UDDUU
Po d 2 Po d 1 Po d 0
l'lu 1 tip l e x i n 9 [ Off ] IDI ~ IDI ~ IDI ~
111._.
:3 .. , .... 0 :3 ..... ,.0 8 ....... 0
Label Pol
Figure 3-30, TRIGGER State I Define [Assignment] Menu
Tr- i 9ger ".,.mAma.1II

..
S't e t.u s : flo Tr- i qq er' Found
TAU; mil\'
_
TIef] ne [ Se uenee ] Tr- I 1~I;1er 110de [ State Onl
In Sequence,
.....
find mm/Jccur.t-ence::=: of
then Trigger Rcquisition

'
Label> POD0 PODl POD2

Ba:32 > IUD IUD IUD
mil
II II
I
8
b
c
d II mil
Figure 3-31. TRIGGER State I Define [Sequence] Menu
3-33
PERFORMANCE TESTS
--~----- Status: Acquired Frame 01105 __

TALK OIil\'
+ Ilt dt h ! '" 24.78 ns V max IJ 2.15 V
V min D'" 64.5 mV
Gr eph . . -
1 SO 'Ii,"d i v ~
- - " -
1: 'U;6"• •'
"
--J \ , .'.--
2: In"#..... rr-:
0.
U .
~ .,,,~~, . ,,~
Figure 3-32. DISPLAY Configuration and Clock Pulse Width Test Waveforms
Display Status: Acquired Frame 00080__.

TALie. Ofll \'
(ir a t icu l e Tqpe Pe Fer anc e Lines [ Off ]
Number of Graphs Hccumu late Plode
Connect Dots Data Fi 1t.er- On
1 50 V -d i " " 00 \J
~ 1:":0 0 n szd
~ O' iv -?C;O
~-
0 n
1: Inii¥!•••,
., ..
; ~
/ \ .
2: ''''M.•g, f""
,- ,r-------- ~,
r:
"~,-,"i
V
Figure 3-33. Clock Pulse Width Test Waveforms
3-34
PERFORMANCE TESTS
3-15. CLOCK REPETITION RATE TEST (HP 542010 Only)
Specifications: Single phase - 25 MHz maximum with single clock and single edge specified.
Equipment Required:

Equipment Setup:
HP 8161A
Period (PER): 50 ns
A Output B Output
Norm/Compl Normal Normal
Procedure:
2. Configure the STATUS Measurement menu in Standard mode.
4. Configure the TRIGGER State / Define [ASsignment] menu as shown in figure 3-35.
Support Kit).
3-35
PERFORMANCE TESTS
Note
The 9 data channels of the POD do no: have a signal input during this test.
9. Connect a BNC cable from the rear panel BNC of the HP 54201 D to the front panel Channel 1
10. Configure the display as shown in figure 3-37. Observe the two waveforms displayed on the
HP 54201 D. The two waveforms should appear similar to those shown in figure 3-37.
11. While observing the pulses displayed on Channel 1, decrement the pulse generator period in 1
ns steps until the Channel 1 waveform begins to drop pulses as shown in figure 3-38.
12. Increment the period of the pulse generator "B" output until the Channel 1 waveform pulses
are again present.
13. Select the FREQ measurement on the HP 54201 D and for graph 2. The frequency should be
;,,25 MHz.
14. Set the period of the pulse generator to 50 ns.
16. Set the period of the pulse generator to 50 ns.
Status [Confl urat.t on I _________Status: No Trigger Found .

TALK GNU
Se t uo Labe I
Input 2 200 ~IHz

Ran 1;:1 e 6.0 V '.sM-
Offset 2.000 V 2.000 V
Pr-obe
Coupling
St.or e llcde [ Normal ] [ Normal ]
Auto Scale [Enabled ] [Enabled ]
Label

Mode [ State 0nl ] for Assignment and Sequence
Analog Source [External] Auto Scale [ Enabled

Level 1. 000 V On Event" [IDDI
Probe Coupling [de] II1II
3-36
PERFORMANCE TESTS
Trigger" !I'NBlmiS'• •' Stat us: no Tr'igger Found .

TALI~, OI'ILY
Define [ASSI nment] Tr~ i gget~ l'lode [ State On 1
Clock
JkL
[Normal ] ---------- UDDDD ----------
Pod 2 Pod ] Po d 0
Plu l t t pl e xl nq [ Off ] 11II I!ID 11II III!m 11II I!ID
8 0 8 08 0
[State ] _____________St:3.tUS: Ho Tr i'~ger- Found _

TALI( ONLY
Define [ 5e uence ] Tr- 19gel~ Mode [ State Onl
In Se que nc e ,
find ~ Occur-rences of
[an state]
Label> PODO POD] POD2
-- --
> IDIII IDIII wg
Base
I
a
b lID
r- lID
d
Figure 3-36. TRIGGER State I Define [Sequence] Menu
3-37
PERFORMANCE TESTS
Display Status: Acquired Frame 00387 _

TALK ONl'r'
Pe fer-enc e Lines [ Off ]
Hcc umu l at e l'lode [DIsabled]
Data Filter On
(ir'ap h .. 1.50 'v'/djv 2.00 \I -2:-,0.8 n.

1: ,u;g;;• •,
2: ,."g"••, .
, ,-
".--:
Figure 3-37. DISPLAY Configuration and Clock Repetition Rate Test Waveforms
________________________________ Status: Acquired Frame 00739 __ .

TAU( Or'll'r'
Freq ~ - 34.68 MHz
Graph ~ 1.50 V/d 1\'" 2.0E1 V 50.0 nevd ;v -250.0 n.
1: 1111;:;;• •'
2: 1111'''••'
, ,-,'
.'
\, \j v ',. ,
Figure 3-38. Clock Repetition Rate Test Waveforms
3-38
PERFORMANCE TESTS
3-16. MINIMUM INPUT TEST (HP 54201D Only)
Specifications: 600 mV peak-to-peak
Equipment Required:

Blocking Capacitor HP 10240B
Equipment Setup:
HP 8161A
A Output B Output
High Level (HIL): +0.65 V +0.65 V
Deiay (DEL): a ns o ns
Procedure:
3. Configure the TRIGGER State / Define [Assignment] menu as shown in figure 3-40.
Support Kit).
7. Connect the blocking capacitor to the "B" output of the pulse generator.
8. Connect a BNC cable from the Blocking Capacitor to the "CLOCK" BNC tee, a'nd a short BNC
cable from the "CLOCK" BNC tee to Channel 2 input of the HP 54201 D.
Note
The 9 data channels of the POD do not have a signal input during this test.
3-39
PERFORMANCE TESTS
9. Connect a BNC cable from the rear panel BNC of the HP 54201 D to the front panel Channel 1
10. Configure the display as shown in figure 3-42. The displayed waveforms should appear
similar to those shown in figure 3-42.
11. While observing the pulses displayed on Channel 1, decrement the High Level (HIL) B output
of the pulse generator period in 0.01 volt steps until the waveform on Channel 1 starts to drop
pulses.
12. Increment the High Levei (HIL) B in 0.01 volt steps until all pulses are again present.
13. The High Level (HIL) B readout on the pulse generator should be ";0.6 V.
14. Change the High Level (HIL) B of the pulse generator to 0.65 V.
16. Change the High Level (HIL) B of the pulse generator to 0.65 V.
St.et us [Confl uratlonJ _________ Status: No Trigger Found _

TALK oru.v
1 Input 2 2[113 1'1Hz

Ra.nge 1. 0 V [ Auto ]
Offset S130 ns
Pr-cbs [ 1d ] [Real TIme
Coupling 0.00000 5
St cr s Hoc e [ Normal] [ Normal ] [ CentE:r
Auto Sce l e [Enabled ] [ PerIod
Label
Tr i ggOI'--------------------------,
t Refer to State Trigger Menus
l'lod e [ State Onl ] for Assignment and Sequence
Analog Sour-ce Hu t c Sce l e [ Enabled

Leve 1 On Event ImDJ
Probe [ L 1 ] Coupling Cdc ] ImDIiI
3-40
PERFORMANCE TESTS
Tr-t qpe r ' . " ,

_____________ Status: tlo Triqqer Found .
--TALK [lIllY
Defin e Ifts s t nmen t I Tr i gger Ploc e [ 5tate On I
Clock
JI;l
State l'loc e [Normal ] ---------- DDUDD ----------
Pod 2 Pod 1 Pod 13
l'lu l t t pl ex i nq [ Off ] l1li ~ l1li ~ l1li ~
8 ....... 13 8 0 13 ...•.•. 0
label F'oI
IiDI!D l1li
Im!III l1li
;ma l1li
Figure 3-40. TRIGGER State / Define [Assignment] Menu
Tr-t qpe r [5tate ] _____________Status: No Trigger Found .

TALK CilllY
Ile F i ne [ 5e uence ] Trigget~ l'loce [ St at e OnI
In Sequence,
find ~ Occur-r-e nce s of
[an state]
Label> POD0 POOl POD2
-- -- --
Base > IDIB IDIB IDIB
a lID
b lID
c lID
d
Figure 3-41. TRIGGER State / Define [Sequence] Menu
3-41
HP 54201AfD - Performance Tests
PERFORMANCE TESTS
Displa~ Status: Acquired Frame 00866 __

TAlk om.v
Reference Lines
Accumulate ~1ode
Data Filter On
Iireph . . 1.50 V/div 2.00 V 50.0 ne.zd rv -250.0 n:
1: Inlb"• •'
,;"=, f'_
tI--J \.. . -~~._/ \~ ~) \I....r-----""-../ \,--,-~-~
2: 10m. . . .'
Figure 3-42. DiSPLAY Configuration and Minimum Input Test Waveform
3-42
PERFORMANCE TESTS
3-17. THRESHOLD ACCURACY TEST (HP 542010 Only)

Specifications: ±2.5% ±120 mY.
Equipment Required:
Dc Supply HP 6114A
Equipment Setup:
HP 8161A HP 6114A
Period (PER): 100 ns Output: +4.3 V
A Output B Output
Procedure:
1. Contigure the STATUS Configuration menu as shown in figure 3-43.
3. Configure the TRIGGER State I Define [Assignment] menu as shown in figure 3-44.
5. Connect a BNC(f)-to-dual banana adapter and BNC tee to the DC Supply. Connect a BNC
cable from the DC Supply BNC tee to the Channel 1 input of the HP 54201 D. Connect another
BNC cable from the DC Supply BNC tee to the "DATA" input on the State Board Test fixture, HP
Part No. 54200-63801 (part of Product Support Kit).
6. Connect POD 0 to the State Board Test fixture.
3-43
PERFORMANCE TESTS
10. Configure the display as shown in figure 3-46. The waveforms should appear similar to those
shown in figure 3-46.
12. Decrease the output of the DC Supply in 0.D1 volt steps until the Channel 2 waveform begins
to drop pulses.
13. Increase the output of the DC Supply until the Channel 2 pulses reappear as shown in figure
3-47. The DC Supply should read ;"3.78 V and ';4.22 V.
14. Change the output level of the DC Supply to +4.3.
15. Reconfigure the TRIGGER State/Define [Sequence] menu shown in figure 3-45 with
"Occurrences of [ b ]", Disconnect POD 0 and connect POD 1. Repeat steps 12 through 14.
16. Reconfigure the TRIGGER State/Define [Sequence] menu shown in figure 3-45 with
"Occurrences of [c]". Disconnect POD 1 and connect POD 2. Repeat steps 12 and 13.
17. Reconfigure the "B" output of the pulse generator as follows:
High Level (HIL): 0 V

Low Level (LOL): -5.00 V I
.:>
18. Change the output of the DC Supply to provide -4.3 V.
19. Reconfigure the STATUS menu shown in figure 3-43 for Channel 1 offset of -2.5 V.
20. Disconnect POD 2 and connect POD O.
21. Reconfigure the TRIGGER State/Define [Sequence] menu in figure 3-45 with "Occurrences of [
a ]".
22. Reconfigure the TRIGGER State/Define [Assignment] menu in figure 3-44 with thresholds of
-4.0 V.
23. The Channel 2 pulses should be missing on the display.
24. Decrease the magnitude of the output level of the DC Supply in 0.01 volt steps until the
Channel 2 waveform appears as shown in figure 3-47. The DC Supply should read'; -3.78 V
and ;" -4.22 V.
25. Change the output level of the DC Supply to -4.3 V.
[ b ]". Replace POD 0 with POD 1 and repeat steps 23 through 25.
[ c]". Replace POD 1 with POD 2 and repeat steps 23 and 24.
3-44
PERFORMANCE TESTS
Status [Confl ur-at t on I _________Status: No Trigger Found _

TALK mil Y
Set.up label
II!I!I!Dm=-----:----~----=---T i mebas e--------~

Input 2 Sampling @ 200 MHz
Range ' • •' Plod e [ Auto ]
Offset Range 500 ns
Probe I II I Acquire [Real Time
Coupling _ '@.p' De I ay 0.00000 s
Store Mode [ Hor-me I ] [ Normal ] Reference [ Center
Auto Sea 1e [Enabled ] Auto Scale [ PerIod
label
Tr i g g e r - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ,
Mode [ State On II ] for Assignment and Sequence
Analog Sour-ce ".'g;;i¥11I Auto Scale [ Enabled
Level • • •111,• • On Event ID!I!I!D
Probe [ 1r L ] Coupling [dc] ~
_____________ Statu8: No Trigger Found _

TALK ONLY
[Ass I nmen t I Trigger Plcde [ State Onl
Cloch
JKL
::'t81:.8 ltcde [Normal ] ---------- UDDDD ----------
Pod 2 Pod 1 Pod 0
'1u 1tip l e x t nq [ Off ] l1li I e l1li I e 1liiie
8 08 0 El .•..... 0
label Pol
iI I
3-45
HP 54201 AID· Performance Tests
PERFORMANCE TESTS
r- igget~ IMg' _____________ Status: No Trigger Found _

TALI~ OrIL'r'
Def i ne [ 5e uenee ] [ State On 1
In Sequence,
.-
find ~ Occurrences of
Label> PODO POD! POD2
- --
IG&I IG&I IG&I
Has e
I
a
m
II II
b
c
d
Figure 3-45. TRIGGER Slate I Define [Sequence] Menu
Graph . . 1 5[1 V/d I v ~

c. .
SO V .' . 0 n.
-21:)0
1: 'DiM;• •' I
2: lu;e" A' r--'. r>--. J~. r--». r~'
p' \.....--J '~ \,.______i -----' <-
Figure 3-46. DISPLAY Configuration and Threshold Accuracy Test Waveforms
3-46
PERFORMANCE TESTS
Display Status' Acquired Frame 05806__,

TALK ONLY
•
Iir a'tt c u l e T!::lpe Reference Lines
Number of Graphs Accumulate llode
Connect Dots Data Filter [
Graph . . -
1 <;0 V/div ?
~ 50 V 50 0 ns/div -250 0 n:
1: ,..;e"• •,
~
2: _.;;;; A'
~,
, ,
• '. .:
. ,/
./'
~ \... / ~
} ' 0 - - - - - ) "'-_ ,'v-
Figure 3-47, Threshold Accuracy Test Waveform
3-47
PERFORMANCE TESTS
Notes
3-48
Table 3-2. HP 54201AID Performance Test Record
TEST LIMITS MEASURED

3-6. VMIN VMAX
DC OFFSET o . 98 V to 1. 02 V CH.I
ACCURACY CH.2
-0.98 V to -1.02 V CH.I

CH.2
-0.89 V to -1.11 V CH .1
CH.2
0.89 V to 1. 11 V CH.I
CH.2
3-7.
VOLTAGE 84 mV to 116 mV CH.I
MEASUREMENT CH.2
ACCURACY
-84 mV to -116 mV CH .1
CH.2
-4.32 V to -5.68 V CH.I

CH.2
4.32 V to 5.68 V CH.I

CH.2
3-8. Real Time

BANDWIDTH
(- 3dB) ,,3 dB CH.I
CH.2
Repetitive
"3 dB CH.l
CH.2
3-9. Real Time

TIME 398 ns to 402 ns
MEASUREMENT
ACCURACY Repetitive
3.8 ns to 4.2 ns
3-49
HP 54201 AfD - Performance Tests
Table 3-2. HP 54201AID Performance Test Record
TEST LIMITS MEASURED

3-10.
TRIGGER (ANALOG) 283 mV to 317 mV CH.I CH.2
LEVEL ACCURACY -283 mV to -317 mV CH.I CH.2
-176 mV to -424 mV CH.I CH.2
176 mV to 424 mV CH.I CH.2
3-11. Internal
TRIGGER ';2 V CH.I
SENS I TIV ITY CH.2
External
50D coupling PASS FAIL
.2 MD coupling PASS FAIL
3-12.
MINIMUM ';20 ns POOO
SETUP TIME POOl
(HP 5420ID) P002
3-13.
MINIMUM ';0 ns POOO
HOLD TIME POOl
(5420ID) P002
3-14. +WIDTH -WIDTH

MINIMUM CLOCK ';20 ns POOO
PULSE WroTH POOl
(HP 5420ID) P002
3-15.
CLOCK REPETITION ;;'25 MHz POOO
RATE POOl
(HP 5420ID) P002
3-16.
MINIMUM INPUT ';0.60 V POOO
(HP 5420ID) POOl
POD2
3-17 .
THRESHOLD 3.78 V to 4.22 V POOO
ACCURACY POOl
(HP 542010) P002
-3.78 V to -4.22 V POOO

POOL
P002
3-50
HP 54201AID - Adjustments
SECTION 4
ADJUSTMENTS
4-1. INTRODUCTION
This section contains front-panel calibration procedures and adjustment procedures for the power
supply, display driver, analog board, and state trigger board. Table 4-1 lists the tabie of
Recommended Test Equipment.
4-2. CALIBRATION INTERVAL
There is no recommended calibration interval. Adjustment needs are defined by the pass/fail
status of resident self-tests and calibration routines. A failure of a SYSTEM menu self test should
be followed by resident SYSTEM menu calibration routines 0, 5, and 6 (in this order). The self tests
should then be re-selected to check whether the self-calibration routines corrected the error.
Repeated failure of a self-test, or failure of a self-calibration routine may dictate the need of a
particular hardware adjustment. Refer to table 6-3 in Section 6 for appropriate adjustments.
Certain adjustments should be checked after a repair has been made. Refer to table 6-1 for
adjustments needed for a particular board repair. Performance tests that may be affected by these
adjustments are also listed in table 6-2.
Always end the adjustment session with SYSTEM menu calibration routines 0, 5, and 6 (in this
order), and then perform the SYSTEM menu self tests to assure proper operation of the HP
54201A/D. Although self tests check for correct functional operation, they do not serve as a
performance verification. Persistent failure of one of the self tests is an indication of a faulty board;
refer to the troubleshooting procedures in this manual.
Nole
Allow instrument to warm up for at least 30 minutes prior to beginning

front-panel calibration or adjustment procedures.
IWARNING I
Read the safety summary at the front of this manual before performing
adjustment procedures.
The adjustments are performed with the top, bottom, and side covers
removed. Use care to avoid shorting or damaging internal parts of the
instrument.
4-1
HP 54201A/D - Adjustments
4-3. FRONT-PANEL CALIBRATION
4-4. SYSTEM Calibration Menu

Front.panel calibration allows the user to execute automatic gain, offset, trigger hysteresis, trigger
level, and delay calibration for Channel 1 and Channel 2. A rear-panel switch protects the
calibration factors from inadvertent changes. This CAL switch must be set to the UNPROTECTED
position before executing automatic calibration. Error message "Cal RAM Write Protected" will be
displayed if calibration is attempted with the switch in the protected position.
Calibration 0 calibrates gain, offset, trigger hysteresis, and trigger level for Channel 1 and Channel
2 and takes about 41/2 minutes to execute. Individual gain and Offset calibration for a channel
may be executed by choosing 1 or 2 which takes about 1 1/2 minutes each to execute.
Calibration 3 selects trigger hysteresis and calibration 4 selects trigger level and take about 15
seconds each to execute. Calibration 5 and 6 calibrate delay for channel 1 and channel 2 and also
take about 15 seconds to execute. Calibration 7, 8, and 9 set service default calibration factors
and execution is immediate. A normal calibration would require calibrations 0, 5, and 6 (in this
order) to be executed. Calibrations 7, 8, and 9 are used for service setup and would be used after
a major repair to the instrument for initial setup procedures.
To execute the calibration routines, press the SYSTEM menu key, then press the NEXT/PREV key
until the Calibration menu is displayed as shown in figure 4-1. Move the blinking cursor to the
Execute Calibration field and enter the number of the routine you wish to execute. Follow the
instructions displayed on screen and watch the status line at the end of the calibration to see if the
instrument calibrated successfully. An audible beep will be heard when the selected calibration
routine is complete.
When front-panel calibration is complete, set the rear-panel CAL switch to the PROTECTED
position.
System Specification Status: Acquired Frame 01004__.

TALk oi'lL ",'
[Callbratlon ]
Exec ut e C8.1 ib r a'ti nn
[I
•
Cals 1 thru 4
Gain g 1 Chan 1
Offset 2 Chan2
Tr il~ger 3 Hus t ere s is

4 Leve I
Dels!) 5 Chan 1
6 Chan2
Service Defaults
7 Cia i n
8 Offset & TrIgger
9 De 1a~
Figure 4-1. SYSTEM Calibration Menu
4-2
4-5. SYSTEM Test & Service Menu Calibration

Execute Service routines 0, 1, and 2 (figure 4-2) provide very precise calibration of time and trigger
for the HP 54201A/D, and need only be performed in order to make highly accurate
measurements. These procedures are not a part of normal calibration and are not required for the
HP 54201A/D to function properly or to meet specifications. These routines should only be
performed after SYSTEM Calibrations routines 0, 5, and 6 (in this order) have been performed.
System Specification Statu8: Acquired Frame 01041 __ .

TAU: OnL\'
[ est & ServIce ]
E .ecu t e 5e 1ftest •
B cPU/r-'lemer- ~~
1 AcqUisiti~n/Trigger
2 Input
Execute Service.
o Time null
1 E~t Trigger Null
2 Ext Trigger Hysteresis
3 Hardware Service
Figure 4-2. SYSTEM Test & Service Menu Caiibration
Equipment Required:

BNC(f)-to-BNC(f) Adapter HP Part No. 1250-0080
BNC Cable, 9-inch (Oty 2, matched set) HP 10502
BNC Cable, 48-inch HP10503
Resistive Divider Kit H P 10020A
50n Terminator HP 10100C
4-3
HP 54201 AjD - Adjustments
TIME NULL
The Time Null routine nulls out very small internal delay differences between the two input
channels of the HP 54201AjD.
Equipment Setup:
HP 8161A
A Output B Output
High Level (HiL): +4.5 V +4.5 V
Low Level (LOL): -0.25 V -0.25V
Procedure:
1. Connect the 9-inch BNC cabies to the BNC tee. Connect the 48-inch cable to the BNC tee with
the BNC(f)-to-BNC(f) adapter. Connect the other end of the 48-inch cable to the A output of the
Pulse Generator. Connect the 9-inch cables to the Channel 1 and Channel 2 inputs of the HP
54201 AjD.
2. Press the SYSTEM menu key and press the NEXTjPREV key until the SYSTEM Test & Service
menu is displayed.
3. Move the blinking cursor to the Execute Service field and enter a for Time Null.
4. Press the INSERT key on the HP 54201AjD to start procedure. The procedure will take about
15 seconds to execute.
EXT TRIGGER NULL
The Ext Trigger Null routine nulls out very small internal delay differences between the EXT TRIG
input and the input channels of the HP 54201AjD. This routine should always be performed after
the Time Null routine and never as a stand-alone routine.
Equipment Setup: Same as Time Null
Procedure:
1. Move 9-inch BNC cable from Channel 2 input to the EXT TRIG input of the HP 54201AjD.
2. Enter 1 in the Execute Service fieid for Ext Trigger Null.
3. Press the INSERT key on the HP 54201AjD to start procedure. The procedure will take about
4-4
EXT TRIGGER HYSTERESIS
The Ext Trigger Hysteresis routine adjusts an internal hysteresis DAC in the HP 54201 AID until the
Pulse Generator signal will no longer trigger the instrument.
Equipment Setup:
HP 8161A
Period (PER): 1 jJs
A Output B Output
Leading Edge (LEE): 100 ns 100 ns
Trailing Edge (TRE): 100 ns 100 ns
High Level (HIL): +400 mV +400 mV
Low Level (LOL): -400 mV -400 mV
Procedure:
1. Connect 50n terminator to the EXT TRIG input of the HP 54201A/D.
2. Connect the 100:1 divider from the Resistive Divider kit to the kit cable assembly. Connect the
BNC adapter tip from the kit to the 100:1 divider.
3. Connect the divider end of the cable to the 50n terminator on the EXT TRIG input of the HP
54201 A/D, and connect the other end of the cable to the output of the Pulse Generator.
4. Enter 2 in the Execute Service field to select Ext Trig Hysteresis routine.
5. Press the INSERT key on the HP 54201A/D to start procedure. The procedure will take about
4-6. EQUIPMENT REQUIRED FOR ADJUSTMENTS
Table 4-1 lists the equipment required to adjust the HP 54201 AID. Other equipment may be
substituted if it meets or exceeds the criticai specifications given in table 4-1.
Table 4-1. Recommended Test EqUipment
INSTRUMENT CRITICAL SPECIFICATIONS RECOMMENDED

MODEL
Digitai Voltmeter Accuracy: 0.5% HP 50056
Pulse Generator Repetition rate: 100 kHz HP 8161A

Transistion time: 1.3 ns
Amplitude: 5 V
Product Support Kit No substitute HP Part No. 54200-69501
4-5
HP 54201 AID - Adjustments
ADJUSTMENTS
After the instrument has warmed up at least 30 minutes, perform a key-down power-up reset. This
will preset the HP 54201 AID to a predetermined condition and clear the display memory. Hold any
front panel key down while applying power to the instrument. Hold the key down long enough for
the power-up tune to be completed.
4-7. POWER SUPPLY ADJUSTMENT

Description:
This procedure checks all dc power supply voltages voltages to ensure they are within limits.
These limits apply for any combination of iine voltage and instrument board sets.
Equipment Required:
Digital Voltmeter HP 50058
Equipment Setup:
Set HP 50058 Mode to DC Volts.
Procedure:
1. Disconnect HP 54201A/D power cord and remove top cover.
2. Connect voltmeter ground lead to GND on Power Supply board test connector A1TP2 (figure
4-3).
3. Apply power to HP 54201AfD.
4. Check each of the supplies at A1TP2 with the voltmeter to make sure they are within the
following limits:
SUPPLY LIMITS
+15 V +14.25 to +15.75V

+12V +11.4 to +12.6
+5V +4.75 to +5.25V
-2.4 V -2.16 to -2.64V
-5.2 -5.2 to -5.7
-12 V -11.4 to -12.6V
5. Adjust VOLT ADJ (A1R43) if necessary to bring supplies into iimit range.
6. Disconnect the HP 54201AfD power cord.
4-6
ADJUSTMENTS
VOLT ADJ
A1R34
A1TP2 ----i,;;,
Figure 4-3. Power Supply Ad justmen!
4-7
HP S4201AjD - Adjustments
ADJUSTMENTS
4-8. DrSPLAY SYSTEM ADJUSTMENT

Description:
This procedure is in two parts, yoke adjustment and display driver adjustment. The Yoke
adjustment procedure must be must be performed if any part of the Display System is replaced
(CRT, display driver, or yoke) or if a display cannot be aligned on the CRT screen using the Display
Driver Adjustment Procedure. If the Yoke Adjustment Procedure is performed, the Display Driver
Adjustment must then be performed. The Dispiay Driver Adjustment Procedure can be a
stand-alone adjustment.
Note
It is recommended the test pattern be used and the Display Driver

Adjustments be optimized if necessary to determine the need for the
Yoke Adjustment.
IWARNING I
Hazardous potentials exist on the power supply, the CRT, and on the
display driver board. To avoId electrical shock, the following
procedures should be closely adhered to.
4-8a. Yoke Adjustment Procedure:

Equipment Required:
None
Procedure:
1. Disconnect power from HP S4201AjD and remove top cover.
2. Before applying power, ensure that yoke is firmly pressed against bell of CRT. If not, loosen
yoke neck screw attaching yoke to CRT and slide yoke against CRT. Gently tighten screw until
firm.
3. Apply power to HP S4201AjD.
4. Press SYSTEM menu key, then press the NEXT or PREY key until Test & Service menu is
displayed. Move blinking cursor to Execute Service field, then enter 3 for Hardware Service.
S. Enter 1 in the Execute Hardware Test field to select display pattern as shown in figure 4-4.
6. Check that display pattern is square with the edges of the CRT. If not, loosen yoke neck screw
and rotate yoke to square up the pattern while keeping the yoke firmly pressed against the bell
of the CRT. Then gently lighten the screw until firm.
4-8
ADJUSTMENTS
7. Remove power from the HP 54201A/D. Disconnect two yoke connectors from display driver
board.
8. While holding flexible straight edge from front lower-left corner to front upper-right corner of
CRT, make a mark about one inch long with a water soluble felt pen across center of CRT
(figure 4-5).
9. Repeat above step for upper-left corner and lower-right corner, forming an .. x.. in center of CRT
(figure 4-5).
10. Adjust BRIGHTNESS control pot to minimum (full counter-clockwise). See figure 4-6 for
display adjustment locations.
11. Apply power to HP 54201A/D.
12. Adjust BRIGHTNESS control pot until a dot appears on CRT.
13. Dot should appear within a 0.3 em (1/8 inch) radius of intersection of two lines. If not, align
dot using centering rings on yoke.
14. Remove power from HP 54201AfD and clean CRT screen with mild soap and water.
15. Reconnect two connectors from yoke to display driver board.
16. Perform Display Driver Adjustment Procedure.
GRID AbJUSTMENTlpATTERN
Press 'NEXT' key for intensity adjustment
Figure 4-4. Grid Adjustment Pattern
4-9
ADJUSTMENTS
r,"ON'O'C",
Figure 4-5. Yoke Centering Adjustment.
VER. HOR.
PHASE HOR.HOLD LINEARITY WIDTH INPUT BRIGHTNESS FOCUS
2 16
00000000
00000000
I 15
HALF-BRIGHT
Display Driver Board
HEIGHT
D
(Adjustment access on the circuit side)
Figure 4-6. Dispiay Adjustment Locations
4·10
HP 54201A/D • Adjustments
ADJUSTMENTS
4-8b. Display Driver Adjustment Procedure:

Equipmenl Required: None
Procedure:
1. Disconnect power from HP 54201A/D and remove top cover.
2. Remove two screws that attach handle and left side cover to frame. Remove side cover.
3. Apply power to HP 54201A/D.
4. If necessary. adjust BRIGHTNESS control pot until display pattern is visible. See figure 4-6 for
display adjustment locations.
5. Press SYSTEM menu key, then press NEXT/PREV key until Test & Service menu is displayed.
Move blinking cursor to Execute Service field, then enter 3 for Hardware Service.
6. Enter 1 in Execute Hardware Test field to select Display Pattern as shown in figure 4.7.
-------------I44mm ±2mml--------------1
GRID AbJUSTMENTlpATTERN
46mm
±2mm
92mm
±2mm
j
Press 'NEXT' key for intensity adjustment
1-+-----72mm ±2mml----+
Figure 4-7. Grid Adjustment Pattern
4-11
HP 54201 A/D - Adjustments
ADJUSTMENTS
7. Adjust HEIGHT and VER. PHASE (position) until test Test Pattern fills screen vertically.
8. Adjust HOR. LINEARITY until width of each square is the same.
9. Adjust WIDTH until total picture width is same as width of the outer boundary marks shown in
figure 4-7. Note that outer edges of the display may NOT align with outer boundary marks.
Note
Adjustments in steps 8 and 9 interact; reiteration of these two steps

may be necessary for best results.
10. Now adjust horizontal position by rotating centering rings on yoke. Adjust rings for horizontal
movement while minimizing vertical movement of display. Left and right edges should NOW
align with outer boundary marks described in previous step.
11. Adjust VER. PHASE to vertically center test pattern (figure 4-7). This should only require minor
adjustment.
12. Activate the intensity Adjust Pattern as shown in figure 4-8 by pressing the NEXT key.
13. If a photometer is available, adjust BRIGHTNESS control until reading of Full Bright area is 39
to 41 toot-lamberts, and adjust HALF-BRIGHT control until reading of Half Bright area is 19 to
21 toot-Iarnberts. If no photometer is available, adjust to a comfortable viewing level.
14. Adjust FOCUS control to achieve best display in area of test pattern labeled "Focus Area".
15. Verify area of test pattern labeled "Blinking Cursor" does contain a blinking rectangular cursor
flashing several times per second. If there are two different video levels but no flashing, CPU
board is defective. If there is no difference in video levels, display board is defective.
16. HORHOLD adjustment has been pre-adjusted by manufacturer and should not need to be
changed.
17. Replace the side cover and top cover on the HP 54201A/D.
4-12
ADJUSTMENTS
Press RUN/STOP key to exit

Focus Area Blinking Cursor> I
{******}
Half Bright Full Bright

19-21 FL INTENSITY ADJUST 39-41 FL 133-140 CD/SQM
65-72 CD/SQM
Figure 4-8. Intensity Adjust Pattern
4-13
ADJUSTMENTS
4-9. ANALOG BOARD ADJUSTMENTS
Description:
The following Analog Board procedures adjust: analog amplifiers for proper offset (Offset
Adjustment), input attenuator compensation and gain for best square wave response (Input
Compensation and Gain Adjustment).
4-9a. Offset Adjustment Procedure:
Equipment Required: None
Procedure:
1. Set HP 54201A/D rear-panel CAL switch in UNPROTECTED position (down).
2. Remove bottom cover and disconnect ali inputs.
3. In SYSTEM Calibration menu, select and execute Service Default Gain (7), then execute Service
Default Offset & Trigger (8).
5. Display Channel 1 (single graph with grid graticulej and position trace to center graticule using
CH1 ZERO OFFSET (A4R239) (figure 4-10).
_________ Status: Rcquisition Stopped .

S't a tus [[onfl uratlonJ
TALk OI1L'1
Setup Label
Chann e 1 Ildl!liMIIElII-.';-_----;- ~:-:-:----=----;;:--T i m e b a s e - - - - - - - - ,

I t 1 Input 2 Semo l in~l @ 50.[1 r1Hz
tl P U . plode Auto J
Range 20. IlS
[lffset Range
Acquire [Real 11me
Probe 0.0 000 s
Coup I 1n9 oj Dela~
•
Reference [ Center
St.or-e rlode [ Nor-mal ]
Auto Scale [Enabled J Auto Scale [ PerIod
Label
--====-----===---------'--------_.
Tr i g , ; ; j e r - - - - - - - - - - - - - - - - - - - - - - - - ,
[ Analo [In I J for Assignment and Sequence
Analog Sour-ce _''Mmma Auto Scale

On Event
'Milb"drm-
ImlWl
Le ve 1
Probe [ 10,1 ] Coupling [de ] IBDi1
Figure 4-9. HP 54201AID STATUS configurafion Menu
4-14
ADJUSTMENTS
6. Note position of trace on screen.
7. Select TIME menu and move blinking cursor to Real Time field. Press NEXT key to change
field to Repetitive.
8. While switching between Repetitive and Real Time, adjust CH1 DC OFFSET (A4R116) for
smallest shift. Dc offset can only be adjusted in Repetitive mode.
9. Switch back to Real Time and repeat steps 5 through 8 for Channel 2 using CH2 ZERO
OFFSET (MR238) and CH2 DC OFFSET (A4R32).
10. Select SYSTEM Calibration menu. Execute Calibration 0 (all gain & offset). Calibration 0 will
take about 2 1/2 minutes to execute.
11. When Calibration 0 is complete, set the HP 54201A/D rear-panel CAL switch to the
PROTECTED position (up).
CH1 ZERO
OFFSET
CH2 ZERO
OFFSET
CH2 DC
OFFSET---------..
CH10C_--7
OFFSET
CH2 GAIN _
CH1 GAIN
CH2 COMP
CH1 COMP
Figure 4-10. Analog Board Adjustment Locations.
4-15
HP 54201AjD - Adjustments
ADJUSTMENTS
4-9b. Input Compensation and Gain Adjustments:
Note
The following procedure adjusts the input compensation and gain of

the attenuators, however, these adjustments DO NOT usually drift. It is
recommended the input compensation and gain be checked prior to
adjustment to determine if adjustment is necessary.
Equipment ReqUired:
Pulse Generator HP 8161 A

Equipment Setup:
Set HP 8161A A output to 10-kHz square wave, 3 Vp-p, 0 V offset as follows:
Period (PER) 100 (.is
A Output
Width (WID) 50 us
Leading edge (LEE) 1.3 ns
Trailing edge (TRE) 1.3 ns
High Level (HIL) 1.5 V
Low Level (LOL) -1.5V
Output Enable
Procedure:
1. Set HP 54201AjD power OFF and remove Analog Board Assembly (A4). Refer to Analog Board
Removal in Section 6.
2. Install Analog Extender Board and Analog Board Support Brackets from Product Support Kit
into HP 54201AjD as shown in figure 4-11; then Install Analog Board assembly into Extender
Board.
3. Set HP 54201AjD power ON.
5. Display Channel 1.
6. Connect pulse generator A output to HP 54201AjD INPUT 1 BNC and adjust CHl COMP
(A4C43) (figure 4-9) for maximum square wave flatness using an insulated adjustment tool.
7. Set pulse generator A output to Period = 2ms and Width = 1 ms (500-HZ square wave).
4-16
HP 54201 AjD - Adjustments
ADJUSTMENTS
RIGHT SUPPORT
BRACKET
-:
Figure 4-11. HP 54201AjD Product Support Kit Analog Extender Assembly
4-17
HP 54201AID - Adjustments
ADJUSTMENTS
[Confl ur-a-t t on J _________Statu8: No Trigger Found .

TALL OnL')'
Setup Label
Chan ne 1 1Il1l!Jlm!Elil-II:'~----:-----=--~-T i mebs e e - - - - - - - - -

Input 1 Input 2 Samp l r np I'! 5.00 11Hz
Fanqe
Off se c
Probe
__ ... ~~:~~e
Hc qu ir-e
[ Auto
200 ~s
[Real Time
]
Coupling ~ ~ 1..,.WIl De I a~ 0.0 000 s

S't.ore 010de [ Normal ] Refer-ence [ Center
Auto Scal e • [Enabled ] Auto Scale [ PerIod
Label
Tr- i g g 8 , - - - - - - - - - - - - - - - - - - - - - - - - - -
t Refer to State Trigger Menus
l'lode [ Analo Onl ] for Asslgnment and Sequence
'.'6"••' ,.D..•.. dP
Analog Sour-ce
Level '''¥i'';;;;;11
PI-abe [ 1: 1 ]
0 V
mat Auto Sea I e
On E\n:~nt
Coupling
Rl -
[de ] [50 n
Figure 4-12. HP 54201A/D STATUS Configuration Menu
8. Change HP 54201AID timebase range to 5 ms.
9. Adjust CH1 GAIN (A4R84) for maximum square wave flatness.
Note
The adjustments in steps 6 and 9 interact; reiteration of these steps

10. Display Channel 2. Change HP 54201A/D trigger source to Channel 2.
11. Set pulse generator A output to Period = 100 J.1.s and Width A = 50 J.1.s (10-kHz square wave).
12. Change HP 54201A/D timebase range to 200 J.1.s.
13. Connect pulse generator A output to HP 54201A1D INPUT 2 BNC. Adjust CH2 COMP (A4C4)
(figure 4-9) for maximum square wave flatness.
4-18
ADJUSTMENTS
14. Set pulse generator A output to Period = 2 ms and Width = 1 ms (500-Hz square wave).
15. Change HP 54201A/D timebase range to 5 ms.
16. Adjust CH2 GAIN (A4R13) for maximum square wave flatness.
Nole
The adjustments in steps 13 and 16 interact; reiteration of these steps

17. Set HP 54201A/D power to OFF and disconnect power cord.
18. Remove extender board and supports and reinstall Analog Assembiy into mainframe.
19. Replace bottom cover on HP 54201A/D.
4-19
ADJUSTMENTS
.. -./.
4-10. STATE TRIGGER BOARD ADJUSTMENT (HP 54201D Only)
Description:
This p:ocedure adjusts the State Trigger Board clock circuitry for proper phase and delay to ensure
compliance with setup and hold specifications.
Equipment ReqUired:

10:1 Divider Probes (Qly. 2, supplied with HP 54201AjD) ,. HP 10017A
Equipment Selup:
Set HP 8161A A output to 100-kHz square wave, 5 Vp-p, 2.5 V offset as follows:
Period (PER) 10 fls
A Output
Width (WID) 5 fls
leading edge (lEE) 1.3 ns
Trailing edge (TRE) 1.3 ns
High level (Hll) 5.0 V
low level (lOl) OV
Output Enable
Procedure:
2. Configure TRIG State Assignment menu as shown in figure 4-14.
3. Ensure STATUS Measurement menu is set to Standard Mode.
4. Connect POD 0 to State Board Test Fixture, HP Part No. 54200-63801 (part of Product Support
Kit).
5. Connect a BNC cable from ClK BNC on the State Board Test Fixture to output of function
generator.
6. Remove cover from right side of HP 54201 D.
7. Unscrew and remove the black insulating sleeve from the front of the probes to allow probe tips
to fit through the side rail and into the test points. Connect the 10:1 divider probes to State
Trigger Board test points as follows (refer to figure 4-15):
i
.~
A8TP2 to HP 54201 D INPUT 1
A8TP1 to HP 54201 D INPUT 2
4-20
ADJUSTMENTS
St:3tU::;; [ConfI urat Ion] _________Status: Rcquired Frame 00074 __

TALK onu'
Setup Lebe 1
1 Input 2 20[1 ~IHz

Ranc e
Of+~;et
lUtE !
p~- abe [Real TIme
Coup 1 i n!~
St cr-e l'lo d e [ Center
Auto Sea I e [Enabled ] [ Perlod
Label
Tr- i 1~I~er-----------------------------,
Node [ Ana loOn I ] for Assignment and Sequence
ftna l orj Source
Level
I.'M'••' ('W'.Iaw
"';;;;414411 - 1 . 5 Ii
Auto Scale
On Event
• •m.
Probe [ 1[1,1 ] Coupling Cdc ] ri ~ln
Figure 4-13. HP 542010 STATUS Configuration Menu
_____________ Status: Acquisition Stopped .

Tr i'J'Jer ' . " . TALK OnL\'
Define [Ass 1 nmerrt I Tr i q qe r tloc e [ Analo On I •
Clock
JKL
[Normal ] ---------- UIIDU ----------
..
Pcd 2 Pod I Pod [I
I'lu It ip I e x Ln q [ Off ] IDIIam1 IDIIam1 IDIIam1
13 .•.•... 0 8 [I 8 0
Label Pol
IDI [* .
Figure 4-14. HP 542010 TRIG State Assignment Menu
4-21
ADJUSTMENTS
8. Display channel 1 and channel 2. Select front panel measurement DELAY 2 to 1. Display
should appear similar to figure 4-16. If triggered waveforms do not appear, adjust HP 54201 AID
trigger level.
9. Adjust A8R20 (figure 4-15) until leading edge of ICK (A8TP2) is delayed 42 to 43 ns from
leading edge of MCK (A8TP1).
10. Move HP 54201 D Input 2 probe from A8TP1 to A8TP3. The display should appear similar to
figure 4-17. Adjust A8R28 until DELAY measurement from 2 to 1 is approximately zero
seconds (±1 ns),
11. Disconnect probes and replace side cover on HP 54201 D.
ABTP3 ABTP2 ABTP1

ASR28 BCK ICK MCK ABR20
Figure 4-15. State Trigger Board Adjustment Locations
4-22
HP 54201 A/D - Adjustments
ADJUSTMENTS
________________________________Status: Rcquired Frame 00461 __

TALI< OnL'1
De 18!j ~ to II 1144.-11' '" 42.82 n s
Gr-aph . . 2c;O
- mv /d i '01
"
-1 -c:;o \I 20 [1 ns/di\l -inO
- A
- n
/\
1: ,nIF"• •' , '.
-~,/ " I
\/
2: ''''F'' .' i
/r\
";.
~
! \,\.---
Figure 4-16. A8TP2 to A8TP1 Delay Waveform
------- Status: Acquired Frame 00642 __

TALK, OnL'(
De 18!::J !! to II "4A" '" -120 p s
Graph . . - mv -d i
2c;O \1 -1 1:)0 V
- ~
- -100 0 11'
,I";,
1: 'UIF....'
,,
~j , r-----
\/
2: .....#. . . .,
(\
!
i
\c......--
Figure 4-17. A8TP3 to A8TP2 Delay Waveform
4-23/{4-24 blank)
HP 54201A/D. Replaceable Parts
SECTION 5
REPLACEABLE PARTS
5-1. INTRODUCTION
This section contains information for ordering parts. Table 5·1 lists abbreviations used in the parts
lists. Table 5·2 lists all replaceable parts in reference designator order. Table 5·3 contains the
names and addresses that correspond to the manufacturer code numbers. Figure 5·1 shows the
mainframe parts locations.
5-2. ABBREVIATIONS
Table 5·1 lists abbreviations used in the parts lists, the schematics, and throughout this manual.
The abbreviations in the parts list are always capital letters. However, in other parts of the manual
abbreviations may be used with both lowercase and uppercase letters.
5-3. REPLACEABLE PARTS LIST
Table 5-2 is the list of replaceable parts and is organized as follows:
a. Electrical assemblies in alphanumerical order by reference designation.
b. Chassls-mounted parts in alphanumerical order by reference designation.
c. Electrical assemblies and their components in alphanumerical order by reference

designation.
The information given for each part consists of the following:
a. Reference designation.
b. Hewlett-Packard part number.
c. Part number Check Digit (CD).
d. Total quantity (QTY) in instrument (or on assembly). The total quantity is given only once at
the first appearance of the part number in the list.
e. Description of part.
f. Typical manufacturer of part in an identifying flve-dlqlt code.
5·1
HP 54201 AfD - Replaceable Parts
5-4. ORDERING INFORMATION
To order a part listed in the material llsts, quote the Hewlett-Packard part number, indicate the
quantity desired, and address the order to the nearest Hewlett-Packard Sales/Service Office.
To order a part that is not listed in the material usts, include the instrument model number,
instrument serial number, a description of the part (including its function), and the number of parts
required. Address the order to the nearest Hewlett-Packard Sales/Service Office.
5-5. DIRECT MAIL ORDER SYSTEM
Within the USA, Hewlett-Packard can supply parts through a direct mail order system. Advantages
of using this system are:
a. Direct ordering and shipment from the Hewlett-Packard Parts Center in Mountain View,
California.
b. No maximum or minimum on any mail order (there is a minimum order amount for parts
ordered through a local Hewlett-Packard office when the orders require billing and invoicing).
c. Prepaid transportation (there is a small handling charge for each order).
d. No invoices.
To provide these advantages, a check or money order must accompany each order.
Mail order forms and specific ordering information are available through your local Hewlett-Packard
office. Addresses and phone numbers are located at the back of this manual.
5-2
Model 54201 AID - Replaceable Parts
Table 5-1. Reference Designators and Abbreviations.

REFERENCE DESIGNATORS
A .. assembly F .. fuse MP .. mechanical part u .. integrated circuit
B e mctor FL .. filter P '" plug V .. vacuum, tube, neon
BT .. battery IC '" Integrated circuit Q .. transistor bulb, photocell, ele

C '" capacitor = jack R = resistor VR = voltage requlator
CP = coupler K = relay RT '" thermistor W '" cable

CR .. diode L .. inductor S ..,switch X = socket
DL .. delay line LS .. loud speaker T '" transformer Y .. crystal

ee .. device signaling (lamp) M .. meter TB .. terminal board Z .. tuned cavity network
E .. mise electronic part MK .. microphone TP .. test point
ABBREVIATIONS
A .. amperes H .. henries N/O - normally open RMO _ rack mount only
AFC .. automatic frequency HOW '" hardware NOM .. nominal RMS '" rcct.meen square
control
AMPL = amplifier HEX '" hexagonal NPO '" negative positive zero RWV c reverse working
HG '" mercury (zero temperature voltage

BFa .. beat frequency oscillator HR '" houris] coefficient)
BE CU = beryllium copper HZ '" hertz NPN '" neqative-posltlve- S-B .. slow-blow
BH .. binder head negative sen = screw
BP = bandpass IF '" intermediate Ireq NRFR .. not recommended for SE - selenium
BRS '" brass IMPG '" impregnated field replacement SECT .. section(s)
BWO '" backward wave oscillator INCD = incandescent NSR = not separately SEMICON .. semiconductor
INCL '" include(s) replaceable SI .. silicon
CCW = counter-clockwise INS .. insulatlcrued] SIL = sliver
CER '" ceramic INT .. internal aBO '" order by description SL '" slide
CMO ., cabinet mount only OH = oval head SPO '" spring
COEF '" coeficient K = kilo"'1000 OX = oxide SPL - special
COM '" common SST '" stainless steel
COMP '" composition LH = left hand SR = split ring
COMPL '" complete LIN '" linear teper P '" peak STL .. steel
CONN '" connector LKWASH = lock washer PC '" printed circuit
CP '" cadmium plate LOG = logarithmic taper PF = Picofaradsoo10-12 TA '" tantalum
CRT '" cathode-ray tube LPF = low pass filter farads TO .. time delay
ew = clockwise PH BRZ '" phosphor bronze TGL = toggle
M = millioo10-3 PHL '" phillips THO .. thread

6 '" peak inverse voltage TI = titanium
DEPC '" deposited carbon MEG '" meg=10 P'V
DR '" drive MET FLM = metal film PNP = positive-negative- TaL .. tolerance
MET OX = metallic oxide positive TRIM = trimmer
ELECT = electrolytic MFR = manufacturer P/O "' part of TWT = traveling wave tube
ENCAP = encapsulated MHZ "' mega hertz POLY .. polystyrene
EXT '" external MINAT = miniature PORC '" porcelain u

MOM '" momentary pas '" position(s)
F '" farads MaS '" metal oxide substrate POT = potentiometer VAR '" variable
FH '" flat head MTG '" mounting PP '" peak-to-peak VDCW '" dc working volts
FIL H '" tnnster head MY = "mylar" PT '" point
FXO '" fixed PWV '" peak working voltage WI '" with
N = nano (10- 9) W ~ watts
G N/e = normally closed RECT '" rectifier WIV .. working inverse
GE = germanium NE .. neon RF = radio frequency voltage
GL '" glass NIPL = nickel plate RH '" round head or ww '" wirewound
GRO '" grounded or right hand W/O e without
5-3
HP 54201 AID - Replaceable Parts
MP26
,
<:>
MP5
MP4
MP1
MP16
MP11
MP8"10
81
MP7
MP2
H3 MP6 MP3 MP29 MOUNTED
MP38 MOUNTED MP28 MOUNTED ON MP2
ON H3 ON MP3
Figure 5-1. Mainframe Parts Location (sneo: 1 of 3)
5-4
HP 54201 AID - Replaceable Parts
L1 MP41
MP40
MP21
Figure 5-1. Mainframe Parts Location (Sheet 2 of 3)
5-5
HP 5420 _Replaceable pariS
1A/O
MP22
MPS2-----'--'-
MP19---"
eet
figure 5-1. Mainframe PartS LOcation (Sfl 3 of 3)
5-6
Model 54201AID-Replaceable Parts
Table 5-2. Replaceable Parts
Reference HP ParI C Qty Description Mfr Mfr Part

Designator Number D Code Number
Al 01630-66529 B POWER SUPPLY BOARD ASSY 28480 01630-66529

A2 54201-66501 6 MOTHER BOARD ASSY 28480 54201-86501
.3
A4
54201-69502
54201-69503 ,
3 CPU BOARD A$SY
ANALOG BOARD ASSY
28480
28480
54201-69502
54201-69503
A6 0950-1692 3 1 DISPLAY DRIVER BOARD ASSY 28480 0850-1692
A7 01830-66531 o 1 KEYBOARD BOARD ASSY 28480 01630-66531
A8 54200-68505 5 1 STATE TRIGGER BOARD ASSV (542010 ONLY) 28480 54200-69505
61 3180-0455 2 1 FAN-TUBEAXIAL 10S-CFM 12VDC .6KV DIEL 28480 3160-0455
HI 0515-0430 3 30 SCREW-MACHINE ASSEMBLY M3 X 0.5 BMM-LG 28480 0515-0430
H2 0515-0641 a 12 SCREW-THD-RLG M4 X 0.7 lOMM-LG PAN-HD 00000 ORDER BY DESCRIPTION
H3 0570-1171 7 2 SCREW-SPCL 6-32 .46B-IN-LG UNCT laD 00000 ORDER BY DESCRIPTION
H'
H5
0590-1611
0624-0598
2
5 ,
3 NUT-KNRLD-R 1/2-2B-THO .084-IN-THK
SCREW-TPG 8-16 ,625-IN-LG PAN-HD-TORX
28480
28480
0590-1611
0624-0598
H6
H7
0624-0520
0624-0644
3
2 ,, SCREW-TPG 6-19 .5-IN-LG PAN-HD-TORX TID
SCREW-TPG 8-32 .5-IN-LG PAN-HO-TORX T15
SCREW-MACH M4 X 0.7 BMM-LG go DEG-TORX
28480
28480
0624-0620
0624-0544
H8 0515-1403 2 16 28480 0515-1403
H9 0515-1384 s 2 SCREW-MACH HS X 0.8 lOMM-LG 90 DEG-TORX 28480 0515-1384
H10 3050-0071 5 1 WASHER-fL MTLe NO.8. 169-IN-ID 28480 3050-0010
H11
H12
3050-0003 3 , WASHER-FL NM NO.6 .141-IN-IO .375-IN-OD
WASHER-SHLDR NO. 10 .2-IN-ID .5-IN-DD
28480
28480
3050-0003
3050-0006
3050-0006 6 3
ti13
H14
H15
3050-1016
0515-0374
0515-0943
,
o
3
3
12
WASHER-FL MTLC 1/2 IN ,625-IN-IO
SCREW-MACH M3 X 0.5 10MM-LG
SCREW-MACH M4 X 0.7 12MM-LG 100 DEG
28480
00000
00000
3050-1016
ORDER BY DESCRIPTION
13
HI. 0515-1035 6 2 SCREW-MACH M3 8MM-LG TORX T10 00000 ORDER BY DESCRIPTIoN
H17
H18
2190-0476
0515-1402
9
1 ,
2 WASHER-LK 82 CTSK EXT T NO.4 .116-IN-IO
SCREW-MACH M3 X 0.6 8MM-LG PAN-HO-TORX
28480
28460
00000
2190-0476
0515-1402
H19 0515-0365 3 10
H20 0515-0372 2 g SCREW-MACH M3 X 0.5 8MM-LG 00000 ORDER BY DESCRIPTION
H21
Ll
0515-0433
9140-0720
•a 1
1
YOKE
00000
28480
8140-0720
MPl 01630-00203 5 1 PANEL-REAR 28480 01630-00203
MP2 01630-64103 s 1 REAR DOOR 28480 01630-64103
MP3
MP'
MP5
01630-44102
01630-04105
01610-·84501
,
5 1
1
COVER REAR FIN
TOP COVER
POUCH
28480
28480
28480
01630-44102
01630-04104
01630-84501
2 1
MP6 5061-9445 o 1 BOTTOM COVER 28480 5061-9445
MP7 5060-9882 7 1 COVER-SIDE 28480 5060-9882
MP,
MP9
MP10
5060-9802
5041-6819
5041-6620
,
1
7
1
1
1
STRAP HANDLE 12
CAP-STRP HNDl
CAP-STRP HNDl
28480
28480
28480
5060-9802
5041-6819
5041-6820
MPll 5061-9915 5 1 COVER-SIDE PERFORATED 28480 5061-9915
MP12 7101-0694 1 1 BEZEL-FRONT 28480 7101-0694
MP13 5040-7202 9 1 TRIM STRIP-TOP 28480 5040-7202
MP14 5040-7201 8 4 FEET 28480 5040-7201
MP15 1460-1345 5 2 TIL T STAND SST 28480 1460-1345
MP16 3160-0092 3 1 FINGER GUARD-FAN 28480 3160-0082
MP17 54201-00603 1 1 SHIELD- POWER SUPPLY 28480 54201-00603
MP18 54201-60601 5 1 SHIELD-ATTENUATOR ASSY 28480 54201-60601
MP19 5001-0440 1 2 TRIM-SIDE 28480 5001-04<'10
MP20 5021-5835 o 4 STRUT-CORNER 28480 5021-5835
MP21
MP22
5021-5806
5021-5805 ,
5 1
,
1
FRAME-REAR
FRAME-FRONT
28480
28480
5021-5806
5021-5805
MP23
MP24
5040-7221
5041-3170 ,
2
1
STANDOFF R PANEL
SWITCH SHAFT
28480
28480
5040-7221
5041-3170
MP25 01630-00601 7 1 SHIELD-POWER SUPPLY PLASTIC 28480 01630-00601
MP26 5041-2799 1 1 KEYCAP-LINE 28480 5041-2799
MP27
MP28
MP29
0360-2109
8160-0486
0403-0178
,oa 1
5
3
GROUND LUG
RFI STRIP-FINGERS BE-CU ZINC PLATED
BUMPER fOOT-ADH MTG
28480
28480
28480
0160-2109
8160-0486
0401-0179
MP30 54201-01201 3 1 BRACKET-MOTHER BOARD 28480 54201-01201
HPll 01630-01202 6 1 BRKT CD GDE 28480 01630-01202
MP12 01630-01203 7 1 BRKT CTR GDE 28480 01630-01203
MP13 0403-0512 5 10 PC CARD GUIDE 28480 0403-0512
MPH 54201-94303 5 1 LBl IOENT 54201A (54201A ONLY) 28480 54201-94303
MPH 54201-94304 6 1 lBl IOENT 542010 (542010 ONLY) 28480 54201-94304
HP35 54201-94301 3 1 LABEL-FRONT 28480 54201-94301
MP36 54200-94304 5 1 LABEL-KEYBOARD 28480 54200-94304
MP38 0510-0043 4 2 RETAINER-RING E-R EXT .141-IN-DIA STL 28480 0510-0043
MP39 54200-94305 6 1 LABEL-REAR PANEL 28480 54200-94305
MP40 7121-3859 6 1 LABEL-WARNING MYLAR 28480 7121-3659
MP41 7121-4002 5 1 LABEL-CRT CAUTION 28480 7121-4002
See tntroductton to this section for orderIng mforrnatton
5-7
Model 54201 AID-Replaceable Parts
Table 5-2. Replaceable Parts (Cont'd)
Reference HP ParI C Mfr

Designator Qty Description Mlr Pari
Number D Code Number
VI 2090-0066 1 TUBE-ELECTRON
WI 8120-0696 , CRBLE ASSY 3-CNDCT GRA-JKT 7.62-MM-OD
28480
28480
2090-0066
8120-0696
AUSTRALIA/NEW ZEALAND
WI 8120-1521 6 CABLE ASSY 18AWG 3-CNDCT JGK-JKT 28480 8120-1521
115V USA/CANADA
WI 8120-1692 2 CABLE RSSY 3-CNOCT MGP-JKT 28480 8120-1692
EUROPEAN CONTINENT
WI 8120-1703 6 CABLE ASSY 3-CNDCT MGP-JKT 28480 8120-1703
WI 8120-2296 , UNITED KINGDOM
CA6LE ASSY 3-CNDCl GRA-JKT 284BO 6120-2296
SWITZERLAND
WI 8120-2957 POWER CORD SET 3-COND 2-MM-lG 28480 8120-2957
DENMARK
W2 8120-3785 8 FLAT RIBBON ASSY 16-COND 12-IN-LG
W,
w, 8120-3784
01630-81301 ,
7 flAT RIBBON ASSY 14-COND
WR-SGl BlK
28480
28480
28480
8120-3785
6120-3784
01630-81301
AI 01630-66528 6 POWER SUPPLY BOARD ASSEMBLY 28480 01630-66529

AICI 0180-0291 3 CAPACITDR-FXD lUF+-10% 35VDC TA
AIC2
RIC3
0180-0291
0180-2946
3
9
"
3
CAPACITOR-FXD lUF+-!O% 35VQC TA
CAPACITOR-FXD 33QUF+50-10% 35VDC AL
56289
562SS
28480
150D105X9035A2
150DI05X9035A2
0160-2946
A1C4 0160-5473 1 10 CAPACITOR-FXD .OlUF 40DVDC 28480 0160-5473
AIC5 0160-5473 1 CRPACITOR-FXD .QIUF 400VDC 28480 0160-5473
AIC6 0160-5347 8 3 CAPRCITOR-FXD I.DUF 400VDC 2S480 0160-5347
AIC7 0160-5347 8 CAPACITOR-FXD I,aUF 400VOC 28480 0160-5347
AICB 0140-0180 5 7 CAPACITOR-FXD 2DOOPF +-2% 300VDC MICA 72136 DMlSF202G03aOWVlCR
AIC9 0160-5347 8 CAPACITOR-FXD I.OUF 4QOVDC 28480 0160-5347
AICI0 0180-3224 8 2 CRPACITDR-FXD 560MF 200VDC 28480 0180-3224
AICII
AIC12
AIC13
0180-3224
0160-4048
0160-4962
,
8 CAPACITOR-FXD 560MF 200VOC
CAPACITDR-FXD .022UF +-20% 250VAC(RMS)
28480
C0633
0180-3224
PME 271 M 522
1 CAPACITOR-FXD I.CUF 250VDC 28480 0160-4962
AlC14 0180-0291 3 CAPACITOR-FXD lUF +-10% 35VOC TA 56289 150DI05X9035A2
AIC15 0140-0180 5 CAPRCITOR-FXQ ZOOOPF +-2% 3DOVDC MICA 72136 DM19F202G0300WVICR
AIC16 0180-0291 3 CRPACITOR-FXD lUF +-10% 35VDC TA 56289 150DI05X9035A2
Alcn 0140-0180 5 CRPACITOR-FXD ZOOOPF +-2% 300VDC MICA 72136 DM19F202G0300WVICR
AIC18 0160-5473 1 CAPACITOR-FXD .OlUF 400VDC 28480 0160-5473
Ale19 0140-0199 6 CAPACITOR-FXD 240PF ~-5% 300VDC MICA 72136 DM15F241J0300WVICR
AIC20 0180-0291 3 CAPACITOR-FXD lUF ~-10% 35VDC TA 56289 150DI05X9035A2
AIC21
AIC22
0180-0291
0160-5473
,
1
CAPACITOR-FXD lUF +-10% 35VDC TA
CAPACITOR-FXD ,01UF 400VDC
56289
28480
150DI05X9035A2
0160-5473
AIC23 0140-0180 5 CAPACITOR-FXD 2000PF ~-2% 300VDC MICA 72136 DM19F202G0300WVICR
AIC24 0160-0164 7 3 CAPACITOR~FXD ,039UF +-10% 200VDC POLYE 28480 0160-0164
Rle25 0180-2946 9 CAPACIlOR-FXD 330UF ~50-10% 35VDC AL 28480 01BO-2946
AIC26 0180-2946 9 CRPACITOR-FXD 330UF +50~10% 35VDC AL 28480 0180-2946
AIC27 0160-0164 7 CRPACITOR-FXO .039UF +-10% 200VDC POLYE 28480 0160-0164
Ale28 0160-0164 7 CAPACITOR-FXO .039UF +-10% 200VDC POLYE 28480 0160-0164
Ale2S 0180-0291 a CAPACITOR-FXO 1UF +-10% 35VOC TA 56289 150DI05X9035A2
AICJO 0180-0291 3 CAPACITOR-FXD lUF +-10% 35VDC TA 56289 150DI05X9035A2
AIC31 0180-0291 3 CAPACITOR-FXD lUF +-10% 35VDC TA 56289 150DI05X9035A2
AIC32 0160-5473 1 CAPACITOR-FXD .OlUF 400VDC 28480 0160-5473
AIC33 0160-5473 1 CAPACITOR-FXD ,01UF 400VDC 28480 0160-5473
AIC34
AIC35
0140-0180
0180-0291 ,
5 CAPACIlOR-FXD
CAPACITOR-FXD
2000PF +-2% 3000VDC MICA
lUF ~-10% 35VDC lA
72136
56289
DM19F202G0300WVlCR
15DDI05X9035A2
AIC36 0140-0180 5 CAPACITOR-FXD 2000PF +-2% 300VDC MICA 72136 DM19F202GD300WVlCR
AIC37 0160-2202 8 CAPACITOR-FXD 75PF +-5% 300VDC MICA 28480 0160-2202
AIC38 0180-0291 3 CAPACITOR-FXD 1UF +-10% 35VDC TA 56289 150DI05X9035A2
AIC39 0160-5473 1 CAPACITOR-FXD .01UF 400VDC 28480 0160-5473
AIC40 0140-0180 5 CAPACITOR-FXD 2000PF +-2% 300VDC MICA 72136 DM19F202G0300WVICR
RIC41 0180-5473 1 CAPACITOR-FXD ,OlUF 400VDC 28480 0160-5473
AIC42
AIC4J
0160-5473
0180-0291 ,
1 CAPACIlOR-fXO .0lUF 400VOC
CAPACIlOR-FXD lUF ~-10% 35VDC lA
28480
56289
0160-5473
150Dl05X9035A2
AIC44 0160-5473 1 CAPACITOR~FXD .alUF 400VDC 28480 0160-5473
AIC45 0180-0291 3 CAPACITOR-FXD lUF +-10% 35VDC TA 58289 150DI05X9035A2
AIC46
AIC47
0180-0291
01BO-3046
, CAPACITOR-FXO
CAPACITOR-FXO
lUF +-10% 35VDC TA
3300UF +75-10% 6.3VDC AL
56289
28480
150DI0SX9035A2
0180-3046
2 3
AIC48 0180-3046 2 CAPACITOR-FXD 3300UF +75-10% 6,3VDC Al 28480 0180-3046
AIC49 0180-3046 2 CAPACITOR-FXD 3300UF +75-10% 6.3VDC Al 28480 0180-3046
AICRi 1906-0006 9 1 DIODE-FW BRDG 400V lR 18546 VE48
AICA2 1901-0719 1 2 DIODE-PWR RECl 400V 3A 300NS 04713 MR854
AICR3 1901-0719 1 DIODE-PWR RECT 400V 3A 300NS 04713 MR854
See Introduction to this section for ordering Information
5-8
Model 54201 AID-Replaceable Parts
Reference HP Part C Qty Mfr Mfr Part

Designator Number D Description
Code Number
AICR4 1906-0224 a 1 DIOOE-FW BROG 600V 25A 04713 MDR250a

AICRS 1901-0028 5 1 DIODE-PWR RECT 400V 750MA 00-29 28480 1901-0028
AICRS 1901-0050 3 10 DIODE-SWITCHING 80V 200MA 2NS 00-35 28480 1901-0050
AICR? 1901-0050 3 DIODE-SWITCHING 60V 200NA 2NS 00-35 28480 1901-0050
AICRS 1901-0050 3 DIODE-SWITCHING 80V 200MA 2NS 00-35 28480 1901-0050
AiCRS 1901-0050 3 DIODE-SWITCHING BOV 200NA 2NS 00-35 26460 1901-0050
AlCRI0 1906-0051 4 DIOOE-FW BRDG 100V lA 26480 1906-0051
AICRll 1901-0050 3 DIODE-SWITCHING BOV 200MA 2NS 00-35 28480 1901-0050
AICR12 1901-0050 3 DIODE-SWITCHING 60V 200MA 2NS 00-35 28480 1901-0050
AICR13 1901-0050 3 DIODE-SWITCHING BOV 200NA 2NS 00-35 28480 1901-0050
AICRt4 1901-0050 3 DIODE-SWITCHING 80V 200MA 2NS 00-35 28480 1901-0050
AlCR15 1906-0079 6 DIODE-FW BRDG 100V IDA 18546 VJ148X
AlCRIS 1901-0050 3 DIODE-SWITCHING BOV 200MA 2NS 00-35 28480 1901-0050
AICRt7 1901-0050 3 DIODE-SWITCHING 80V 200MA 2NS 00-35 28480 1901-0050
AICRl8 1906-0239 o DIODE-CT-RECT 45V 30A 01281 SD-241
AICRIS 1906-0263 o RFCT VSK 12 28480 1906-0263
AICR20 1906-0262 9 RECT USE 2402 28480 1906-0262
AIDSI 1990-0652 8 LED-LAMP ARRAY LUM-INT=200UCD IF=5MA-MAX 28480 1990-0652
AlES 2110-0642 3 FUSEHOLDER 28480 2110-0642
AIFI 2110-0056 3 FUSE SA 250V NTD 1.25X.25 UL IEC 75915 312006
AIFL1 9135-0175 6 FIL TER-LINE 28480 9135-0175
AIHI 01830-23201 3 1 COUPLER-SW EX TN 28460 01630-23201
AIH2 0403-0285 9 1 BMPR FT~RDH MTG 28480 0403-0285
AIH3 0515-0372 2 10 SCREW-MACH M3 X 0.5 BNM-LG PAN-HD 00000 ORDER BY DESCRIPTION
AIH4 0515-1025 4 1 SCREW-MACH M3 X 0.5 26MN-LG PAN-HD 00000 ORDER BY DESCRIPTION
AIH5 0515-0374 4 2 SCREW-MACH M3 X 0.5 10NM-LG PAN-HD 00000 ORDER BY DESCRIPTION
AIH7 2420-0001 5 1 NUT-HEX-WjLKWR 6-32-THD .109-IN-THK 00000 ORDER BY DESCRIPTION
RIH8 3050-0003 3 1 WASHER-FL NM NO.6 .141-IN-ID .375-IN-OD 28480 3050-0003
AILl 9140-0624 1 1 INDUCTOR 270UH 10% .725DX.818LG 28480 9140-0624
RIL2 9100-4192 2 1 TRANSFORMER-BALUN 28480 9100-4192
AIMPI 1205-0490 9 4 HEAT SINK 602268 28460 1205-0490
AIMP2 2110-0585 9 1 FUSEHOLDER CAP 12A MAX FOR UL 284S0 2110-0585
AIMP3 1205-0490 9 HEAT SINK 602265 28480 1205-0490
AIMP4 1205-0490 9 HEAT SINK 602268 28480 1205-0490
AIMP5 1600-1330 6 STIFFENER-PCB 28480 1600-1330
AIMP6 1205-0489 6 2 HEAT SINK 602165 26480 1205-0489
AIMP7 1205-0489 6 HEAT SINK 602165 28460 1205-04B9
AIMP8 1205-0490 9 HEAT SINK 602265 28460 1205-0490
AIMP9 1205-0466 3 HEAT SINK 26480 1205-0466
A1Ql 1854-0827 1 2 TRANSISTOR NPN 51 TO-220AB PD=100W 04713 MJE-13009
Ala2 1854-0827 1 TRANSISTOR NPN 51 TO-220AB PD=100W 04713 MJE-13009
AIPt 1251-7986 9 1 CONNECTOR-50 CONTACT (MALE) 28480 1251-7988
AIP2 1251-3675 5 3 CONNECTOR-MALE 28480 1251-3675
AIRI 0757-0394 o 3 RESISTOR 51.1 1% .125W F TC=O+-lOO 24546 C4-1/B-TO-51RI-F
AIR2 0757-0394 o RESISTOR 51.1 1% .125W F TC=O+-100 24546 C4-1/B-TO-51RI-F
AIR3 0698-3615 8 1 RESISTOR 47 5% 2W MO TC=O+-200 27167 FP42-2-TOO-47RO-J
AIR4 0757-0367 7 2 RESISTOR lOOK 1% .5W F TC=O+-lOO 28480 0757-0367
AIRS 0757-0367 7 RESISTOR lOOK 1% .5W F TC=O+-100 28480 0757-0367
AIRS 0757-0059 4 1 RESISTOR 1M 1% .5W F TC=O+-!OO 28480 0757-0059
AIR7 0757-0409 8 2 RESISTOR 274 1% .125W F TC=O+-lOO 24546 C4-1/8-TO-274R-F
AIR8 0757-0415 6 2 RESISTOR 475 1% .125W F TC=O+-lOO 24546 C4-1/8-TO-475R-F
AUIS 0757-0409 8 RESISTOR 274 1% .125W F TC=O+-lOO 24546 C4-1/8-TO-274R-F
AIRI0 0757-0415 6 RESISTOR 475 1% .125W F TC=O+-lOO 24546 C4-1j8-TO-475R-F
AIRll 0757-0280 3 RESISTOR lK 1% .125W F TC=O+-100 24546 C4-1j8-TO-1001-F
fllR12 0757-0280 3 RESISTOR lK 1% .125W F TC=0+-100 24546 C4-1j8-TO-1001-F
fllR13 0757-0280 3 RESISTOR lK 1% .125W F TC=0+-100 24546 C4-1j8-TO-1001-F
fllR14 0757-0442 9 RESISTOR 10K 1% .125W F TC=0+-100 24546 C4-1j8-TO-1002-F
fliR15 0757-0394 a RESISTOR 51.1 1% .125W F TC=O+-100 24546 C4-1j8-TO-51RI-F
AIR16 0757-0462 3 1 RESISTOR 75K 1% .125W F TC=0+-100 24546 C4-1/8-TO-7502-F
AIR17 0757-0437 2 3 RESISTOR 4.75K 1% .125W F TC=0+-100 24548 C4-1/8-TO-4751-F
AIRla 0757-0442 9 RESISTOR 10K 1% .125W F TC=0+-100 24546 C4-1j8-TO-1002-F
AIR19 0698-8959 3 1 RESISTOR 619K 1% .125W F TC=0+-100 28480 0698-8959
AIR20 0757-0437 2 RESISTOR 4.75K 1% .125W F TC=0+-100 24546 C4-1j8-TO-4751-F
AIR21 0757-0281 4 1 RESISTOR 2.74K 1% .125W F TC=0+-100 24546 C4-1j8-TO-2741-F
AIR22 0757-0441 8 1 RESISTOR 8.25K 1% .125W F TC=0+-100 24546 C4-1j8-TO-8251-F
AIR23 0757-0437 2 RESISTOR 4.75K 1% .125w F TC=0+-100 24546 C4-1j8-TO-4751-F
RIR24 0757-0795 5 1 RESISTOR 75 1% .5W F TC=0+-100 19701 MF-lj2-TO-75RO-F
AIR25 06S8-3603 4 3 RESISTOR 12 5% 2W MO TC=0+-200 27167 FP42-2-TOO-12RO-J
See Introduction to this section for ordering information
5-9
Model 54201AID-Replaceable Parts
Reference HP ParI C Mfr Mfr ParI

Designator Qly Descriplion
Number D Code Number
AIR26 0698-3603 4 RESISTOR 12 5% 2W MO TC~0+-200 27167 FP42-2-TOO-12RO-J

RIR27 0696-3603 4 RESISTOR 12 5% 2W MO TC=O+-200 27167 FP42-2-TOO-12RO-J
AIR28 0757-0442 S RESISTOR 10K 1% .125W F TC=0+-100 24546 C4-1/8-TO-1002-F
A1R29 0757-0288 1 1 RESISTOR 9,09K 1% .125W F TC=0+-100 19701 MF4C1/8-TO-9091-F
A1A30 0757-0468 S 2 RESISTOR 130K 1% . 125W F TC=0+-100 24546 C4-1/8-TO-1303-F
A1R31 0757-0450 S 1 RESISTOR 22.1K 1% ,125W F TC=0+-100 24546 C4-1/B-TO-2212-F
AIR32 0757-0440 7 2 RESISTOR 7.5K 1% .12SW F TC~0+-100 24546 C4-1/B-TO-7S01-F
AIR33 0757-0260 3 RESISTOR lK 1% .125W F TC=0+-100 24546 C4-1/8-TO-1001-F
AIR34 2100-3211 7 1 RESISTOR-TRMR lK 10% C TOP-ADJ I-TRN 28480 2100-3211
AIR35 0698-8961 7 1 RESISTOR 909K 1% .125W F TC=0+-100 28480 0698-8981
A1R36 0757-0283 6 1 RESISTOR 2K 1% .125W F TC=O+-100 24548 C4-1/B-TO-Z001-F
AIR37 0698-3160 8 2 RESISTOR 31.6K 1% .125W F TC=0+-100 24546 C4-1/B-TO-3162-F
AIR3B 0757-0442 S RESISTOR 10K 1% .125W F TC=0+-100 24546 C4-1/8-TO-I002-F
AIR39 0757-0459 8 RESISTOR 56.2K 1% .125W F TC=0+-100 24546 C4-1/8- TO-5622-F
A1R40 0757-0468 S RESISTOR 130K 1% . 125W F TC=O+-lOO 24546 C4-1/8-TO-1303-F
AIR41 0757-0440 7 RESISTOR 7.5K 1% ,125W F TC=O+-100 24548 C4-1/B-TO-7501-F
AIR42 0757-0479 2 1 RESISTOR 39ZK 1% .125W F TC=0+-100 19701 MF4Cl/B-TO-3923-F
AIR43 OBl1-1672 5 1 RESISTOR 3.3 5% 2W PW TC=0+-100 04672 BWH2-3R3-J
AIRP1 1810-0488 8 3 NETWORK-RES 8-SIP4.7K OHM X 4 28480 1810-0488
AIRP2 1810-0488 8 NETWORK-RES 8-SIP4.7K OHM X 4 28480 1810-0488
AIRP3 1810-0488 8 NETWORK-RES 8-SIP4.7K OHM X 4 28480 1810-0488
AlAT3 0837-0172 2 THERMISTOR DISC 2.5-0HH 15454 SG-3
AIRVI 0837-0120 o VARISTOR-130VRC 28480 0837-0120
A1RV2 0837-0281 o VARISTOR-220VAC 28480 OB37-0261
AlSWl 3101-2582 6 SWITCH-SLIDE 28480 3101-2582
AlSW2 3101-2150 4 SWITCH-PB DPOT ALTNG SA 250VAC 28480 3101-2150
AISW3 3103-0091 2 SWITCH-THRM FXD +110C SA OPN-ON-RISE 28480 3103-0091
AIT1 9100-4271 8 1 TRANSFORMER-CONT 28480 9100-4271
AIT2 9100-4265 o 2 TRANSFORMER-BASE DRIVE 28480 9100-4265
Al T3 9100-4265 o TRANSFORMER-BASE DRIVE 28480 9100-4265
AI14 9100-4163 7 1 TRANSFORMER 28480 9100-4163
All5 9100-4266 1 1 TRANSFORMER-POWER 28480 9100-4288
AlT6 9100-4267 2 1 CHOKE-COUPLED 28480 9100-4267
Al TPl 1251-3618 8 CONNECTOR 2-PIN H POST TYPE 26480 1251-3618

AlTP2 1251-3900 S CONNECTOR a-PIN F POST TYPE 28480 1251-3900
Al TP3 1251-7826 6 CONNECTOR-MALE 28480 1251-7826
A1Ul 1826-0718 o 1 IC-MC1404 28480 1826-0718

A1U2 1820-2111 S 1 IC DRVR TTL INV 01295 SN75468N
A1U3 1826-0468 7 2 IC COMPARATOR GP B-OIP-P PKG 04713 MC3423Pl
A1U4 1826-0468 7 IC COMPARATOR GP 6-DIP-P PKG 04713 MC3423Pl
AIU5 1826-0565 5 1 IC- Tl4 94 28480 1826-0565
AIU6 1826-0161 7 1 IC OP AMP GP QUAD 14-DIP-P PKG 04713 MLM324P
1826-01·n 9 2 IC 7812 V RGLTR 10-220 04713 MC7812CP

R1VRl 04713 MC7815CP
AIVR2 1826-0106 o 1 IC 7815 V RGLTR TO-220
04713 MC7812CP
AIVR3 1826-0147 9 IC 7812 V RGLTR 10-220
1826-0221 o IC V RGlTR TO-220 04713 MC7912CT
RIVR4
See Introduction to this section for ordering Information
5-10
Model 54201 AID - Replaceable Parts
Table 5-3. LIst of Manufacturer Codes
Mfr No. Manufacturer Name Address Zip Code
C06.33 ArFA BROMMA SE

S0167 FUJITSU LTD TOKYO JP
00000 ANY SATISFACTORY SUPPLIER
01121 ALLEN-BRADLEY CO MILWAUKEE WI 53204
01281 TRW INC SEMICONDUCTOR DIV LAWNDALE CA 90260
01295 TEXAS INSTR INC SEMICOND CMPNT OIV DALLAS TX 75222
02111 SPECTROl ELECTRONICS CORP CITY OF IND CA 91745
02114 FERROXCUBE CORP SAUGERTIES NY 12477
03BBB K 0 I PYROFILH CORP WHIPPANY NJ 07981
04672 TRW INC PHILADELPHIA DIV PHILADELPHIA PA 19108
04713 MOTOROLA SEMICONDUCTOR PRODUCTS PHOENIX AZ 85008
06665 PRECISION MONOLITHICS INC SANTA CLARA CA 95050
07263 FAIRCHILD SEMICONDUCTOR DIV MOUNTAIN VIEW CA 94042
IB546 VARO SEMICONDUCTOR INC GARLAND TX 75040
11236 CTS OF BERNE INC BERNE IN 46711
15454 AMETEK/RODAN OIV ANAHEIM CA 92806
18324 SIGNETICS CORP SUNNYVALE CA 94086
19701 MEPCO/ELECTRA CORP MINERAL WELLS TX 76067
24546 CORNING GLASS WORKS (BRADFORD) BRADFORD PA 16701
25403 N.V. PHILIPS-ELCOMA DEPARTMENT EINDHOVEN HL 02876
27014 NATIONAL SEMICONDUCTOR CORP SANTA CLARA CA 95051
27167 CORNING GLASS WORKS (WILMINGTON) WILMINGTON NC 28401
28480 HEWLETT-PACKARD CO CORPORATE HQ PALO ALTO CA 94304
34335 ADVANCED MICRO DEVICES INC SUNNYVALE CA 94086
34649 INTEL CORP MOUNTAIN VIEW CA 95051
56289 SPRAGUE ELECTRIC CO NORTH ADAMS MA 01247
72136 ELECTRO MOTIVE CORP FLORENCE SC 06226
75915 LITTELFUSE INC DES PLAINES IL B0016
80031 MEPCO/ELECTRA CORP MORRISTOWN NJ 07960
5-11((5-12 blank)
HP 54201A/D - Service
SECTION 6
SERVICE
6-1. INTRODUCTION
The service section provides removal and installation procedures for HP 54201A/D mainframe
components and troubleshooting information for isolating faulty circuit boards.
Service Group 6A at the end of this section provides block and component level theory.
troubleshooting and schematic information necessary to service the HP 54201A/D power supply
board.
6-2. SAFETY CONSIDERATIONS
Read the Safety Summary at the front of this manual before servicing this instrument. Before
performing each procedure. review it for cautions and warnings. For example, when working
around the power supply and display circuitry, caution should be taken to avoid potentially lethal
voltages.
6-3. lOGIC CONVENTION
logic states are defined as follows:
0- False, negated, inactive, or unasserted state.

1 - True, active. or asserted state.
Voltage levels representing logic states:
lOW (l) - The more negative of two voltage levels.

HIGH (H) - The more positive of two voltage levels.
Signals may be either HIGH true, or lOW true, as Indicated by the mnemonics on the schematics.
The HP 54201A/D includes both TTL and ECl ICs. Worst case voltage levels for troubleshooting
and signature analysis purpose are as follows (IC data sheet specifications may be more accurate):
TTL Voltage levels ECl Voltage levels
level Voltage level Voltage
lOW less than 0.8 V lOW less than -1.50 V

HIGH greater than 2.0 V HIGH greater than -1.10 V
6-4. ECl ATTRIBUTES
Because ECl inputs are pulled down inside the IC, an unconnected ECl input is lOW. ECl
outputs may be tied together in the same way as open-collector TTL outputs. Thus. they may be
wire-ANDed or wire-ORed.
6-1
HP 54201 A/D - Service
6-5. REMOVAL AND INSTALLATION OF MAINFRAME COMPONENTS
This section contains removal instructions for the system PC boards and the CRT. Read the
Safety Summary at the front of this manual before servicing this instrument. Refer to figure 6-1 for
location of HP 54201A/D circuit boards.
IWARNING I
Hazardous potentials exist on the power supply, the CRT. and on the display
driver board. To avoid electrical shock the fOllowing procedures should be
closely adhered to. Wait at least three minutes for the capacitors on the
power supply and dlspiay driver boards to discharge before servicing this
instrument. Wear safety glasses!!!
Never install or remove any circuit board with the power switched ON.
Component damage may occur!!!
Note
When a board is installed verify that it is tully' seated into the connector.
n
POWER SUPPLY BOARD ~
II
II
'-- 1 II
STATE TRIGGER BOARD ----.
1 1
II
CPU BOARD - - - - - -...
ANALOG BOARD -----0-
[=============J U
1
DISPLAY DRIVER BOARD
Figure 6-1. HP 54201A/D Circuit Board Location Diagram (Rear View)
6-2
6-6. State Trigger Board Removal (HP 542010 only)
a. Switch power OFF and disconnect AC power cord.
b. Loosen two captive screws securing rear door. Remove rear door.
c. Carefully remove probe cable plugs by pulling on their plastic housing.
d. Remove four screws securing rear cover and remove cover.
e. Carefully remove State Trigger board by inserting board puller from HP 54201 AfD Product
Support Kit into removal holes located at top-center of board.
The State Trigger board can be installed by reversing removal procedure.
6-7. CPU Board Removal
b. Loosen two captive screws securing rear door. Remove rear door.
c. Carefully remove probe cable plugs (HP 54201 D only) by pulling on their plastic housing
e. Remove two screws securing CPU board to rear panel.
I. Remove two plastic standoffs and loosen captive screw securing bottom cover.
g. Carefully tilt instrument on its side and remove bottom cover.
h. Disconnect two cables from the CPU board that go to keyboard and display driver board.
i. Carefully remove CPU board by inserting board puller into appropriate removal holes located at
the rear of board.
The CPU board can be installed by reversing CPU board removal procedure.
6-8. Power Supply Board Removal
I WARNING I
Hazardous voltages are present in the power supply, the CRT, and on the
display driver board, even with the main line power switch set in the OFF
position and power cord removed. Use extreme caution while servicing the
unit with the top cover removed. Wait three minutes for the capacitors on
the power supply and display driver boards to discharge to a safe voltage.
6-3
HP 54201 AID - Service
[~~:~~~]
Be certain that the perforated side cover is installed on the right-hand side
of the instrument (as you face the front of the unit). If the side covers are
mis-installed, insufficient air flow wili resuit and component damage may
occur.
b. Loosen two captive screws securing rear door. Remove door.
c. Carefully remove probe cable plugs (HP 54201 D only) by pulllnq on their plastic housing
e. Remove two screws securing CPU board to rear panel.
f. Remove four plastic standoffs and loosen two captive screws securing top and bottom covers,
and remove covers.
g. Loosen screw securing perforated side panel and remove.
h. Remove two screws attaching handle and side cover to frame. Remove cover.
i. Carefully tilt instrument on its side and remove four screws holding rear panel to bottom of
frame.
j. Disconnect two cables from CPU board that go to keyboard and display driver boards.
k. Lay instrument back on its base. Carefully remove State board (HP54201 AID only) and CPU
board from frame by inserting board puller into appropriate removal holes located at rear of
each board.
I. CAREFULLY remove power switch shalt with a 114 inch wrench.
m. Remove two screws by line plug and two screws securing rear panel to card cage.
n. Remove four screws attaching plastic power supply cover and ground strap to top of frame.
o. Unplug fan from power supply and gently push out on each corner of rear panel from inside of
rear panel. Rear panel and fan assembly should remove as one unit.
p. Remove three screws securing power supply board to card cage bracket.
q. Pull Power Supply board straight back from motherboard connector and remove from frame.
The power supply board can be installed by reversing removal procedure. See figure 6-1 for card
cage slot for each board.
6-4
6-9. Analog Board Removal

b. Remove two bottom plastic standoffs from rear of instrument.
c. Loosen captive screw securing bottom cover and remove cover.
d. Remove two screws securing Analog board to card cage.
e. Remove three nuts and three washers securing BNC connectors to front panel.
f. Carefully pry up hybrid heat sink clip from card cage.
g. Remove 2 screws from front main frame casting which are directly behind input BNC's.
h. Gently pull analog board back while rocking board from side to side, to separate connector
from Motherboard.
i. Pull Analog board back from Motherboard connector, then rotate Analog board slight clockwise
while removing from frame.
j. Slide ground shield out from under BNC shield at front of Analog board.
The Analog board can be installed by reversing removal procedure.
6-10. Motherboard Removal

a. Remove State Trigger board (HP 54201 D only), CPU board, Power Supply board, and Analog
board as detailed previously.
b. Remove six screws that secure motherboard to keyboard cover.
The Motherboard can be installed by reversing removal procedure.
6-11. Keyboard and CRT Removal
IWARNING I
Hazardous voltages are present in the power supply, the CRT, and on the
dispiay driver board, even with the main line power switch set in the OFF
position and power cord removed. Use extreme caution while servicing the
unit with the top cover removed. Wait three minutes for the capacitors on
the power supply and display driver boards to discharge to a safe voltage.
b. Remove four plastic standoffs and loosen two captive screws securing top and bottom covers.
Remove covers.
6-5
HP 54201 AjD - Service
c. Carefully lay unit in top-down position and remove 4 screws from front panel frame.
d. Carefully lay unit in bottom-down position.
e. Carefully pry up and remove top plastic trim strip from front panel frame and remove screws
under trim strip.
f. Slowly peel away two side vinyl adhesive trim strips, being careful not to tear them.
Discharge tile post accelerator lead to the grounding lug ONLY. Component
damage will occur if discharged to other areas.
Nole
The CRT may charge up by itself even while disconnected. Discharge the
CRT by shorting the post ecceterstor terminal of the CRT to the ground lug
with a jumper lead before handling.
g. Short out charge on CRT by connecting a jumper lead between ground lug of CRT and shaft
of a screwdriver. Ground lug is at top left corner of CRT and has biack wire attached to it.
Slip screwdriver under protective rubber cup of post accelerator lead and then momentarily
touch screwdriver to metal clip of post accelerator lead.
h. Disconnect post accelerator lead from CRT by firmiy squeezing on rubber cup until metal clip
disengages from CRT.
i. Disconnect cable at rear of CRT neck connecting cathode of CRT to display driver board.
j. Disconnect two cables connecting four CRT yoke wires to dispiay driver board.
k. Carefully pull and remove black wire connecting CRT ground iug to display driver board.
I. Remove 3 BNC nuts and washers from front panel.
m. Remove keyboard cable from CPU board.
n. Remove four side screws (two screws on each side) that securing front bezei to frame. These
are located under adhesive side trim strips.
o. Carefully pull front bezel (CRT is attached) away from frame being careful not to scratch bezel
or break line switch shaft.
p. Remove four screws and washers connecting keyboard to front bezel.
q. Remove four screws and washers connecting CRT to front bezel.
To install the Keyboard and CRT, reverse removal procedure.
6-6
6-12. Display Driver Board Removal
a. switch power OFF and disconnect AC power cord.
b. Remove two top plastic standoffs from rear of instrument and loosen captive screw securing
top cover to frame. Remove top cover.
c. Remove two screws connecting handle and side panel to frame. Remove side cover.
~
Discharge the post sccetereior lead to the grounding lug ONLY. Component
damage will occur if discharged to other areas.
Nole
The CRT may charge up by itself even while disconnected. Discharge the
CRT by shorting the post accelerator terminal of the CRT to the ground lug
with a jumper lead before handling.
d. Short out charge on CRT by connecting a jumper lead between ground lug of CRT and shaft
of a screwdriver. Ground lug is at top left corner of CRT and has black wire attached to it.
Slip screwdriver under protective rubber cup of post accelerator lead and then momentarily
touch screwdriver to metal clip of post accelerator lead.
e. Disconnect post accelerator lead from CRT by firmly squeezing on rubber cup until metal clip
disengages from CRT.
f. Disconnect cable at rear of CRT neck connecting cathode of CRT to display driver board.
g. Disconnect two cables connecting four CRT yoke wires to display driver board.
h. Carefully pull and remove black wire connecting CRT ground lug to display driver board.
i. Remove six screws mounting display driver board to two corner struts and remove board.
To install the Display Driver board, reverse removal procedure.
6-7
HP 54201 AID. Service
6-13. TROUBLESHOOTING
Troubleshooting faulty circuit boards in the HP 54201A/D is accomplished with covers removed
from the HP 54201A/D. All stimuius necessary to troubleshoot the HP 54201A/D is accessed from
the keyboard of the HP 54201A/D. No external stimulus is required.
Before entering the troubleshooting procedures, perform all adjustments in Section 4 and execute
self-calibration routine 0, 5, and 6 in Section 4.
The HP 54201A/D assembly numbers referenced throughout this section are as follows:
Ai Power Suppiy Board Assembly

A2 Motherboard Assembly
A3 CPU Board Assembly
A4 Analog Board Assembly
A6 Display Driver Board Assembly
A7 Keyboard Assembly
A8 State Trigger Board Assembly (HP 54201D only)
Vi CRT
L1 CRT Yoke
Service Group 6A at the end of this section provides block and component level theory,
troubleshooting and schematic information necessary to service the HP 54201A/D Power Supply
board.
These troubleshooting procedures are performed with covers removed from the instrument. Read ..~;
the Safety Summary at the front of this manual before troubieshooting this instrument.
IWARNING I
Hazardous potentials exist on the power supply, the CRT, and on the display
driver board. To avoid electrical shock the foliowlng procedures should be
ctosetv adhered to. Wait at least three minutes for the capacitors on the
power suppiy and display driver boards to discharge before servicing this
instrument. Wear safety glasses!!!
Never ins/ali or remove any circuit board with the power switched ON.
Component damage may occurttt
Note
When a board Is Installed verify that It is fUliy seated into the connector.
6-8
6-14. Self Test Failures

The following text assumes the self test functional verification routine from Section 3 has failed and
all adjustment and self-calibration routines have been performed. Complete self test
documentation is given in Appendix A at the end of this manual.
Self test 0 failed - The CPU board most likely failed, but proceed with troubleshooting flowchart to
confirm.
Sell test 1 failed Chan1, Chan2, Auto scale. or Interpolator lest - The Analog board most likely
failed, but proceed with troubleshooting flowchart to confirm.
Sell test 1 failed State Pod test (HP 54201D only)· A 1-digit decimal number will be displayed
indicating which HP 10271A Pod has failed. If a pod fails, first check to see if the pod connector is
fully seated into the State board connector and that the pins on the State board connector are not
bent.
FAILED POD
NUMBER
DISPLAYED 2 I 0
1 II
2 II
3 I I
4 III
5 llj I
6 ~l II!
7 ~I Ii 11
Self test 1 failed State Sequence, Qual/Clk, Occurrence, Restart, 01' Bit Fault test (HP 54201 D
only). The state board has most likely failed, proceed with troubleshooting flowchart.
Note
Except for State Occurrence test, all pods must be connected to the HP
542010 for the State and Pod tests to pass.
Self Test 2 lailed· The Analog board has most likely failed, however, the signal used for the test
comes through the rear-panel BNC and originates on the CPU board. Proceed with
troubleshooting flowchart to confirm.
6-9
Graphics Test . This test is accessed from the SYSTEM Test & Service menu. Enter a 3 in the
Execute Service field for Hardware Service, then enter 2 in the Execute Hardware Test field to
execute the graphics test. When the graphics test is executed, the following graphics pattern will
be displayed.
If the graphics are working properlY, you should

observe a changing checkerboard pattern below.
Push RUN/STOP to exit
If this test fails, the failure could be in either the CPU board or in the display system assemblies.
Go on to the troubleshooting flowchart procedures.
6-10
6-15. Board Replacement

After board replacement, there are certain guidlines to follow to assure the new board is properly
calibrated to the system. The 6-1 lists the adjustment step from Section 4 to perform when an
assembly has been repaired for replaced. Table 6-2 lists the adjustment step from Section 4 to
perform if a performance test from Section 3 fails.
After adjustment, always execute front-panel calibration routines 7 and 8 (service defaults),
followed by routines 0, 5, and 6 (in this order).
After self-calibration, execute front panel self tests 0, 1, and 2. Table 6-3 lists which adjustments
from Section 4 can affect the pass/fail status of the self tests.
Table 6-1. Assembly Replacement-to-Adjustment Cross Reference
ASSEMBLY EXCHANGED/REPAIRED
ADJUSTMENT TO PERFORM Al A2 A3 A4 A6 A7 AS VI/
AFTER REPLACEMENT L1
--
4-7. Power Supply :ml&lJ!ffim
4-8a. Yoke L.
4-8b. Display Driver lillml
4-9a. Offset mlm:{~
Wl~~l[l
-
4-9b. Input Camp & Gain
4-10. State Trigger
6-11
Table 6-2. Performance Test Fallure-to-Adjustment Cross Reference
ADJUSTMENT STEP
PERFORMANCE TEST THAT MAY 4-7 4-8a 4-8b 4-9a 4-9b 4-10
BE AFFECTED BY ADJUSTMENT
3·6. DC Offset
3·7. Voltage Measurement -- -

3-8. Bandwidth
3-9. Time Measurement
3-10. Trigger Level-Analog

-
3-11. Trigger Sensitivity
3·12. Setup Time
3·13. Hold Time
3-14. Clock Pulse Width

-..-
3·15. Clock Repetition Rate
..-
-
3·16. Minimum Input
3·17. Threshold Accuracy
Table 6-3. Self-Test/Adjustment Interaction
SELF TEST
ASSEMBLY ADJUSTMENT
0 1 2
Power Supply 4-7 N N N
Display System 4-8 N N N
Analog 4-9a N N N
4-9b N Y Y
State Trigger 4-10 N N N
N = Adj ustment does not affect pass/fail status of self-test
y = Adjustment affects pass/fail status of self-test. If sel f

test fails, this adjustment should be checked.
6-12
6-16. Product Support Kit
Table 6-4 is a list of the components contained in the Product Support Kit, HP Part No.
54200-69501 (used with HP 54200A/D and HP 54201 AID).
Table 6-4. Product Support Kit Parts List
DESCRIPTION HP PART NO
PC BOARD EXTRACTOR 0403-0493
STATE BOARD TEST FIXTURE 54200-63801
SERVICE SLOT SUPPORT BRACKET-LEFT 5001-3575

SERVICE SLOT SUPPORT BRACKET-RIGHT 5001-3576
SERVICE SLOT EXTENDER BOARD 01630-66550
ANALOG BD SUPPORT BRACKET-LEFT 5001-3577

ANALOG BD SUPPORT BRACKET-RIGHT 5001-3578
ANALOG BD SUPPORT BRACKET-FRONT 5001-3579
ANALOG EXTENDER BOARD 5061-6136
SERVICE SOFTWARE * 54200-12001 *

ANALOG BRACKET INSTRUCTIONS * 5958-3781 *
SERVICE BRACKET INSTRUCTIONS * 5958-3782 *
* Used for HP 54200A/D only
6-17. ANALOG BOARD EXTENDER. The analog board is extended into the service position by
using the following steps:
1. Set HP 54201 AID power OFF and remove Analog board.
2. Install Analog Extender Board and Analog board support brackets into HP 54201 AID as shown
in figure 6-2.
3. Install Analog board into extender board.
6·18. SERVICE SLOT EXTENDER. The Service Slot Extender allows signals from the motherboard
to be monitored, and allows the CPU board and State board (HP 54201AfD only) to be extended
from the instrument for servicing. Install the extender by using the following steps:
1. Set HP 54201AfD power OFF.
2. Loosen captive screw securing top cover to instrument and remove cover.
3. Insert Service Slot Extender board into connector on motherboard as shown in figure 6-3.
4. Carefully pry up and remove top plastic trim strip from front panel frame.
5. Install left and right service slot support brackets into instrument as shown in figure 6-3.
6. Remove desired board from mainframe and slide into position on service slot extender board.
6-13
LEFT SUPPORT
BRACKET
~
~
~
/
~
<'I
RIGHT SUPPORT
FRONT BRACKET
SUPPORT
BRACKET
Figure 6-2. Analog Board Extender Assembly
6-14
, SERVICE SLOT
EXTENDER
LEFT SUPPQRT
BRACKET
RIGHT SUPPORT
BRACKET
Figure 6-3. Service Slot Extender Assembly
6-15
HP 54201A/D • Service
6-19. Key-Down Power-Up Reset

Holding any key down during power-up will clear out the display RAM and preset the HP 54201A/D
to a predetermined condition. Key-down power-up reset is a very important feature to use to ciear
the instrument if tile instrument experiences a lockup state and wiil not respond to any key press,
or when the display is garbled or nothing is displayed. Hold the key down long enough for the
power-up tune to be completed. These preset conditions are:
CONDITION SETTING
T1MEBASE:
Sweep mode Auto
Time range 10 f.lS
Reference Center
Delay 0.0 s
Autoscale Period
Acquire mode Real time
CHANNELS:
Mode Dual Channel
Range 5.0 V
Offset 0.0 V
Store mode Normal
Labels (blank)
Coupling 1 MQ dc
Probe attenuation 1:1
Autoscale Enabled
TRIGGER:
Mode Analog
Source Channel 1
Level 0.0 V Centered
Slope Positive
Label (blank)
Autoscale Enabled
On Event 00001
DISPLAY:
Graticule Frame
# of graphs 2
Graph sources
1 Channel 1
2 Channel 2
Connect dots Off
Reference lines Off
Accumulate mode Disabled
Data filter On
MEASUREMENTS: Standard
OTHER:
Running True
HP-IB address/mode Not changed
Hardcopy device Printer
Rear BNC Constant low
Beeper On
Setup labels (blank)
Stored setups unprotected
Stored waveforms Cleared
6-16
STATE SETTINGS:
_____________ Statu6: No Trigger Found .

TALK orn, 'y'
Def 1 nc [Ass 1 nment I Tr- t qqe r Mode [ Ana loOn I
Clock
HL
State l'toce [Normal ] ---------- DDIIU ----------
..
Pod 2 Pod 1 Pod iJ
Plu i t.Lp l ex l n q [ Off ] I •• I II I I II I
8. , ..... iJ t3 0 8 ....... U
Label Poi
IDI "*"""'3 ;"'ifl"" 'i"""'"
Figure 6-4. Trigger State Assignment Menu after Key-Down power-Up Reset
r- Lq qer- I.p' _____________Statu8: No Trigger Found _

TALK OliL 'y'
Define [ 5e uence ] TI~ i gget~ 110de [ Ana I I] On 1
In Sequence,
find DB
Occurrences of ~ Tr i qq e r Tori
[an state]
then Do No t h ing
Label> A
Base > 1.;I:tIM'
a
b
c
d
Figure 6-5. Trigger State Sequence Menu after Key-Down Power-Up Reset
6-17
6-20. Troubleshooting Flowchart
The flowchart given in figure 6-6 will aid in troubleshooting malfunctioning assemblies in the HP
54201 A/D. Figure 6-6 is supported by several procedures, figures, and tables following the
flowchart, which are not meant to be stand alone aids. Bubbles on the flowchart direct you to the
next flowchart entry point and the sheet of figure 6-6 where the entry point is located.
PERFORM
KEY-DONN
POWER-UP
NO SHEET 2
YES
NO
2 SHEET 3
NO
PERFORM
INTERFACE
STIMULUS TEST
6-22
NO
BM28,12
Figure 6-6. HP 54201A/D Troubleshooting Flowchart (Sheet 1 of 5)
6-18
SHEET
REMOVE ANALOG.
CPU, STATE
BOARDS
NO REMOVE MOTHERBOARD. NO REPAIR

REINSTALL 1---__< PCMlER SUPPLY,
PcmER SUPPLY SECTION 6A
REINSTALL REPLACE
ANALOG MOTHERBOARD
BOARD
NO REPLACE
ANALOG BOARD
REINSTALL CPU BOARD.

RECONNECT DISPLAY
CABLE W2 TO CPU
AND DISPLAY DRIVER.
RECONNECT KEYBOARD
CABLE W3 TO CPU.
NO DISCONNECT NO REPLACE
DISPLAY CPU BOARD
CABLE W2
HP 54201A
r-------
1
REINSTALL REPLACE
STATE BOARD DISPLAY DRIVER
(HP 542010 ONLY) BOARD
NO REPLACE
STATE BOARD
YES
B5428"8
Figure 6-6. HP 54201 AID Troubleshooting Flowchart (Sheet 2 of 5)
6-19
REMOVE RIBBON CABLE W2

FROM CPU BOARD AND
DISPLAY DRIVER BOARD.
CHECK CABLE CONTINUITY
(FIGURE 6-9)
NO
REPLACE W2
RECONNECT W2 TO
CPU BOARD ONLY.
CHECK VOLTAGES
AND SIGNALS GIVEN
IN FIGURE 6-9
NO
REPLACE cPU BOARD
RECONNECT W2 TO
DISPLAY DRIVER BOARD.
CHECK DISPLAY DRIVER
SIGNALS GIVEN IN
TABLE 6-7
NO REPLACE
DISPLAY DRIVER BOARD
REPLACE CRT OR YOKE
BH211H
Figure 6-6. HP 54201AjD Troubieshooting Flowchart (Sheet 3 of 5)
6-20
HP 54201AfD - Service
SHEET
PERFORM KEYBOARD
TEST 6-24
RANDOM KEYS NOT WORKING

REPLACE KEYBOARD
REMOVE KEYBOARD
CABLE W3 FROM
CPU BOARD. CHECK
FOR ROW SIGNALS
IN TABLE 6-9
NO YES
REPLACE CPU BOARD
RECONNECT wa TO
CPU BOARD.
CHECK FOR COLUMN
SIGNALS IN TABLE 6-9
AS A KEY CONNECTED
TO THE COLUMN BEING
PROBED IS PRESSED.
REPLACE KEYBOARD
6-21
SHEET
REMOVE STATE
(HP 542010 ONLY)
AND ANALOG BOARDS.
PERFORM INTERFACE
STIMULUS TEST
6-22
NO REPLACE
CPU BOARD
REINSTALL
ANALOG BOARD.
PERFORM INTERFACE
STIMULUS TEST
6-22
NO REPLACE
ANALOG BOARD
HP 54201A
r------------
1
1
1
REINSTALL
STATE BOARD.
(HP 542010 ONLY)
PERFORM INTERFACE
STIMULUS TEST
6-22
NO REPLACE
STATE BOARD
1
1
1 YES
L------------i.O":::~----- ____l
BM21'1e
6-22
6-21. Power Supply Voltage Check
1. Disconnect power cord.

2. Remove two plastic standoffs from top rear of instrument.
3. Loosen captive screw securing top cover and remove top cover.
4. Apply power to HP 54201 A/D.
5. Check dc voltages shown below on power supply test connector A1TP2 (figure 6-7).
SUPPLY VOLTAGE LIMITS
+15 V +14.25 to +15.75 V

+12 V +11.4 to +12.6 V
+5 V +4.75 to +5.25 V
-2.4 V -2.16 to -2.64 V
-5.2 V -5.2 to -5.7 V
-12 V -11. 4 to -12.6 V
6. Adjust VOLT ADJ (A1R34), if required, to bring supplies into limit range.
VOLT
ADJ
A1TP2
Figure 6-7. Power Supply Test Points.
6-23
6-22. Interface Stimulus Test
This test puts the HP 54201AID in a lest loop and allows you to take signatures to detect possible
board failures. The display and keyboard must be functional to perform this test. The test requires
the HP 5000B Signature Analyzer and the Service Slot Extender board from the HP 54201 AID
Product Support Kit.
1. Remove two plastic standoffs from top rear of instrument.
2. Loosen captive screw securing top cover and remove top cover.
3. Loosen two captive screws securing rear door and remove door.
4. Carefully remove probe cable plugs (HP54201 D only) by pulling on their plastic housing.
5. Remove four screws securing rear cover and remove cover.
6. Install service slot extender board into service slot on motherboard as shown in figure 6-8.
7. Set up the HP 5005B Signature Analyzer as shown in table 6-5.
8. Power up HP 54201AID with key-down power-up.
9. Go to SYSTEM menu and select Test & Service submenu. Move blinking cursor to the Execute
Service field and enter 3 for Hardware Service.
10. Enter 4 in the Execute Hardware Test field to start Interface Stimulus test.
The HP 54201 AID is now in a test loop, and will stay in this loop until the INSERT key is pressed.
Verify each signature in table 6-6 by probing the corresponding Service Extender ~oard pin
number with the Signature Analyzer probe. If any of the signatures are wrong, the test falls. When
completed with the test, press the INSERT key to terminate the test.
EXTENDER
BOARD
Figure 6-8. Service Slot Extender Board
6-24
Table 6-5. HP 50058 Signature Analyzer Setup
TIMING POD
FUNCTION THRESHOLD POLARITY
FROM TO
SIGNATURE QUAL DATA ECL CLK J STOP/QUAL (red) +5V
CLOCK TTL START J START/ST/SP (grn) SIS

ST/SP/QUAL TTL STOP J LTB (yel) CLOCK
QUAL HI GNO (bl k) GNO
TO connections are on connector J2 on CPU board between HP-IB connector and CAL switch
Table 6-6. Interface Stimulus Signatures
SIGNAL SERVICE SIGNATURE

NAME CONNECTOR
PIN NUMBER
GNO 40 57P8
-5.2 61 0000
A5 27 2CU4
A4 28 34A5
A3 31 6PF3
A2 32 COP3
Al 33 8AH3
AD 34 F04C
07 37 C5UU
06 38 UU5F
05 41 PFAC
04 42 6P52
03 43 97C6
02 44 CCAF
01 45 3510
DO 46 464A
6-25
6-23. Display Driver Signals.
Figure 6-9 and table 6-7 are used in conjunction with flowchart figure 6-6. To check signals in
figure 6-9, the top cover must be removed. To check neck pin signals in table 6-7, remove the ieft
side cover and check signals from rear of display driver board.
Red stripe
~
2 1 HVSYNC
4 3 HHSYNC
6 S HFB
GND 8 7 HHB
W2
~
10 9 +SV
12 11 +12V
14 13 +lSV
16 IS +ISV
HVSYNC - 31.25 kHz TTL (32 ~s period), 5 ~s positive pulse

HHSYNC 52.61 Hz TTL (19 ms period), 512 ~s positive pulse
+5V - +4.75 to +5.25 VDC
+12V - +11.4 to +12.6 VDC
+ISV - +14.25 to +15.75 VDC
HFB HHB Video Output

I
\~I
0 0 Off HFB and HHB are dynamic
0 1 Half-bright video signals. Check for
1 0 FUll-bright activity on these lines.
1 1 FUll-bri ght
Figure 6-9. Display Driver Board-fo-CPU Board Ribbon Cable (W2)
Table 6-7. Display Driver Board to CRT Signals
WIRE SIGNAL
Blue o to 400 Vdc
Red 500 to 800 Vdc (700 Vdc typical)
CRT
Neck
Pins
1 Black
Brown
o Vdc
12 Vdc (13.2 Vdc typical)
Yellow 48 to 82 Vdc
Green o Vdc
Blue
Red Dynamic video signals. Check
Yoke { Yellow
Green
} for activity on these lines.
Post Accelerator (large red wire to CRT body) is 8 kVdc

to 12 kVdc (10 kVdc typical)
6-26
6-24. Keyboard Test
This test verifies the functionality of the keyboard. The text follows along with flowchart figure 6-6.
1. Power up the HP 54201 AID with key-down power-up.
2. Go to SYSTEM menu and select Test & Service submenu. Move blinking cursor to the Execute
Service field and enter 3 for Hardware Service.
3. Enter 3 in the Execute Hardware Test field to start keyboard test.
4. The HP 54201A/D should now display all the front-panel keys as shown in figure 6-10. Press
each key on the keyboard. The keys that are working properly will disappear from the screen
when pressed.
PUSH MY KEYS, AND I'LL BEEP WHEN YOU'RE DONE
[2]~~EJ
8~~B
~[][2]B
~DEJB
Figure 6-10. Hardware Service Keyboard Test Display
If a key or keys are not working, check if an entire row or column of keys is not working. Row
and column assignments are shown in table 6-8. If a row or column is bad, remove the CPU
board trom the mainframe and install in the service slot (figure 6-11). Then continue with flowchart
figure 6-6 procedure.
6·27
Table 6-8. «evtoera Row/Column Assignments

COLUMN
ROW 0 1 2 3 4 5 6 7
(KBCO) (KBCl) (KBC2) (KBC3) (KBC4) (KBC5) (KBC6) (KBC7)
1 CURSOR
t SYSTEM STATUS DISPLAY TRIG CHAN TIME -
(KBRI)
2 CURSOR
(KBR2) -- COpy ERASE SAVE RECALL - - -
sec RUN
3
(KBR3) --
CURSOR CURSOR
~ 7 8 9 Volt STOP -
4 msec AUTO
PREV - 4 5 6 mV SCALE -
(KBR4 )
5
ECL NEXT I 2 3 Il sec TTL -
(KBR5)
6 CLEAR
- INSERT ENTRY 0 • CHS nsec (Bl ue)
(KBR6 )
6-28
A3U92
A3U93
Figure 6-11. CPU Board Extended in Service Slot
6-29
Table 6-9. Keyboard Signals
SIGNAL SIGNAL LOCATION

KBRI A3U93-14 A3J7-7
KBR2 A3U93-13 A3J7-3
KBR3 A3U93-12 A3J7-1
Row KBR4 A3U93-11 A3J7-9
Signals
KBR5 A3U93-10 A3J7 -11
KBR6 A3U93-9 A3J7-13
KBCO A3U92-38 A3J7-5
KBCl A3U92-39 A3J7-4
KBC2 A3U92-1 A3J7-2
KBC3 A3U92-2 A3J7-6
Column
Signals KBC4 A3U92-5 A3J7-8
KBC5 A3U92-6 A3J7-14
KBC6 A3U92-7 A3J7-12
KBC7 A3U92-8 A3J7-10
A3U92, U93, and J7 are shown in figure 6-11. Pin 1 is at lower right of all IC's when oriented as
shown. Pin 1 of J7 is by triange on connector body. Even pins of J7 are nearest the circuit board
and odd pins are away from circuit board.
A signal of 195.3 Hz TTL (5.12 ms period), 640 J.lS negative pulse width should be on all KBR
(keyboard row) lines at all times. This signal is present on KBC (keyboard column) lines only when
key attached to specific KBC line pressed. See table 6-8 for key row and column assignments and
figure 6-13 for keyboard schematic diagram.
6-30
HP 54201 AID - Power Supply Service
SERVICE GROUP 6A
POWER SUPPLY
6A-1. INTRODUCTION
This Service Group contains block and component level theory, troubleshooting and schematic
information necessary to service the HP 54201AID power supply. Service group 12A is separated
into two sections: theory and troubleshooting.
6A-2. SAFETY CONSIDERATIONS
I WARNING I
Hazardous potentials exist on the power supply, the CRT, and on the display
driver board. To avoid electrical shock the fOllowing procedures should be
closely adhered to. Wait at least three minutes for the capacitors on the
power supply and display driver boards to discharge before servicing this
instrument. Wear safety glasses!l!
Several parts of the powe: supply have lethal vOltage and current potentials
associated with them. Primary filter capacitors CI0 and Cll are very large
and have 300 volts across them, + or - 150 Vdc to ground. This provides a
great deal of potential energy. With their respective bleeders R4 and R5,
the discharge time constant is 60 seconds so even with the supply turned
OFF it can be dangerous! Therefore, wait at least three minutes for the
supply to discharge before servicing.
6A-1
HP 54201AjD - Power Supply Service
6A-3. SPECIFICATIONS
!he power supply used in the HP 54201A/D is a switching power supply that converts the AC line
Input to SIX regulated DC voltages. Table 6A-1 contains individual specifications for each voltage.
Table 6A-l. Power Supply Specifications
INPUT
115 volt range: 90 to 127 VAC Input lmax = 4 Amps

230 volt range: 180 to 253 VAC Input Imax = 2 Amps
Frequency Range: 48 to 66 Hz in either voltage range.
OUTPUT
Volts % Tolerance Maximum Current (Amps)
+15 5 0.8
+12 5 0.25
+5 5 6.0
-2.4 10 8.0
-5.2 -5, +10 25.0
-12 5 0.25
6A-4. POWER SUPPLY BLOCK DIAGRAM (figure 6A-1)
The HP 54201A/D power supply is separated into three basic sections; Primary, Control and
Secondary. The following is a brief outline of each section.
PRIMARY SECTION. The primary section is responsible for providing a rectified and conditioned
switching source of approximately plus and minus 150 VDC, along with transformation for control
power. The primary section also provides protection to the supply from AC input surge current
and overvoltage conditions.
CONTROL SECTION. Control voltage generation, modulation and switching are the main functions
of the control section. However, LED failure indication and failure execution is aiso a function of
this section.
SECONDARY SECTION. The secondary section is responsible for filtering, rectification and
feedback for the DC power supplies. Also, this section outputs all of the supplies to the test
connector and the motherboard.
6A-2
HP 54201AID - Power Supply Service
GA-5. POWER SUPPLY THEORY OF OPERATION
The theory of operation gives detailed operation of the circuitry on the power supply board. Refer
to power supply Schematic 6A-1.
GA-G. Primary Section

The power supply begins operation when the power switch (SW2) is turned ON providing AG line
to FL1 which filters the AG for radio frequency interference (RFI). According to the setting of the
line select switch (SW1), the primary section will operate in two modes, either 115 VAG or 2S0
VAG.
6A-7. 115 VAC OPERATION. Notice the way that the neutral line is wired to the primary output of
the bridge rectifier (GR4), only two of the diodes of GR4 are used. These are the two that connect
to the AG line input of GR4. This configuration produces ",SOOV across the + and - outputs of
GR4. During the 115 VAG mode this circuitry forms a half wave voitage doubler. Furthermore,
while in the 115 VAG mode the primaries of T1 are in parallel so there is 115 VAG across each
primary. The outputs of T1 are in parallel and have the same voltage across them during either the
115 or 2S0 VAG modes.
6A-8. 230 VAC OPERATION. When SW1 is in the 230 VAG mode, all four diodes in the bridge
rectifier (GR4) are used. However, the VOltage across the + and - outputs of GR4 is still ",SOOV.
During the 230 VAG mode this Circuitry forms a full wave rectifier. While in the 230 VAG mode the
primary inputs of T1 will be in series and still have 230 VAG across each primary Winding.
The varistors RV1 and RV2 on the primary side of T1 are for transient suppression. The thermistor,
RTS, provides surge current protection for GR4. .
6A·9. SURGE CURRENT PROTECTION. Because input filter capacitors G10 and G11 are
connected directly across the rectified line, a form of surge current protection is provided to limit
line surges during turn on. RTS provides this protection.
6A·10. RFI SUPPRESSION. RFI is generated by unwanted frequency energy caused by the
switching components in the power supply. Inductors L2 (balun) and L1 prevent this radio
frequency interference from being conducted back into the AG line.
6A-5
, HP 54201AjD - Power Supply Service
6A-11. Control Section

The control section mainly consists of t~e circuitry needed to control the operation of the pulse
width modulator (PWM). Also covered IS the error detection and execution circuitry needed to
control modulation.
6A·12. PWM ~VERVIEW (figure 6A-2). A pulse width modulator (PWM) requires four signals for
proper modulation: a reference voltage, a feedback from the output to compare with the reference
voltage for error detection, feedback current from the output for output current limiting and a
predetermined switching frequency, '
'" ~I '"
~
COMPENSATION OUTPUT CONTROL

16
CURRENT r-, ~,
vI
i
Vee
8
15 LIMIT
V O-FF 9
1
ERROR +
-, .. PWM
~OMPARATOR
-I>
11
2 AMP
V - J-..r 10
V
F-
5
I I
~
6 osc
I I REFERENCE
4 ,I [)REGULATOR GNO
b::::':.OEAO TIME
'I 5VREF
CONTROL COMPARATOR
t-,
:t
Figure 6A-2. Functional Block Diagram of a PWM
A PWM modulates it's output transistors pulse width (ON time) according to the demands of the
system. In this manner it controls the amount of current each switching transistor delivers and
therefore controls the power. The PWM configuration used by this supply is for push-pull
modulation. Push-pull modulation means that each internal open collector output transistor is
turned ON alternately by the pulse-steering flip-flop. This configuration is determined by the output
control input (OC) pin 13 being tied to the PWM's internal 5V reference regulator, pin 14.
6A-13. MODULATION CONTROL. If the +5V feedback voltage at pin 1, US, is higher than the
reference voltage at pin 2, the PWM determines that the output voltage is too high. It then reduces
its output transistors pulse widths to within limits.
6A·14. PWM SOFT START. When AC is switched ON, capacitor C21 has not charged. This forces
the dead-time control Input, pin 4 of US, to follow the 5V reference regulator output, pin 14. Note,
when dead-time is high, both outputs are disabled (100% dead-time). While C21 is charging
through RP2 (pins q and 6), the output pulse widths are allowed to modulate slowly until dead-time
is low and 100% modulation is allowed. Soft start is used to prevent large current surges which
may occur on power up. Also, a soft start prevents a false signal, possibly created by the control
circuitry, from resetting the PWM during power up. .--./
6A-6
HP S4201 A/D - Power Supply Service
6A·1S. PWM SWITCHING FREQUENCY. The 42 KHz internal oscillation frequency of the PWM is
determined by the RC time constant of R21 and C22 connected to pins 6 and S of US. Therefore,
each open collector output transistor (pins 8 and 11) is turning ON and OFF alternately at about 21
KHz.
6A-16. CURRENT SWITCHING OPERATION (schematic 6A-1). The open collector outputs, pins 11
and 8 of US, are complementary and non-overlapping. For zero on-time (zero modulation time),
both outputs are high. As demand increases, each output stays low (at different times,
non-overlapping) for a longer period until one is going high as the other is going low or until one of
the feedback signals limits the pulse duration. Each output is inverted through U2F,G, another
open collector device, and alternately causes changing current through the primaries of T2 and T3.
These transformers alternately turn 01 and 02 ON and OFF which causes the current in the
primary of TS to alternate.
The signals CC1 and CC2 (from U2B,C) prevent or delay the SWitching of 01 and 02. For
example, suppose the following condition exists. The power supply is experiencing a heavy
demand and must allow close to 100% modulatlon to meet it. 01 has turned ON per the request
of the PWM and has pulled the one node of TS to the + primary voltage. Then the PWM tells 01 to
turn OFF and 02 to turn ON. 02 can turn ON immediately, but 01 cannot turn OFF that quickly
because of charge storage. The CC2 signal is a feedback signal from the secondary of TS senses
this condition and and will not allow 02 to turn ON until 01 turns OFF and the voltage on the
secondary of TS stabilizes. To allow 02 to turn ON sooner would have the effect of shorting the +
primary voltage to the - primary voltage for a short period of time (an enormous waste of power
not to mention damage to components).
6A-17. Control Power Supply
As soon as AC is switched ON, CR1 rectifies AC and starts charging C3, a ripple filter for the 12
volt regulator VR1. The output of VR1 lags the input by about 1 V on power up until it stabilizes at
+12 V. VR1 is the power supply for +12C (a control power supply used only on the power supply
board). +12C supplies U 1 which is the +S reference source (+SREF).
6A-18. PWM Failure Modes
6A·19. PWM FAILURE EXECUTION. There are seven failure execution circuits in the HP S4201A/D
power supply. One of these failures, -S.2 current limit, affects the current limit input, US pins 1S
and 16, of the PWM. Four of the failures affect the Compensation/PWM Comparator input (COMP)
pin 3, US. The COMP input must be allowed to float during normal operation. If an error occurs
with the +S or -2.4 current limit, primary current limit, or thermal shutdown pin 3 will be pulled high
and the PWMs' output transistors will be shut OFF. Two of the failures, +S and -S.2 overvoltage
act directly on the drive lines to the Primary Base Drive Transformers.
Several of these failures have LED indicators which indicate the nature of the failure.
6A-7
HP 54201 AID· Power Supply Service
6A-20. PWM CURRENT LIMITING. This power supply uses fold-back current limiting (figure 6A.3).
The actual current limit value is determined by sensing the DC voltage developed across the
internal resistance of T6 pins 2.11 and 3,10 (T6 contains six internal inductors). Current limiting of
the ·5.2V supply works by developing a voltage across C20 that is equivalent to the maximum load
current times the internal resistance of T6 pins 2,11 and 3,10. The voltage across C20 is then
compared to the reference voltage at pin 15 of US. The fold back of the maximum current limit
value is determined by the decrease in the voitage across R17. When the voltage across R17
decreases, the voltage required across C20 also decreases. The decrease across C20 causes the
PWMs internal comparator to go more positive and reduce modulation until the ·5.2 output voltage
across R16 increases, allowing C20 to charge to the value of the reference voltage.
VOLTAGE OUT
VMAX+-----------.,
-+--......,"---------;---i CURRENT OUT
Figure 6A·3. Foldback Current Limiting
6A-21. +5 CURRENT LIMIT. This circuit also operates similarly to the PWM except: the DC
component is taken from T6 pins 1 and 12; C43 sets the current limit value; R36 sets the fold back
limit; and Pia RP3 pins 4 and 3 adjust the foldback limit. When current limit occurs, pin 14 of
U6D goes high and biases CR17. which makes pin 3 of US more positive and reduces modulation.
6A-22. -2.4 CURRENT LIMIT. This circuit operates similarly to the PWM except: the DC
component is taken from T6 pins 4 and 9; C45 sets the current limit value; Pia RP3 pins 5 and 6
set the fold back limit; and R40 adjusts the toldback limit. When a current limit occurs, pin 8 of
U6C goes high and biases CR16, which makes pin 3 of US more positive and reduces modulation.
6A-23. U3 AND U4 OPERATION. U3 and U4 are overvoltage sensors. U3 and U4 will turn ON
LEDs if an error condition is detected, and both will generate SHUTDOWN. U3 and U4 work in the
following manner. When the voltage at pin 2 exceeds the voltage at pin 7 by 2.6 volts, the output
pin 8 latches high to turn ON the failure LED and generate SHUTDOWN. The capacitor on pin 3
and pin 4 of U3 and U4 determine the minimum amount of time that an error must exist before
they turn ON, thus providing transient protection.
6A-8
HP 54201A/D - Power Supply Service
6A-24. PRIMARY CURRENT LIMIT. U4 detects an error via T4. The primary side of T4 is in the
return loop of the minus primary voltage for the switching transistors. The change of current
through the primary of T4 establishes a voltage drop in the secondary, rectified by CR10, divided
by R14 and R15, and detected at pin 2 of U4. If the voltage at pin 2 of U4 is greater than 2.6 volts,
(a slight delay is provided by C19), U4 latches and turns ON the primary current limit LED "PL" and
sets SHUTDOWN high which turns OFF U5.
6A-25. THERMAL SHUTDOWN. The circuitry for U3 detects an over temperature condition and
generates SHUTDOWN. A normally closed thermal switch (SW3) is mounted on heatsink MP9.
When the heatsink exceeds 105 C, the thermal switch opens and U3 detects an error. When pin 8
latches high, the thermal shutdown LED "TH" is turned ON. Then SHUTDOWN is generated and
U5 is turned OFF.
6A-26. +5 OVERVOLTAGE. An overvoltage failure occurs when the +5 volt supply exceeds 6 volts
making the voltage at pin 3 of U6A greater then the 5V reference on pin 2. This in turn makes pin
1 of U6A go high forcing two operations to occur. The first operation biases CR13 which keeps
pin 3 of U6A high regardless of the overvolt condition. The second operation biases CR11, thus
making the outputs of U2A, U2D and U2E low. With U2E low, the "OV" (overvoltage) LED (P/O
DS1) goes ON indicating an overvoltage failure. Furthermore, with U2A and U2D low, U2F and
U2G are be unable to deliver a switching frequency to the base drive transformers. This turns OFF
the supplies. Note, that if an overvoltage failure occurs, the power must be cycled OFF/ON in
order to reset the overvoltage circuitry.
6A-27. -5.2 OVERVOLTAGE. Except for polarity considerations, the -5.2 overvoltage circuitry
operates the same as the +5 overvoltage circuit. This circuit turns OFF at -6.2 volts.
6A-9
6A-28. Secondary Section
6A-29. +5, ·5.2, AND -2.4 SECONDARIES. Three of the four switchinq supply secondaries operate
relatively the same. The +5 supply will be used as an example of their operation.
The alternating voltage in the center tapped secondary of T5 is full wave rectified by two Schottky
diodes (CR20) mounted on a heatsink (MP9). The R27/C28 combination is a snubber network that
limits the dv/dt to protect the diodes. CC1 and CC2 (cross conduction 1 and 2) prevent both
SWitching transistors from being ON at the same lime and shorting the + and - primary voltages
together. Pia T6 and C49 are the filter for the supply. The LED "NORM" being ON indicates that
the supply is operating properly.
Except for polarity and the lack of an LED indicator, the -2.4 and -5.2 supplies are the same as the
+5 supply.
6A·30. +15, +12, AND -12 SECONDARIES. The alternating voltage of T5 is full wave rectified by
CR15. R24 and C23 form a snubber network to protect CR15. Pia T6, C25 and C26 filter the
outputs of CR15 before they are regulated by VR2, VR3 and VR4. The outputs of the regulators
are filtered by C29-31 before the +15, +12 and -12 voltages are supplied to the motherboard.
6A-31. LED FAILURE INDICATIONS

Figure 6A-4 is a flow chart that guides the user to the faulty circuit(s) indicated by a power supply
failure LED. ,~
6A-10
HP 54201AfD - Power Supply Service
6A-32. MNEMONICS
Signals on the HP 54201 AID power supply board have been assigned mnemonics that describe the
function of the signal. A prefix letter (H, or L) is used to indicate the active state of the signal and
the remaining letters indicate its function. An "H" prefix indicates that the function is active in the
"high" state; an "L" prefix indicates that the function is active in the "low" state. The following table
is a listing of the mnemonics used on the schematic.
Table 6A-2. Mnemonics
Mnemonic Description
+12VC +12 V Control. This is the control voltage used throughout the supply. If
+12C is not in regulation, the supply will not operate properiy.
CC1,2 Cross Conduction 1 and 2. Complementary signals used to prevent both

switching transistors from being ON at the same time.
NORM Normal. When this LED is ON, the power supply is working correctly.
OV Over Voltage. When this LED is ON, either the +5 or -5.2 volt supply has
exceeded its voltage limits. When asserted, the PWM U5 will be shut OFF.
PL Primary Limit. When this LED is ON, a non-linear surge in current has
occurred in the primary section. When asserted, the PWM US will be shut
OFF.
PWM+5VREF Pulse Width Modulator +5V Reference. A +5 volt reference from U5 internal
reference regulator.
+5VRET Return +5V. The voltage on this line is the DC component of the +5 volt
supply. It is used to set the current foldback limit of the +5 current limit
circuit.
-2.4VRET Return -2.4V. The voltage on this line is the DC component of the -2.4 volt
supply. It is used to set the current fold back limit of the -2.4 current limit
circuit.
-5.2VRET Return -5.2V. The voltage on this line is the DC component of the -5.2 volt
supply. It is used by the PWM U5 to set the foldback current limit of the -5.2
volt supply.
SHUTDOWN This signai is generated in several places and is responsible for turning OFF
the PWM U5 by pUlling pin 3 high.
TH Thermal. Thermal switch SW3 opens when the internal temperature of the
supply is greater than 105 degrees C. When the TH LED is ON, PWM US is
turned OFF.
6A-13
HP 54201A/D - Power Supply Service
n I ". -=--
",
,c,
D~ D
~
c LUll:; FILTIUI J
riri"'(
~ ~ Me>
o
Q
fill
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C5420101
Figure 6A-5. Power Supply Board Component Locator
6A-14
HP 54201A/D - Self Test
APPENDIX A
SELF TEST DOCUMENTATION
A-1. INTRODUCTION
This section provides a brief explanation of how the HP 54201A/D Self Tests work and the portions
of circuitry they check. The tests are accessed by selecting the HP 54201A/D front panel SYSTEM
Self Tests menu or by executing the System TEST command over HP-IB. The Self Tests, resident
in ROM, are a series of tests that confirm proper function of the mainframe hardware and
firmware. While the Self Tests provide the user with a confidence level of greater than 90%, 'it does
not verify the critical specifications given in table 1-1 of Section 1. Perform The Performance Tests
test for complete instrument compliance to these critical specifications.
A-2. SELF TEST 0 • CPU/MEMORY
The CPU/Memory Self Test consists of three tests for the CPU board:
• Control Test
• ROM Test
• RAM Test
Control Test. The Control Test consists of a timing test and an HP-IB test.
Timing Test: The CPU board has a circuit with five counters that are preset to a value and then
are started counting simultaneousiy. After a loop count is decremented to zero, the five counters
are stopped, and the value of each counter is checked against a final value. If any of the counters
do not equal this final value, the error message FAILED Control test-U61 is displayed.
HP-IB Test: The HP-IB test is only performed if Self Test 0 was requested from the front panel of
the HP 54201A/D. If Self Test 0 is requested over the HP-IB bus, this portion of the test is Skipped
since it will change status of the bus. The HP-IB test resets the HP-IB circuitry on the CPU board
and returns the instrument to Local mode. The circuitry is then set to Listen-only and checked to
see if the instrument is in Listen-only mode, then the circuitry is set to Talk-only and checked to
see if the instrument is in Talk-only mode. If either portion of the test fails the error message
FAILED Control test-HPIB is displayed.
If both portions of Self-Test 0 pass, the message PASSED Control test is displayed.
ROM Test. The ROM test performs 16-kbyte checksums of the CPU board ROMs. If the
checksum result is different than the checksum stored in ROM?, then the following message is
displayed:
FAILED ROM test

#XX Checksum:YY Was:ZZ
where XX = ROM #(o-?)

YY = Correct checksum stored in ROM?
ZZ = Checksum calculated by this test
If no ROM errors are detected the message PASSED ROM test is displayed. The ROM test only
reports the first error found.
A-1
RAM Test. The RAM test verifies read/write performance for the 64-kbyte dynamic RAM, the
8-kbyte static waveform/setup RAM (A3U38), and the 8-kbyte RAM (A3U39) which contains 2-kbyte
of calibration factors. All three RAM groups are on the CPU board and are tested in the same
manner. If the rear-panel switch on the HP 54201A/D is set to the Protected position, the 2-kbyte
portion of the calibration factor RAM is not tested.
The RAMs are tested by writing a 2-kbyte block of rolling 1's pattern. The block is then read and if
all bytes are the same as written in, the next block is tested by rewriting the data. If there is a
failure, the test is stopped and the following error message is displayed:
FAILED RAM test

XXX At Lac: ddddH Wrote:YY Read:ZZ
where: XXX = RAM identifier (U39, U38, or 64K)

dddd = Location in RAM (0-1 FFF,0-1 FFF, O-FFFF)
YY = Vaiue written to RAM
ZZ = Value read from RAM
If there were no RAM errors, the message PASSED RAM test is displayed. The RAM test only
reports the first error found. Stored waveforms and setups are not altered by this test.
A-3. SELF TEST 1 - ACQUISITION/TRIGGER

The Acquisition/Trigger Self Test consists of four tests for the Analog board in the HP 54201A/D
and an additional six tests for the State board in the HP 54201 D. These tests are:
ACQUISITION BOARD
• Channell Test
• Channel 2 Test
• Auto scale Test
• Interpolator Test
STATE BOARD (HP 54201 D only)
• State Pod Test

• State Sequence Test
• State Qualified Mods/Clock Test
• State Occurrence Test
• State Restart Test
• State Bit Fault Test
A-2
HP 54201AfD - Self Test
A-4. Analog Board Self Tests
Channel 1 and Channel 2 Tests. These tests check each channel's gain and offset capability.
Several voltage ranges are tested. At each voltage range the offset D/A converter output from the
Analog board is set to 1/4 of the set voltage range. This voltage value is then checked for
allowable error margin. A q level is defined to be 1/64 of the voltage range.
RANGE ALLOWABLE
CHECKED ERROR
40 mV 1 ±8 q levels
80 mV
160
400
mV
mV } ±4 q levels
Auto Scale Test. The offset D/A converter on the Analog Board is configured to fluctuate six times
about a trigger level, thereby causing six trigger signals. Frequency counters count the number of
triggers. If the count does not match the six triggers generated, the text fails.
Interpolator Test. The offset D/A converter on the Analog Board is configured to fluctuate many
times about a trigger level, thereby causing trigger signals. The time from trigger point to the next
system clock is then checked to see if the time is within a maximum and minimum value.
A-3
A-5. State Board Self Tests

For all of the State board tests, input conditions (states) are simulated by setting pod threshold
levels to their maximum high level (+9.9 V) or their maximum low level (-9.9 V). For example, if
pod 1 threshold is set to +9.9 V, then all of the data inputs from pod 1 will appear low (0).
Conversely, if pod 2 threshold is set to -9.9 V, then all of the data inputs from pod 2 will appear
high (1).
Clock inputs are simulated by two different methods. One way is by toggling threshold levels.
When this method is used, all data inputs from that pod must be "don't cares". In addition, the
number of clocks generated by toggling one time is indeterminate. With the pods left open and
floating, the toggling of thresholds causes ringing which produce multiple clocks for each
transition of the pod threshold. The second method of generating clocks is achieved through
special test circuitry and software and the clocks are called CPU clocks.
Note
Except for tile State Occurrence test, all pods must be connected to tile HP
542010 for the State tests to pass.
State Pod Test. This test sets all of the pods to their low level and then checks to see if the inputs
appear high. All pods are then set to their high level and checked to see if the inputs appear high.
If the State Pod Test fails, a one-digit decimal number will be displayed indicating which HP
10271A Pod has failed.
FAILED POD
NUMBER
DISPLAYED 2 1 0
1 II
2 II
3 II I
4 I
5 II III
6 II II
7 I I I
A-4
State Sequence Test. The following is the sequence specification which is tested:
In Sequence
find [a]
then [b]
then [c]
then Count [00003] occurrences of
[d]
Sequence Restart on [no state]
[ OCT ]
a = 000777777
b = 777000777
c = 777777000
d = 777777777
Input states are simulated by setting pod thresholds appropriately. After each change of input
state, a CPU clock is generated. After each CPU clock, the test program checks to see if a trigger
has been generated. The test begins by setting the condition up so that state "d" is present (all
pod thresholds low). The test continues changing states in the following order:
1. d then clock
2. c then clock
3. b then clock
4. a then clock (first state found)
5. d then clock
6. c then clock
7. b then clock (second state found)
8. a then clock
8. d then clock
10. c then clock (third state found)
11. b then clock
12. a then clock
13. d then clock (fourth state found first time)
14. c then clock
15. b then clock
16. a then clock
17. d then clock (fourth state found second time)
18. c then clock
19. b then clock
20. a then clock
21. d then clock (fourth state found third time)
The trigger should be generated only after the sixth time state "d" is present. If the trigger is
generated before, after, or not at all. the test will fail.
A-5
HP 54201 AID - Self Test
State Qualified Mode/Clock Test. The following is the sequence specification which is tested:
In sequence, Qualify on Slave Clock, then

find [00001] Occurrences of
[ any state ]
All data inputs are "don't cares" in this test and pod thresholds are toggled to generate clocks.
This test involves six parts in which both master and slave clocks are assigned all edges of each
clock. The following are the combinations tested:
Master Clock Slave Clock
a. q J*
b. Lt Jf
c. J* K*
d. Jf Kf
e. q q
f. Kf Lf
Each part of the test involves clocks generated in this order:
1. Master clock
2. Master clock
3. Master clock
4. Slave clock (qualifier)
5. Master clock (trigger events)
The test program checks for a trigger after each master or slave clock. The trigger should be
generated only after the master clock which follows the slave clock (step #5). If it occurs at any
other time or not at all for any of the six parts of this test (a through f), the test will fail.
State Occurrence Test. The following is the sequence specification which is tested:
In sequence,
find [65535] Occurrences of
[ any state ]
This test doesn't use any of the inputs or clocks from any of the pods. CPU clocks are generated
to simulate each occurrence of "any state". The test program begins by generating 65,534 clocks
and then checks to see if a trigger had occurred as a result of any of the past clocks. If the test
detects a trigger at this point, then the test will fail, since the number of occurrences specified is
65,535. If a trigger has not occurred, the test generates one more clock and checks for the
occurrence of the trigger once more. If a trigger has not occurred, the test will fail.
A-6
HP 54201 AID - Self Test
State Restart Test. The following is the sequence specification which is tested:
""---
In Sequence,
find [cJ
then [bJ
then Count [00001] Occurrences of
raj
Sequence Restart on [d]
[ OCT ]
a ; 000777777
b ; 777000777
c 777777000
d 777777777
This test is very similar to the State Sequence Test. Input states are simulated by setting pod
thresholds and clocks are generated internally (CPU clocks).
The following states are set up in this order:
1. c then clock (first state found)

3. d then clock (sequence restart)
4. a then clock
5. c then clock (first state found)
7. a then clock (trigger state found)
The test checks for a trigger after each state condition. A trigger should be generated only after
the second time "a" occurs (step #7). If the trigger occurs at any other time. or not at all then the
test will fail.
State Bit Fault Test. The following is the sequence specification which is tested:
In Sequence,
find [OOOOIJ Occurrences of
a MiSSing Bit
All data inputs are "don't cares" and clocks are generated by toggling pod thresholds. Toggling
pod 0 threshold generates an L clock which is serial data and toggling pod 1 threshold generates a
K clock which is the reference clock cell. The following is the order in which clocks are generated:
1. L clock (serial data)

2. K clock (reference clock)
3. K clock (reference clock and trigger)
The test program checks for a trigger after step #1 and step #3. The trigger should be present
only after the second K clock. If the trigger occurs at any other time or not at all. the test will fail.
This test also checks the extra bit case since the only difference is a software reconfiguration for
user interface.
A-7
A-5. SELF TEST 2 - INPUT
This self test checks the ability of the HP 54201A/D to acquire a signal through the front panel
BNC and then store it in memory. This test is performed in both Random Repetitive mode (RR)
and Real Time mode (RT). Once in memory, the data waveform is checked for acceptable
amplitude and frequency. The HP 54201A/D is preset to 50Q mode:
Channel Range: 4 V
Channel Offset: I.5V
The timebase is setup to 2 (.is Range and 0 second Delay. When performed from the front panel,
the test prompts the user to connect a BNC cable from the rear-panel BNC to each of the channel
BNCs, one at a time. if this test is run over the HP-IB bus, the inputs must be properly configured
before the System TEST command is issued. When the test is started, a 2-MHz TTL square wave
is output from the rear-panel BNC, acquired through the selected front-panel BNC, and stored in
memory. Period, Vtop, and Vbase measurements are made on the acquired data.
The period measurement must be 500 ns ±20ns to pass.

The Vtop measurement must be :>2 V to pass.
The Vbase measurement must be <;500 mV to pass.
If all the above tests pass, the message PASSED Test 2 appears. If there are any failures, a 2-digit
number follows the advisory, for example:
FAILED Chan 1 test RR [23]
The first digit indicates a voltage measurement failure;
1 - the lower value (Vbase) was greater than 0.5 V

2 - the upper value (Vtop) was less than 2 V
3 - both upper and lower value failed, or there was no valid signal present
The second digit indicates a period measurement failure:
1 - the period measurement was too low

2 - the period measurement was too high
3 - no valid signal was present
A-a
Red stripe
+
2 1
4 3
6 5
I
8 7 W3Pl
10 9
12 11
14 13
Red stripe
+
14 1
)
1 j W3P2
8 7 \
~ .. Figure 6-12. Keyboard-Io-CPU Board Ribbon Cable (W3)

-----
~
/o"CP-U--1
BOARD J7 1
P W3 P2
I
, • 7 I ,
I If I
I
I
I
I
I
I Ii
I I
I I
,I ,f
It. ,I
, ,,I
l -n, ,,
, '3 KSR2
,I ,I
\ I I
t Ii
!I
,,, ,,,
I , ,, ,,
I , :
II I ], ,I KBR3
----t--> II I,
I ' , ,
iI 'I ,I
I I
,I
I
I ,
,
,,, ,,1
, I
j "I ,I ,I
-+-79 : , KSR4
, I
,,, ,,I
II, : ,,
I
,f ,I
,,
,
i:, I, I
I
I
I
,, ,I ,I K8R5
: ---1---7 11 9
I, i:, i,' I
,,
,,
I
,I
,,
I,: III ,,,I
,,I
,, ,
,, ,,
II , ,
: , KBR6
I 1113
,,
I
,I
I I
,I
8
!I
I I
I, ,,
I
,I
,,I
,
:I
,,
,I
I, !I
I I
1,
, ,,I
I
,, ,
,
I : , ,,
I, II
I
,
,, I
,,
,, I
,, ,,
,
: ----H 10 >-n IL..- 5 KBC0
II
I
---1---7 5 12 I KBel
----H 4
---1---72 2(I'"K8C2
----H6 1 ( KBC3
I,
I II" ..
3 ( "KBC4
---1---78 4(·-KBC5
----H 14 )-T I I !_..-
~12',_,
7(!'"K8C8
6 ( I II
I, ' !,
I
I
,-------
---------------------------------------------,
.@'~ l§c @~ ~ ~CHAN

lS
[ COpy I [ ERASE I I SAVE I I RECALL j
'--o~ -o~ -o~ '--oL

[CURSOR +I [ 7
J I 8
I I 9
I I sec
Vol t
I I,
'--o~ -o~ -o~ '--oL -o~ -0
I 4
I I 5
I I 6
I l m~c J I, S
'--o~ '--0 -~ ~ '--oL '--o~ -0
r Nr~T 1 I 1
I I 2 I I 3
I I ue ec I I,
'--o~ -o~ '--o~ '--oL '--o~ -0
I INSERT I I CLEAR I I o I I • I [ CHS I [ n

ENTRY
,
'--oL -o~ '--o~ -oL '--o~ -0
85420021
Figure 6-13. Keyboard Schematic Diagram

6-31/(6-32 blank)
+PRIMARY +
AC
I AC RFI
FILTERING
F1
AC
POWER
AND AC AC-OC
LINE VOLTAGE RECTIFIER
I SWITCHES -PRIMARY t-"
I PRIMARY
SECTION CONTROL ,.. +12C I
I AC
XFMR
AND
RECTIFlER
TP1
TEST
SOCKET
+5REF
I
I I-
I
I
I-- -~ y- -- - - -- - - T - --l
I " +15
+12
I
+12C
'"
+15, + -12 +5REF
GND GND +5
--V
I REGULATION -12 TP2 TEST
CONNECTOR
AND I I
I SECONDARY
-5.2
-2.'
OUTPUT TO
MOTHERBOARD
I +12C
I
+5REF
+~
SECTION
I -5.2
I -5.2
-5.2 I
+12C
'"
T5 RECTIFICATION
I SECONDARY
XFMR --V AND
FILTERING R-5.2 I +5REF
R-2.'
I -2.'
I -2.'
-2.'
FAN
I
A RECTIFICATION I +12C
I -v'
AND
FILTERING R 2.4
I
+5
R+5
I I
. +5
I
I -J
+5
RECTIFICATION
AND
FILTERING R+5 I
I I CC2
I
I
I
I CC1 I
L
HP 54201AjD - Power Supply Service
DC
•
I
DC) I
T5
PRIMARY
SWITCHING
XFMR
SWITCHING
TRANSISTORS
1--
I
.-r-::l-J I
PRIMARY SHUTDOWN BASE
I
CURRENT
LIMIT
CONTROL
SECTION
DRIVE
XFMRS I
I
PULSE
NON-OVERLAP
CONTROL
CCl
CC2
I
+5
HVOLTAGE
OVERVOLTAGE
CONTROL I
I
-5.2
RVOLTAGE
+12C
I
+5REF
+5 MODULATION
CONTROL r"
PULSE
WIDTH
THERMAL
SHUTDOWN
I
R+5
I
CIRCUITRY MODULATOR
-2.4 SHUTDOWN -5.2
JRRENT R-5.2
LIMIT
I
+5
JRRENT
LIMIT
SHUTDOWN SHUTDOWN
I
I
I
I
I
_J
Figure 6A-1
Power Supply Block Diagram
6A-3
1. TURN OFF POWER.
2. REMOVE CPU. ANALOG, AND STATEBOARDS
SEE NOTE 1. rs
START 3. SET 115/230 SWITCH {SWl) TO THE AVAILABLE THE FAN
AC LINE. ON~
4_ TURN ON POWER.
5. CHECK THE OWTPUT VOLTAGES ON TP2. SEE
NOTE 2.
t. TURN OFF POWEfl

rs
'"
THE FUSE
BLOW?
»...e--j 2. :~~~~~~~~~ ,"",0,-_--''''-<: "
THE FUSE
GOOD?
+5 REF
AT '5
BE USED,)
YDC?
3. TURN ON POWER
1. ;~~;:GAECLi~:L~OR PROPER I-~~~~~~ ---.J

2. CHECK CIRCUITRY AROUND
RV1. RY2 AND CR4
1. IF THIS VOLTAGE OOESNT EXiST
Tl-IE SUPPLY WON, OPERATE.
2. THE INPUT OF V1 SHOUW BE AT
1 TURN OFF POWER.
'·12YDC.
2. DISCONNECT FAN CONNECTOfl
3. CHECK THAT U1 IS REGULATING
n. PROPERLY
TURN ON POWER. 3
4 PROIlE P2 +SVOC AND -S.IVOC.
L~~~~~~_~~~~~~~~~~~~~~~~~---I
5. IF VOLTAGES EXIST, REPLACETHE
5. ""
IF NOT, CHECK THE OUTPUTS OF
THE FILTER IFUI FOIl 115VAC
ALSO. CHECK THE POWER AND
LINE SWITCHES FOR AG.
WARNING
R4/C10 and R5/C11 have a dfschargetimeconstant ot60seconds. The primary voltage lines
have -·300 votts across 1hem, .,. or - 150 Vdc to ground. The main filler bank, C6 and C7,
contains enough energy to be a potential hazard 10 me, eVen with lhe supply turned OFF! IS THE
"rheretore wait at least three mtnutee tor capacitors to discharge before sel'\llclng the power "OV"LEO
ON?
supply board.
NOTE 1
When trOUbleshooting the power supply all system boards should be removed 10 pnlvent
rs
pQssible damage while servicing the power supply. The output voltages will slay in CHECK THE OUTPUT VOLTAGES ON TP2. SEE CR11
regulalion wilhout a load on Ihe suppty, ucwever, when making unettcrerence measure- NOTE 2, BIASED
2. VERIFY THAT us IS MODULATING ON PINS 8 AND ON?
menls the system eeerde shOUld be- installed. 11. IF NDT, REPLACE
CHECK FOR PROPER MODULATION ON THE BASE
DRIVE TRANSFORMERS
4. CHECK FaA A SHORT ACROSS THE BASE TO
COLLECTOR OF 01 OR 02.
NOTE 2
Power Supply Specilications
1. CYClE POWER OFFIO
INPUT 2. IFTHISCONOITIONSl
Y SlJl'PLY HAS EXCEE
115 volt range: 90 volts to 127 'lolls. Inpul unax = 4 Amps, 3. cHE{;K THE -5.2 V SE
230 von range: 180 volts to 253 'lolls, Inpul Imax = 2 Amps.
Frequency Range: 48 Hz 10 66 Hz in either Yoltage range.
OUTPUT
Volls % Tolerance Maximum Current (Amps) CHECK THE OUPUT VOLTAGES ON
TP2, SEE NOTE 2.
115 s .a 2. THE "01"" LEO IS BAD
+12 5 .25 3 US IS IIAD
rs 5 e.n
-2.4 ro a.c
-"
-12
-5, +10
5
25.0
.25
IS THE
"NORM-LED
res
~" )
om
'"
'" 15THE
'" "NORM"LED
ON?
vas
rs IS PIN 3
'" 'l2CAT
; 12VDC? '" OF US HIGH?
'"
THE OUTPUT
VOLTAGES
'0
'0 vas RIGHT?
'~
~
, IF THIS VOLTAGE OOESNT ElUST THE THE "PL" LEO
,, TURN OFF poweR AND CHECK THE FUSE.
TURN ON POWER MilO CHECII FOR UNUSUAL LOADING OFTHE
SUPPLY ANOiDR THE PRIMARY CURRENT LIMIT CIRCUITRV.
, SUPPLY WONT OPERATE
THE - OUTPUT OF CRl SHOULD liE ""' a IF THE "Pl-' lEO STAYS ON CHECK THE BASE TO COLLECTOR Cl-IECK THE OUTPUT
" a
APPROXIMATELY 2OV.
CHECK THAT VAl IS REGULATING
RESiSTANCE OF 01 AND 02 FOR SHORTS. VOLTAGES AT TP2-
see NOTE 2.
'" PROPERLY
'"
'~
ruRN OFF POWER
a WHEN THIS LED IS ON THE SLipPL V IS TOOWARMTO OPERATE
THE "111" YES , ALLOW THE SUPPLY TO coos

IF THE THERMAL LEO STIl. VS ON WITH THE SUPPLY BEING COOL
,. TURN Off POWER
LEGCN? CHECK THE NORMALLY CLOSED THERMAL SWITCH ISW3). ALSO
CHECK FOR PROPER INSTAllATION OF THE FAN a INSTALL ALL BOARDS.
a
• CHECK FOR POSSIBLE INCORRECT PERFORATED SIDE COVER
INSTALLATION
TURN ON POWER
'0
, WITH CR1S BIASED ON THE -2.4 CURRENT LIMIT HAS BEEN

vas
EXCEEDEO
rs e CYCLE THE POWER OFF/ON AND IF THIS CONDITION STILL
CR16 yES -e- EXISTS CHECK FOR UNUSUAL LOADING OF THE 2.4 VOLT
."
BIASED SUPPLY.
ON? a NOTE THE IICOUISITION SOARDS ARETHE ON LY USEAS OFTHE
-2.4 VOLT SUPPLY
THE OUTPUT
VOLTAGES '"
• CHECK THE CIRCUITAY IN THE -2,4 V SECONDARY OF T5•
AIGKTI
'0
WEA OFFiON
'~
NomON STILL EXISTS THf; < 5V
\S EXCEEDED 6 VOLTS , WITH CR17 BIASED ON THE -;-s CURRENT LIMIT HAS BEEN
E 'SV SECONDARY OF T5 EXCEEDED CHECK THE OUTPUT
CR17 YES
z, CYCLE THE POWER OFFION AND IF THIS CONDITION STILL VOLTAGES ON TP2
BIASED EXISTS CHECK FOR UNUSUAL LOADING OF THE +5 VOLT supPLY SEE NOTE 2.
om a CHECK THE CIRCUITRY IN THE ~5V SECONDARY OF T5
'0
WER OFFION
>NOITION STILL EXISTS THE -5.2
HAS EXCEEDED -6-2 VOLTS.
IE -5.2 V SECONDARY OF T5 rs n-e
'0 -NORM" LEO
ON? '"
15 THE
"NOAM-LEO
om
ves
'0
MAJOR PROBLEMS EXIST, CHECK LEO. FOR PROPER OP-
ERATION. THESE PROBLEMS ARE BEYOND THE sCOPEOF
THIS FLOWCHART.
-- ~
RETURN
,0
M5420102
Figure 6A-4
Troubleshooting Flow Chart for LED Failure Indicators
6A-11
NOTE 1
PROBING THESE PINS MAY CAUSE UNWANTED
SYMPTOMS
NOTE 2
FUNCTIONAL DIAGRAM FOR U3 AND U4.
vee
I,
-, <l'DUReE
~ •
,v
VSENSE 1
2
CURRENT
SOVRCE
4
he OUTPUT
3
~EF
2.~
I r-,
1-
6 INDICATOR (NOT USEDl
OUTPUT
V SENSE 2
$ VI 'I
I
5 REMOTE
ACTIVATION
7 M163100B
VEE
------------------------------------------------------
RT3
-
2.5 L1
2 L2 1
•
~~
- 4 i"'YY ~
+C1C21 R4
P3
R6
1M
C13
1UF
560UF
,-
100K
, C9
1UF
+C11
560UF
R5
10/K li
MP1 CLLl..I..LJ
16VAC RMS 2r-;;-;-

VR1
;(~ I_I
-P2
, C5
0.01UF
4'---
+C3 +C2
'04 TP1 TESrJ 330UF 10UF
'"
0.01UF I CONNECTOR I
",-8-~- --I---+J------4I' '--I

CONTROL SECTI ON
POWER SUPPLY ill
1 ,
230
115 SECONDARY SECTION UL...l.l.l.lJ MP7
P/O T6
LINE 8 6=7 1 3
rl-----''-frn''-''---~oC--r--~____1~r---T--
•
~~
INPUT OFF •7T R24 +C25 +C39
75 330UF 1UF
ON ,..L
",,2 •7T C23
2e00
+C26 +C31
F1 7 Pia T6 330UF 1UF
8 ===• 5
~~
1
FL~
W5
•2T R25
MP9
. LU.LW..U
CR18 r-------------------5
rrrrrrrrt MPB
___ : W4
•2T
12
~" I 2~11
PIa T6
r: ~ C24
0.039UF :
~"L I I ;/0 T6
3 - - 10
II +C47
3300UF
AC INPUT !
W3
• L
•
,---
,
I
------------,
Pia T5
,
_
~
4
•1T
•1T ,C27
R28
12 . ..
'
.
CR19
~"
~L
r - - - - - - - - - - - + - + - - - -2
4=9
PIa
•
T6
" e. 039UF
(SECONDARIES> :
~"u I +C48
f
,,I
5 3300UF
I,, •2T R27 CR20 ,---~---------------+--+5\
fL.J0
•2T
12 PIC T6
'=12 T
I
I 2
C2.
0.039UF
•
r-
d'C49
3300UF ,
8
'(~~ Pia os:
I
, 'L "NORM"
I 1
L1
R4
le0K
C9 IWARNING ~.
1UF
HAZARDOUS VOLTAGES C10 & ell REMAIN CHARGED
ARE PRESENT ON AFTER POWER IS REMOVED. +5VREF
R5
10JK
l g1g22u;HE5ElLINES
WAIT THREE MINUTES FOR
CAPS TO DISCHARGE BEFORE
SERVICING THIS CIRCUITRY. PIO RP3
47ge
R42
392K
+12VC
5 " -2.
R4.
r--===--+12VC 140K
-2.4V - - w r - - - - '
+SVREF
C41
4 0.e1UF
+C2 +C1
10UF 1UF
+12VC
+5V
R35
R3" +lc43 909K
NC~
,
21300 1UF
12
14
P1
4 3 13
CR17
+15V
R37 47913
Pia
OUTPUT TO
31.6K
RP3 C4. +5V CURREN
2 2 9 0 13
MOTHERBOARD LI MJ: T
+12V 47130
Pia
RP3
GND
+-+----5.2V
+-+---2.4VRET
+-+---2.4V
--+--+5VRET
---o---+5V
51
'"
CC1
CC2
----------------------------------------------------------------------
S~
01
511
C6 P/O T5 CR2
1UF (PRIMARY)
Wl=W2
• 31T
C7 R3 C8
+12VC 1UF
47 2000 R2
51 •
-2.4 CURRENT 1T
T4 ::::::::
LIMIT 6.T
C41
0.01UF 5
----11f----'--~---__r_-------------~
CR10
CR16
MODULATION CONTROL
CIRCUITRY PRIMARY CIRCU
CURRENT LI M[
C37
:R17 75
·5V CURRENT +5VREF R3. C34

130K 2000
LIMIT +5VREF R19
619K
,.K
01. C32
0.01UF
PULSE WIDTH MODULATOR
3
16
U5
15
P""
+5VREF
,>_+',,4,- PWM+5VREF
Pia DS1 ....' 7 2
nov" '""
2 +12YC
U2E
5 12 + 5
PIC
4. i
U2A 6
16 R34
C38 -5.2V e
VOLT
11309 021
2.74K
5
1UF..¢.+ ADJ C22 +12VC
..¢.0.01UF a
PII
13 4. ~
PWM [DE]
+5VREF
C21 +
:>/0 RP2 1UF
:1700 -5.2V OVERVOLTAGE +
4
OP2
(U6B) 4.7K
U2C
15
PULSE
12B
NON-OVERLAP
CIRCUIT
-_ .. -....----------------------------------------------------------------_.
eR2
T4===
6 T
CR10
PRIMARY CIRCUIT THERMAL

CURRENT LI MI T SHLJTDOWN
+12VC
1 Pia DS1 / ' "
2 8 /'
P'WM+5VREF 4 U3 ~r--.+t'--.---.+--.J
CR8
3 1-'5'-_ _-+
R11
R12 7
C18 1003
PULSE WIDTH MODULATOR ~ 0.@lUF 13130
N C THERMAL
SWITCH iesc
U5 MP9
SW3
>-_+-,'-,4_ PVIIM+5VREF
SWI TCHI NG TRANSI STOR
BASE DRIVE +12VC
(PRI MARl ES)
CR5
U2F P/O T2 R7
11 274
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HP54201AD Service Manual

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W.J.

fiORD SUIiIPbUS ENTERPRISES

W.J. FORD SURPLUS ENTERPRISE'

This manual applies directly to

For additional important information about serial numbers, see

@ COPYRIGHT HEWLETT·PACKARD COMPANY/COLORADO SPRINGS DIVISION 1986

ALL RIGHTS RESERVED

Manual Part No. 54201-90902

NO OTHER WARRANTY IS EXPRESSED OR IMPLIED. HP SPECIFICALLY DISCLAIMS THE

b. What can we do to clarify these areas? _

4. What did you find to be most helpful in this manual? _

5. What did you find to be least helpful? _

THANK YOU FOR YOUR HELP. NO POSTAGE NECESSARY IF MAILED IN U.S.A.

BUSINESS REPLY CARD

POSTAGE WILL BE PAID BY ADDRESSEE

Your cooperation in completing and returning this form

I WARNING I possible, and when Inevitable, should be carried out only by

o BEFORE SWITCHING ON THE INSTRUMENT, the

a If this Instrument is to be energized via an Indicates hazardous voltages.

o Only fuses With the required rated current, voltage, and

SECTION 1. GENERAL INFORMATION

Introduction , '" ., 2-1

SECTION 3. PERFORMANCE TESTS

SECTION 4. ADJUSTMENT PROCEDURES

Introduction " , .. , '" , , .. , 4-1

SECTION 5. REPLACEABLE PARTS

Introduction " ., , '" , , '" '" .. , 5-1

SERVICE GROUP GA. POWER SUPPLY

APPENDIX A. SELF-TEST DOCUMENTATION

1-2. MANUAL ORGANIZATION

1-3. INSTRUMENTS COVERED BY THIS MANUAL

The key features of the HP 54201AjD Digitizing Oscilloscopes are:

• 300 MHz repetitive bandwidth with ±200 ps lime-interval accuracy.

• Capture two channels simultaneously.

• Holdoff-by-events to trigger acquisition alter a specified number of events.

• All front panel controllabie parameters can be programmed via HP-IB.

• Continuously updated automatic waveform parameter measurements with user-defined

• Waveform math: Ch1+Ch2 and Ch1-Ch2.

• One button hardcopy to HP-IB printers and plotters.

• Digital logic trigger qualification (HP 54201 D only).

1-5. ACCESSORIES SUPPLIED

The following accessories are supplied with the instruments:

HP 54201AjD: Two HP 10017A 10:1 divider probes.

HP 542010 (only): Three HP 10271A 10-bit State Data Probes.

Table 1-1. Specifications

HP 54201 A and HP 542010 1,2

VERTICAL (CHANNEL 1 AND 2)

Range: 40 mV to 16 V full-scale, calibrated with two digit resolution.

Gain Accuracy: ±2% of full-scale. 3

Analog to Digital Conversion (ADC) Accuracy: ±1.6% of full-scale.

Dc Offset Accuracy: Channel Range Offset Accuracy

40 mV to 790 mV ±1% of offset ±5 mv

Dc Offset Range/Resolution: Channel Range Offset Range Offset Resolution

Voltage Measurement Accuracy (DC):

Single Cursor (X or 0): Gain Accuracy + ADC Accuracy + Offset Accuracy

Bandwidth (-3 dB): Coupling Real Time Sampling Repetitive Sampling

Dc Dc to 50 MHz Dc to 300 MHz

Transition Time (10% to 90%): Real Time Sampling: 7 ns

Input Coupling: ac or de.

Input RC (Nominal): 1 MQ shunted by approximately 10 pF (ae or de)