NuMicro

I2C

NuMicro@nuvoton.com

1
Agenda

General Description
Features
Protocol
Register Description
Application

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General Description

A two-wired and bi-directional bus, comprised by SDA and SCL,

may include multi masters and multi slaves
Both SDA and SCL are bi-directional with Open-Drain driving type,
connected to a positive supply voltage via pull-up resistors.

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Features (1/2)

Up to two I2C controllers.

Compatible with Philips I2C standard.
Support Master/Slave mode
Support 7 bit addressing mode
Built-in a 14-bit time-out counter to avoid the I2C bus
hang-up.

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Features (2/2)

Multiple address recognition ( Four slave address with

mask option)
Modes of Operation
Master transmitter
Master receiver
Slave transmitter
Slave receiver
General call

5
 I2C Protocol
Normally, a standard communication consists of 4 stages:
START or Repeated START signal generation
Slave address transfer
Data transfer
STOP signal generation

SCL 1 2 7 8 9 1 2 3-7 8 9

P
NACK
SDA A6 A5 A4 - A1 A0 R/W ACK D7 D6 D5 - D1 D0
ACK
S P Sr
MSB LSB MSB LSB
or or
Sr Sr

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 START, Repeated START and STOP
When the bus is free, I2C Hardware can initiate a transfer by sending a
START signal.
The master can use a Repeated START to continue a next transmission
without releasing the bus.
The master can terminate the communication by generating a STOP
signal.

SCL 1 2 7 8 9 1 2 3-7 8 9

P
NACK
SDA A6 A5 A4 - A1 A0 R/W ACK D7 D6 D5 - D1 D0
ACK
S P Sr
MSB LSB MSB LSB
or or
Sr Sr

Transmission starts with a Transmission ends with a STOP

START condition condition

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 Slave Address Transfer

The first byte transferred by the master after the START signal is the
slave address.
This is a 7-bit slave address followed by a R/W bit.
No two slaves have the same address.

SCL 1 2 7 8 9 1 2 3-7 8 9

P
NACK
SDA A6 A5 A4 - A1 A0 R/W ACK D7 D6 D5 - D1 D0
ACK
S P Sr
MSB LSB MSB LSB
or or
Sr Sr

Mater transmits a 7-bit Slave

address and 1-bit R/W

8
 Data Transfer
When successful slave addressing has been achieved, the data transfer
can proceed on byte-by-byte basis in the direction specified by the R/W
bit.
The data length is based on actual application.

SCL 1 2 7 8 9 1 2 3-7 8 9

P
NACK
SDA A6 A5 A4 - A1 A0 R/W ACK D7 D6 D5 - D1 D0
ACK
S P Sr
MSB LSB MSB LSB
or or
Sr Sr

Data transfer stage

(example 1 byte data)

9
Acknowledge
Acknowledge
Position clock pulse for
acknowledgement

SCL FROM
MASTER
1 2 8 9

DATA OUTPUT BY
TRANSMITTER
NACK: High level
not acknowledge

DATA OUTPUT BY
RECEIVER
S

START acknowledge
condition
ACK: Low level

Each transferred byte is followed by an ACK or a NACK at 9th clock.

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Register Description
I2C has 7 function registers:
I2CON (I2C Control Register)
I2DAT (I2C Data Register)
I2STATUS (I2C Status Register)
I2CLK (I2C Clock Rate Register)
I2ADDRx, x=0~3 (I2C Address Register)
I2ADRMx, x=0~3 (I2C Address Mask Register)
I2TOC (I2C Time-out Counter Register)

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I2C Control Register
7 6 5 4 3 2 1 0
EI ENSI STA STO SI AA Reserved Reserved

Assert ACK control bit

When I2C STATUS state changes, SI is set by HW

and cleared by writing ‘1’ to this bit.

To transmit a ‚STOP‛ in master mode. It is

cleared by HW automatically.

To transmit a ‚START‛ ‚Repeat START‛ when bus is free

I2C hardware enable

I2C interrupt enable

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 Usage of I2C Control Register
S Slave Address /W A DATA0 A DATA1 A P

SI flag is set by hardware

7-bit slave address with a

write bit DATA0

DATA1
[0,0,1,0] [0,0,1,0]
[1,0,0,x] [0,0,1,0] [0,1,1,0]

To set the [STA,STO,SI,AA] for above list conditions.

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I2C Status Register
26 possible status codes.
All I2C status codes correspond to defined I2C states.
Ex: When a START has been transmitted, the status code is 08H.

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Application

Show how to access EEPROM with I2C by

using I2C driver.
The flow of sample code
Configure system settings of NUC1xx.
Open the I2C and set I2C bit rate.
Write a byte data into specified address of EEPROM.
Read data from the specified address of EEPROM
and compare the result.

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Application

Flash

I2C0SCL I2C_CLK
Cortex-M0 I2C I2C_DATA 24LC64
I2C0SDA

NUC1XX

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 I2C Sample Code (1/6)
/*----------------------------------------------------------------------------
MAIN function
----------------------------------------------------------------------------*/
int32_t main (void)
{
uint32_t Temp_Value;
uint32_t u32HCLK;

/* Configure I2C I/O */

DrvGPIO_InitFunction(FUNC_I2C0);

/* Get HCLK clock */

u32HCLK = DrvSYS_GetHCLK() * 1000;

/*Open I2C0 and set clock = 100Kbps */

DrvI2C_Open(I2C_PORT0, u32HCLK, 100000);

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 I2C Sample Code (2/6)

/* write 0x55 to address 0x0000000 */

Write_24C64(0x00000000, 0x55);

/* read data from address 0x00000000 and store to Temp_value */

Temp_value = Read_24C64(0x00000000);

/* Compare the result */

if (Temp_value == 0x55 )
{
printf(“EEPROM Test OK/n”);
}
else
{
printf(“EEPROM Test Failed/n”);
}
return 0;
}

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I2C Sample Code (3/6)
void Write_24LC64(uint32_t address, uint8_t data)
{
/* send i2c start */
DrvI2C_Ctrl(I2C_PORT0, 1, 0, 0, 0); //set start
while (I2C0->CON.SI == 0); //poll si flag

/* send slave address and write bit */

I2C0->DATA = 0XA0; //send write command
DrvI2C_Ctrl(I2C_PORT0, 0, 0, 1, 0); //clr si flag
while( I2C0->CON.SI == 0 ); //poll si flag

/* send high byte of address */

I2C0->DATA = (address>>8)&0XFF;
DrvI2C_Ctrl(I2C_PORT0, 0, 0, 1, 0); //clr si
while( I2C0->CON.SI == 0 ); //poll si flag

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I2C Sample Code (4/6)
/* send low byte of address */
I2C0->DATA = address&0XFF;
DrvI2C_Ctrl(I2C_PORT0, 0, 0, 1, 0); //clr si
while( I2C0->CON.SI == 0 ); //poll si flag

/* send data, data = 0x55 here */

I2C0->DATA = data;
DrvI2C_Ctrl(I2C_PORT0, 0, 0, 1, 0); //clr si
while( I2C0->CON.SI == 0 ); //poll si flag

/* send i2c stop */

DrvI2C_Ctrl(I2C_PORT0, 0, 1, 1, 0); //send stop
DrvI2C_Close(I2C_PORT0);

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 I2C Sample Code (5/6)
uint8_t Read_24LC64(uint32_t address)
{
uint8_t flash_data;

/* send i2c start */

DrvI2C_Ctrl(I2C_PORT0, 1, 0, 0, 0); //set start
while (I2C0->CON.SI == 0); //poll si flag

/* send slave address and write bit */

I2C0->DATA = 0XA0;
DrvI2C_Ctrl(I2C_PORT0, 0, 0, 1, 0); //clr si
while( I2C0->CON.SI == 0 ); //poll si flag

/* send high byte of address */

I2C0->DATA = (address>>8)&0xff;
DrvI2C_Ctrl(I2C_PORT0, 0, 0, 1, 0); //clr si
while( I2C0->CON.SI == 0 ); //poll si flag

/* send low byte of address */

I2C0->DATA = address&0xff;
DrvI2C_Ctrl(I2C_PORT0, 0, 0, 1, 0); //clr si
while( I2C0->CON.SI == 0 ); //poll si flag
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I2C Sample Code (6/6)
/* send repeated start */
DrvI2C_Ctrl(I2C_PORT0, 1, 0, 1, 0); //clr si and send start
while( I2C0->CON.SI == 0 ); //poll si flag

/* send slave address and read bit */

I2C0->DATA = 0XA1;
DrvI2C_Ctrl(I2C_PORT0, 0, 0, 1, 0); //clr si
while( I2C0->CON.SI == 0 ); //poll si flag

/* get data from specified address */

I2C0->DATA = 0X00;
DrvI2C_Ctrl(I2C_PORT0, 0, 0, 1, 0); //clr si and set ack
while( I2C0->CON.SI == 0 ); //poll si flag
flash_data = I2C0->DATA;

/* send i2c stop */

DrvI2C_Ctrl(I2C_PORT0, 0, 1, 1, 0); //clr si and set stop
DrvI2C_Close(I2C_PORT0);
return flash_data;
}

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I2C – EEPROM (24LC64)

I2C
GPA10 SDA
GPA11 SCL

NUC140V3AN
I2C-EEPROM
(24LC64)

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 Run “Smpl_24LC64” Code

Customer_CD Readme.txt

NUC1xx BSP
NUC1xx_BSP Driver Reference Guide

NuvotonPlatform_Keil

Sample

NUC1xx-LB_002

Smpl_24LC64 Smpl_24LC64. uvproj

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Q&A

Thank You

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