1104 - Clamper Circuit PDF

Mymensingh Engineering College
Department of Electrical and Electronic Engineering

Lab Report-07
Lab Report on: Clamper circuit simulation using OrCAD
Capture CIS lite (PSpice).
Course name: Electronic Circuit Simulation Laboratory
Course Code: EEE 302
SUBMITTED TO: SUBMITTED BY:
Md. Khalid Saifullah Sheikh Raihan Rabby
Lecturer, Roll:1104
Department of EEE Group: A
Mymensingh Engineering College Batch:11th
Department of EEE
Session:2018-19
Date of Experiment:16/09/2020
Submission Date:23/09/2020 Signature
Experiment No:07 1
Name of the experiment: The study of clamper circuit using OrCad Capture CIS Lite simulation
software.
Objectives :
1.To see the characteristics of clamper circuits.
2.To see the operating principle of diode clamper circuit.
3.To see the changing waveform of clamper circuit when the bias is applied.
Theory:
A clamper circuit is an electronic circuit that fixes either the positive or the negative peak excursions of a
signal; to a defined value by shifting its DC value. The clamper does not restrict the peak-to-peak
excursion of the signal, it moves the whole signal up or down so as to place the peaks at the reference
level. The network must have a capacitor, a diode and a resistive element but it can also employ an
independent DC supply to introduce an additional shift. The magnitude of R and C must be chosen such
that the time constant τ =RC is large enough to ensure that the voltage across the capacitor does not
discharge significantly during the interval the diode is non-conducting.
The network will clamp the input signal to the zero level. The resistor R can be the load resistor or a
parallel combination of the load resistor and a resistor designed to proved the desired level of R.A
clamper circuits are also known as DC voltage resistors. Clampers can be constructed in both positive and
negative polarities. When unbiased, clamper circuits will fix the voltage lower limits to 0V.Thgese
circuits clamp a peak of a waveform to a specific DC level compared with a capacitively coupled signal,
which swings about its average DC level. A positive clamper diagram is shown in fig.7.1
Fig.7.1. Clamper circuit diagram.
Software: OrCad Capture CIS lite and PSpice.

Working Procedure:
1.First we have to open OrCad simulation software.
2.Then we have to find out Vsin as a voltage source, a capacitor , a diode(DN14002) , a DC voltage source
and a resistance.
3.After that we have to complete the wiring part from the library function.
4. Now we have to take essential values to run the circuit.
5.Now we have to save the simulation profile and take a period as we wish.
2
7. We have to use voltage probe at the terminal of the voltage source in order to draw the output
curve in Pspice software which is shown in fig.7.2(positive clamper circuit) and fig.7.3(Negative
clamper circuit).
Fig.7.2.Positive clamper circuit.
Fig.7.3.Negative clamper circuit.

3
Result: The resultant waveform of the both positive and negative clamper circuits are given below:
Fig.7.4.Input waveform of positive clamper circuit
Fig.7.5.Output waveform of positive clamper circuit

4
Fig.7.6.Input and output waveform of positive clamper circuit.
Fig.7.7.Input waveform of negative clamper circuit.

5
Fig.7.8.Output waveform of negative clamper circuit.
Fig.7.9.Input and output waveform of negative clamper circuit.

6
Caution:
1.We have to use Dc source for the experiment.
2.We must have to connect the ground to the circuit.
3.We have to rotate the diode by 1800 for the negative clamper circuit.
4.We should connect the wire properly.
Discussion:
Clamper circuits were common in analog television receivers. By using a voltage source and resistor, the
clamper can be biased to blind to the output voltage to a different value. The voltage supplied to the
potentiometer will be equal to the offset from zero. If a negative voltage is supplied to either positive or
negative, the waveform will cross the X-axis and be bound to a value on the opposite side.

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Mymensingh Engineering College

Department of Electrical and Electronic Engineering

Fig.7.1. Clamper circuit diagram.

Software: OrCad Capture CIS lite and PSpice.

Fig.7.2.Positive clamper circuit.

Fig.7.3.Negative clamper circuit.

Fig.7.4.Input waveform of positive clamper circuit

Fig.7.5.Output waveform of positive clamper circuit

Fig.7.6.Input and output waveform of positive clamper circuit.

Fig.7.7.Input waveform of negative clamper circuit.

Fig.7.8.Output waveform of negative clamper circuit.

Fig.7.9.Input and output waveform of negative clamper circuit.

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