Chapter: 4

OUTPUT STAGES AND POWER

AMPLIFIERS
Introduction:
An amplifier receives a signal from some pick up transducer
or other input source and provides a larger version of the
signal to some output device or to another amplifier stage. An
input transducer signal is generally small (a few mill volts
from a cassette or CD input, or a few micro–volts from an
antenna) and needs to be amplified sufficiently to operate an
output device (speaker or other power handling device). In
small-signal amplifiers the main factors are usually
amplification linearity and magnitude of gain. Since signal
voltage and current are small in a small-signal amplifier, the
amount of power-handling capacity and power efficiency are
of little concern. A voltage amplifier provides amplification
primarily to increase the voltage of the input signal. Large–
signal or power amplifiers, on the other hand, primarily
provide sufficient power to an output load to drive a speaker
or other power device, typically a few watts to tens of watts.
The main features of a large-signal amplifier are the circuit's
power efficiency, the maximum amount of power that the
circuit is capable of handling, and the impedance matching to
the output device.

4.1 Classification of Output Stages

An amplifier can be classified
a) According to frequency range
 DC amplifier (0 freqency)
 Audio amplifier (20 Hz to 20 KHz)

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  Video amplifier (up to few MHz)
 Radio frequency amplifier (a few KHz to l00’s of
MHz)
 Ultra high frequency amplifier (l00’s or 1000 of MHz)
b) According to use
 Current amplifier
 Voltage amplifier
 Power amplifier
c) According to the type of load
 Untuned amplifier
 Tuned amplifier
d) According to the method of operation
Class A: Transistor is so biased that output (or collector)
current flows for full 360º of the ac cycle. This operation
requires the Q-point to be biased at a level so that at least
half the signal swing of the output may vary up and
down without going to a high-enough voltage to be
limited by the supply voltage, or too low to approach the
lower supply level, or 0V as shown in below figure.
V0

Power supply
level
Full 360º output swing
Class A dc
bias level

OV t

 Class A operation means that transistor operates in

active (or linear) region of its load line. So output

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 waveform is exactly similar to the input waveform.
(High fidelity)
 It has a maximum efficiency of 25% (without
transformer) and 50% (with transformer) and
minimum efficiency of 0%.
 C > B > A (denotes efficiency)
 Class B: A class B circuits provides an output signal
varying over one-half the input signal cycle, or for 180º of
signal as shown in figure. The dc bias point for class B is
therefore at 0V, with the output then varying from this
bias point for a half cycle. Obviously, the output is not a
faithful reproduction of the input if only one half–cycle is
present. Two class B operations–one to provide output
on the positive-output half cycle and another to provide
operation on the negative-output half cycle are
necessary. The combined half-cycles then provide an
output for a full 360º of operation. This type of
connection is referred to as push-pull operation. The
class B operation by itself creates a much distorted
output signal since reproduction of the input takes place
for only 180º of the output signal swing.

V0

180º output swing

Class B dc
bias level
OV

 Class AB: An amplifier may be biased at a dc level above

the zero base-current level of class B and above one-half
the supply voltage level of class A, this bias condition is

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 class AB. Class AB operation still requires a push-pull
connection to achieve a full output cycle, but the dc bias
level is usually closer to the zero-base-current level for
better power efficiency. For class AB operation, the
output signal swing occurs between 180º and 360º and is
neither class A nor class B operation.
 Class C: The output of a class C amplifier is biased for
operation at less than 180º of the cycle and will operation
only with a tuned (resonant) circuit, which provides a
full cycle of operation for the tuned or resonant
frequency. This operating class is therefore used in
special areas of tuned circuits, such as radio or
communications.
 Class D: This operating class is a form of amplifier
operation using pulse (digital) signals, which are ON for
a short interval and OFF for a longer interval. Using
digital techniques make it possible to obtain a signal that
varies over the full cycle (using sample and hold
circuitry) to recreate the output from many pieces of
input signal. The major advantage of class D operation is
that the amplifier is "ON" (using power) only for short
intervals and the overall efficiency can practically be very
high.

Amplifier efficiency:
The power amplifier efficiency of an amplifier defined as the
ratio of output power to input power, improves (gets higher)
going from class A to class D. In general terms we see that a
class A amplifier, with dc bias at one-half the supply voltage
level, uses a good amount of power to maintain bias, even
with no input signal applied. This results in very poor
efficiency, especially with small input signals, when very little
ac power is delivered to the load. In fact, the maximum
efficiency of a class A circuit, occurring for the largest output
voltage and current swing, is only 25% with a direct or series

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 fed load connection and 50% with a transformer connection to
the load, Class B operation, with no dc bias power for no
input signal, can be shown to provide a maximum efficiency
that reaches 78.5%. Class D operation can achieve power
efficiency over 90% and provides the most efficient operation
of all the operating classes. Since class AB falls between class
A and class B in bias, it also falls between their efficiency
ratings between 25% (or 50%) and 78.5%.

Comparisons of Amplifier Classes

Class A AB B C D
Operating 360º 180ºto 180º less than pulse
cycle 360º 180º operation

Power 25% 25% (50%) 78.5% Greater

efficiency to and 78.5%
than B over 90%
50%

4.2 Class A Output Stage

Series– Fed class A Amplifier

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 Vcc

Ic Load
RB Rc

IB
C1

Power Transistor

Vi

Fig.4.2(a) Series – Fed Class A Amplifier

 It is called series fed as load RC is connected in series

with transistor output.
 The difference between series fed (large signal) and small
signal version is that signals handled by large signal
circuit are in the range of volts and transistor used is a
power transistor that is capable of operating in the range
of few to tens of watts.
 Series fed circuit is not the best to use as large signal
amplifier because of its poor power efficiency.
  is less than 100 (high current or power gain but low
voltage gain ).
 DC Bias Operation
The dc bias set by VCC and RB fixes the dc base-bias
current at
VCC – 0.7V
IB = RB
With the collector current then being

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 IC = IB
With the collector– emitter voltage then
VCE = VCC – ICRC
Ic
VCC
Rc
dc load line
Q-point
ICQ IBQ

VCE
0 VCEQ = VCC VCC
2
Fig: 4.2(b) Transistor characteristics showing load line and Q
point
 First DC load line is drawn using valve of VCC and RC
since they are constant. (VCC & RC are constant).
 The quiescent point is calculated using above equations.
 If the dc bias collector current is set at one-half the
possible signal swing (between 0 and VCC/RC) the largest
collector current swing will be possible. Additionally, if
the quiescent collector is set at one half the supply
voltages (0 and VCC) the largest voltage swing will be
possible.
 With the Q point set at this optimum bias point, the
power considerations for the given circuit (series fed
circuit) are determined.
 AC operation:
When an input ac signal is applied to the amplifier for
the given circuit, the output will vary from its dc bias
operating voltage and current. For the current this
limiting condition is either zero current at the low end or
VCC/RC at the high end of its swing. For the collector-

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 emitter voltage the limit is either 0V or the supply
voltage VCC.
Ic
Input signal
Vcc
Rc

Output
current swing
O VCE
Vcc

Output voltage swing

Fig: 4.2(c) Amplifier input and output signal variation

Maximum efficiency for Ideal case:
V 02
Output power (minimum), Po(ac) = IoVo = R
C

But,
Vopp VCC Vopp
Vo = = [Vrms = ]
2 2 2 2 2 2
[VOPP means peak to peak output voltage= VCC for ideal
case]

(VCC / 2 2)2 VCC2

 Po(ac) = RC = 8R .......... (i)
C

Input power from collector supply VCC,

Pi(dc) = VCC Idc(avg)
= VCC. ICQ
VCEQ
= VCC. R
C

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 VCC VCC
= VCC. 2R [ VCEQ = 2 ]
C

VCC2
or, Pi(dc) = 2R ....... (ii)
C

Po(ac)
 Maximum efficiency () = P (dc) × 100%
i

VCC2 2RC
= 8R V 2 × 100%
C CC

= 25%
Therefore, max = 25% for Series Fed Class A amplifier.
General efficiency of class A amplifier: (Series fed class A
amplifier):
VCC
 DC biasing is set at VCEQ = 2 and ICQ is chosen such
that it doesn't exceed the maximum collector dissipation
for the transistor Q1.
VCE or V0

VCC

VCEQ = Vcc
2
VCE max

VCE min
t
0

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 Fig.4.2(d) Graphical analysis of Class A amplifier with
resistive load

Here, from figure

VCE max + VCE min VCC
VCEQ = 2 = 2 ...... (i)

The power supplied by dc source

VCEQ
Pi(dc) = VCC. R
C

VCC
= VCC. 2R
C

(VCE max + VCE min)2

= 2RC .......... (ii)

Similarly, output power obtained from amplifier as,

VCE max – VCE min2 1 V2rms
Po(ac) =  . RC [Po(ac) = R ]
 2 2  C

(VCE max – VCE min)2

or, Po(ac) = 8RC .......... (iii)

Thus, efficiency of amplifier

Po(ac)
gen = P (dc) × 100%
i

(VCEmax – VCE min)2 100 %

= (V +V )2 × 4
CEmax CEmin

 VCEmax – VCEmin 2
 gen =   × 25%
VCEmax + VCEmin
[Note: From above equation we can see that most series–
fed circuits will provide efficiencies of much less than
25%.]

Transformer coupled class A amplifier: or // single ended

power amplifier (Ideal case):

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 It has better efficiency of 50% because no power is
wasted in collector resistor RC as is series fed.
 A matching transformer (step-down) is provided to
couple the high impedance collector circuit to low
impedance load.
+Vcc

N2 RL
R N1

C1

Vi

Fig.4.2(e) Transformer Coupled Class A amplifier

The transformer (dc) winding resistance determines the dc

load line for the above circuit. Typically, this dc resistor is
small (ideally 0). Thus, a 0 dc load line is a straight vertical
line.

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 Ic

dc load line
Ic max

IOP
Q-point

ac load line
V
O 2Vcc CE
VCEQ = Vcc
VOP

VOP (P-P) = 2Vcc

Fig. 4.2(f)

Here,
Input power,
Pi(dc) = VCC. ICQ
VCC VCC2
= VCC. R = R [From figure 4.2(f)]
C C

V o2
Po(ac) = R
C

Vopp
But, Vo =
2 2
2 VCC
= [From figure 4.2(f)]
2 2
VCC
=
2
VCC2
 Po(ac) = 2R
C

Po(ac)
 Efficiency () = P (dc) × 100%
i

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 VCC2 RC
= 2R × V 2 × 100 %
C CC

VCC 2
= 50 V 
 
CC

max = 50%

Hence the efficiency of transformer coupled amplifier is 50%

for ideal case i.e. when Vopp = 2VCC

General efficiency of Transformer Coupled Class A

amplifier: add figure
We know, for transformer coupled class A amplifier
VCE (max) + VCE (min)
VCEQ = VCC = 2
Then,
VCEQ
Pi(dc) = VCC. R
C

VCC VCC2
= VCC. R = R
C C

[VCE (max) + VCE (min)]2

or, Pi(dc) = 4RC
Also,
VCE (max) – VCE (min)2 1
Po(ac) =   . RC
 2 2 
(VCE max – VCE min)2
= 8RC
General Efficiency
Po(ac)
 gen = P (dc) × 100%
i

 VCEmax – VCEmin2
 gen = 50   %
VCEmax + VCEmin

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Q. Calculate the efficiency of a transformer coupled class A
amplifier for a supply of 12VDC and output of (i) VP = 12V
and (ii) VP = 6V. [065 Chaitra Regular]
Solution
We have,
For class A transformer coupled amplifier:
VCE max – VCE min 2
gen = 50 × V %
 +V
CE max CE min 
VPP 2
= 50 × 2V  %
 CEQ 
VPP 2 2VP 2 VP 2
= 50 × 2V  %= 50 × 2V  % = 50 × V  %
 CC   
CC  CC
(i) When VP = 12 V
12 2
 = 50 ×12 = 50%
 
(ii) When VP = 6V
6 2 1
 = 50 × 12 = 50 × 4 = 12.5 %
 

4.3 Class B Output Stage:

Class B operation is provided when the dc bias leaves the
transistor biased just OFF, the transistor turning ON when the
ac signal is applied. This is essentially no bias and the
transistor conducts current for only one half of the signal
cycle i.e. IC flows for only 180º of ac cycle. Operating point is
set at cut-off. To obtain output for the full cycle of signal, it is
necessary to use two transistors and have each conduct on
opposite half-cycles, the combined operation providing a full
cycle of output signal. Since one part of the circuit pushed the
signal high during one half-cycle and the other parts pulls the

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 signal low during the other half cycle, the circuit is referred to
as a push-pull circuit, with each half operating on alternate
half-cycles, the load then receiving a signal for the full ac
cycle. The power transistor used in the push-pull circuit are
capable of delivering the desired power to load, and the class
B operation of these transistors provides greater efficiency
then was possible using a single transistor.

One - half circuit

Load

One - half circuit

Fig. 4.3(a) Block diagram of Class B

 Class B amplifier has maximum efficiency of 78.5% and

minimum of 50%
Advantage:

The main advantage of class B/AB amplifier over the class A

amplifier is that there is very little current in the transistor
when there is no input signal. This results in low power
dissipation when there is no signal.

Efficiency of Class B amplifier:

Let Vop be the peak output voltage produced by class B
amplifier. Let RL (or rp) be the equivalent load resistance in
the output circuit.

Then,

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 V2r m s (VOP/ 2)2 VOP2
PO(ac) = rp = rp = 2r ....... (i)
p

Let VCC be the dc source voltage and the equivalent dc

current supplied by the dc source is the average dc value of
the ac output current which may be expressed as,
2 2 VOP 2 VOP
Idc = IOP = r = r
  p  p
Thus, dc power supplied by source is,
2VOP
Pi (dc) = VCC. Idc = VCC. ......(ii)
rp
Po (ac)
 Efficiency () = Pi (dc) × 100%

VOP2 rp
= × 100%
rp 2VOP. VCC
VOP
 = . 25  %  general formula
VCC

When VOP  VCC

max = 25  % = 78.5%

Condition for minimum efficiency:

Power loss by class-B amplifier,
PLoss = Pi(dc) – Po(ac)
2VCC. VOP VOP2
or, PLoss = – 2 r ............ (iii)
 rp p

Differentiating (iii) with respect to output voltage VOP,

dP Loss 2VCC VOP
dVOP = rp – rp
For maximum loss,
dP Loss 2VCC VOP
dVOP = 0 = rp – rp

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 VOP 2VCC
or, rp = rp
2
or, VOP = V ....... (iv)
 CC
or VOP = 0.6366VCC

Thus, when output voltage is 63.66% of maximum possible

output voltage the efficiency of class B amplifier becomes
minimum which may be expressed as,

VOP
min = V 25% [From general formula]
CC

0.6366VCC
or, min = VCC 25% [From (iv)]

min = 50%

Class B amplifier circuits:

A number of circuit arrangements for obtaining class B
operation are possible.

+VCC
180º out of phase
RC
R1

Vin C1
R2
C2
} Push-pull
i/p signals

RE C3 Same phase

Fig.4.3(b) Phase splitter using BJT

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  Same output of input through emitter & 180º out of
(opposite output of input) phase through collector.
Inverting

Ampl
V1 ifier Out of phase
EF V1

EF V2
same phase

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4.7.* Transformer- Coupled Push-Pull Stages

Transformer coupled class B push pull amplifier:

VCC

ICQ1
Q1 IL

Vin
R1

R2

Q2
RL
ICQ2

Fig. 4.7(a) Push Pull Circuit

 When Vin = 0, V1 = V2 = 0 then ICQ1  ICQ2 = 0

 During first half cycle, transistor Q1 conducts whereas Q2
is at cut-off mode. So ICQ1 current flows through
transformer which results in first half cycle of signal to
the load.
 During next half cycle, Q2 conducts whereas Q1 is at
cutoff mode. So ICQ2 current flows through transformer
resulting in second half cycle.
 The output transformer will combine the two outputs of
Q1 & Q2.

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* Cross-over distortion:

V0

0.5V
Q1
t
Q2

cross over
distortion
Fig.: Cross over distortion
In the result of small currents for V < VThreshold the output is
non-linear and is much smaller that it would be if response
were linear. This effect is called cross-over distortion. When
unbiased, a class B push pull amplifier has no output until the
input voltage exceeds approx 0.7V or 0.5V. This results in
clipping between positive and negative half cycles. This effect
is called crossover distortion.

Elimination:
We need to apply slight forward bias to each diode of
transistor i.e. the Q-point should be slightly above cut-off to
avoid this distortion. In order to minimize crossover
distortion, transistor must operate in a class AB mode where
a small stand by current flows at zero excitation which is
described in section 4.4.

Efficiency:

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 IC1(mA)

IO P
Q point
0 VCE1 VCE 2

VCC

VCC

IC2(mA)
Fig. 4.7(b) Composite Characteristics for Class B push pull
amplifier

Here,
PO(ac) = IoVo

Vo2 (VCC / 2)2 VCC2

= Z = ZL = 2Z .......... (i)
L L

= maximum possible output power

Pi(dc) = VCCIdc
2 2 VCC 2 VCC2
= VCC. IOP = VCC Z = Z ........ (ii)
  L  L
 Efficiency,
PO(ac)
 = P (dc) × 100%
i

VCC2  ZL
= 2Z . 2 . V 2 × 100% =  25%
L CC

Therefore,
= 78.5%
= maximum efficiency

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 Transformer less complementary symmetry push-pull
amplifier using complementary matched transistor Q1 and
Q2. (Class B).

+V CC

Q1(npn)
emitter follower
Vin

Q2(pnp) RL

–VCC

Fig. 4.7(c) Complementary Symmetry push pull amplifier

VRL

crossover
distortion
(both Q1 and Q2 off)

 A single input signal is applied to base of both transistors

 During first half cycle Q1 (npn) transistor will be forward
biased as it operates in active mode while Q2 is at cut-off.
So current IC flows from transistor Q1 to load to ground.
 During negative half cycle, Q2 (pnp) will be biased into
conduction and Q1 at cut-off. So, current flows from
ground to –VCC.

Transfer characteristic

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 V0

- 0.5V
Vi
+ 0.5V

Fig. 4.7(d) Transfer Characterstics of Class B amplifier

There exists a range of Vi centered around zero where both

transistor are cut off and output voltage is zero. This dead
band results in the crossover distortion. i.e. when the base
voltage is zero both transistor are OFF and the input signal
must exceed VBE before a transistor conducts, so there is a
time when no transistor is conducting. This results crossover
distortion.

The effect of crossover distortion on sine wave input is shown

in fig.
V0 VO

output distortion

Vi t

Vi
(both Q1 and Q2 off)

input undistorted

Fig. 4.7(e) Effect of Crossover Distortion

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Reducing crossover Distortion:
The crossover distortion of a class B output stage can be
reduced substantially employing a high-gain op-amp and
overall negative feedback as shown in fig:

+ VCC

– V'0 V0
A0
Vi +

RL

-VCC

Fig. 4.7 (f) Reducing Crossover Distortion

The  0.7 V dead band is reduced to 0.7 /Ao volts, where Ao

is the dc gain of the op-amp. A more practical method for
reducing and almost eliminating crossover distortion is found
in the class AB operation.

4.4 Class AB Output Stage

An amplifier may be biased at a dc level above the zero base
current level of class B amplifiers and above one half the
supply voltage level of class a amplifier. This mode of
operation is class AB mode of operation of amplifier, where a
small standby current flows at zero excitation resulting in less
distortion than class B.

Class AB operation still needs a push-pull connection to

achieve a full output cycle but the dc bias level is usually
closer to zero base current level for better power efficiency.
For class AB operation the output signal swing occurs

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between 180º and 360º and is neither class A nor class B
operation.

+VCC

QN
VBB
2

vi v0
V BB
2
RL

QP

–VCC

Fig.4.4 (a) Class AB operation

v0

slope = 1

vi
0

Fig. 4.4(b) Transfer Characteristics of Class AB stage

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 Here a bias voltage VBB is applied between the bases of QN
and QP, giving rise to bias current IQ.
(V /2V )
IN = IP = IQ = ISe BB T

For small Vin, both transistors conducts and crossover

distortion is almost completely eliminated. The value of V BB is
selected to yield the required quiescent current IQ.

Operation
When Vin goes positive by certain amount the base voltage of
QN increases by same amount Vin. This increases IN according
to the corresponding increase in VBEN. However since the
voltage between two base is constant i.e. VBB, the increase in
VBEN will result in an equal decrease in VBEP and hence in IP.
So QP will be conducting a current that decreases as Vo
increases; for V0 the current in QP can be ignored. For
negative input voltage Vin the opposite occurs. So far small Vin
both transistors conduct as Vin increased or decreased one of
the two transistors take over the operation.

Complementary symmetry class AB push-pull amplifier:

+VCC

ICQ1 ICQ2
R1=R2
C1 iB
Q1
+0.5V
R
Vi 0V

–0.5V

Q2
C2
RL

R2 ICQ2

–VCC

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 Fig.4.4(b) Complementary symmetry class AB push-pull
amplifier

– To overcome the distortion, biasing is adjusted.

– This results in class AB amplifier.
– In class AB amplifier the transistor are biased into
conduction even when there is no input signal.
– This is achieved by voltage divides as shown.
– When R1 and R2 are same and Q1 and Q2 are of same type
then the currents in the transistor are same.
– During the positive half cycle, Q1 (npn) will be biased
into conduction whereas Q2 (pnp) is cut-off. So, current
ICQ1 flows from +VCC to ground through load.
– During negative half cycle, Q2 (pnp) will be biased into
conduction whereas Q1 is at cut off. So current ICQ2  ICQ1
from ground to –VCC through load.
– The class AB stages operates in much the same manner
as the class B circuit, with one important exception. For
small Vi, both transistors conducts, and as Vi is increased
or decreased, one of the two transistor takes over the
operation by providing the forward bias of  0.5V to each
diode of transistor. Since the transition is a smooth one,
crossover distortion will be almost totally eliminated.
V0
undistorted
o/p signal
Q1
t
Q2

i/p signal

Fig.4.4(c) Characteristics of class AB amplifier

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  Figure for complementary symmetry class AB
amplifier using Darlington Pair Transistors
+VCC

R1
iB
Q1, 1
D1 1iB Q3,2

D2

Vi D3
1iB
D4 Q4, 2

iB RL
Q2, 1

R2=R1

–VCC

Fig. Complementary symmetry class AB amplifier using

matched npn and pnp Darlington Pair Transistors

Q1, Q3 → npn darlington BJT

Q2, Q4 → pnp darlington BJT

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 +VCC

R1
C1
Q1

Q3

Vi

Q2
C2 RL
Q4
R2=R1

–VCC
Fig. Quassi complementary symmetry class AB amplifier
using matched darlington and complementary darlington
pair BJT.

Q1, Q3 = matched Darlington BJT

Q2, Q4 = complementary Darlington BJT

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4.5 Biasing the Class AB Stage
+VCC

IBias

QN

D1

v0
D2
RL

vi QP

–VCC

Fig.4.5 Class AB operation using diode biasing

Figure shows a class AB circuit in which the bias voltage is

generated by passing a constant current Ibias through a pair of
diodes. Though the crossover distortion is eliminated in this
type of configuration, the characteristics does not pass
through the origin.

4.6 Power BJTs

Power dissipation in transistor & heat sink:

The temperature at the collector junction of a transistor limits
its maximum power attainable because when the power
dissipation in the transistor exceeds the maximum
temperature limit of the junction, it will be damaged. Normal
maximum temperature quoted by manufactures is about
150ºC to 200ºC for silicon devices. Therefore it is necessary to

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 provide some method of removing heat from the transistor.
The usual method is to mount the transistor on a sheet of
metal (copper or aluminum) known as heat sink. The heat
produced at the collector junction of the transistor passes
from its metal face casing into heat sink body and from heat
sink body it radiates in the surrounding atmosphere. Thus,
the junction temperature is always higher than the
surrounding air and the difference of the temperature is
proportional to the power dissipated in the transistor. It may
be expressed mathematically as,
Tj – Tamb = PC × θ. This relation is called Thermal Ohm’s
law.
Where,
Tj is temperature at collector junction
Tamb is temperature of surrounding air
PC is power dissipation
θ is a constant which has unit of thermal resistance
(ºc/w)
Thus, the temperature at junction may be expressed as,
Tj = Tamb + PC x θ

Design of Heat sink:

For a particular power transistor of a power amplifier, the
effective total thermal resistance between collector junction
and surrounding air of room is made up of following
components.
i) The thermal resistance θ1 between collector junction and
transistor body (say 1.2 ºC/W)
ii) The thermal resistance θ2 of the mica washer which is
generally used between the transistor case and heat sink
to isolate the collector terminal electrically from heat sink
yet thermally connected (say 0.5 ºC/W)

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