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    University of California College of Engineering Department of Electrical Engineering and Computer Sciences

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    This document provides information about the EECS 130 Integrated Circuit Devices course offered in Spring 2006 at UC Berkeley. The course covers the physics and design of key semiconductor devices including PN junctions, MOS transistors, and bipolar transistors. It will be taught by Professor Chenming Hu on Tuesdays and Thursdays from 3:30-5:00pm with required weekly discussion sections. Students will complete homework assignments, two midterms, a design project, and a final exam. Textbooks and reference materials are also listed.

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    University of California College of Engineering Department of Electrical Engineering and Computer Sciences

    Uploaded by

    Shashank As
    27 views3 pages
    This document provides information about the EECS 130 Integrated Circuit Devices course offered in Spring 2006 at UC Berkeley. The course covers the physics and design of key semiconductor devices including PN junctions, MOS transistors, and bipolar transistors. It will be taught by Professor Chenming Hu on Tuesdays and Thursdays from 3:30-5:00pm with required weekly discussion sections. Students will complete homework assignments, two midterms, a design project, and a final exam. Textbooks and reference materials are also listed.

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    This document provides information about the EECS 130 Integrated Circuit Devices course offered in Spring 2006 at UC Berkeley. The course covers the physics and design of key semiconductor devices including PN junctions, MOS transistors, and bipolar transistors. It will be taught by Professor Chenming Hu on Tuesdays and Thursdays from 3:30-5:00pm with required weekly discussion sections. Students will complete homework assignments, two midterms, a design project, and a final exam. Textbooks and reference materials are also listed.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    27 views3 pages

    University of California College of Engineering Department of Electrical Engineering and Computer Sciences

    Uploaded by

    Shashank As
    This document provides information about the EECS 130 Integrated Circuit Devices course offered in Spring 2006 at UC Berkeley. The course covers the physics and design of key semiconductor devices including PN junctions, MOS transistors, and bipolar transistors. It will be taught by Professor Chenming Hu on Tuesdays and Thursdays from 3:30-5:00pm with required weekly discussion sections. Students will complete homework assignments, two midterms, a design project, and a final exam. Textbooks and reference materials are also listed.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    of 3

    UNIVERSITY OF CALIFORNIA

    College of Engineering
    Department of Electrical Engineering and Computer Sciences

    Prof. Chenming Hu
    502 Cory Hall, (510) 642-3393, hu @eecs.berkeley.edu

    INTEGRATED CIRCUIT DEVICES


    EECS130 Spring 2006

    T.A.s:
    Anupama Bowonder, bowonder@eecs.berkeley.edu
    TBA

    LECTURES
    Tuesday and Thursday – 3:30 to 5:00pm in 3106 Etcheverry

    DISCUSSIONS
    Section 101 Wednesday 8-9am, 247 Cory
    Section 102 – Thursday 5-6pm, 289 Cory

    Each student must attend one of these sections. T.A.s will review important concepts covered in
    the lectures, lead the discussion of homework, work through sample problems, and present
    supplementary materials.

    OFFICE HOUR
    Professor Hu: Tuesday 5-6pm, 502 Cory Hall (Office Hour)
    Wednesday 5:30-6:30, Hogan Room, 535 Cory Hall (Question/Answer Session)
    Anupama: TBA

    TEXT
    Reader for purchase at Copy Central @ 2483 Hearst Ave. (near Euclid)

    REFERENCES (On reserve at the Engineering Library)


    1. R. S. Muller and T. I. Kamins with Mansun Chan, Device Electronics for Integrated
    Circuits, 3rd Edition; Wiley and Sons, Publisher.
    2. B. L. Anderson and R. L. Anderson, Fundamentals of Semiconductor Devices, McGraw-
    Hill.
    3. R. F. Pierret, G. W. Neudeck, Modular Series on Solid State Devices, Vol. 1, 2, 3, 4, 7.
    (Many students found this series to be very helpful. It is written in clear language.)
    4. R. F. Pierret, Semiconductor Device Fundamentals, Addison Wesley, 1996.
    5. A. S. Grove, Physics and Technology of Semiconductor Devices. (This book also excels
    in clear explanations)
    6. B. G. Streetman and S. Banerjee, Solid State Electronic Devices, Prentice Hall (Best
    selling text in its field, this book is at a lower level of difficulty than the others)

    COURSE OBJECTIVE
    a. To develop a physical understanding of three important devices: the pn junction, the
    MOS transistor, and the bipolar transistor.
    b. To explore the general skills for analyzing and designing semiconductor devices.

    PREREQUISSITES
    EECS 40 or EECS 100: Simple pn-junction and MOSFET theory and MOSFET circuit
    applications. It is assumed that the students know the concept of energy levels in hydrogen atoms.

    RELATION TO OTHER COURSES


    EECS 105 – The first four weeks of EECS 105 presents a preview or a condensed version of
    EECS 130
    EECS 130 is a prerequisite for the following courses:
    EECS131: Semiconductor Electronics (may be taken concurrently)
    EECS231: Solid State Devices
    EECS 130 is also helpful (but not a prerequisite) for IC analysis and design courses such as EECS
    140, 141, and 142, as well as for the microfabrication technology course EECS 143

    CONTENTS:
    A. Review of Semiconductor Properties (2 weeks)
    Bond picture, electrons, holes, band picture, density of states, electron statistics,
    Fermi level, mobility, diffusion, and recombination.
    B. Fabrication Technology (1 week)
    Crystal growth, thermal oxidation, lithography and pattern transfer, dopant addition
    and diffusion, and chemical vapor deposition.
    C. PN Junction (3 weeks)
    Field and potential in step PN junctions, minority and majority currents, junction
    capacitance, device model, SCL generation and recombination current.
    D. MOS Devices (4 weeks)
    MOS diodes, flat-band, enhancement, depletion, inversion, CCS, MOSFET I-V
    characteristics, speed, device model, MOS technology, memory, and CMOS.
    E. Metal-Semiconductor Contact (1 week)
    Energy diagram at interface, I-V characteristics, ohmic contact.
    F. Bipolar Transistor (3 weeks)
    Structure and operation, emitter and base efficiencies, current gain, transit time,
    device model, built-in field, regions of operations, Ebers-Moll model, IC transistors.

    HOMEWORK, EXAM & GRADES


    Homework will be assigned every Thursday and will be due the following Thursday in class.
    Discussion and collaboration, as opposed to copying, of homework is encouraged. In other words,
    you are encouraged to discuss the homework with your classmates but you must write your own
    derivations and do your own calculations, etc. Do not hesitate to ask Prof. Hu and or the T.A.s for
    clarifications and hints for the homework problems during Discussion Session and Office hours.
    We encourage cooperation rather than competition. Percentages are as follows:
    Homework 20%
    Two Midterm Exams 20% (each)
    Design Project 15%
    Final Exam 25%

    EECS Department Policy on Academic Dishonesty:


    http://www.eecs.berkeley.edu/Policies/acad.dis.shtml
    EE 130 Home Page: http://www-inst.eecs.berkeley.edu/~ee130
    EE 130 News Group: ucb.class.ee130

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