For Ghic Only: High-Performance 6-Axis Mems Motiontracking™ Device
For Ghic Only: High-Performance 6-Axis Mems Motiontracking™ Device
For Ghic Only: High-Performance 6-Axis Mems Motiontracking™ Device
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• Includes 1 kB FIFO to reduce traffic on the serial bus
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interface, and reduce power consumption by • 3-Axis gyroscope with programmable FSR of
allowing the system processor to burst read sensor ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps
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data and then go into low-power mode • 3-Axis accelerometer with programmable FSR of
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• EIS FSYNC support ±2g, ±4g, ±8g, and ±16g
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• User-programmable interrupts
MPU-6886 includes on-chip 16-bit ADC’s, programmable
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• Wake-on-motion interrupt for low power operation
digital filters, an embedded temperature sensor, and
of applications processor
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programmable interrupts. The device features an operating
voltage range down to 1.71V. Communication ports include • 1 kB FIFO buffer enables the applications processor
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I C and high speed SPI at 10 MHz.
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• On-Chip 16-bit ADCs and Programmable Filters
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ORDERING INFORMATION •
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Host interface: 10 MHz SPI or 400 kHz I C
• Digital-output temperature sensor
PART TEMP RANGE PACKAGE
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InvenSense Inc.
This document contains information on a pre-production Document Number: DS-000193
1745 Technology Drive, San Jose, CA 95110 U.S.A
product. InvenSense Inc. reserves the right to change Revision: 1.1
+1(408) 988–7339
specifications and information herein without notice.. Release Date: 03/29/2017
www.invensense.com
MPU-6886
TABLE OF CONTENTS
GENERAL DESCRIPTION .................................................................................................................................................. 1
ORDERING INFORMATION .............................................................................................................................................. 1
APPLICATIONS ................................................................................................................................................................ 1
FEATURES ....................................................................................................................................................................... 1
TYPICAL OPERATING CIRCUIT ......................................................................................................................................... 1
1 INTRODUCTION.................................................................................................................................................... 7
1.1 PURPOSE AND SCOPE ............................................................................................................................................... 7
1.2 PRODUCT OVERVIEW ............................................................................................................................................... 7
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1.3 APPLICATIONS ......................................................................................................................................................... 7
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2 FEATURES ............................................................................................................................................................ 8
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2.1 GYROSCOPE FEATURES ............................................................................................................................................. 8
2.2 ACCELEROMETER FEATURES....................................................................................................................................... 8
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2.3 ADDITIONAL FEATURES ............................................................................................................................................. 8
3 ELECTRICAL CHARACTERISTICS ............................................................................................................................. 9
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3.1 GYROSCOPE SPECIFICATIONS...................................................................................................................................... 9
3.2 ACCELEROMETER SPECIFICATIONS ............................................................................................................................. 10
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3.3 ELECTRICAL SPECIFICATIONS..................................................................................................................................... 11
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3.4 I C TIMING CHARACTERIZATION ............................................................................................................................... 14
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3.5 SPI TIMING CHARACTERIZATION ............................................................................................................................... 15
3.6 ABSOLUTE MAXIMUM RATINGS ............................................................................................................................... 16
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4.8 THREE-AXIS MEMS ACCELEROMETER WITH 16-BIT ADCS AND SIGNAL CONDITIONING...................................................... 20
4.9 I2C AND SPI SERIAL COMMUNICATIONS INTERFACES.................................................................................................... 20
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8.3 REGISTER 07 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION
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(TC) REGISTER .................................................................................................................................................................. 33
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8.4 REGISTER 08 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION
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(TC) REGISTER .................................................................................................................................................................. 33
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8.5 REGISTER 10 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION
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(TC) REGISTER .................................................................................................................................................................. 33
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8.6 REGISTER 11 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION
(TC) REGISTER .................................................................................................................................................................. 33
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8.7 REGISTERS 13 TO 15 – ACCELEROMETER SELF-TEST REGISTERS ...................................................................................... 34
8.8 REGISTER 19 – X-GYRO OFFSET ADJUSTMENT REGISTER – HIGH BYTE ............................................................................ 34
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8.9 REGISTER 20 – X-GYRO OFFSET ADJUSTMENT REGISTER – LOW BYTE ............................................................................. 34
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8.10 REGISTER 21 – Y-GYRO OFFSET ADJUSTMENT REGISTER – HIGH BYTE............................................................................. 35
8.11 REGISTER 22 – Y-GYRO OFFSET ADJUSTMENT REGISTER – LOW BYTE ............................................................................. 35
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9.3 SENSOR MODE CHANGE ......................................................................................................................................... 51
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9.4 TEMP SENSOR DURING GYROSCOPE STANDBY MODE ................................................................................................... 51
9.5 GYROSCOPE MODE CHANGE.................................................................................................................................... 51
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9.6 POWER MANAGEMENT 1 REGISTER SETTING .............................................................................................................. 51
9.7 UNLISTED REGISTER LOCATIONS ............................................................................................................................... 51
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9.8 CLOCK TRANSITION WHEN GYROSCOPE IS TURNED OFF ................................................................................................ 51
9.9 SLEEP MODE ........................................................................................................................................................ 52
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9.10 NO SPECIAL OPERATION NEEDED FOR FIFO READ IN LOW POWER MODE ........................................................................ 52
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9.11 GYROSCOPE STANDBY PROCEDURE ........................................................................................................................... 52
10 ASSEMBLY ...................................................................................................................................................... 53
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10.1 ORIENTATION OF AXES ........................................................................................................................................... 53
10.2 PACKAGE DIMENSIONS ........................................................................................................................................... 54
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Figure 11. Typical SPI Master/Slave Configuration ..........................................................................................28
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Figure 12. Orientation of Axes of Sensitivity and Polarity of Rotation ..............................................................53
Figure 13. Package Diagram ............................................................................................................................54
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Figure 14. Part Number Package Marking .......................................................................................................55
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Table 11. Standard Power Modes for MPU-6886.............................................................................................23
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Table 12. Table of Interrupt Sources ................................................................................................................24
Table 13. Serial Interface..................................................................................................................................25
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Table 14. I C Terms ..........................................................................................................................................27
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Table 15. MPU-6886 Register Map ..................................................................................................................31
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Table 16. Configuration ....................................................................................................................................36
Table 17. Accelerometer Data Rates and Bandwidths (Low-Noise Mode) ......................................................38
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Table 18. Approximate Accelerometer Filter Bandwidths (Low-Power Mode) .................................................38
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Table 19. Example Gyroscope Configurations (Low-Power Mode) .................................................................39
Table 20. Package Dimensions ........................................................................................................................54
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Table 21. Part Number Package Marking ........................................................................................................55
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a low-power mode. MPU-6886, with its 6-axis integration, enables manufacturers to eliminate the costly and complex
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selection, qualification, and system level integration of discrete devices, guaranteeing optimal motion performance for
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consumers.
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The gyroscope has a programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps. The
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accelerometer has a user-programmable accelerometer full-scale range of ±2g, ±4g, ±8g, and ±16g. Factory-calibrated
initial sensitivity of both sensors reduces production-line calibration requirements.
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Other industry-leading features include on-chip 16-bit ADCs, programmable digital filters, an embedded temperature
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sensor, and programmable interrupts. The device features I C and SPI serial interfaces, a VDD operating range of 1.71V
to 3.45V, and a separate digital IO supply, VDDIO from 1.71V to 3.45V.
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Communication with all registers of the device is performed using either I C at 400 kHz or SPI at 10M Hz.
By leveraging its patented and volume-proven CMOS-MEMS fabrication platform, which integrates MEMS wafers with
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companion CMOS electronics through wafer-level bonding, InvenSense has driven the package size down to a
footprint and thickness of 3 mm x 3 mm x 0.75 mm (24-pin LGA), to provide a very small yet high performance low
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cost package. The device provides high robustness by supporting 20,000g shock reliability.
1.3 APPLICATIONS
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• Drones
• Wearable Sensors
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2.2 ACCELEROMETER FEATURES
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The triple-axis MEMS accelerometer in MPU-6886 includes a wide range of features:
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• Digital-output X-, Y-, and Z-axis accelerometer with a programmable full scale range of ±2g, ±4g, ±8g and
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±16g and integrated 16-bit ADCs
• User-programmable interrupts
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• Wake-on-motion interrupt for low power operation of applications processor
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• Self-test
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Gyroscope ADC Word Length 16 bits 3
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Sensitivity Scale Factor FS_SEL=0 131 LSB/(dps) 3
FS_SEL=1 65.5 LSB/(dps) 3
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FS_SEL=2 32.8 LSB/(dps) 3
FS_SEL=3 16.4 LSB/(dps) 3
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Sensitivity Scale Factor Initial Tolerance 25°C -1 +1 % 1
Sensitivity Scale Factor Variation Over -40°C to +85°C -2.5 +2.5 % 1
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Temperature
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Nonlinearity Best fit straight line; 25°C -0.2 ±0.1 +0.2 % 1
Cross-Axis Sensitivity -4.5 ±1 +4.5 % 1
ZERO-RATE OUTPUT (ZRO)
Initial ZRO Tolerance
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ZRO Variation vs. Temperature -40°C to +85°C -0.05 ±0.01 +0,05 dps/ºC 1
OTHER PARAMETERS
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Gyroscope Start-Up Time Time from gyro enable to gyro drive ready 35 100 ms 1
Low-Noise mode 3.91 8000 Hz 3
Output Data Rate
Low Power Mode 3.91 333.33 Hz 3
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NOTES:
1. Derived from validation or characterization of parts, not guaranteed in production.
2. Tested in production.
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3. Guaranteed by design.
4. Noise specifications shown are for low-noise mode.
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AFS_SEL=1 8,192 LSB/g 2
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AFS_SEL=2 4,096 LSB/g 2
AFS_SEL=3 2,048 LSB/g 2
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Sensitivity Scale Factor Initial Component-level
-1 +1 % 1
Tolerance
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Sensitivity Change vs. Temperature -40°C to +85°C -2 +2 % 1
Nonlinearity Best Fit Straight Line -1 ±0.3 +1 % 1
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Cross-Axis Sensitivity -4.5 ±1 +4.5 % 1
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ZERO-G OUTPUT
Component-level, all axes -65 ±25 +65 mg 1
Initial Tolerance
Board-level, all axes -100 ±40 +100 mg 1
io fi X and Y axes -0.75 ±0.5 +0.75 mg/ºC 1
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Zero-G Level Change vs. Temperature -40°C to +85°C
Z axis -1.2 ±1 +1.2 mg/ºC 1
OTHER PARAMETERS
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3-Axis Accelerometer 321 370 µA 1
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3-Axis Gyroscope 2.55 2.8 mA 1
Accelerometer Low -Power Mode
100Hz ODR, 1x averaging µA 1
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(Gyroscope disabled) 40 45
Gyroscope Low-Power Mode 100Hz ODR, 1x averaging
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1.08 1.2 mA 1
(Accelerometer disabled)
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6-Axis Low-Power Mode
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(Gyroscope Low-Power Mode; 100Hz ODR, 1x averaging 1.33 1.45 mA 1
Accelerometer Low-Noise Mode)
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Full-Chip Sleep Mode At 25ºC 6 10 µA 1
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Specified Temperature Range Performance parameters are not applicable
-40 +85 °C 1
beyond Specified Temperature Range
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25°C Output 0 LSB 3
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ADC Resolution 16 bits 2
Without Filter 8000 Hz 2
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ODR
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With Filter 3.91 1000 Hz 2
Room Temperature Offset 25°C -15 15 °C 3
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Stabilization Time 14000 µs 2
Sensitivity Untrimmed 326.8 LSB/°C 1
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Sensitivity Error -2.5 +2.5 % 1
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2
I C ADDRESS
2 SA0 = 0 1101000
I C ADDRESS
SA0 = 1 1101001
io fi DIGITAL INPUTS (FSYNC, SA0, SPC, SDI, CS)
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V IH , High Level Input Voltage 0.7*VDDIO V
V IL , Low Level Input Voltage 0.3*VDDI V
1
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C I , Input Capacitance < 10 pF
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Voltage Current
Output Leakage Current OPEN=1 100 nA
t INT , INT Pulse Width LATCH_INT_EN=0 50 µs
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I C I/O (SCL, SDA)
V IL , LOW Level Input Voltage -0.5V 0.3*VDDI V
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V IH , HIGH-Level Input Voltage 0.7*VDDIO VDDIO + V
0.5V
0.1*VDDI
V hys , Hysteresis V
O
1
V OL , LOW-Level Output Voltage 3 mA sink current 0 0.4 V
I OL , LOW-Level Output Current V OL =0.4V 3 mA
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V OL =0.6V 6 mA
Output Leakage Current 100 nA
t of , Output Fall Time from V IHmax
C b bus capacitance in pf 20+0.1C b 300 ns
to V ILmax
INTERNAL CLOCK SOURCE
FCHOICE_B=1,2,3; SMPLRT_DIV=0 32 kHz 2
FCHOICE_B=0;
Sample Rate
DLPFCFG=0 or 7 8 kHz 2
SMPLRT_DIV=0
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NOTES:
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1. Derived from validation or characterization of parts, not guaranteed in production.
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2. Guaranteed by design.
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3. Production tested.
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Other Electrical Specifications
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Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, T A =25°C, unless otherwise noted.
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PARAMETER CONDITIONS MIN TYP MAX UNITS NOTES
SERIAL INTERFACE
3. Minimum SPI/I2C clock rate is dependent on ODR. If ODR is below 4 kHz, minimum clock rate is 100 kHz. If ODR is greater than 4 kHz,
minimum clock rate is 200 kHz.
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t SU.DAT , SDA Data Setup Time 100 ns 1
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t r , SDA and SCL Rise Time C b bus cap. from 10 to 400 pF 20+0.1C b 300 ns 1
t f , SDA and SCL Fall Time C b bus cap. from 10 to 400 pF 20+0.1C b 300 ns 1
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t SU.STO , STOP Condition Setup Time 0.6 µs 1
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t BUF , Bus Free Time Between STOP and START 1.3 µs 1
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Condition
C b , Capacitive Load for each Bus Line < 400 pF 1
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t VD.DAT , Data Valid Time 0.9 µs 1
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t VD.ACK , Data Valid Acknowledge Time 0.9 µs 1
2
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NOTE:
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1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets
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tf tSU.DAT
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tr
SDA 70% 70%
30% 30%
continued below at A
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tf
tr tVD.DAT
SCL 70% 70%
tHD.DAT
30% 30%
tHD.STA 9th clock cycle
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1/fSCL tLOW
S 1st clock cycle tHIGH
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tBUF
SDA 70%
A 30%
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Figure 1. I C Bus Timing Diagram
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t SU.SDI , SDI Setup Time 3 ns 1
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t HD.SDI , SDI Hold Time 7 ns 1
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t VD.SDO , SDO Valid Time C load = 20 pF 40 ns 1
t DIS.SDO , SDO Output Disable Time 20 ns 1
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Table 7. SPI Timing Characteristics (10 MHz Operation)
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Notes:
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1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets
CS
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70%
30%
tHD;CS
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SDI 70%
MSB IN LSB IN
30%
tVD;SDO tDIS;SDO
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SDO 70%
MSB OUT LSB OUT
30%
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Operating Temperature Range -40°C to +85°C
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Storage Temperature Range -40°C to +125°C
2kV (HBM);
Electrostatic Discharge (ESD) Protection
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250V (MM)
JEDEC Class II (2),125°C
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Latch-up
±100mA
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Table 8. Absolute Maximum Ratings
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8 VDDIO
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12 INT1/DRDY/TP2
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22 nCS
20 RESV (VPP)
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10 REGOUT
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13 VDD
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18 GND
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Table 9. Signal Descriptions
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NOTE: Power up with SCL/SPC and CS pins held low is not a supported use case. In case this power up approach is used, software reset is required
using the PWR_MGMT_1 register, prior to initialization.
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SCL/SCLK
SDA/SDI
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nCS
NC
NC
NC
24 23 22 21 20 19
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+Z
NC 1 18 GND
+Y
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+Z
NC 2 17 NC
NC 3 16 NC +Y
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MP
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MPU-6886 68
86
NC 4 15 NC
NC 5 14 NC
+X +X
NC 6 13 VDD
7 8 9 10 11 12
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NC
VDDIO
AD0/SDO
REGOUT
FSYNC
INT
Figure 3. Pin out Diagram for MPU-6886 3.0 mm x 3.0 mm x 0.75 mm LGA
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I C lines are open drain and pullup resistors (e.g. 10kΩ) are required.
MPU-6886
INT
Self
X Accel ADC
test Interrupt
Status
Register
CS
Self Y Accel ADC Slave I2C and SA0 / SDO
test
SPI Serial
FIFO
Interface SCL / SPC
SDA / SDI
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Self
Z Accel ADC
test User & Config
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Signal Conditioning
Registers
FSYNC
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Self
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X Gyro ADC
test Sensor
Registers
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Self
Y Gyro ADC
test
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Self
Z Gyro ADC
test
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Temp Sensor ADC
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4.6 OVERVIEW
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• Three-axis MEMS accelerometer sensor with 16-bit ADCs and signal conditioning
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• I C and SPI serial communications interface
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• Self-Test
• Clocking
• Sensor Data Registers
• FIFO
• Interrupts
• Digital-Output Temperature Sensor
• Bias and LDOs
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• Charge Pump
• Standard Power Modes
4.8 THREE-AXIS MEMS ACCELEROMETER WITH 16-BIT ADCS AND SIGNAL CONDITIONING
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The MPU-6886’s 3-Axis accelerometer uses separate proof masses for each axis. Acceleration along a particular axis
induces displacement on the corresponding proof mass, and capacitive sensors detect the displacement differentially.
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The MPU-6886’s architecture reduces the accelerometers’ susceptibility to fabrication variations as well as to thermal
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drift. When the device is placed on a flat surface, it will measure 0g on the X- and Y-axes and +1g on the Z-axis. The
accelerometers’ scale factor is calibrated at the factory and is nominally independent of supply voltage. Each sensor
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has a dedicated sigma-delta ADC for providing digital outputs. The full scale range of the digital output can be adjusted
to ±2g, ±4g, ±8g, or ±16g.
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4.9 I2C AND SPI SERIAL COMMUNICATIONS INTERFACES
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The MPU-6886 communicates to a system processor using either a SPI or an I C serial interface. The MPU-6886 always
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acts as a slave when communicating to the system processor. The LSB of the I C slave address is set by pin 9 (SA0).
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MPU-6886 Solution Using I2C Interface
2
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Interrupt
I2C Processor Bus: for reading all
Status INT
sensor data from MPU
Register
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MPU-6886 SA0
VDDIO or GND
Slave I2C
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Sensor
Register
Factory
Calibration
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Figure 6. MPU-6886 Solution Using I C Interface
CS nCS
MPU-6886 SDO SDI
System
Slave SPI
SPC SPC Processor
Serial
Interface
SDI SDO
FIFO
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Config
Register
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Sensor
Register
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Factory
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Calibration
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VDD GND REGOUT
4.10 SELF-TEST
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Self-test allows for the testing of the mechanical and electrical portions of the sensors. The self-test for each
measurement axis can be activated by means of the gyroscope and accelerometer self-test registers (registers 27 and
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28).
When the self-test is activated, the electronics cause the sensors to be actuated and produce an output signal. The
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SELF-TEST RESPONSE = SENSOR OUTPUT WITH SELF-TEST ENABLED – SENSOR OUTPUT WITH SELF-TEST DISABLED
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The self-test response for each gyroscope axis is defined in the gyroscope specification table, while that for each
accelerometer axis is defined in the accelerometer specification table.
When the value of the self-test response is within the specified min/max limits of the product specification, the part
has passed self-test. When the self-test response exceeds the min/max values, the part is deemed to have failed self-
test.
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4.12 SENSOR DATA REGISTERS
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The sensor data registers contain the latest gyroscope, accelerometer, and temperature measurement data. They are
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read-only registers, and are accessed via the serial interface. Data from these registers may be read anytime.
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4.13 FIFO
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The MPU-6886 contains a 1 kB FIFO register that is accessible via the Serial Interface. The FIFO configuration register
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determines which data is written into the FIFO. Possible choices include gyro data, accelerometer data, temperature
readings, and FSYNC input. A FIFO counter keeps track of how many bytes of valid data are contained in the FIFO. The
FIFO register supports burst reads. The interrupt function may be used to determine when new data is available.
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The MPU-6886 allows FIFO read in low-power accelerometer mode.
4.14 INTERRUPTS
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Interrupt functionality is configured via the Interrupt Configuration register. Items that are configurable include the
INT and DRDY pins configuration, the interrupt latching and clearing method, and triggers for the interrupt. Items that
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can trigger an interrupt are (1) Clock generator locked to new reference oscillator (used when switching clock
sources); (2) new data is available to be read (from the FIFO and Data registers); (3) accelerometer event interrupts;
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(4) FIFO overflow. The interrupt status can be read from the Interrupt Status register.
An on-chip temperature sensor and ADC are used to measure the MPU-6886 die temperature. The readings from the
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ADC can be read from the FIFO or the Sensor Data registers.
The bias and LDO section generates the internal supply and the reference voltages and currents required by the MPU-
6886. Its two inputs are an unregulated VDD and a VDDIO logic reference supply voltage. The LDO output is bypassed
by a capacitor at REGOUT. For further details on the capacitor, please refer to the Bill of Materials for External
Components.
An on-chip charge pump generates the high voltage required for the MEMS oscillator.
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8 6-Axis Low-Power Mode Duty-Cycled On
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Table 11. Standard Power Modes for MPU-6886
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NOTES:
1. Power consumption for individual modes can be found in D.C. Electrical Characteristics.
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of this document. Some interrupt sources are explained below.
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5.1 WAKE-ON-MOTION INTERRUPT
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The MPU-6886 provides motion detection capability. A qualifying motion sample is one where the high passed sample
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from any axis has an absolute value exceeding a user-programmable threshold. The following steps explain how to
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configure the Wake-on-Motion Interrupt.
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Step 1: Ensure that Accelerometer is running
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• In PWR_MGMT_1 register (0x6B) set CYCLE = 0, SLEEP = 0, and GYRO_STANDBY = 0
• In PWR_MGMT_2 register (0x6C) set STBY_XA = STBY_YA = STBY_ZA = 0, and STBY_XG = STBY_YG = STBY_ZG
=1
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Step 2: Set Accelerometer LPF bandwidth to 218.1 Hz
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• In ACCEL_INTEL_CTRL register (0x69) set ACCEL_INTEL_EN = ACCEL_INTEL_MODE = 1; Ensure that bit 0 is set
to 0
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Table 13. Serial Interface
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6.2 I C INTERFACE
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I C is a two-wire interface comprised of the signals serial data (SDA) and serial clock (SCL). In general, the lines are
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open-drain and bi-directional. In a generalized I C interface implementation, attached devices can be a master or a
slave. The master device puts the slave address on the bus, and the slave device with the matching address
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acknowledges the master.
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The MPU-6886 always operates as a slave device when communicating to the system processor, which thus acts as the
master. SDA and SCL lines typically need pull-up resistors to VDD. The maximum bus speed is 400 kHz.
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The slave address of the MPU-6886 is b110100X which is 7 bits long. The LSB bit of the 7-bit address is determined by
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2
the logic level on pin SA0. This allows two MPU-6886s to be connected to the same I C bus. When used in this
configuration, the address of one of the devices should be b1101000 (pin SA0 is logic low) and the address of the
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Communication on the I C bus starts when the master puts the START condition (S) on the bus, which is defined as a
HIGH-to-LOW transition of the SDA line while SCL line is HIGH (see figure below). The bus is considered to be busy until
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the master puts a STOP condition (P) on the bus, which is defined as a LOW to HIGH transition on the SDA line while
SCL is HIGH (see figure below).
nc ve
Additionally, the bus remains busy if a repeated START (Sr) is generated instead of a STOP condition.
va In
SDA
SCL
Ad
S P
y
DATA OUTPUT BY
TRANSMITTER (SDA)
nl
H l-
O
not acknowledge
DATA OUTPUT BY
r G tia
RECEIVER (SDA)
IC
acknowledge
fo n
n de
SCL FROM
1 2 8 9
MASTER
io fi START
clock pulse for
at on
acknowledgement
condition
2
Figure 9. Acknowledge on the I C Bus
rm C
Communications
fo se
After beginning communications with the START condition (S), the master sends a 7-bit slave address followed by an
th
8 bit, the read/write bit. The read/write bit indicates whether the master is receiving data from or is writing to the
In en
slave device. Then, the master releases the SDA line and waits for the acknowledge signal (ACK) from the slave device.
Each byte transferred must be followed by an acknowledge bit. To acknowledge, the slave device pulls the SDA line
LOW and keeps it LOW for the high period of the SCL line. Data transmission is always terminated by the master with
ed nS
a STOP condition (P), thus freeing the communications line. However, the master can generate a repeated START
condition (Sr), and address another slave without first generating a STOP condition (P). A LOW to HIGH transition on
nc ve
the SDA line while SCL is HIGH defines the stop condition. All SDA changes should take place when SCL is low, with the
exception of start and stop conditions.
va In
SDA
Ad
S P
y
Master S AD+W RA DATA P
nl
Slave ACK ACK ACK
H l-
O
Burst Write Sequence
r G tia
IC
Master S AD+W RA DATA DATA P
fo n
Slave ACK ACK ACK ACK
2
n de
To read the internal MPU-6886 registers, the master sends a start condition, followed by the I C address and a write
bit, and then the register address that is going to be read. Upon receiving the ACK signal from the MPU-6886, the
master transmits a start signal followed by the slave address and read bit. As a result, the MPU-6886 sends an ACK
io fi
signal and the data. The communication ends with a not acknowledge (NACK) signal and a stop bit from master. The
at on
th
NACK condition is defined such that the SDA line remains high at the 9 clock cycle. The following figures show single
and two-byte read sequences.
rm C
SIGNAL DESCRIPTION
S Start Condition: SDA goes from high to low while SCL is high
2
AD Slave I C address
W Write bit (0)
R Read bit (1)
Ad
th
ACK Acknowledge: SDA line is low while the SCL line is high at the 9 clock cycle
th
NACK Not-Acknowledge: SDA line stays high at the 9 clock cycle
RA MPU-6886 internal register address
DATA Transmit or received data
P Stop condition: SDA going from low to high while SCL is high
2
Table 14. I C Terms
y
SPI Operational Features
nl
1. Data is delivered MSB first and LSB last
H l-
O
2. Data is latched on the rising edge of SPC
3. Data should be transitioned on the falling edge of SPC
r G tia
4. The maximum frequency of SPC is 10MHz
IC
5. SPI read and write operations are completed in 16 or more clock cycles (two or more bytes). The first byte
fo n
contains the SPI Address, and the following byte(s) contain(s) the SPI data. The first bit of the first byte
n de
contains the Read/Write bit and indicates the Read (1) or Write (0) operation. The following 7 bits contain the
Register Address. In cases of multiple-byte Read/Writes, data is two or more bytes:
io fi SPI Address format
at on
MSB LSB
R/W A6 A5 A4 A3 A2 A1 A0
rm C
MSB LSB
D7 D6 D5 D4 D3 D2 D1 D0
In en
SPC
SDI
SPI Master SPI Slave 1
nc ve
SDO
CS1 CS
CS2
va In
SPC
SDI
SDO
SPI Slave 2
CS
Ad
READ/
04 04 XG_OFFS_TC_H XG_OFFS_LP[5:0] XG_OFFS_TC_H [9:8]
WRITE
READ/
05 05 XG_OFFS_TC_L XG_OFFS_TC_L [7:0]
WRITE
READ/
07 07 YG_OFFS_TC_H YG_OFFS_LP[5:0] YG_OFFS_TC_H [9:8]
WRITE
y
nl
READ/
08 08 YG_OFFS_TC_L YG_OFFS_TC_L [7:0]
WRITE
H l-
O
READ/
0A 10 ZG_OFFS_TC_H ZG_OFFS_LP[5:0] ZG_OFFS_TC_H [9:8]
WRITE
r G tia
READ/
IC
0B 11 ZG_OFFS_TC_L ZG_OFFS_TC_L [7:0]
WRITE
READ/
fo n
0D 13 SELF_TEST_X_ACCEL XA_ST_DATA[7:0]
WRITE
n de
READ/
0E 14 SELF_TEST_Y_ACCEL YA_ST_DATA[7:0]
WRITE
READ/
0F 15 SELF_TEST_Z_ACCEL ZA_ST_DATA[7:0]
io fi
WRITE
at on
READ/
13 19 XG_OFFS_USRH X_OFFS_USR [15:8]
WRITE
READ/
14 20 XG_OFFS_USRL X_OFFS_USR [7:0]
rm C
WRITE
READ/
15 21 YG_OFFS_USRH Y_OFFS_USR [15:8]
WRITE
fo se
READ/
16 22 YG_OFFS_USRL Y_OFFS_USR [7:0]
WRITE
READ/
In en
READ/
18 24 ZG_OFFS_USRL Z_OFFS_USR [7:0]
WRITE
ed nS
READ/
19 25 SMPLRT_DIV SMPLRT_DIV[7:0]
WRITE
READ/ FIFO_
nc ve
READ/
1B 27 GYRO_CONFIG XG_ST YG_ST ZG_ST FS_SEL [1:0] - FCHOICE_B[1:0]
WRITE
va In
READ/
1C 28 ACCEL_CONFIG XA_ST YA_ST ZA_ST ACCEL_FS_SEL[1:0] -
WRITE
READ/ ACCEL_FCH
1D 29 ACCEL_CONFIG 2 - DEC2_CFG A_DLPF_CFG
WRITE OICE_B
READ/ GYRO_CYC
1E 30 LP_MODE_CFG G_AVGCFG[2:0] -
WRITE LE
READ/
20 32 ACCEL_WOM_X_THR WOM_X_TH[7:0]
WRITE
Ad
READ/
21 33 ACCEL_WOM_Y_THR WOM_Y_TH[7:0]
WRITE
READ/
22 34 ACCEL_WOM_Z_THR WOM_Z_TH[7:0]
WRITE
READ/ ACCEL_FIF
23 35 FIFO_EN - GYRO_FIFO_EN -
WRITE O_EN
READ to
36 54 FSYNC_INT FSYNC_INT -
CLEAR
FSYNC
READ/ LATCH INT_RD FSYNC_INT
37 55 INT_PIN_CFG INT_LEVEL INT_OPEN _INT_MODE -
WRITE _INT_EN _CLEAR _LEVEL
_EN
FIFO
READ/ WOM_X_I WOM_Y_INT WOM_Z_INT GDRIVE_INT DATA_RDY_IN
38 56 INT_ENABLE _OFLOW - -
WRITE NT_EN _EN _EN _EN T_EN
_EN
READ to FIFO_WM_IN
39 57 FIFO_WM_INT_STATUS - -
CLEAR T
FIFO
READ to WOM_X_I DATA
3A 58 INT_STATUS WOM_Y_INT WOM_Z_INT _OFLOW - GDRIVE_INT -
CLEAR NT _RDY_INT
_INT
y
3C 60 ACCEL_XOUT_L READ ACCEL_XOUT[7:0]
nl
3D 61 ACCEL_YOUT_H READ ACCEL_YOUT[15:8]
H l-
O
3F 63 ACCEL_ZOUT_H READ ACCEL_ZOUT[15:8]
r G tia
IC
41 65 TEMP_OUT_H READ TEMP_OUT[15:8]
fo n
43 67 GYRO_XOUT_H READ GYRO_XOUT[15:8]
n de
44 68 GYRO_XOUT_L READ GYRO_XOUT[7:0]
46 70 GYRO_YOUT_L
io fi
READ GYRO_YOUT[7:0]
at on
47 71 GYRO_ZOUT_H READ GYRO_ZOUT[15:8]
READ/
rm C
50 80 SELF_TEST_X_GYRO XG_ST_DATA[7:0]
WRITE
READ/
51 81 SELF_TEST_Y_GYRO YG_ST_DATA[7:0]
WRITE
fo se
READ/
52 82 SELF_TEST_Z_GYRO ZG_ST_DATA[7:0]
WRITE
In en
READ/
53 83 E_ID0 ENGINEERING_ID0[7:0]
WRITE
READ/
54 84 E_ID1 ENGINEERING_ID1[7:0]
ed nS
WRITE
READ/
55 85 E_ID2 ENGINEERING_ID2[7:0]
WRITE
nc ve
READ/
56 86 E_ID3 ENGINEERING_ID3[7:0]
WRITE
READ/
57 87 E_ID4 ENGINEERING_ID4[7:0]
va In
WRITE
READ/
58 88 E_ID5 ENGINEERING_ID5[7:0]
WRITE
READ/
59 89 E_ID6 ENGINEERING_ID6[7:0]
WRITE
READ/
60 96 FIFO_WM_TH1 - FIFO_WM_TH[9:8]
WRITE
READ/
61 97 FIFO_WM_TH2 FIFO_WM_TH[7:0]
WRITE
Ad
READ/
6C 108 PWR_MGMT_2 - STBY_XA STBY_YA STBY_ZA STBY_XG STBY_YG STBY_ZG
WRITE
READ/
70 112 I2C_IF - I2C_IF_DIS -
WRITE
READ/
74 116 FIFO_R_W FIFO_DATA[7:0]
WRITE
READ/
77 119 XA_OFFSET_H XA_OFFS [14:7]
WRITE
READ/
78 120 XA_OFFSET_L XA_OFFS [6:0] -
WRITE
y
READ/
7A 122 YA_OFFSET_H YA_OFFS [14:7]
nl
WRITE
READ/
7B 123 YA_OFFSET_L YA_OFFS [6:0] -
H l-
WRITE
O
READ/
7D 125 ZA_OFFSET_H ZA_OFFS [14:7]
WRITE
r G tia
IC
READ/
7E 126 ZA_OFFSET_L ZA_OFFS [6:0] -
WRITE
fo n
Table 15. MPU-6886 Register Map
n de
NOTE: Register Names ending in _H and _L contain the high and low bytes, respectively, of an internal register value.
The reset value is 0x00 for all registers other than the registers below, also the self-test registers contain pre-
io fi
programmed values and will not be 0x00 after reset.
at on
• Register 26 (0x80) CONFIG
rm C
8.1 REGISTER 04 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE
OFFSET TEMPERATURE COMPENSATION (TC) REGISTER
Register Name: XG_OFFS_TC_H
Register Type: READ/WRITE
Register Address: 04 (Decimal); 04 (Hex)
y
nl
BIT NAME FUNCTION
Stores the offset shift in the gyroscope output from low noise mode to low
H l-
O
[7:2] XG_OFFS_LP[5:0] power mode to be implemented as a correction in the customer software. 2’s
complement digital code, 0.125 dps/LSB from 3.875 dps to -4 dps.
r G tia
IC
[1:0] XG_OFFS_TC_H[9:8] Bits 9 and 8 of the 10-bit offset of X gyroscope (2’s complement)
8.2 REGISTER 05 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE
fo n
OFFSET TEMPERATURE COMPENSATION (TC) REGISTER
n de
Register Name: XG_OFFS_TC_L io fi
Register Type: READ/WRITE
at on
Register Address: 05 (Decimal); 05 (Hex)
BIT NAME FUNCTION
rm C
Description:
The temperature compensation (TC) registers are used to reduce gyro offset variation due to temperature change.
In en
The TC feature is always enabled. However the compensation only happens when a TC coefficient is programed
during factory trim which gets loaded into these registers at power up or after a DEVICE_RESET. If these registers
ed nS
contain a value of zero, temperature compensation has no effect on the offset of the chip. The TC registers have a
10-bit magnitude and sign adjustment in all full scale modes with a resolution of 2.52 mdps/C steps.
nc ve
If these registers contain a non-zero value after power up, the user may write zeros to them to see the offset values
without TC with temperature variation. Note that doing so may result in offset values that exceed data sheet “Initial
ZRO Tolerance” in other than normal ambient temperature (~25 °C). The TC coefficients maybe restored by the user
va In
y
nl
8.4 REGISTER 08 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE
OFFSET TEMPERATURE COMPENSATION (TC) REGISTER
H l-
O
Register Name: YG_OFFS_TC_L
r G tia
IC
Register Type: READ/WRITE
Register Address: 08 (Decimal); 08 (Hex)
fo n
n de
BIT NAME FUNCTION
[7:0] YG_OFFS_TC_L[7:0]] Bits 7 to 0 of the 10-bit offset of Y gyroscope (2’s complement).
io fi
8.5 REGISTER 10 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE
at on
OFFSET TEMPERATURE COMPENSATION (TC) REGISTER
Register Name: ZG_OFFS_TC_H
rm C
Stores the offset shift in the gyroscope output from low noise mode to low
[7:2] ZG_OFFS_LP[5:0] power mode to be implemented as a correction in the customer software. 2’s
complement digital code, 0.125 dps/LSB from 3.875 dps to -4 dps.
ed nS
[1:0] ZG_OFFS_TC_H[9:8] Bits 9 and 8 of the 10-bit offset of Z gyroscope (2’s complement).
8.6 REGISTER 11 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE
nc ve
y
generated during manufacturing tests. This value is to be used
SELF_TEST_Y_ACCEL [7:0] YA_ST_DATA[7:0]
nl
to check against subsequent self-test outputs performed by the
end user.
H l-
O
The value in this register indicates the self-test output
generated during manufacturing tests. This value is to be used
r G tia
SELF_TEST_Z_ACCEL [7:0] ZA_ST_DATA[7:0]
to check against subsequent self-test outputs performed by the
IC
end user.
fo n
The equation to convert self-test codes in OTP to factory self-test measurement is:
n de
ST _ OTP = ( 2620 / 2 FS ) * 1.01( ST _ code−1) (lsb)
io fi
where ST_OTP is the value that is stored in OTP of the device, FS is the Full Scale value, and ST_code is based on the
at on
Self-Test value (ST_ FAC) determined in InvenSense’s factory final test and calculated based on the following equation:
log(1.01)
fo se
y
Register Name: YG_OFFS_USRL
nl
Register Type: READ/WRITE
H l-
O
Register Address: 22 (Decimal); 16 (Hex)
r G tia
BIT NAME FUNCTION
IC
Bits 7 to 0 of the 16-bit offset of Y gyroscope (2’s complement). This register is
[7:0] Y_OFFS_USR[7:0] used to remove DC bias from the sensor output. The value in this register is
fo n
added to the gyroscope sensor value before going into the sensor register.
n de
8.12 REGISTER 23 – Z-GYRO OFFSET ADJUSTMENT REGISTER – HIGH BYTE
io fi
Register Name: ZG_OFFS_USRH
at on
Register Type: READ/WRITE
Register Address: 23 (Decimal); 17 (Hex)
rm C
[7:0] Z_OFFS_USR[15:8] used to remove DC bias from the sensor output. The value in this register is
added to the gyroscope sensor value before going into the sensor register.
In en
y
EXT_SYNC_SET FSYNC BIT LOCATION
nl
0 function disabled
1 TEMP_OUT_L[0]
H l-
O
2 GYRO_XOUT_L[0]
3 GYRO_YOUT_L[0]
r G tia
4 GYRO_ZOUT_L[0]
IC
5 ACCEL_XOUT_L[0]
6 ACCEL_YOUT_L[0]
fo n
7 ACCEL_ZOUT_L[0]
n de
FSYNC will be latched to capture short strobes. This will be done such that if FSYNC toggles,
the latched value toggles, but won’t toggle again until the new latched value is captured by
the sample rate strobe.
[2:0] DLPF_CFG[2:0]
io fi For the DLPF to be used, FCHOICE_B[1:0] is 2’b00.
at on
See Table 16.
The DLPF is configured by DLPF_CFG, when FCHOICE_B [1:0] = 2b’00. The gyroscope and temperature sensor are
rm C
filtered according to the value of DLPF_CFG and FCHOICE_B as shown in the table below.
fo se
TEMPERATURE
FCHOICE_B GYROSCOPE
SENSOR
DLPF_CFG
In en
0 0 3 41 59.0 1 42
0 0 4 20 30.5 1 20
0 0 5 10 15.6 1 10
0 0 6 5 8.0 1 5
0 0 7 3281 3451.0 8 4000
y
[4:3] FS_SEL[1:0] 01= ±500 dps.
nl
10 = ±1000 dps.
11 = ±2000 dps.
H l-
O
[2] - Reserved.
[1:0] FCHOICE_B[1:0] Used to bypass DLPF as shown in Table 16.
r G tia
IC
8.17 REGISTER 28 – ACCELEROMETER CONFIGURATION
fo n
Register Name: ACCEL_CONFIG
n de
Register Type: READ/WRITE
Register Address: 28 (Decimal); 1C (Hex)
io fi
BIT NAME FUNCTION
at on
[7] XA_ST X Accel self-test.
[6] YA_ST Y Accel self-test.
rm C
ACCELEROMETER
ACCEL_FCHOICE_B A_DLPF_CFG 3-DB BW NOISE BW RATE
(HZ) (HZ) (KHZ)
1 X 1046.0 1100.0 4
0 0 218.1 235.0 1
0 1 218.1 235.0 1
0 2 99.0 121.3 1
The data output rate of the DLPF filter block can be further reduced by a factor of 1/(1+SMPLRT_DIV), where
y
SMPLRT_DIV is an 8-bit integer. Following is a small subset of ODRs that are configurable for the accelerometer in the
nl
low-noise mode in this manner (Hz):
H l-
O
3.91, 7.81, 15.63, 31.25, 62.50, 125, 250, 500, 1K
r G tia
The following table lists the approximate accelerometer filter bandwidths available in the low-power mode of
IC
operation for some example ODRs.
fo n
In the low-power mode of operation, the accelerometer is duty-cycled. Table 18 shows some example configurations
n de
for accelerometer low power mode.
AVERAGES 1x 4x 8x 16x 32x
io fi
at on
ACCEL_FCHOICE_B 1 0 0 0 0
DEC2_CFG X 0 1 2 3
rm C
A_DLPF_CFG X 7 7 7 7
TON (MS) 1.084 1.84 2.84 4.84 8.84
fo se
NOISE
4.8 3.0 2.2 1.6 1.1
(MG-RMS)
ed nS
To operate in gyroscope low-power mode or 6-axis low-power mode, GYRO_CYCLE should be set to ‘1.’ Gyroscope
y
filter configuration is determined by G_AVGCFG[2:0] that sets the averaging filter configuration. It is not dependent
nl
on DLPF_CFG[2:0].
H l-
O
AVERAGES 1X 2X 4X 8X 16X 32X 64X 128X
r G tia
G_AVGCFG 0 1 2 3 4 5 6 7
IC
NBW (HZ) 650.8 407.1 224.2 117.4 60.2 30.6 15.6 8.0
fo n
3-DB BW (HZ) 622 391 211 108 54 27 14 7
n de
SMPLRT_DIV ODR (HZ) LOW-POWER GYROSCOPE MODE CURRENT CONSUMPTION (MA)
255 3.9 0.79
io fi 0.80 0.80 0.82 0.85 0.90 1.01 1.23
99 10.0 0.81 0.82 0.84 0.87 0.95 1.09 1.37 1.94
at on
65 15.2 0.83 0.84 0.87 0.92 1.03 1.24 1.67 2.53
64 15.4 0.83 0.84 0.87 0.92 1.03 1.25 1.69 N/A
rm C
y
Register Type: READ/WRITE
nl
Register Address: 34 (Decimal); 22 (Hex)
H l-
O
BIT NAME FUNCTION
r G tia
This register holds the threshold value for the Wake on Motion Interrupt for Z-axis
IC
[7:0] WOM_Z_TH[7:0]
accelerometer.
fo n
8.23 REGISTER 35 – FIFO ENABLE
n de
Register Name: FIFO_EN
Register Type: READ/WRITE
io fi
at on
Register Address: 35 (Decimal); 23 (Hex)
BIT NAME FUNCTION
rm C
[7:5] - Reserved.
1 – Write TEMP_OUT_H, TEMP_OUT_L, GYRO_XOUT_H, GYRO_XOUT_L, GYRO_YOUT_H,
GYRO_YOUT_L, GYRO_ZOUT_H, and GYRO_ZOUT_L to the FIFO at the sample rate; If enabled,
fo se
[4] GYRO_FIFO_EN
buffering of data occurs even if data path is in standby.
0 – Function is disabled.
In en
[2:0] - Reserved.
NOTE: If both GYRO_FIFO_EN And ACCEL_FIFO_EN are 1, write ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, ACCEL_YOUT_L, ACCEL_ZOUT_H,
nc ve
ACCEL_ZOUT_L, TEMP_OUT_H, TEMP_OUT_L, GYRO_XOUT_H, GYRO_XOUT_L, GYRO_YOUT_H, GYRO_YOUT_L, GYRO_ZOUT_H, and GYRO_ZOUT_L
to the FIFO at the sample rate.
va In
This bit automatically sets to 1 when a FSYNC interrupt has been generated. The bit
[7] FSYNC_INT
clears to 0 after the register has been read.
y
0 – INT/DRDY pin indicates interrupt pulse’s width is 50 µs.
nl
1 – Interrupt status is cleared if any read operation is performed.
[4] INT_RD_CLEAR
0 – Interrupt status is cleared only by reading INT_STATUS register.
H l-
O
1 – The logic level for the FSYNC pin as an interrupt is active low.
[3] FSYNC_INT_LEVEL
0 – The logic level for the FSYNC pin as an interrupt is active high.
r G tia
IC
When this bit is equal to 1, the FSYNC pin will trigger an interrupt when it transitions to
[2] FSYNC_INT_MODE_EN the level specified by FSYNC_INT_LEVEL. When this bit is equal to 0, the FSYNC pin is
fo n
disabled from causing an interrupt.
n de
[1:0] - Reserved.
[3] - Reserved.
[2] GDRIVE_INT_EN Gyroscope Drive System Ready interrupt enable.
[1] - Reserved.
nc ve
y
[3] - Reserved.
nl
[2] GDRIVE_INT Gyroscope Drive System Ready interrupt.
H l-
[1] - Reserved.
O
This bit automatically sets to 1 when a Data Ready interrupt is generated. The bit clears
[0] DATA_RDY_INT
r G tia
to 0 after the register has been read.
IC
8.29 REGISTERS 59 TO 64 – ACCELEROMETER MEASUREMENTS
fo n
Register Name: ACCEL_XOUT_H
n de
Register Type: READ only
io fi
Register Address: 59 (Decimal); 3B (Hex)
at on
BIT NAME FUNCTION
[7:0] ACCEL_XOUT[15:8] High byte of accelerometer x-axis data.
rm C
y
BIT NAME FUNCTION
nl
[7:0] TEMP_OUT[15:8] Low byte of the temperature sensor output
H l-
O
Register Name: TEMP_OUT_L
r G tia
Register Type: READ only
IC
Register Address: 66 (Decimal); 42 (Hex)
fo n
BIT NAME FUNCTION
n de
High byte of the temperature sensor output
TEMP_degC = (TEMP_OUT[15:0]/Temp_Sensitivity) +
[7:0] TEMP_OUT[7:0]
io fi RoomTemp_Offset
where Temp_Sensitivity = 326.8 LSB/ºC and
at on
RoomTemp_Offset = 25ºC
y
Register Address: 71 (Decimal); 47 (Hex)
nl
BIT NAME FUNCTION
[7:0] GYRO_ZOUT[15:8] High byte of the Z-Axis gyroscope output.
H l-
O
Register Name: GYRO_ZOUT_L
r G tia
IC
Register Type: READ only
Register Address: 72 (Decimal); 48 (Hex)
fo n
BIT NAME FUNCTION
n de
Low byte of the Z-Axis gyroscope output
GYRO_ZOUT = Gyro_Sensitivity * Z_angular_rate
[7:0] GYRO_ZOUT[7:0]
io fi Nominal FS_SEL = 0
at on
Conditions Gyro_Sensitivity = 131 LSB/(dps)
SELF_TEST_Y_GYRO [7:0] YG_ST_DATA[7:0] during manufacturing tests. This value is to be used to check
against subsequent self-test outputs performed by the end user.
The value in this register indicates the self-test output generated
va In
SELF_TEST_Z_GYRO [7:0] ZG_ST_DATA[7:0] during manufacturing tests. This value is to be used to check
against subsequent self-test outputs performed by the end user.
The equation to convert self-test codes in OTP to factory self-test measurement is:
Self-Test value (ST_ FAC) determined in InvenSense’s factory final test and calculated based on the following equation:
y
nl
Register Name: FIFO_WM_TH1
H l-
O
Register Type: READ/WRITE
Register Address: 96 (Decimal); 60 (Hex)
r G tia
IC
BIT NAME FUNCTION
FIFO watermark threshold in number of bytes. Watermark interrupt is
fo n
[1:0] FIFO_WM_TH[9:8]
disabled if the threshold is set to “0”. Default value is 00000000.
n de
Register Name: FIFO_WM_TH2
Register Type: READ/WRITE
io fi
Register Address: 97 (Decimal); 61 (Hex)
at on
BIT NAME FUNCTION
rm C
The register FIFO_WM_TH[9:0] sets the FIFO watermark threshold level (0 - 1023). User should ensure that bit 7 of
register 0x1A is set to 0 before using this feature. When the FIFO count is at or above the watermark level
In en
(FIFO_COUNT[15:0] ≥ FIFO_WM_TH[9:0]) and the system is not in the middle of a FIFO read, an interrupt is triggered.
The interrupt will set the FIFO watermark interrupt status register field FIFO_WM_INT = 1, and the INT pin will issue a
pulse if configured in pulse mode, or set to the active level if configured in latch mode. Register bit FIFO_WM_INT is
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not read-to-clear, unlike the other interrupts. Rather, whenever FIFO_R_W register is read, FIFO_WM_INT status bit is
cleared automatically. At the same time, the INT pin will be cleared as well if it is configured in latch mode.
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The FIFO watermark interrupt and the INT pin are cleared upon the first read (and only the first read) of the FIFO. If, at
the end of the FIFO read, the FIFO count is at or above the watermark level, the interrupt status bit and INT pin will
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again be set. If the INT pin is configured for latched operation, it will wait until the host completes the read to set to
the active level.
When FIFO_WM_TH = 0, the FIFO watermark interrupt is disabled.
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8.36 REGISTER 105 – ACCELEROMETER INTELLIGENCE CONTROL
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Register Name: ACCEL_INTEL_CTRL
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Register Type: READ/WRITE
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Register Address: 105 (Decimal); 69 (Hex)
BIT NAME FUNCTION
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[7] ACCEL_INTEL_EN This bit enables the Wake-on-Motion detection logic.
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0 – Do not use.
[6] ACCEL_INTEL_MODE
1 – Compare the current sample with the previous sample.
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[5:2] - Reserved.
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To avoid limiting sensor output to less than 0x7F7F, set this bit to 1. This should be done
[1] OUTPUT_LIMIT
every time the MPU-6886 is powered up.
0 – Set WoM interrupt on the OR of all enabled accelerometer thresholds.
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[0] WOM_TH_MODE 1 – Set WoM interrupt on the AND of all enabled accelerometer threshold.
Default setting is 0.
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[7] - Reserved.
1 – Enable FIFO operation mode.
[6] FIFO_EN
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[0] SIG_COND_RST
This bit also clears all the sensor registers.
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[5] CYCLE NOTE: When all accelerometer axes are disabled via PWR_MGMT_2 register bits and cycle is enabled,
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the chip will wake up at the rate determined by the respective registers above, but will not take any
samples.
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When set, the gyro drive and pll circuitry are enabled, but the sense paths are disabled. This
[4] GYRO_STANDBY
is a low power mode that allows quick enabling of the gyros.
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[3] TEMP_DIS When set to 1, this bit disables the temperature sensor.
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CODE CLOCK SOURCE
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0 Internal 20 MHz oscillator
1 Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
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2 Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
[2:0] CLKSEL[2:0] 3 Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
4 Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
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6 Internal 20MHz oscillator
7 Stops the clock and keeps timing generator in reset
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NOTE: The default value of CLKSEL[2:0] is 001. CLKSEL[2:0] must be set to 001 to achieve full gyroscope performance.
[6] - Reserved.
1 – X-accelerometer is disabled.
[5] STBY_XA
0 – X-accelerometer is on.
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1 – Y-accelerometer is disabled.
[4] STBY_YA
0 – Y-accelerometer is on.
1 – Z-accelerometer is disabled.
[3] STBY_ZA
0 – Z-accelerometer is on.
1 – X-gyro is disabled.
[2] STBY_XG
0 – X-gyro is on.
1 – Y-gyro is disabled.
[1] STBY_YG
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0 – Y-gyro is on.
1 – Z-gyro is disabled.
[0] STBY_ZG
0 – Z-gyro is on.
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Register Name: FIFO_COUNTH
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Register Type: READ Only
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Register Address: 114 (Decimal); 72 (Hex)
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BIT NAME FUNCTION
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High Bits, count indicates the number of written bytes in the FIFO.
[7:0] FIFO_COUNT[15:8]
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Reading this byte latches the data for both FIFO_COUNTH, and FIFO_COUNTL.
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Register Name: FIFO_COUNTL
Register Type: READ Only
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Register Address: 115 (Decimal); 73 (Hex)
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BIT NAME FUNCTION
Low Bits, count indicates the number of written bytes in the FIFO. NOTE: Must read
[7:0] FIFO_COUNT[7:0]
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Description:
This register is used to read and write data from the FIFO buffer.
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Data is written to the FIFO in order of register number (from lowest to highest). If all the FIFO enable flags (see below)
are enabled, the contents of registers 59 through 72 will be written in order at the Sample Rate.
The contents of the sensor data registers (Registers 59 to 72) are written into the FIFO buffer when their
corresponding FIFO enable flags are set to 1 in FIFO_EN (Register 35).
If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is automatically set to 1. This bit is located in
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INT_STATUS (Register 58). When the FIFO buffer has overflowed, the oldest data will be lost and new data will be
written to the FIFO unless register 26 CONFIG, bit[6] FIFO_MODE = 1.
If the FIFO buffer is empty, reading register FIFO_DATA will return a unique value of 0xFF until new data is available.
Normal data is precluded from ever indicating 0xFF, so 0xFF gives a trustworthy indication of FIFO empty.
This register is used to verify the identity of the device. The contents of WHOAMI is an 8-bit device ID. The default
2 2
value of the register is 0x19. This is different from the I C address of the device as seen on the slave I C controller by
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the applications processor. The I C address of the MPU-6886 is 0x68 or 0x69 depending upon the value driven on AD0
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pin.
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8.44 REGISTERS 119, 120, 122, 123, 125, 126 ACCELEROMETER OFFSET REGISTERS
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Register Name: XA_OFFSET_H
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Register Type: READ/WRITE
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Register Address: 119 (Decimal); 77 (Hex)
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BIT NAME FUNCTION
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Upper bits of the X accelerometer offset cancellation. ±16g Offset cancellation in all Full
[7:0] XA_OFFS[14:7]
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Register Name: XA_OFFSET_L
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Register Type: READ/WRITE
Register Address: 120 (Decimal); 78 (Hex)
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[7:1] XA_OFFS[6:0]
Scale modes, 15 bit 0.98-mg steps.
[0] - Reserved.
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Upper bits of the Y accelerometer offset cancellation. ±16g Offset cancellation in all Full
[7:0] YA_OFFS[14:7]
Scale modes, 15 bit 0.98-mg steps
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[0] - Reserved.
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Lower bits of the Z accelerometer offset cancellation. ±16g Offset cancellation in all Full
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[7:1] ZA_OFFS[6:0]
Scale modes, 15 bit 0.98-mg steps
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[0] - Reserved.
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When switching from low-power modes to low-noise modes, unsettled output samples may be observed at the
gyroscope or accelerometer outputs due to filter switching and settling. The number of unsettled output samples
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depends on the filter and ODR settings. The number of unsettled output samples is minimized by selecting the widest
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low-noise-mode filter bandwidth consistent with the chosen ODR.
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9.4 TEMP SENSOR DURING GYROSCOPE STANDBY MODE
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During transition from Gyro Low power mode (GYRO_CYCLE=1), to Gyro Standby mode, in addition to the Gyro axis
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(axes) being turned off, the Temp Sensor will also be turned off if the Accel is disabled. In order to keep the temp
sensor on during Gyroscope standby mode when Accel is disabled, the following procedure should be followed:
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•
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Set GYRO_CYCLE = 0 at least one ODR cycle prior to entering Standby mode
• At least one of the Gyro axis is ON prior to entering Standby mode
• Set GYRO_STANDBY = 1
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Gyroscope will take one ODR clock period to switch from Low-Noise to Low-Power mode after GYRO_CYCLE bit is set.
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If GYRO_CYCLE is set to 1 prior to turning on the gyroscope, the first sample will be from low-noise mode, which may
not be a settled value. Ignoring the first reading is recommended in this case.
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Do not read unlisted register locations in Sleep mode as this may cause the device to hang up, requiring power cycle to
restore operation.
than Sleep, the on-chip master clock source will transition from the gyroscope clock to the internal oscillator. It will
take about 20 µs for this transition to complete.
9.10 NO SPECIAL OPERATION NEEDED FOR FIFO READ IN LOW POWER MODE
The use of FIFO is enabled in all modes including low power mode.
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Precaution to follow while entering Standby Mode:
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• The user will ensure that at least one gyro axis is ON when setting gyro_standby = 1.
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Procedure to transition from Gyro Standby to Gyro off:
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• The user should set gyro_standby = 0 first
• Next, turn off gyro x/y/z.
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+Y
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+Z
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Mp +Y
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88
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+X +X
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Figure 12. Orientation of Axes of Sensitivity and Polarity of Rotation
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Figure 13. Package Diagram
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DIMENSIONS IN MILLIMETERS
SYMBOLS
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TOP VIEW
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I66 Part Number
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XXXX Lot Traceability Code
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AWW
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WW = Work Week
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o Tape & Reel Specification
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o Reel & Pizza Box Label
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o Packaging
o Representative Shipping Carton Label
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• Compliance
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o Environmental Compliance
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o DRC Compliance
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o Compliance Declaration Disclaimer
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This information furnished by InvenSense is believed to be accurate and reliable. However, no responsibility is assumed by InvenSense
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for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications are subject to
change without notice. InvenSense reserves the right to make changes to this product, including its circuits and software, in order to
improve its design and/or performance, without prior notice. InvenSense makes no warranties, neither expressed nor implied, regarding
the information and specifications contained in this document. InvenSense assumes no responsibility for any claims or damages arising
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from information contained in this document, or from the use of products and services detailed therein. This includes, but is not limited
to, claims or damages based on the infringement of patents, copyrights, mask work and/or other intellectual property rights.
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