Rampage MB 48.4YW03.011 12241-1
Rampage MB 48.4YW03.011 12241-1
Rampage MB 48.4YW03.011 12241-1
D
2013 S-Series Intel Shark Bay D
REV:MV
A
2013-08-01 <Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.
Cover Page
DIS_PX:Only DIS install Size
A4
Document Number Rev
1
2013 S-Series Shark Bay 14 15 17
Date: Thursday, August 01, 2013 Sheet 1 of 103
5 4 3 2 1
5 4 3 2 1
CPU DC/DC
2013 S-Series Intel Shark Bay 14.0" 15.6" 17.3" TPS51631RSMR
INPUTS
DCBATOUT
OUTPUTS
VCC_CORE
46,47
(Muxless) VRAM
128Mx16 784
VRAM
128Mx16 794
SYSTEM DC/DC
INPUTS
TPS51367RVER
OUTPUTS
48
D D
DCBATOUT 1D05V_VTT
GDDR3
GDDR3
DDR III L Slot 0 DDRIII L 1600 Channel A
1600 12 Intel CPU SYSTEM DC/DC
RT8223MZQW 45
Haswell-M
VRAM INPUTS OUTPUTS
DDR III L Slot 1 DDRIII L 1600 Channel B Dual/Quad Core SV GDDR3 5V_AUX_S5
rPGA947 37W AMD Mars XT 128Mx16 804 3D3V_AUX_S5
1600 13 PCIe x 8 4 DCBATOUT 5V_S5
3,4,5,6,7,9,10 3D3V_S5
LVDS
eDP to LVDS eDP
25W 73,74,75,76,77
LCD 52 PS8625 55 GDDR3 VRAM SYSTEM DC/DC
X7701 128Mx16 TPS51216RUKR 49
FDI*2 DMI2.0*4 27MHz 81
HDMI 1.454 INPUTS OUTPUTS
HDMI 2.7GT/s 5GT/s 1D35V_S3
DCBATOUT 0D675V_S0
DDR_VREF_S3
Pre-AMP IDT92HD91 27
L1: Top 36,83
EXT MIC LPC Bus Switches
TLV2462 L2: GND
L3: Signal INPUTS OUTPUTS
SPI/PECI
Headphone L4: Signal 5V_S5 5V_S0
15,16,17,18,19,20,21,22,23 3D3V_S5 3D3V_S0
KBC L5: VCC 3D3V_S0 3D3V_VGA
SPI
SMSC KBC1126 L6: Signal VGA
USB2.0
PCIe
SMBus
USB3.0
USB2.0
SIM Card
58
Block Diagram
Size Document Number Rev
A3 1
59 2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 2 of 103
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU2A 1 OF 9
Delete R305 R304 R301
HASWELL PEG_RCOMP
E23 PEG_COMP 1 2 VCCIOA_OUT
M29 24D9R2F-L-GP
17 DMI_TXN[3:0] DMI_TXN0 PEG_RXN_0
D21 K28
DMI_TXN1 DMI_RXN_0 PEG_RXN_1
C21 M31
DMI_TXN2 DMI_RXN_1 PEG_RXN_2
B21 L30
DMI_TXN3 DMI_RXN_2 PEG_RXN_3
A21 M33
DMI_RXN_3 PEG_RXN_4
17 DMI_TXP[3:0] L32
DMI_TXP0 PEG_RXN_5
D20 M35
DMI_TXP1 DMI_RXP_0 PEG_RXN_6 PEG_RXN[0..7] 73
D C20 L34 D
DMI_TXP2 DMI_RXP_1 PEG_RXN_7 PEG_RXN7
B20 E29
DMI_TXP3 DMI_RXP_2 PEG_RXN_8 PEG_RXN6
A20 D28
DMI
DMI_RXP_3 PEG_RXN_9
PEG
E31 PEG_RXN5
17 DMI_RXN[3:0] DMI_RXN0 PEG_RXN_10 PEG_RXN4
D18 D30
DMI_RXN1 DMI_TXN_0 PEG_RXN_11 PEG_RXN3
C17 E35
DMI_RXN2 DMI_TXN_1 PEG_RXN_12 PEG_RXN2
B17 D34
DMI_RXN3 DMI_TXN_2 PEG_RXN_13 PEG_RXN1
A17 E33
DMI_TXN_3 PEG_RXN_14 PEG_RXN0
E32
17 DMI_RXP[3:0] DMI_RXP0 PEG_RXN_15
D17 L29
DMI_RXP1 DMI_TXP_0 PEG_RXP_0
C18 L28
DMI_RXP2 DMI_TXP_1 PEG_RXP_1
B18 L31
DMI_RXP3 DMI_TXP_2 PEG_RXP_2
A18 K30
DMI_TXP_3 PEG_RXP_3
L33
PEG_RXP_4
K32
PEG_RXP_5
L35
PEG_RXP_6 PEG_RXP[0..7] 73
K34
PEG_RXP_7 PEG_RXP7
F29
PEG_RXP_8 PEG_RXP6
H29 E28
FDI
17 FDI_CSYNC FDI_CSYNC PEG_RXP_9
J29 F31 PEG_RXP5
17 FDI_INT DISP_INT PEG_RXP_10
E30 PEG_RXP4
PEG_RXP_11 PEG_RXP3
F35
PEG_RXP_12 PEG_RXP2
E34
PEG_RXP_13 PEG_RXP1
F33
PEG_RXP_14 PEG_RXP0
D32
PEG_RXP_15
H35
PEG_TXN_0
H34
PEG_TXN_1
J33
PEG_TXN_2
H32
PEG_TXN_3
J31
PEG_TXN_4
G30
PEG_TXN_5
C33
PEG_TXN_6 PEG_TXN[0..7] 73
B32
PEG_TXN_7 PEG_C_TXN7 DIS_PX C309 SCD22U10V2KX-1GP PEG_TXN7
B31 1 2
PEG_TXN_8 PEG_C_TXN6 DIS_PX C310 SCD22U10V2KX-1GP PEG_TXN6
A30 1 2
PEG_TXN_9 PEG_C_TXN5 DIS_PX C311 SCD22U10V2KX-1GP PEG_TXN5
B29 1 2
PEG_TXN_10 PEG_C_TXN4 DIS_PX C312 SCD22U10V2KX-1GP PEG_TXN4
A28 1 2
PEG_TXN_11 PEG_C_TXN3 DIS_PX C313 SCD22U10V2KX-1GP PEG_TXN3
B27 1 2
PEG_TXN_12 PEG_C_TXN2 DIS_PX C314 SCD22U10V2KX-1GP PEG_TXN2
A26 1 2
PEG_TXN_13 PEG_C_TXN1 DIS_PX C316 SCD22U10V2KX-1GP PEG_TXN1
B25 1 2
PEG_TXN_14 PEG_C_TXN0 DIS_PX C315 SCD22U10V2KX-1GP PEG_TXN0
A24 1 2
PEG_TXN_15
C J35 C
PEG_TXP_0
G34
PEG_TXP_1
H33
PEG_TXP_2
G32
PEG_TXP_3
H31
PEG_TXP_4
H30
PEG_TXP_5
B33
PEG_TXP_6 PEG_TXP[0..7] 73
A32
PEG_TXP_7 PEG_C_TXP7 DIS_PX C326 SCD22U10V2KX-1GP PEG_TXP7
C31 1 2
PEG_TXP_8 PEG_C_TXP6 DIS_PX C325 SCD22U10V2KX-1GP PEG_TXP6
B30 1 2
PEG_TXP_9 PEG_C_TXP5 DIS_PX C327 SCD22U10V2KX-1GP PEG_TXP5
C29 1 2
PEG_TXP_10 PEG_C_TXP4 DIS_PX C328 SCD22U10V2KX-1GP PEG_TXP4
B28 1 2
PEG_TXP_11 PEG_C_TXP3 DIS_PX C329 SCD22U10V2KX-1GP PEG_TXP3
C27 1 2
PEG_TXP_12 PEG_C_TXP2 DIS_PX C330 SCD22U10V2KX-1GP PEG_TXP2
B26 1 2
PEG_TXP_13 PEG_C_TXP1 DIS_PX C331 SCD22U10V2KX-1GP PEG_TXP1
C25 1 2
PEG_TXP_14 PEG_C_TXP0 DIS_PX C332 SCD22U10V2KX-1GP PEG_TXP0
B24 1 2
PEG_TXP_15
HASWE-U1
B B
CPU2H 8 OF 9
T28
HASWELL M27
54 HDMI_DATA2_R# DDIB_TXBN_0 EDP_AUXN eDP_AUXN_CPU 55
54 HDMI_DATA2_R U28 N27 eDP_AUXP_CPU 55
DDIB_TXBP_0 EDP_AUXP eDP_HPD
54 HDMI_DATA1_R# T30 P27
DDIB_TXBN_1 eDP
EDP_HPD DP_COMP eDP_HPD 55 R300 1
U30 E24 2
HDMI 54 HDMI_DATA1_R
54 HDMI_DATA0_R# U29
DDIB_TXBP_1
DDIB_TXBN_2
EDP_RCOMP
EDP_DISP_UTIL
R27 CPU_TP301 1 TP301 24D9R2F-L-GP
VCCIOA_OUT
54 HDMI_DATA0_R V29
DDIB_TXBP_2
54 HDMI_CLK_R# U31
DDIB_TXBN_3
54 HDMI_CLK_R V31
DDIB_TXBP_3
P35
EDP_TXN_0 eDP_TXN0_CPU 55
T34 R35
DDIC_TXCN_0 EDP_TXP_0 eDP_TXP0_CPU 55
U34 N34
DDIC_TXCP_0 EDP_TXN_1 eDP_TXN1_CPU 55
U35 P34
DDIC_TXCN_1 EDP_TXP_1 FDI_TXN0 eDP_TXP1_CPU 55
V35 P33
DDIC_TXCP_1 FDI_TXN_0 FDI_TXP0 FDI_TXN0 17
U32 R33
DDIC_TXCN_2 FDI_TXP_0 FDI_TXN1 FDI_TXP0 17
T32 N32
DDIC_TXCP_2 FDI_TXN_1 FDI_TXP1 FDI_TXN1 17
U33 P32
DDIC_TXCN_3 FDI_TXP_1 FDI_TXP1 17
V33
DDIC_TXCP_3
P29
DDID_TXDN_0
R29
DDID_TXDP_0
N28
DDID_TXDN_1 DDI
P28
DDID_TXDP_1
P31
DDID_TXDN_2
R31
DDID_TXDP_2
N30
DDID_TXDN_3
P30
DDID_TXDP_3
HASWE-U1
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (PCIE/DMI/FDI)
Size Document Number Rev
A2 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 3 of 103
5 4 3 2 1
5 4 3 2 1
Q401
24 KBC_PROCHOT G
1
S
R525
D 100KR2J-1-GP
2N7002K-2-GP D
84.2N702.J31
2
2nd = 84.07002.I31 Signal Routing Guideline:
3rd = 84.2N702.W31 SM_RCOMP keep routing length less than 500 mils.
VCCIO_OUT
DDR3
THERMAL
TP402 1 H_CATERR# AN32 AP2 SM_RCOMP_2 R408 1 2 100R2F-L1-GP-U
1D05V_VTT CATERR# SM_RCOMP_2
20,24 H_PECI AR27 PECI SM_DRAMRST# AN3 SM_DRAMRST# 37
R410 AK31 FC_AK31
1 DY 2 H_THERMTRIP# 46 H_PROCHOT# 1 R413 2 H_PROCHOT#_R AM30 PROCHOT# PRDY# AR29 XDP_PRDY# 1
100R2F-L1-GP-U 56R2J-4-GP AM35 AT29 XDP_PREQ# 1 TP410 TPAD14-OP-GP
20,74 H_THERMTRIP# THERMTRIP# PREQ# TP409 TPAD14-OP-GP
AM34 XDP_TCK 1
TCK XDP_TMS TP413 TPAD14-OP-GP
TMS AN33 1
1 R403 XDP_TRST# TP417 TPAD14-OP-GP
JTAG
2 TRST# AM33 1
10KR2J-3-GP AT28 AM31 XDP_TDI 1 TP415 TPAD14-OP-GP
17 H_PM_SYNC
PWR
PM_SYNC TDI XDP_TDO TP416 TPAD14-OP-GP
20 H_CPUPW RGD AL34 PWRGOOD TDO AL33 1
AC10 AP33 XDP_DBRESET# TP414 TPAD14-OP-GP
37 VDDPW RGOOD SM_DRAMPWROK DBR# XDP_DBRESET# 17,63
20 BUF_CPU_RST# BUF_CPU_RST# AT26 XDP_TCK R412 1 2 51R2J-2-GP
PLTRSTIN# XDP_BPM0 XDP_TRST# R411 1
BPM_N_0 AR30 1 2 51R2J-2-GP
1D05V_VTT VCCST AN31 XDP_BPM1 1 TP411 TPAD14-OP-GP
R409 BPM_N_1 XDP_BPM2 TP412 TPAD14-OP-GP
18,87 CLK_DP_N_R G28 DPLL_REF_CLKN BPM_N_2 AN29 1
CLOCK
2 DY 1 H28 AP31 XDP_BPM3 1 TP403 TPAD14-OP-GP
18,87 CLK_DP_P_R DPLL_REF_CLKP BPM_N_3 TP404 TPAD14-OP-GP
0R2J-2-GP 18,87 CK_DP_SSC_N CK_DP_SSC_N F27 AP30 XDP_BPM4 1
SSC_DPLL_REF_CLKN BPM_N_4
1
1KR2J-1-GP
1
C4001
R404
DY SCD1U16V2KX-3GP
XDP_TDO 2 1
2
3D3V_S0 1D05V_VTT
51R2J-2-GP
1
RN4001
U401 DY R418
CLK_DP_N_R 2 3 1D05V_VTT 1 5 R414 DY 1KR2J-1-GP
CLK_DP_P_R 1 IN B VCC 75R2J-1-GP
DY 4
2
B 15,19,30,56,58,59,63,65,73,86,87,88 PLT_RST# B
2
SRN1KJ-7-GP IN A
DY BUFO_CPU_RST# BUF_CPU_RST#
3 GND OUT Y 4 1
R416
DY 43R2J-GP
2
1
74VHC1G09DFT2G-GP
73.01G09.AAH DY R417 DY R415
20KR2J-L2-GP 0R2J-2-GP
2
A <Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (THERMAL/CLOCK/PM)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 4 of 103
5 4 3 2 1
SSID = CPU
D M_A_DQ[63:0]
3 OF 9 CPU2C
M_B_DQ[63:0]
4 OF 9 CPU2D D
12 M_A_DQ[63:0]
M_A_DQ0 AR15
HASWELL AC7
13 M_B_DQ[63:0]
M_B_DQ0 AR18
HASWELL AG8
M_A_DQ1 SA_DQ_0 RSVD#AC7 M_B_DQ1 SB_DQ_0 RSVD#AG8
AT14 SA_DQ_1 SA_CK_N_0 U4 M_A_DIM0_CLK_DDR#0 12 AT18 SB_DQ_1 SB_CKN0 Y4 M_B_DIM0_CLK_DDR#0 13
M_A_DQ2 AM14 V4 M_B_DQ2 AM17 AA4
M_A_DQ3 SA_DQ_2 SA_CK_P_0 M_A_DIM0_CLK_DDR0 12 M_B_DQ3 SB_DQ_2 SB_CK0 M_B_DIM0_CLK_DDR0 13
AN14 SA_DQ_3 SA_CKE_0 AD9 M_A_DIM0_CKE0 12 AM18 SB_DQ_3 SB_CKE_0 AF10 M_B_DIM0_CKE0 13
M_A_DQ4 AT15 U3 M_B_DQ4 AR17 Y3
M_A_DQ5 SA_DQ_4 SA_CK_N_1 M_A_DIM0_CLK_DDR#1 12 M_B_DQ5 SB_DQ_4 SB_CKN1 M_B_DIM0_CLK_DDR#1 13
AR14 SA_DQ_5 SA_CK_P_1 V3 M_A_DIM0_CLK_DDR1 12 AT17 SB_DQ_5 SB_CK1 AA3 M_B_DIM0_CLK_DDR1 13
M_A_DQ6 AN15 AC9 M_B_DQ6 AN17 AG10
M_A_DQ7 SA_DQ_6 SA_CKE_1 M_A_DIM0_CKE1 12 M_B_DQ7 SB_DQ_6 SB_CKE_1 M_B_DIM0_CKE1 13
AM15 SA_DQ_7 SA_CK_N_2 U2 AN18 SB_DQ_7 SB_CKN2 Y2
M_A_DQ8 AM9 V2 M_B_DQ8 AT12 AA2
M_A_DQ9 SA_DQ_8 SA_CK_P_2 M_B_DQ9 SB_DQ_8 SB_CK2
AN9 SA_DQ_9 SA_CKE_2 AD8 AR12 SB_DQ_9 SB_CKE_2 AG9
M_A_DQ10 AM8 U1 M_B_DQ10 AN12 Y1
M_A_DQ11 SA_DQ_10 SA_CK_N_3 M_B_DQ11 SB_DQ_10 SB_CKN3
AN8 SA_DQ_11 SA_CK_P_3 V1 AM11 SB_DQ_11 SB_CK3 AA1
M_A_DQ12 AR9 AC8 M_B_DQ12 AT11 AF9
M_A_DQ13 SA_DQ_12 SA_CKE_3 M_B_DQ13 SB_DQ_12 SB_CKE_3
AT9 SA_DQ_13 AR11 SB_DQ_13
M_A_DQ14 AR8 M7 M_B_DQ14 AM12 P4
M_A_DQ15 SA_DQ_14 SA_CS_N_0 M_A_DIM0_CS#0 12 M_B_DQ15 SB_DQ_14 SB_CS_N_0 M_B_DIM0_CS#0 13
AT8 SA_DQ_15 SA_CS_N_1 L9 M_A_DIM0_CS#1 12 AN11 SB_DQ_15 SB_CS_N_1 R2 M_B_DIM0_CS#1 13
M_A_DQ16 AJ9 M9 M_B_DQ16 AR5 P3
M_A_DQ17 SA_DQ_16 SA_CS_N_2 M_B_DQ17 SB_DQ_16 SB_CS_N_2
AK9 SA_DQ_17 SA_CS_N_3 M10 AR6 SB_DQ_17 SB_CS_N_3 P1
M_A_DQ18 AJ6 M8 M_B_DQ18 AM5
M_A_DQ19 SA_DQ_18 SA_ODT_0 M_A_DIM0_ODT0 12 M_B_DQ19 SB_DQ_18
AK6 SA_DQ_19 SA_ODT_1 L7 M_A_DIM0_ODT1 12 AM6 SB_DQ_19 SB_ODT_0 R4 M_B_DIM0_ODT0 13
M_A_DQ20 AJ10 L8 M_B_DQ20 AT5 R3
M_A_DQ21 SA_DQ_20 SA_ODT_2 M_B_DQ21 SB_DQ_20 SB_ODT_1 M_B_DIM0_ODT1 13
AK10 SA_DQ_21 SA_ODT_3 L10 AT6 SB_DQ_21 SB_ODT_2 R1
M_A_DQ22 AJ7 V5 M_A_BS0 12 M_B_DQ22 AN5 P2
M_A_DQ23 SA_DQ_22 SA_BS_0 M_B_DQ23 SB_DQ_22 SB_ODT_3
AK7 SA_DQ_23 SA_BS_1 U5 M_A_BS1 12 AN6 SB_DQ_23 SB_BS_0 R7 M_B_BS0 13
M_A_DQ24 AF4 AD1 M_A_BS2 12 M_B_DQ24 AJ4 P8 M_B_BS1 13
M_A_DQ25 SA_DQ_24 SA_BS_2 M_B_DQ25 SB_DQ_24 SB_BS_1
AF5 SA_DQ_25 AK4 SB_DQ_25 SB_BS_2 AA9 M_B_BS2 13
M_A_DQ26 AF1 V10 M_B_DQ26 AJ1
SA_DQ_26 VSS SB_DQ_26
C M_A_DQ27
M_A_DQ28
AF2
AG4
SA_DQ_27 SA_RAS# U6
U7
M_A_RAS# 12
M_A_W E# 12
M_B_DQ27
M_B_DQ28
AJ2
AM1
SB_DQ_27 VSS R10
R6 M_B_RAS# 13
C
M_A_DQ29 SA_DQ_28 SA_WE# M_B_DQ29 SB_DQ_28 SB_RAS#
AG5 SA_DQ_29 SA_CAS# U8 M_A_CAS# 12 AN1 SB_DQ_29 SB_WE# P6 M_B_W E# 13
M_A_DQ30 AG1 M_B_DQ30 AK2 P7 M_B_CAS# 13
M_A_DQ31 SA_DQ_30 M_A_A0 M_A_A[15:0] 12 M_B_DQ31 SB_DQ_30 SB_CAS#
AG2 SA_DQ_31 SA_MA_0 V8 AK1 SB_DQ_31 M_B_A[15:0] 13
M_A_DQ32 J1 AC6 M_A_A1 M_B_DQ32 L2 R8 M_B_A0
M_A_DQ33 SA_DQ_32 SA_MA_1 M_A_A2 M_B_DQ33 SB_DQ_32 SB_MA_0 M_B_A1
J2 SA_DQ_33 SA_MA_2 V9 M2 SB_DQ_33 SB_MA_1 Y5
M_A_DQ34 J5 U9 M_A_A3 M_B_DQ34 L4 Y10 M_B_A2
M_A_DQ35 SA_DQ_34 SA_MA_3 M_A_A4 M_B_DQ35 SB_DQ_34 SB_MA_2 M_B_A3
H5 SA_DQ_35 SA_MA_4 AC5 M4 SB_DQ_35 SB_MA_3 AA5
M_A_DQ36 H2 AC4 M_A_A5 M_B_DQ36 L1 Y7 M_B_A4
M_A_DQ37 SA_DQ_36 SA_MA_5 M_A_A6 M_B_DQ37 SB_DQ_36 SB_MA_4 M_B_A5
H1 SA_DQ_37 SA_MA_6 AD6 M1 SB_DQ_37 SB_MA_5 AA6
M_A_DQ38 J4 AC3 M_A_A7 M_B_DQ38 L5 Y6 M_B_A6
M_A_DQ39 SA_DQ_38 SA_MA_7 M_A_A8 M_B_DQ39 SB_DQ_38 SB_MA_6 M_B_A7
H4 SA_DQ_39 SA_MA_8 AD5 M5 SB_DQ_39 SB_MA_7 AA7
M_A_DQ40 F2 AC2 M_A_A9 M_B_DQ40 G7 Y8 M_B_A8
M_A_DQ41 SA_DQ_40 SA_MA_9 M_A_A10 M_B_DQ41 SB_DQ_40 SB_MA_8 M_B_A9
F1 SA_DQ_41 SA_MA_10 V6 J8 SB_DQ_41 SB_MA_9 AA10
M_A_DQ42 D2 AC1 M_A_A11 M_B_DQ42 G8 R9 M_B_A10
M_A_DQ43 SA_DQ_42 SA_MA_11 M_A_A12 M_B_DQ43 SB_DQ_42 SB_MA_10 M_B_A11
D3 SA_DQ_43 SA_MA_12 AD4 G9 SB_DQ_43 SB_MA_11 Y9
M_A_DQ44 D1 V7 M_A_A13 M_B_DQ44 J7 AF7 M_B_A12
M_A_DQ45 SA_DQ_44 SA_MA_13 M_A_A14 M_B_DQ45 SB_DQ_44 SB_MA_12 M_B_A13
F3 SA_DQ_45 SA_MA_14 AD3 J9 SB_DQ_45 SB_MA_13 P9
M_A_DQ46 C3 AD2 M_A_A15 M_B_DQ46 G10 AA8 M_B_A14
M_A_DQ47 SA_DQ_46 SA_MA_15 M_B_DQ47 SB_DQ_46 SB_MA_14 M_B_A15
B3 SA_DQ_47 J10 SB_DQ_47 SB_MA_15 AG7
M_A_DQ48 B5 M_A_DQS#[7:0] 12 M_B_DQ48 A8
M_A_DQ49 SA_DQ_48 M_A_DQS#0 M_B_DQ49 SB_DQ_48
E6 SA_DQ_49 SA_DQS_N_0 AP15 B8 SB_DQ_49 M_B_DQS#[7:0] 13
M_A_DQ50 A5 AP8 M_A_DQS#1 M_B_DQ50 A9 AP18 M_B_DQS#0
M_A_DQ51 SA_DQ_50 SA_DQS_N_1 M_A_DQS#2 M_B_DQ51 SB_DQ_50 SB_DQS_N_0 M_B_DQS#1
D6 SA_DQ_51 SA_DQS_N_2 AJ8 B9 SB_DQ_51 SB_DQS_N_1 AP11
M_A_DQ52 D5 AF3 M_A_DQS#3 M_B_DQ52 D8 AP5 M_B_DQS#2
M_A_DQ53 SA_DQ_52 SA_DQS_N_3 M_A_DQS#4 M_B_DQ53 SB_DQ_52 SB_DQS_N_2 M_B_DQS#3
E5 SA_DQ_53 SA_DQS_N_4 J3 E8 SB_DQ_53 SB_DQS_N_3 AJ3
M_A_DQ54 B6 E2 M_A_DQS#5 M_B_DQ54 D9 L3 M_B_DQS#4
M_A_DQ55 SA_DQ_54 SA_DQS_N_5 M_A_DQS#6 M_B_DQ55 SB_DQ_54 SB_DQS_N_4 M_B_DQS#5
A6 SA_DQ_55 SA_DQS_N_6 C5 E9 SB_DQ_55 SB_DQS_N_5 H9
M_A_DQ56 E12 C11 M_A_DQS#7 M_B_DQ56 E15 C8 M_B_DQS#6
B M_A_DQ57 D12
SA_DQ_56
SA_DQ_57
SA_DQS_N_7
SA_DQS_P_0 AP14 M_A_DQS0
M_A_DQS[7:0] 12
M_B_DQ57 D15
SB_DQ_56
SB_DQ_57
SB_DQS_N_6
SB_DQS_N_7 C14 M_B_DQS#7 M_B_DQS[7:0] 13
B
M_A_DQ58 B11 AP9 M_A_DQS1 M_B_DQ58 A15 AP17 M_B_DQS0
M_A_DQ59 SA_DQ_58 SA_DQS_P_1 M_A_DQS2 M_B_DQ59 SB_DQ_58 SB_DQS_P_0 M_B_DQS1
A11 SA_DQ_59 SA_DQS_P_2 AK8 B15 SB_DQ_59 SB_DQS_P_1 AP12
M_A_DQ60 E11 AG3 M_A_DQS3 M_B_DQ60 E14 AP6 M_B_DQS2
M_A_DQ61 SA_DQ_60 SA_DQS_P_3 M_A_DQS4 M_B_DQ61 SB_DQ_60 SB_DQS_P_2 M_B_DQS3
D11 SA_DQ_61 SA_DQS_P_4 H3 D14 SB_DQ_61 SB_DQS_P_3 AK3
M_A_DQ62 B12 E3 M_A_DQS5 M_B_DQ62 A14 M3 M_B_DQS4
M_A_DQ63 SA_DQ_62 SA_DQS_P_5 M_A_DQS6 M_B_DQ63 SB_DQ_62 SB_DQS_P_4 M_B_DQS5
A12 SA_DQ_63 SA_DQS_P_6 C6 B14 SB_DQ_63 SB_DQS_P_5 H8
37 +V_SM_VREF_CNT +V_SM_VREF_CNT AM3 C12 M_A_DQS7 C9 M_B_DQS6
SM_VREF SA_DQS_P_7 SB_DQS_P_6 M_B_DQS7
37 DDR_W R_VREF01 F16 SA_DIMM_VREFDQ SB_DQS_P_7 C15
37 DDR_W R_VREF02 F13 SB_DIMM_VREFDQ
HASW E-U1
HASW E-U1
A <Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (DDR)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 5 of 103
5 4 3 2 1
SSID = CPU
D D
1
AL30 AP21 CFG17 1 TP632
TP635 CPU_AL29 RSVD#AL30 CFG_17 CFG19 TP633 R601
1 AL29 RSVD#AL29 CFG_19 AP23 1
VCC_CORE F25 TP634 DY 2KR2F-3-GP
VCC
C 1 C35_RSVD C35 AR33 C
2
TP605 B35_RSVD RSVD_TP#C35 RSVD#AR33 FC_G6
1 B35 RSVD_TP#B35 FC_G6 G6
eDP Enable TP606 AM27
RSVD#AM27
1
1 AL25_RSVD AL25 AM26
1:Disable TP607 RSVD_TP#AL25 RSVD#AM26 R610
RSVD#F5 F5
CFG4 W30 RSVD_TP#W30 RSVD#AM2 AM2 DY 1KR2F-3-GP
0:Enable W31 RSVD_TP#W31 RSVD#K6 K6
2 R608 1 H_CPU_RSVD40 W34
2
49D9R2F-GP TESTLO_W34
RSVD#E18 E18
CFG4 1 CFG0 AT20
TP615 CFG1 CFG_0
1 AR20 CFG_1 RSVD#U10 U10
1
Title
CPU (RESERVED)
Size Document Number Rev
A3
2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 6 of 103
5 4 3 2 1
5 4 3 2 1
CPU2E 5 OF 9
HASWELL AA26
VCC
VCC AA28
K27 RSVD#K27 VCC AA34
L27 RSVD#L27 VCC AA30
T27 RSVD#T27 VCC AA32
V27 RSVD#V27 VCC AB26
VCC AB29
D
1D35V_S0 AB25 D
VCC
VCC AB27
VCC AB28
1D05V_VTT VCCIO_OUT AB11 AB30
VDDQ VCC
AB2 VDDQ VCC AB31
1 R710 2 VCCIO_OUT AB5 VDDQ VCC AB33
DY 0R3J-0-U-GP AB8 VDDQ VCC AB34
AE11 VDDQ VCC AB32
VCCIO2PCH VCCIO2PCH_R AE2 AC26
VDDQ VCC
AE5 VDDQ VCC AB35
1 R708 2 VCCIO2PCH_R AE8 VDDQ VCC AC28
DY 0R3J-0-U-GP AH11 VDDQ VCC AD25
K11 VDDQ VCC AC30
N11 VDDQ VCC AD28
N8 VDDQ VCC AC32
T11 VDDQ VCC AD31
T2 VDDQ VCC AC34
T5 VDDQ VCC AD34
T8 VDDQ VCC AD26
W11 VDDQ VCC AD27
W2 VDDQ VCC AD29
W5 VDDQ VCC AD30
W8 AD32
VCCIO_OUT close to CPU VDDQ VCC
VCC AD33
N26 RSVD#N26 VCC AD35
VCC_CORE K26 VCC VCC AE26
AL27 RSVD#AL27 VCC AE32
1 2 H_CPU_SVIDDAT AK27 AE28
R703 130R2F-1-GP RSVD#AK27 VCC
VCC AE30
C AG28 C
VR_SVID_ALERT# VCC
1 2 VCC AG34
R704 75R2F-2-GP AE34
VCC
VCC AF25
VCC AF26
VCC_SENSE AL35 AF27
VCC_SENSE VCC
E17 RSVD#E17 VCC AF28
VCCIO_OUT VCCIO_OUT AN35 AF29
VCCIO2PCH_R VCCIO_OUT VCC
VCCIO2PCH_R A23 FC_A23 VCC AF30
VCCIOA_OUT F22 VCOMP_OUT VCC AF31
W32 RSVD#W32 VCC AF32
AL16 RSVD#AL16 VCC AF33
1D05V_VTT TP701 1 J27_RSVD J27 AF34
RSVD#J27 VCC
AL13 RSVD#AL13 VCC AF35
VCCIO_OUT AG26
VCC
1
VCC AH26
R706 43R2J-GP 2 R705 1 H_CPU_SVIDALRT# AM28 AH29
150R2J-L1-GP-U 46 VR_SVID_ALERT# VIDALERT# VCC
VCCIO_OUT
DY 46 H_CPU_SVIDCLK AM29 VIDSCLK VCC AG30
46 H_CPU_SVIDDAT AL28 VIDSOUT VCC AG32
AH32
2
VCC
1
SCD01U50V2KX-1GP
PW R_DEBUG
DY H27 PWR_DEBUG# VCC AH25
1
AP34 AH27
2
IST_TRIGGER VCC
AT34 VSS VCC AH34
AL22 VSS VCC AJ25
B B
AT33 VSS VCC AJ26
AM21 VSS VCC AJ27
AM25 VSS VCC AJ28
AM22 VSS VCC AJ29
AM20 VSS VCC AJ30
AM24 VSS VCC AJ31
AL19 VSS VCC AJ32
AM23 VSS VCC AJ33
AT32 VSS VCC AJ34
VCC AJ35
VCC G25
VCC H25
VCC J25
VCC K25
VCC_CORE L25
VCC
VCC M25
R701,R702 close to CPU Y25 VCC VCC N25
Y26 VCC VCC P25
Y27 VCC VCC R25
Y28 VCC VCC T25
VCC_CORE Y29 VCC
Y30 VCC VCC U25
Y31 VCC VCC U26
1
VCC
A 46 VCC_SENSE <Core Design> A
9,46 VSS_SENSE HASW E-U1
1
Title
CPU (VCC)
Size Document Number Rev
A3
2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 7 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
(Reserved)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (DDI/EDP)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 8 of 103
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU2F 6 OF 9
A10
HASWELL AK34 CPU2G 7 OF 9
VSS VSS
D A13 AK5 D
A16
VSS
VSS
VSS
VSS AL1 B34 VSS
HASWELL VSS K10
A19 VSS VSS AL10 B4 VSS VSS K2
A22 VSS VSS AL11 B7 VSS VSS K29
A25 VSS VSS AL12 C1 VSS VSS K3
A27 VSS VSS AL14 C10 VSS VSS K31
A29 VSS VSS AL15 C13 VSS VSS K33
A3 VSS VSS AL17 C16 VSS VSS K35
A31 VSS VSS AL18 C19 VSS VSS K4
A33 VSS VSS AL2 C2 VSS VSS K5
A4 VSS VSS AL20 C22 VSS VSS K7
A7 VSS VSS AL21 C24 VSS VSS K8
AA11 VSS VSS AL23 C26 VSS VSS K9
AA25 VSS VSS E22 C28 VSS VSS L11
AA27 VSS VSS AL3 C30 VSS VSS L26
AA31 VSS VSS AL4 C32 VSS VSS L6
AA29 VSS VSS AL5 C34 VSS VSS M11
AB1 VSS VSS AL6 C4 VSS VSS M26
AB10 VSS VSS AL7 C7 VSS VSS M28
AA33 VSS VSS AL8 D10 VSS VSS M30
AA35 VSS VSS AL9 D13 VSS VSS M32
AB3 VSS VSS AM10 D16 VSS VSS M34
AC25 VSS VSS AM13 D19 VSS VSS M6
AC27 VSS VSS AM16 D22 VSS VSS N1
AB4 VSS VSS AM19 D25 VSS VSS N10
AB6 VSS VSS E25 D27 VSS VSS N2
AB7 VSS VSS AM32 D29 VSS VSS N29
AB9 VSS VSS AM4 D31 VSS VSS N3
AC11 VSS VSS AM7 D33 VSS VSS N31
C AD11 AN10 D35 N33 C
VSS VSS VSS VSS
AC29 VSS VSS AN13 D4 VSS VSS N35
AC31 VSS VSS AN16 D7 VSS VSS N4
AC33 VSS VSS AN19 E1 VSS VSS N5
AC35 VSS VSS AN2 E10 VSS VSS N6
AD7 VSS VSS AN21 E13 VSS VSS N7
AE1 VSS VSS AN24 E16 VSS VSS N9
AE10 VSS VSS AN27 E4 VSS VSS P11
AE25 VSS VSS AN30 E7 VSS VSS P26
AE29 VSS VSS AN34 F10 VSS VSS P5
AE3 VSS VSS AN4 F11 VSS VSS R11
AE27 VSS VSS AN7 F12 VSS VSS R26
AE35 VSS VSS AP1 F14 VSS VSS R28
AE4 VSS VSS AP10 F15 VSS VSS R30
AE6 VSS VSS AP13 F17 VSS VSS R32
AE7 VSS VSS AP16 F18 VSS VSS R34
AE9 VSS VSS AP19 F20 VSS VSS R5
AF11 VSS VSS AP4 F21 VSS VSS T1
AF6 VSS VSS AP7 F23 VSS VSS T10
AF8 VSS VSS W25 F24 VSS VSS T29
AG11 VSS VSS AR10 F26 VSS VSS T3
AG25 VSS VSS AR13 F28 VSS VSS T31
AE31 VSS VSS AR16 F30 VSS VSS T33
AG31 VSS VSS AR19 F32 VSS VSS T35
AE33 VSS VSS AR2 F34 VSS VSS T4
AG6 VSS VSS AR22 F4 VSS VSS T6
AH1 VSS VSS AR25 F6 VSS VSS T7
AH10 VSS VSS AR28 F7 VSS VSS T9
AH2 VSS VSS AR31 F8 VSS VSS U11
B B
AG27 VSS VSS AR34 F9 VSS VSS U27
AG29 VSS VSS AR4 G1 VSS VSS V11
AH3 VSS VSS AR7 G11 VSS VSS V28
AG33 VSS VSS AT10 G2 VSS VSS V30
AG35 VSS VSS AT13 G27 VSS VSS V32
AH4 VSS VSS AT16 G29 VSS VSS V34
AH5 VSS VSS AT19 G3 VSS VSS W1
AH6 VSS VSS AT21 G31 VSS VSS W10
AH7 VSS VSS AT24 G33 VSS VSS W3
AH8 VSS VSS AT27 G35 VSS VSS W35
AH9 VSS VSS AT3 G4 VSS VSS W4
AJ11 VSS VSS AT30 G5 VSS VSS W6
AJ5 VSS VSS AT4 H10 VSS VSS W7
AK11 VSS VSS AT7 H26 VSS VSS W9
AK25 VSS VSS B10 H6 VSS VSS Y11
AK26 B13 H7 H11 RSVD_1 1 TPAD14-OP-GP TP901
VSS VSS VSS VSS RSVD_2 TPAD14-OP-GP TP902
AK28 VSS VSS B16 J11 VSS VSS AL24 1
AK29 B19 J26 F19 RSVD_3 1 TPAD14-OP-GP TP903
VSS VSS VSS VSS RSVD_4 TPAD14-OP-GP TP904
AK30 VSS VSS B2 J28 VSS VSS T26 1
AK32 B22 J30 AK35 VSS_SENSE VSS_SENSE 7,46
VSS VSS VSS VSS_SENSE RSVD_5 TPAD14-OP-GP TP905
E19 VSS J32 VSS RSVD#AK33 AK33 1
J34 VSS
J6 VSS
K1 VSS
HASW E-U1
HASW E-U1
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (VSS)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 9 of 103
5 4 3 2 1
5 4 3 2 1
VCCDDQ
VCC_CORE 1D35V_S0 22uF x 11
VCC_CORE 22uF x 19 10uF x 10
10uF x 11 330uF x 1
C1001 C1002 C1003 C1004 C1005 C1006 C1007 C1008 C1009 C1010 C1031 C1032 C1033 C1034 C1035 C1036 C1037 C1038 C1039 C1040 C1041
1
1
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
D D
DY
2
2
C1011 C1012 C1013 C1014 C1015 C1016 C1017 C1018 C1019 C1042 C1043 C1044 C1045 C1046 C1047 C1048 C1049 C1050 C1051
1
1
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
2
2
C C
C1020 C1021 C1022 C1023 C1024 C1025 C1026 C1027 C1028 C1029 C1030
1
1
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PC1001
SE330U2VDM-L-GP
2
2
79.33719.L01
2nd = 77.53371.21L
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
(Reserved)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(Power CAP2)
Size Document Number Rev
A3 2013 S-Series Shark Bay 14 15 17 1
Date: W ednesday, July 03, 2013 Sheet 11 of 103
5 4 3 2 1
5 4 3 2 1
DIMM1 M_A_DQS#[7:0] 5
M_A_DQS[7:0] 5
DIMM3 M_A_A[15:0] 5
M_A_A0 98 NP1
M_A_A1 A0 NP1
97 NP2
M_A_A2 A1 NP2
96
M_A_A3 A2
95 110 M_A_RAS# 5
M_A_A4 A3 RAS#
92 113 M_A_WE# 5
M_A_A5 A4 WE#
91 115 M_A_CAS# 5
M_A_A6 A5 CAS#
90
M_A_A7 A6
86 114 M_A_DIM0_CS#0 5
D M_A_A8 A7 CS0# D
M_A_A9
89
A8 CS1#
121 M_A_DIM0_CS#1 5 Note:
85
M_A_A10 A9 SA0_DIM0 If SA0 DIM0 = 0, SA1_DIM0 = 0
107 73 M_A_DIM0_CKE0 5
M_A_A11 A10/AP CKE0
84 74 M_A_DIM0_CKE1 5 SO-DIMMA SPD Address is 0xA0
M_A_A12 A11 CKE1 SA1_DIM0
83
A12
M_A_A13 119
A13 CK0
101 M_A_DIM0_CLK_DDR0 5 SO-DIMMA TS Address is 0x30
2
1
M_A_A14 80 103 M_A_DIM0_CLK_DDR#0 5
M_A_A15 A14 CK0# RN1202
78
A15
5 M_A_BS2
79
A16/BA2 CK1
102 M_A_DIM0_CLK_DDR1 5 SRN10KJ-5-GP If SA0 DIM0 = 1, SA1_DIM0 = 0
104 M_A_DIM0_CLK_DDR#1 5
109
CK1# SO-DIMMA SPD Address is 0xA2
5 M_A_BS0 BA0
108 11 SO-DIMMA TS Address is 0x32
3
4
5 M_A_BS1 BA1 DM0
5 M_A_DQ[63:0] DM1 28
M_A_DQ0 5 46
M_A_DQ1 DQ0 DM2
7 DQ1 DM3 63
M_A_DQ2 15 136
M_A_DQ3 DQ2 DM4
17 DQ3 DM5 153
M_A_DQ4 4 170
DQ4 DM6
RN
M_A_DQ5 6 187
M_A_DQ6 DQ5 DM7 RN1201 0R4P2R-PAD
16 DQ6
M_A_DQ7 18 200 SODIMM1_1_SMB_DATA_R 1 4
DQ7 SDA PCH_SMBDATA 13,18,63,67
M_A_DQ8 21 202 SODIMM1_1_SMB_CLK_R 2 3
DQ8 SCL PCH_SMBCLK 13,18,63,67
M_A_DQ9 23
M_A_DQ10 DQ9
33 DQ10 EVENT# 198 TS#_DIMM0_1 13
M_A_DQ11 35
M_A_DQ12 DQ11
22 DQ12 VDDSPD 199 3D3V_S0
M_A_DQ13 24 3D3V_S0
DQ13
1
M_A_DQ14 34 197 SA0_DIM0 C1204 C1203
M_A_DQ15 DQ14 SA0 SA1_DIM0
36 DQ15 SA1 201
SCD1U16V2KX-3GP
SC2D2U6D3V3KX-GP
M_A_DQ16 39
2
DQ16
1
M_A_DQ17 41 77
M_A_DQ18 DQ17 NC#1 R1202
51 DQ18 NC#2 122
M_A_DQ19 53 125 1D35V_S3 10KR2J-3-GP
M_A_DQ20 DQ19 NC#/TEST
40
C M_A_DQ21 42
DQ20
75 Thermal EVENT C
2
M_A_DQ22 DQ21 VDD1
50 DQ22 VDD2 76
M_A_DQ23 52 81
M_A_DQ24 DQ23 VDD3
57 DQ24 VDD4 82
M_A_DQ25 59 87
M_A_DQ26 DQ25 VDD5 TS#_DIMM0_1
67 DQ26 VDD6 88
M_A_DQ27 69 93
M_A_DQ28 DQ27 VDD7
56 94
M_A_DQ29 DQ28 VDD8
58 99
M_A_DQ30 DQ29 VDD9
68 100
M_A_DQ31 DQ30 VDD10
70 105
M_A_DQ32 DQ31 VDD11
129 106
M_A_DQ33 DQ32 VDD12
M_A_DQ34
131
DQ33 VDD13
111 SODIMM A DECOUPLING
141 112
M_A_DQ35 DQ34 VDD14 1D35V_S3
143 117
M_A_DQ36 DQ35 VDD15
130 118
M_A_DQ37 DQ36 VDD16
132 123
M_A_DQ38 DQ37 VDD17
140 124
M_A_DQ39 DQ38 VDD18
142
M_A_DQ40 DQ39
147 2
M_A_DQ41 DQ40 VSS C1207 C1213 C1209 C1217 C1211 C1214
149 3
DQ41 VSS
1
M_A_DQ42 157 8
DQ42 VSS
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
M_A_DQ43 159 9 DY DY
M_A_DQ44 DQ43 VSS
146 13
2
M_A_DQ45 DQ44 VSS
148 14
M_A_DQ46 DQ45 VSS
158 19
M_A_DQ47 DQ46 VSS
160 20
M_A_DQ48 DQ47 VSS
163 25
M_A_DQ49 DQ48 VSS
165 26
M_A_DQ50 DQ49 VSS
175 31
M_A_DQ51 DQ50 VSS
177 32
M_A_DQ52 DQ51 VSS
164 37
M_A_DQ53 DQ52 VSS C1210 C1212 C1215 C1216 C1208 C1218 C1219
166 38
DQ53 VSS
1
M_A_DQ54 174 43
B
M_A_DQ55 DQ54 VSS B
176
DQ55 VSS
44 DY
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_A_DQ56 181 48
2
M_A_DQ57 DQ56 VSS
183 49
M_A_DQ58 DQ57 VSS
M_A_DQ59
191
DQ58 VSS
54 Layout Note:
193 55
M_VREF_CA_DIMM0 M_A_DQ60 DQ59 VSS Place these Caps near
180 60
M_A_DQ61 DQ60 VSS
182 61 SO-DIMMA.
DQ61 VSS
1
DY M_A_DQ62 192 65
C1226 C1225 M_A_DQ63 DQ62 VSS
194 66
SCD1U16V2KX-3GP SC2D2U6D3V3KX-GP DQ63 VSS
71
2
M_A_DQS#0 VSS
10 72
M_A_DQS#1 DQS0# VSS
27 127
M_A_DQS#2 DQS1# VSS
45 128
M_VREF_DQ_DIMM0 M_A_DQS#3 DQS2# VSS
62 133
M_A_DQS#4 DQS3# VSS
135 134
DQS4# VSS
1
DQS7# VSS
145
M_A_DQS0 VSS
12 150
M_A_DQS1 DQS0 VSS
29 151
M_A_DQS2 DQS1 VSS
47 155
M_A_DQS3 DQS2 VSS
64 156
M_A_DQS4 DQS3 VSS
137 161
M_A_DQS5 DQS4 VSS
154 162
M_A_DQS6 DQS5 VSS
171 167
0D675V_S0 M_A_DQS7 DQS6 VSS
Place these caps 188
DQS7 VSS
168
172
close to VTT1 and VSS
116 173
5 M_A_DIM0_ODT0 ODT0 VSS
VTT2. 120 178
C1222 C1224 5 M_A_DIM0_ODT1 ODT1 VSS
179
VSS
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
189
2
A VSS A
13,37 DDR3_DRAMRST# 30 RESET# VSS 190
VSS 195
0D675V_S0 196 <Core Design>
VSS
203 VTT1 VSS 205
204 VTT2 VSS 206
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DDR3-204P-202-GP Taipei Hsien 221, Taiwan, R.O.C.
677747-FD8 H=9.2mm Title
1st = 62.10024.J11
DDR3_SODIMM1
Size Document Number Rev
Custom 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 12 of 103
5 4 3 2 1
5 4 3 2 1
5 M_B_A[15:0]
M_B_A0
M_B_A1
98
97
DIMM4
A0 NP1
NP1
NP2
DIMM2
M_B_A2 A1 NP2 3D3V_S0
96
M_B_A3 A2
5 M_B_DQS#[7:0] 95 110 M_B_RAS# 5
M_B_A4 A3 RAS#
92 113 M_B_WE# 5
M_B_A5 A4 WE#
5 M_B_DQS[7:0] 91 115 M_B_CAS# 5
M_B_A6 A5 CAS#
90
M_B_A7 A6
86 114 M_B_DIM0_CS#0 5
M_B_A8 A7 CS0#
89 121 M_B_DIM0_CS#1 5
M_B_A9 A8 CS1#
85
D M_B_A10 A9 D
107 73 M_B_DIM0_CKE0 5
M_B_A11 A10/AP CKE0
84 74 M_B_DIM0_CKE1 5 RN1302
M_B_A12 A11 CKE1 SB1_DIM0
83 1 4
M_B_A13 A12 SB0_DIM0
119 101 M_B_DIM0_CLK_DDR0 5 2 3
M_B_A14 A13 CK0
80 103 M_B_DIM0_CLK_DDR#0 5
M_B_A15 A14 CK0# SRN10KJ-5-GP
78
A15
79 102 M_B_DIM0_CLK_DDR1 5 Note:
5 M_B_BS2 A16/BA2 CK1
104 M_B_DIM0_CLK_DDR#1 5 SO-DIMMB SPD Address is 0xA4
CK1#
109 SO-DIMMB TS Address is 0x34
5 M_B_BS0 BA0
108 11
5 M_B_BS1 BA1 DM0
28
5 M_B_DQ[63:0] M_B_DQ0 DM1
5 DQ0 DM2 46
M_B_DQ1 7 63
M_B_DQ2 DQ1 DM3
15 DQ2 DM4 136
M_B_DQ3 17 153
M_B_DQ4 DQ3 DM5
4 DQ4 DM6 170
M_B_DQ5 6 187
M_B_DQ6 DQ5 DM7 RN1301 0R4P2R-PAD
16 DQ6
M_B_DQ7 18 200 SODIMM0_1_SMB_DATA_R 2 3
DQ7 SDA PCH_SMBDATA 12,18,63,67
M_B_DQ8 21 202 SODIMM0_1_SMB_CLK_R 1 4
DQ8 SCL PCH_SMBCLK 12,18,63,67
M_B_DQ9 23
M_B_DQ10 DQ9 3D3V_S0
33 DQ10 EVENT# 198 TS#_DIMM0_1 12
RN
M_B_DQ11 35
M_B_DQ12 DQ11
22 DQ12 VDDSPD 199
M_B_DQ13 24 DQ13
1
M_B_DQ14 34 197 SB0_DIM0 C1304 DY C1305
M_B_DQ15 DQ14 SA0 SB1_DIM0
36 DQ15 SA1 201
SCD1U16V2KX-3GP
M_B_DQ16 39 SC2D2U10V3ZY-1GP
2
M_B_DQ17 DQ16
41 DQ17 NC#1 77
M_B_DQ18 51 122
M_B_DQ19 DQ18 NC#2 1D35V_S3
53 DQ19 NC#/TEST 125
M_B_DQ20 40
M_B_DQ21 DQ20
42 DQ21 VDD1 75
M_B_DQ22 50 76
C M_B_DQ23 DQ22 VDD2 C
52 DQ23 VDD3 81
M_B_DQ24 57 82
M_B_DQ25 DQ24 VDD4
59 DQ25 VDD5 87
M_B_DQ26 67 88
M_B_DQ27 DQ26 VDD6
69 DQ27 VDD7 93
M_B_DQ28 56 94
M_B_DQ29 DQ28 VDD8
58 DQ29 VDD9 99
M_B_DQ30 68 100
M_B_DQ31 DQ30 VDD10
70 105
M_B_DQ32 DQ31 VDD11
129 106
M_B_DQ33 DQ32 VDD12
131 111
M_B_DQ34 DQ33 VDD13
141 112
M_B_DQ35 DQ34 VDD14
143 117
M_B_DQ36 DQ35 VDD15
130 118
M_B_DQ37 DQ36 VDD16
132 123
M_B_DQ38 DQ37 VDD17
M_B_DQ39
140
DQ38 VDD18
124 SODIMM B DECOUPLING
142
M_B_DQ40 DQ39 1D35V_S3
147 2
M_B_DQ41 DQ40 VSS
149 3
M_B_DQ42 DQ41 VSS
157 8
M_B_DQ43 DQ42 VSS
159 9
M_B_DQ44 DQ43 VSS
146 13
M_B_DQ45 DQ44 VSS
148 14
M_B_DQ46 DQ45 VSS TC1301 C1316 C1309 C1310 C1311 C1312 C1313
158 19
DQ46 VSS
1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
M_B_DQ47 160 20
DQ47 VSS
SE330U2VDM-L-GP
M_B_DQ48 163 25 79.33719.L01
M_B_DQ49 DQ48 VSS
165 26
2
M_B_DQ50 DQ49 VSS
M_B_DQ51
175
DQ50 VSS
31 2nd = 77.53371.21L
177 32
M_B_DQ52 DQ51 VSS
164 37
M_B_DQ53 DQ52 VSS
166 38
M_B_DQ54 DQ53 VSS
174 43
M_B_DQ55 DQ54 VSS
176 44
M_B_DQ56 DQ55 VSS
181 48
B
M_B_DQ57 DQ56 VSS B
183 49
M_B_DQ58 DQ57 VSS C1308 C1317 C1318 C1319 C1321 C1320 C1322
191 54
DQ58 VSS
1
M_B_DQ59 193 55 Layout Note:
DQ59 VSS
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_B_DQ60 180 60 DY
M_B_DQ61 DQ60 VSS Place these Caps near
182 61
2
M_B_DQ62 DQ61 VSS
192 65 SO-DIMMB.
M_B_DQ63 DQ62 VSS
194 66
DQ63 VSS
71
M_B_DQS#0 VSS
10 72
M_B_DQS#1 DQS0# VSS
27 127
M_B_DQS#2 DQS1# VSS
45 128
M_B_DQS#3 DQS2# VSS
62 133
M_VREF_CA_DIMM1 M_B_DQS#4 DQS3# VSS
135 134
M_B_DQS#5 DQS4# VSS
152 138
DQS5# VSS
1
M_B_DQS0 VSS
12 150
M_B_DQS1 DQS0 VSS
29 151
M_B_DQS2 DQS1 VSS
47 155
M_VREF_DQ_DIMM1 M_B_DQS3 DQS2 VSS
64 156
M_B_DQS4 DQS3 VSS
137 161
DQS4 VSS
1
DQS7 VSS
172
VSS
116 173
5 M_B_DIM0_ODT0 ODT0 VSS
120 178
5 M_B_DIM0_ODT1 ODT1 VSS
179
VSS
M_VREF_CA_DIMM1 126 184
VREF_CA VSS
M_VREF_DQ_DIMM1 1 185
VREF_DQ VSS
189
VSS
Place these caps 0D675V_S0 12,37 DDR3_DRAMRST# 30 RESET# VSS 190
A VSS 195 A
close to VTT1 and 196
VSS
VTT2. 203 VTT1 VSS 205
204 VTT2 VSS 206 <Core Design>
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Title
DDR3_SODIMM2
Size Document Number Rev
Custom 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 13 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
3D3V_S0
RN1506
SRN2K2J-1-GP
SSID = PCH PCH_HDMI_CLK
PCH_HDMI_DATA
1
2
4
3
D D
PCH2E 5 OF 11
M45 N40
CRT
53 CRT_DDC_DATA VGA_DDC_DATA DDPD_CTRLCLK
1
U39 VGA_IRTN
R1502 J42
DDPD_AUXN
DISPLAY
649R2F-GP
55 L_BKLT_CTRL N36 H43 PCH_TP1503 1 TP1503 TPAD14-OP-GP
EDP_BKLTCTL DDPB_AUXP
LVDS
C C
2
52 L_BKLT_EN K36 EDP_BKLTEN DDPC_AUXP K45
LYNX-POINT-GP-U
3D3V_S0 1 DY 2
1
B R1507 B
10KR2J-3-GP DY R1508
10KR2J-3-GP
RN1503
SRN8K2J-2-GP-U
ACCEL_INT 1 10 3D3V_S0
INT_PIRQB# 2 9 INT_PIRQD#
TOUCH_DET# 3 8 SC_PW RSV#
INT_PIRQA# 4 7 INT_PIRQC#
3D3V_S0 5 6 DGPU_PW R_EN#
1 0 Reserved
1 1 SPI(Default) Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
PCH ( PCI/CRT/DDI )
Document Number Rev
A3
2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 15 of 103
5 4 3 2 1
5 4 3 2 1
SSID = PCH
D D
USB2.0 Table
USB
Pair Device
0 FREE
9 OF 11 1 USB 3.0 I/O CONN. 1
PCH2I
2 USB 3.0 I/O CONN. 2
AW31 LYNX POINT B37
34 USB30_RXN3 PERN1/USB3RN3 USB2N0
34 USB30_RXP3 AY31 PERP1/USB3RP3 USB2P0 D37 USB 3.0 Conn. 1 3 USB 2.0 I/O CONN. 1
USB 3.0 Conn. 2 USB2N1 A38 USB_PN1 34
34 USB30_TXN3 BE32
BC32
PETN1/USB3TN3 USB2P1 C38
A36
USB_PP1 34 4 FREE
34 USB30_TXP3 PETP1/USB3TP3 USB2N2 USB_PN2 34 USB 3.0 Conn. 2
AT31
USB2P2 C36
A34
USB_PP2 34 5 FREE
PERN2/USB3RN4 USB2N3 USB_PN3 63
AR31 PERP2/USB3RP4 USB2P3 C34
B33
USB_PP3 63 USB 2.0 Conn. 1 6 Touch Panel
USB2N4
BD33
BB33
PETN2/USB3TN4 USB2P4 D33
F31
7 FREE
PETP2/USB3TP4 USB2N5
USB2P5 G31
K31
8 Fingerprint
USB2N6 USB_PN6 52 Touch Panel USB 2.0 I/O CONN. 2
C
AW33
AY33
PERN_3 USB2P6 L31
G29
USB_PP6 52 9 C
PERP_3 USB2N7
BE34
USB2P7 H29
A32
10 Camera
PETN_3 USB2N8 USB_PN8 63 Fingerprint
BC34 PETP_3 USB2P8 C32
A30
USB_PP8 63 11 FREE
USB2N9 USB_PN9 63
AT33
AR33
PERN_4 USB2P9 C30
B29
USB_PP9 63 USB 2.0 Conn. 1 12 NGFF WWAN
PERP_4 USB2N10 USB_PN10 52
BE36
USB2P10 D29
A28
USB_PP10 52 Camera 13 BT WLAN combo
PETN_4 USB2N11
BC36 PETP_4 USB2P11 C28
G26 USB_PN12 59
PCIe
USB2N12
AW36 PERN_5 USB2P12 F26 USB_PP12 59 WWAN
AV36 PERP_5 USB2N13 F24 USB_PN13 58
G24 USB_PP13 58 BT WLAN combo
USB
USB2P13
BD37 PETN_5
BB37 PETP_5
USB3RN1 AR26 USB30_RXN1 59
30 PCIE_RXN6 AY38 PERN_6 USB3RP1 AP26 USB30_RXP1 59 NGFF WWAN
30 PCIE_RXP6 AW38 PERP_6 USB3TN1 BE24 USB30_TXN1 59
LAN USB3TP1 BD23 USB30_TXP1 59
30 PCIE_TXN6 C1609 1 2 SCD1U16V2KX-3GP PCIE_TXN6_C BC38 AW26 USB30_RXN2 34
C1612 PETN_6 USB3RN2
30 PCIE_TXP6 1 2 SCD1U16V2KX-3GP PCIE_TXP6_C BE38 PETP_6 USB3RP2 AV26 USB30_RXP2 34 USB 3.0 Conn. 1
USB3TN2 BD25 USB30_TXN2 34
58 PCIE_RXN7 AT40 PERN_7 USB3TP2 BC24 USB30_TXP2 34
58 PCIE_RXP7 AT39 PERP_7 USB3RN5 AW29
WLAN USB3RP5 AV29
58 PCIE_TXN7 C1611 1 2 SCD1U16V2KX-3GP PCIE_TXN7_C BE40 BE26
C1616 PETN_7 USB3TN5
58 PCIE_TXP7 1 2 SCD1U16V2KX-3GP PCIE_TXP7_C BC40 PETP_7 USB3TP5 BC26
USB3RN6 AR29
B 3D3V_S5 B
63 PCIE_RXN8 AN38 PERN_8 USB3RP6 AP29
Media 63 PCIE_RXP8 AN39 PERP_8 USB3TN6 BD27
BE28 RN1601
C1606 USB3TP6
63 PCIE_TXN8 1 2 SCD1U16V2KX-3GP PCIE_TXN8_C BD42 PETN_8
R1602 18,58 WLAN_TRANSMIT_OFF# 8 1
63 PCIE_TXP8 C1603 1 2 SCD1U16V2KX-3GP PCIE_TXP8_C BD41 K24 USB_COMP 1 2 7 2
PETP_8 USBRBIAS# USB_OC2#
USBRBIAS K26 6 3
22D6R2F-L1-GP USB_OC5# 5 4
1D5V_S0 BE30 PCIE_IREF TP23 L33
M33 SRN10KJ-6-GP
TP24 0R0402-PAD-1-GP
WW ANSSD_M12DET_R R1604 1
WWAN
BB29 TP6 OC0#/GPIO59 P3 2 WW ANSSD_M12DET 59
OC1#/GPIO40 V1 BRD_ID4 20
U2 USB_OC2# RN1602
OC2#/GPIO41 USB_OC3# USB_OC4#
BC30 TP11 OC3#/GPIO42 P1 USB_OC3# 18 8 1
1D5V_S0 M3 USB_OC4# USB_OC7# 7 2
OC4#/GPIO43 USB_OC5# WW ANSSD_M12DET_R
OC5#/GPIO9 T1 6 3
1 2 PCIE_RCOMP BD29 N2 LANLINK_STATUS 18,31
18 PCIE_REQ3# PCIE_REQ3# 5 4
R1603 7K5R2F-1-GP PCIE_RCOMP OC6#/GPIO10 USB_OC7#
OC7#/GPIO14 M1
SRN10KJ-6-GP
LYNX-POINT-GP-U
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH ( PCIE/USB)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 16 of 103
5 4 3 2 1
A B C D E
SSID = PCH
3 DMI_RXN[3:0]
3 DMI_RXP[3:0]
3 DMI_TXN[3:0]
3 DMI_TXP[3:0]
PCH2B 2 OF 11
TP1703
TPAD14-OP-GP 1 PCH_PIN_R6 R6 C8 DSW ODVREN R1722 1 2 0R0402-PAD-1-GP RSMRST#
SUSACK# DSWVRMEN
System Power
4,63 XDP_DBRESET# R1707 1 20R0402-PAD-1-GP SYS_RESET# AM1 L13 PCH_DPW ROK R1723 1 DY 2 10KR2J-3-GP 3D3V_S0
SYS_RESET# Management DPWROK
24 SYS_PW ROK R1725 1 20R0402-PAD-1-GP SYS_PW ROK_R AD7 K3 PCIE_W AKE# 30,58,59,63
SYS_PWROK WAKE#
1 <Core Design> 1
R1721 2 DY 1 10KR2J-3-GP PM_SLP_LAN#
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH (DMI/FDI/PM )
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 17 of 103
A B C D E
A B C D E
SSID = PCH
3D3V_S5 RN1809
SRN10KJ-L3-GP
20130531 MV PCH2C 3 OF 11 CLK_BUF_REF14 1 10
1
CLK_BUF_CKSSCD_P 2 9 CLK_BUF_EXP_N
LYNX POINT R1801 CLK_BUF_CKSSCD_N 3 8 CLK_BUF_EXP_P
63 CLK_PCIE_MEDIA# 1 RF 2 CLK_PCIE_MEDIA#_N Y43 AB35 CLKOUT_PEG_A_N 2 RN1806 3 0R4P2R-PAD CLK_PCIE_VGA# 73 10KR2J-3-GP 4 7 CLK_BUF_DOT96_N
R1827 27R2J-1-GP CLKOUT_PCIE_N_0 CLKOUT_PEG_A_N Q1802 CLK_BUF_DOT96_P
1 4 5 6
Media 63 CLK_PCIE_MEDIA 1 RF 2 CLK_PCIE_MEDIA_P Y45 AB36 CLKOUT_PEG_A_P
CLK_PCIE_VGA 73
G DGPU_PWROK_PCH 20
2
R1828 27R2J-1-GP CLKOUT_PCIE_P_0 CLKOUT_PEG_A_P
RN
AB1 AF6 PEG_CLKREQ#_R D need very close to PCH
63 CLKREQ_MEDIA# PCIECLKRQ0#/GPIO73 PEGA_CLKRQ#/GPIO47
AA44
CLKOUT_PCIE_N_1 CLKOUT_PEG_B_N
Y39 DIS_PX S
AA42
CLKOUT_PCIE_P_1
Y38
PCIE_REQ1# CLKOUT_PEG_B_P 2N7002K-2-GP
4 59 WWAN_DET# 1 DY 0R2J-2-GP
2 AF1 2 1 R1808 4
R1825 PCIECLKRQ1#/GPIO18
U4 WLAN_TRANSMIT_OFF#
WLAN_TRANSMIT_OFF# 16,58
DY 10KR2J-3-GP 84.2N702.J31
PEGB_CLKRQ#/GPIO56
AB43
CLKOUT_PCIE_N_2 2nd = 84.07002.I31
CLKOUT_DMI_N
AF39 CLK_EXP_N 4 3rd = 84.2N702.W31
AB45
CLKOUT_PCIE_P_2
AF40 CLK_EXP_P 4
PCIE_REQ2# CLKOUT_DMI_P
AF3
PCIECLKRQ2#/GPIO20/SMI# CLKOUT_DP_N
AJ40 2 RN1807 3 0R4P2R-PAD CK_DP_SSC_N 4,87
CLKOUT_DP_N CLKOUT_DP_P
AD43 AJ39 1 4 CK_DP_SSC_P 4,87
CLKOUT_PCIE_N_3 CLKOUT_DP_P
AD45
PCIE_REQ3# CLKOUT_PCIE_P_3 CLKOUT_DPNS_N 3D3V_S0
16 PCIE_REQ3# T3 AF35 2 RN1808 3 0R4P2R-PAD CLK_DP_N_R 4,87
PCIECLKRQ3#/GPIO25 CLKOUT_DPNS_N
RN
AF36 CLKOUT_DPNS_P 1 4 RN1811
CLKOUT_DPNS_P CLK_DP_P_R 4,87
AF43 2 3
CLKOUT_PCIE_N_4 CLK_BUF_EXP_N
AF45 AY24 1 4
CLKOUT_PCIE_P_4 CLKIN_DMI_N
RN
PCIE_REQ4# V3 AW24 CLK_BUF_EXP_P
PCIECLKRQ4#/GPIO26 CLKIN_DMI_P RN1810 SRN2K2J-1-GP
AE44 AR24 CLK_BUF_CPYCLK_N 1 4
CLKOUT_PCIE_N_5 CLKIN_GND_N CLK_BUF_CPYCLK_P
AE42 AT24 2 3
PCIE_REQ5# CLKOUT_PCIE_P_5 CLKIN_GND_P
AA2 Q1801
PCIECLKRQ5#/GPIO44 CLK_BUF_DOT96_N SRN10KJ-5-GP
H33
CLKIN_DOT96N CLK_BUF_DOT96_P SMB_DATA
30 CLK_PCIE_LAN# AB40 G33 3 4 PCH_SMBDATA 12,13,63,67
CLKOUT_PCIE_N_6 CLKIN_DOT96P
30 CLK_PCIE_LAN AB39
CLKOUT_PCIE_P_6 CLK_BUF_CKSSCD_N
AE4 BE6 2 5
LAN CLK 17,30 CLKREQ_LAN# PCIECLKRQ6#/GPIO45 CLKIN_SATA_N
CLKIN_SATA_P
BC6 CLK_BUF_CKSSCD_P
58 CLK_PCIE_WLAN# AJ44 1 6
CLKOUT_PCIE_N_7 CLK_BUF_REF14
F45
REFCLK14IN CLK_PCI_FB
58 CLK_PCIE_WLAN AJ42 D17
CLKOUT_PCIE_P_7 CLKIN_33MHZLOOPBACK 2N7002KDW-GP
WLAN CLK 58 PCIE_CLK_WLAN_REQ# Y3
PCIECLKRQ7#/GPIO46 XTAL25_OUT
AL44 XTAL25_OUT 84.2N702.A3F PCH_SMBCLK 12,13,63,67
AM43 XTAL25_IN SMB_CLK 2nd = 75.00601.07C
TPAD14-OP-GP TP1810 PCIE_CLK_XDP_N XTAL25_IN
1 AH43
CLKOUT_ITPXDP_N CLK_48_USB30 TPAD14-OP-GP TP1805
C40 1
TPAD14-OP-GP TP1812 PCIE_CLK_XDP_P CLKOUTFLEX0/GPIO64
1 AH45
CLKOUT_ITPXDP_P CLK_27_NSSC TPAD14-OP-GP TP1802
F38 1
R1805 CLK_PCI_KBC_R CLKOUTFLEX1/GPIO65
24,86 CLK_PCI_KBC 1 2 22R2J-2-GP D44
CLKOUT_33MHZ0 CLK_48_KBC_PCH_SIO TPAD14-OP-GP TP1806
F36 1
R1807 CLK_PCI_FB_R CLKOUTFLEX2/GPIO66
87 CLK_PCI_FB 1 2 22R2J-2-GP E44
CLKOUT_33MHZ1 CLK_14M_KBC_P TPAD14-OP-GP TP1807 C1804
F39 1
TPAD14-OP-GP TP1803 CLKOUT_33MHZ2 CLKOUTFLEX3/GPIO67 XTAL25_OUT
1 B42 1 2 SC18P50V2JN-1-GP
CLKOUT_33MHZ2
AM45 1D5V_S0
TPAD14-OP-GP TP1804 CLKOUT_33MHZ3 ICLK_IREF
1 F41
1
CLKOUT_33MHZ3
3 AD38 2 3 3
R1806 CLK_PCI_LPC_R TP18 +VCCAXCK_VRM
65,86,88 CLK_PCI_LPC 1 2 22R2J-2-GP A40 AD39 R1813
CLKOUT_33MHZ4 TP19 1MR2J-1-GP X1801
AN44 XCLK_BIASREF 1 2 XTAL-25MHZ-181-GP
3D3V_S0 DIFFCLK_BIASREF R1810 7K5R2F-1-GP
CLOCK SIGNAL 1 4
2
RN1805 C1803
1 4 PCIE_REQ2# XTAL25_IN 1 2 SC18P50V2JN-1-GP
2 3 PCIE_REQ1# LYNX-POINT-GP-U 1st = 82.30020.D41
SRN10KJ-5-GP
2nd = 82.30020.G71
3rd = 82.30020.G61
Crystal follow S-Series2012
PCH2D 4 OF 11
LAD_2
N8 DRAMRST_CNTRL_PCH 37
1
LDRQ0# PCH_GPIO74
H6
PLT_ID2 SML1ALERT#/PCHHOT#/GPIO74
24,52 PLT_ID2 G20
LDRQ1#/GPIO23 SML1_CLK
K6
SML1CLK/GPIO58 DRAMRST_CNTRL_PCH 1
20,24,65,88 INT_SERIRQ AL11 2
SERIRQ SML1_DATA R1814 1KR2J-1-GP
N11
SML1DATA/GPIO75
AF11
CL_CLK
AJ11
SPI
LYNX-POINT-GP-U
3D3V_AUX_S5
1
2
RN1819
SRN2K2J-1-GP
4
3
3D3V_S5
1 1
U1802
SML1_DATA 1 6
PCH_KBC_DATA 24,26,74
2 5 <Core Design>
3 4 SML1_CLK
24,26,74 PCH_KBC_CLK
2N7002KDW-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
84.2N702.A3F Taipei Hsien 221, Taiwan, R.O.C.
2nd = 75.00601.07C
Title
PCH (PCI-E/SMBUS/CLOCK/CL)
Size Document Number Rev
A2 2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 18 of 103
A B C D E
A B C D E
Close to PCH
D1903
SSID = PCH RTC_AUX_S5 2 SATA_RXN5 D1902
RTC_X1 R1907 20KR2J-L2-GP INTVRMEN- Integrated SUS
3 DY_EMI 2 SATA_TXN4
1 2
1.05V VRM Enable
1 2 High - Enable internal VRs 1 SATA_RXP5 3 EMI
R1901
Low - Enable external VRs
1
1 2 RTC_X2 R1908 20KR2J-L2-GP C1903 1 SATA_TXP4
10MR2J-L-GP SC1U25V3KX-1-GP AZ5315-02F-GP
83.05315.0A0
2
AZ5315-02F-GP
PCH2A 1 OF 11
4
X1901
2nd = 83.5V3U2.0A0 83.05315.0A0 4
RTC
SC6D8P50V2CN-GP R1906 SRTC_RST# SATA_TXP_0
2 3 B9
2
SRTCRST#
SC6D8P50V2CN-GP
SATA
82.30001.661 SATA_RXN_2 BB9 2nd = 83.5V3U2.0A0 83.05315.0A0
2
2nd = 82.30001.B21 SATA_RXP_2 BD9
1
G1901 C1904 HDA_BITCLK B25 2nd = 83.5V3U2.0A0
RN1901 GAP-OPEN SC1U25V3KX-1-GP HDA_BCLK
SATA_TXN_2 AY13
1 8 HDA_SDOUT_R HDA_SYNC A22 AW13
2
27,86 HDA_CODEC_SDOUT HDA_CODEC_SYNC_R HDA_SYNC SATA_TXP_2
2 7
1
27 HDA_CODEC_SYNC HDA_BITCLK
27,86 HDA_CODEC_BITCLK 3 6 27 HDA_SPKR AL10 SPKR SATA_RXN_3 BC12
4 5 HDA_RST# BE12
27,86 HDA_CODEC_RST# HDA_RST# SATA_RXP_3
C24 HDA_RST#
SRN33J-7-GP-U AR13
SATA_TXN_3
AZALIA
27 HDA_SDIN0 L22 HDA_SDI0 SATA_TXP_3 AT13
K22 HDA_SDI1
Flash Descriptor Security Overide SATA_RXN4/PERN1 BD13 SATA_RXN4 56
G22 BB13
3 +V3.3A_1.5A_HDA Low = Default
HDA_SDI2 SATA_RXP4/PERP1 SATA_RXP4 56
HDD 3
HDA_SDOUT High = Enable F22 HDA_SDI3 SATA_TXN4/PETN1 AV15 SATA_TXN4 56
DY SATA_TXP4/PETP1 AW15 SATA_TXP4 56
1 R1905 2 HDA_SDOUT HDA_SDOUT A24 HDA_SDO
1KR2J-1-GP R1934 BC14 SATA_RXN5 56
HDD_HALTLED_R SATA_RXN5/PERN2
1 2 B17 BE14
63,87 HDD_HALTLED
1KR2J-1-GP ISO_PREP#
DOCKEN#/GPIO33 SATA_RXP5/PERP2 SATA_RXP5 56
ODD
C22 HDA_DOCK_RST#/GPIO13 SATA_TXN5/PETN2 AP15 SATA_TXN5 56
SATA_TXP5/PETP2 AR15 SATA_TXP5 56
1D5V_S0
3D3V_S0
No Reboot Strap AY5 SATA_RCOMP 1 2
SATA_RCOMP R1919 7K5R2F-1-GP
DY
1 R1904 2 HDA_SPKR Low = Default SATALED# AP3 SATA_LED# 20,63,87
1KR2J-1-GP HDA_SPKR High = No Reboot
PCH_JTAG_TCK_BUF AB3 AT1 PCH_GPIO21 PCH_GPIO21 20
JTAG_TCK SATA0GP/GPIO21
PCH_JTAG_TMS AD1 AU2 PCH_GPIO19 1D5V_S0
JTAG_TMS SATA1GP/GPIO19
PCH_JTAG_TDI SATA_IREF
JTAG
1 2 AE2 JTAG_TDI SATA_IREF BD4 1 2
R1922 0R0402-PAD-1-GP 3D3V_S5 R1918 0R0402-PAD-1-GP
PCH_JTAG_TDO AD3 BB2
R1933 1 JTAG_TDO TP8
Q1905 DY 2 1KR2J-1-GP HDA_SYNC
AB6 TP20 TP9 BA2
5V_S0 HDA_CODEC_SYNC_R S R1932 1 2 10KR2J-3-GP ISO_PREP#
C26 TP22
D HDA_SYNC
DY F8 TP25
1 2 HDA_SDO_G1 G DY
2 2
2N7002K-2-GP PLT_ID3
20,52,87 PLT_ID3 4 5
84.2N702.J31 BAT_GRNLED#_S
2nd = 84.07002.I31 10KR2J-3-GP PCH_JTAG_TCK_BUF 1 R1915 2 51R2J-2-GP
3rd = 84.2N702.W31 R1920 DY_PCH XDP
S
1
is sampled on the rising edge of RSMRST# signal. Due to potential leakage on the <Core Design> 1
codec (path to GND), the strap may not be able to achieve the Vihmin at PCH input.
BAT_GRNLED#_D
Therefore, platform may need to isolate this signal from the codec during the strap 10KR2J-3-GP
phase. R1921
Wistron Corporation
S
SSID = PCH
CRB pull 1K 6 OF 11
3D3V_S0 PCH2F
3D3V_S0
1
PCH_GPIO0 AT8 LYNX POINT
R2020 BMBUSY#/GPIO0
U2001
83 DGPU_PW ROK 1 A VCC 5 DY 10KR2J-3-GP 38 OCP_OC# F13 TACH1/GPIO1
4 4
82,83 PW R_VGA_CORE_PGOOD 2 DIS_PX 24 RUNSCI_EC# A14
2
B TACH2/GPIO6
CPU/Misc
3 4 DGPU_PW ROK_PCH 26 THERM_SCI# G15
GND Y TACH3/GPIO7
U74LVC1G08G-AL5-R-GP-U 18 PCH_GPIO8 PCH_GPIO8 Y1 GPIO8
73.01G08.EHG PCH_GPIO12
2nd = 73.7SZ08.EAH K13 LAN_PHY_PWR_CTRL/GPIO12
3rd = 73.01G08.L04 BRD_ID1 TP14 AN10 GATEA20 24
AB11 GPIO15
AY1 H_PECI_R 1 DY 2
PECI H_PECI 4,24
PCH_GPIO16 AN2 R2002 0R2J-2-GP
SATA4GP/GPIO16
RCIN# AT6 H_RCIN# 24
GPIO
18 DGPU_PW ROK_PCH C14 TACH0/GPIO17
PROCPWRGD AV3 H_CPUPW RGD 4
59,61 W W AN_TRANSMIT_OFF# W W AN_TRANSMIT_OFF# BB4
SCLOCK/GPIO22 PCH_THERMTRIP_R
THRMTRIP# AV1
PCH_GPIO24 Y10
3D3V_S5 GPIO24 PLT_PROC#
PLTRST_PROC# AU4 1 2 BUF_CPU_RST# 4
PCH_GPIO27 R11 R2001 0R0402-PAD-1-GP
GPIO27
VSS N10
RN2004 PCH_GPIO28 AD11 GPIO28
8 1 PCH_GPIO24
7 2 PCH_GPIO12 BRD_ID2 AN6 GPIO34 R2004
6 3 PM_RI# PM_RI# 17
5 4 PCH_GPIO57 BRD_ID3 AP1 GPIO35/NMI# 2 DY 1 1D05V_VTT
SRN10KJ-6-GP SATA_ODD_PRSNT# AT3 1KR2J-1-GP
SATA2GP/GPIO36
3 TLS_Encrytion AK1 PCH_THERMTRIP_R 1 R2003 2 H_THERMTRIP# 4,74
3
SATA3GP/GPIO37 390R2F-2GP
R2019 2 1 10KR2J-3-GP PCH_GPIO28 PCH_GPIO38 AT7 SLOAD/GPIO38
GPIO Table 10K PD,Rocky PL DY PCH_GPIO39 AM3 A2
3D3V_S0 SDATAOUT0/GPIO39 VSS
VSS A41
63,86 FPR_LOCK# FPR_LOCK# AN4 A43
SDATAOUT1/GPIO48 VSS
VSS A44
1 DY 2 TLS_Encrytion 56 SATA_ODD_DET# AK3 B1
SATA5GP/GPIO49 VSS
VSS B2
1
1
20120831 SA Swap
2
2
8 1 SATA_LED# SATA_LED# 19,63,87
1
1
5 4 W W AN_TRANSMIT_OFF#
R2028 R2029 R2033 R2036
2
2
R2026 2 FPR_LOCK# VBIOS_2G_1G VBIOS_1G
DY 1
1
10KR2J-3-GP
20130718 MV
1 2 SATA_ODD_PRSNT#
R2011 200KR2J-L1-GP
1 PCH_GPIO39 PCH_GPIO38 GPIO23 GPIO69 <Core Design> 1
SSID = PCH
1D5V_S0
R2102
0R3J-0-U-GP
1 2
0.1uF x 1 / 0.01uF x 1 DY
4
7 OF 11
10uF x 1 1D5V_DAC_S0
4
PCH2G
1
AA24 P43 C2109 C2111 C2110
VCC CRT DAC VSS
SCD01U50V2KX-1GP
SCD1U16V2KX-3GP
AA26 VCC
1uF x 3 AD20 M31 SC4D7U6D3V3KX-GP
3D3V_S0
2
VCC VCCADACBG3_3
1
10uF x 1 C2104 C2101 C2103 C2102 AD22 VCC
AD24 VCC 1D05V_VTT
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AD26 BB44 +VCCAXCK_VRM
2
VCC VCCVRM
AD28 VCC FDI
AE18 VCC VCCIO AN34 1uF x 1
AE20 VCC
1
AE22 AN35 3D3V_S0
VCC VCCIO C2113 C2112
AE24 VCC
AE26 R30 1 2 SC1U6D3V2KX-GP
2
VCC HVCMOS VCC3_3_R30
AG18 VCC VCC3_3_R32 R32
AG20 SCD1U16V2KX-3GP TP2102
VCC +V1.05M_VCCSUS TPAD14-OP-GP 3D3V_S5
AG22 VCC DCPSUS1 Y12 1
AG24 VCC
Y26 VCC VCCSUS3_3 AJ30 3.3V@0.261A 0.11uF x 1
Core
VCCSUS3_3 AJ32
1
C2105 C2114
SC1U6D3V2KX-GP R2101 AJ26 VCCA_USBSUS 1 TP2101 SCD1U16V2KX-3GP
USB3 DCPSUS3#AJ26
1 2 PCH_VCCDSW _R 1 2 PCH_VCCDSW U14 AJ28 TPAD14-OP-GP
2
5D1R2F-GP DCPSUSBYP DCPSUS3#AJ28
AA18 VCCASW VCCIO AK20 1D05V_VTT
U18 VCCASW VCCVRM AK26
U20 VCCASW VCCVRM AK28 +VCCAXCK_VRM
3 U22 3
1D05V_VTT VCCASW
U24 VCCASW VCCVRM BE22
1.05V@0.67A V18 VCCASW
PCIe/DMI
V20 VCCASW VCCIO AK18 1D05V_VTT
V22 VCCASW
1uF x 2 V24 VCCASW VCCVRM AN11
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VCCASW
VCCIO AM18
VCCIO AM20
VCCIO AM22
1
VCCMPHY
AP22 C2119 C2117 C2115 C2118 C2116
VCCIO
VCCIO AR22
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AT22
2
VCCIO
LYNX-POINT-GP-U
2 2
3D3V_S0
Check Current SPEC
20120718 SA 1D5V_DAC_S0
20120713 SA
U2101
300mA 1.5V OutPUT
1 IN OUT 5
2 GND
3 EN NC#4 4
1
C2124
1
C2125 SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2
AME8818BEEV150Z-GP
2
74.08818.I3F
2nd = 74.01339.B3F
3rd = 74.70215.03F
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH ( POWER1)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 24, 2013 Sheet 21 of 103
A B C D E
A B C D E
SSID = PCH
PCH2H 8 OF 11
+VCCSST
3D3V_S5 LYNX POINT 3D3V_S5
1
C2229
R24 R20 SCD1U16V2KX-3GP
VCCSUS3_3 VCCSUS3_3
R26 R22
2
VCCSUS3_3 VCCSUS3_3
1
4 C2201 R28 4
SCD1U16V2KX-3GP VCCSUS3_3 GPIO/LPC
U26 VCCSUS3_3
A16 +VCCPDSW
2
1D05V_VTT VCCDSW3_3
M24 VSS
AA14 +VCCSST 3D3V_S0
DCPSST
U35 VCCUSBPLL
AE14
USB
VCC3_3
1
1
C2202 AG14 C2227
VCC3_3
1
SCD1U16V2KX-3GP 1D05V_VTT U30 SCD01U50V2KX-1GP
2
C2203 VCCIO
V28
2
VCCIO
1
SCD1U16V2KX-3GP C2204 V30 U36 1D05V_VTT C2231 C2230 C2228
2
VCCIO VCCIO
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP Y30 VCCIO
2
+V1.05M_VCCDUSBSUS Y35 Azalia
DCPSUS2 +V3.3A_1.5A_HDA
VCCSUSHDA A26
+VCCAXCK_VRM +VCCAXCK_VRM AF34 VCCVRM
1
1D05V_VTT C2226
+V1.05S_VCC_AXCK AP45 K8 +VCCPRTCSUS SCD1U16V2KX-3GP
+V1.05M_VCCDUSBSUS VCC VCCSUS3_3
2 DY 1
2
R2201 0R2J-2-GP A6 RTC_AUX_S5
VCCRTC
1
C2205
RTC
DY SC1U6D3V2KX-GP M29 VCCCLK3_3 DCPRTC#P14 P14 +VCCRTCEXT
P16
2
DCPRTC#P16
1
L29 C2225
VCCCLK3_3 SCD1U16V2KX-3GP
L26 AJ12 VCCIO2PCH 1D05V_VTT
2
VCCCLK3_3 V_PROC_IO#AJ12 VCCIO2PCH
M26 VCCCLK3_3 CPU
V_PROC_IO#AJ14 AJ14
3D3V_S0 3D3V_S5 VCCIO2PCH 1 2
3 1uF x 4 3.3V@0.055A U32 R2209 0R0402-PAD-1-GP 3
VCCCLK3_3
1
ICC
V32 AD12 VCCSPI_PCH 1 2 C2224 C2222 C2223
VCCCLK3_3 SPI VCCSPI
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
R2208 0R0402-PAD-1-GP
1
AD34
2
VCCCLK
1
1
C2207 C2206 C2208 C2209 P18 C2221
VCC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2
VCCCLK VCC
AA32
2
VCCCLK
VCCASW L17
Fuse
AD35 VCCCLK
VCCASW R18 1D05V_VTT
AG30 VCCCLK
AG32 VCCCLK
VCCVRM AW40 +VCCAXCK_VRM
AD36 VCCCLK
AK30 3D3V_S0
VCC3_3
AE30 VCCCLK Thermal
1D05V_VTT AE32 AK32
VCCCLK VCC3_3
1uF x 4 1.05V@0.306A
1
Y32 3D3V_S5
VCCCLK C2220
LYNX-POINT-GP-U SC1U6D3V2KX-GP +VCCPDSW 1 2
2
1
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2217
SCD1U16V2KX-3GP
2
2
2 2
3D3V_S5
+VCCPRTCSUS 1 2
R2204 0R0402-PAD-1-GP
1
20130718 MV
C2219
1D5V_S0 +V3.3A_1.5A_HDA 3D3V_S5 SC1U6D3V2KX-GP
2
1 R2202 2
0R0603-PAD-1-GP-U +VCCAXCK_VRM 1 2 3D3V_S0
1D05V_VTT R2203 0R0402-PAD-1-GP
1
DY L2201 1 2
1 2 +VCCAXCK_VRM C2216 R2206 0R0402-PAD-1-GP
IND-10UH-218-GP SC1U6D3V2KX-GP
2
68.10050.10Y 1D05V_VTT
2nd = 68.10090.10B
+V3.3S_VCCPFUSE 1 R2207 2
DY
1
0R2J-2-GP
1
C2232
SC10U6D3V3MX-GP C2218
2
SC1U6D3V2KX-GP
2
1D05V_VTT
L2202
1 2 +V1.05S_VCC_AXCK
1 <Core Design> 1
1
SC10U6D3V3MX-GP
68.4R71A.20C
Wistron Corporation
2
2nd = 68.4R71H.10F
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH ( POWER2 )
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 24, 2013 Sheet 22 of 103
A B C D E
5 4 3 2 1
SSID = PCH
D D
PCH2J 10 OF 11 PCH2K 11 OF 11
LYNX-POINT-GP-U
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH(VSS)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 23 of 103
5 4 3 2 1
A B C D E
VOLTAGE_ADC 38
2
44 CHG_RST 1 2
3D3V_AUX_S5 R2421 1 2 0R2J-2-GP SPI_CS1#_R R2422 0R0402-PAD-1-GP
18,65 SPI_CS1# DY 25,65 SPI_CS0#_FLASH
2
300R2J-4-GP 1 R2401 2 C2401 C2402
1
R2424 100KR2J-1-GP 25,65 SPI_SO_FLASH 0R0603-PAD-1-GP-U R2425
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
1 DY 2 KBC_GPIO36 1 20130718 MV 0R2J-2-GPDY DY
1
TPAD14-OP-GP TP2410
2
RN2401
VOLTAGE_ADC_R
1
8 1 KSI0
18,52 PLT_ID2
1
7 2 KSI1 C2403 C2405 C2406 C2404 C2407
KSI2 0R0402-PAD-1-GP 52,61,86 LID_SW #
4 6 3 4
5 4 KSI3 R2426 1 2 ADP_EN_L
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP
2
2
44 ADP_EN
KBC_GPIO43
SRN4K7J-10-GP R2428 1 2 300R2J-4-GP OCP_IN_ADC_L
38 OCP_A_IN
RN2402 R2429 1 2 300R2J-4-GP CURRENT_ADC_L
38 CURRENT_ADC
8 1 KSI4 TPAD14-OP-GP TP2409 1 KBC_GPIO37
7 2 KSI5 +VCC0 3D3V_AUX_S5
59 W W AN_OFF
6 3 KSI6 1 R2430 2 SPI_CS1#_R
KSI7 63 IMDAT 0R0402-PAD-1-GP
5 4
44 ADP_DET 1 R2431 2 ADP_DET_R
SRN4K7J-10-GP 0R0402-PAD-1-GP
58 W LAN_OFF
2
R2402
25,65 SPI_CLK_FLH 1070_VCC2 1 D2403
43,86 MAIN_BAT_DET# 2 3D3V_S0
R2435 1 DY 2 KSO5 0R0402-PAD-1-GP VOLTAGE_ADC 3 BAV99-14-GP
1
10KR2J-3-GP TPAD14-OP-GP TP2408 1 KBC_GPIO36
C2408 75.00099.K7D
SCD1U16V2KX-3GP 2nd = 75.00099.F7D
1
127
128
106
119
3rd = 75.00099.E7D
30
31
32
33
34
43
44
62
63
64
65
66
67
94
95
96
97
68
14
39
58
84
49
1
2
3
SC2200P50V2KX-2GP2 1 C2409 VOLTAGE_ADC_R U2401
ALARM_CKT#2/GPIO36
HSTCLK/GPIO41
GPIO39
AC_CKT#2/GPIO42
GPIO38
GPIO37
ADC1/GPIO46
GPIO35
GPIO34
Q/GPIO33
HSTDATAIN/GPIO43
HSTCS0#/GPIO44
FLCS0#
HSTDATAOUT/GPIO45
VCC0
VCC1
ADC3/GPIO23
VCC1
VCC1
VCC1
VCC1
VCC2
ADC_TO_PWM_IN
FLDATAIN
FLCLK
EMCLK
IMDAT
KDAT
EMDAT
FLDATAOUT
SC2200P50V2KX-2GP2 1 C2410 CURRENT_ADC_L 62,86 KSO[0..13] KSO0 3D3V_AUX_S5
21 KSO0
SC2200P50V2KX-2GP2 1 C2411 OCP_IN_ADC_L KSO1 20
KSO2 KSO1
19 KSO2 OUT0/SCI 124 NMI_SMI_DBG# 15,65
SC100P50V2JN-3GP 2 1 C2412 ADC_VREF_L KSO3 18 125
KSO4 KSO3 GPIO53/AB3_DATA FET_A CHARGER_DAT 44
17 KSO4 CFETA/OUT7/SMI# 123 83.R0304.D8F 2ND = 83.00751.08F 3rd = 83.R3004.A8F
SC2200P50V2KX-2GP2 1 C2413 ADP_ID_ADC_L KSO5 16 122 KBRST#_L K A KBC PIN
KSO6 KSO5 OUT8/KBRST D2401 CH751H-40-1-GP H_RCIN# 20
13 KSO6 OUT9/TACH2PWM_OUT 121 FAN_PW M 26
KSO7 12 120 122 KBRST#_L R2434 1 DY 2 10KR2J-3-GP
3 KSO8 KSO7 OUT10/PWM0 PW M_LED# BAT_GRNLED# 19,42 3
10 KSO8 CHRGCTL_PWM/OUT11 118 1 TP2403
TPAD14-OP-GP
KBC_AGND KSO9 9 115 8051TX/S3_LED# 1 4
KSO10 KSO9 8051RX/CAPS_LED
8 KSO10 1 TP2404
TPAD14-OP-GP 114 2 3
KSO11 7 107 CPPW R_EN
KSO12 KSO11 GPIO1 VREF_PECI R2437 1
6 KSO12/GPIO0/KBRST VREF_PECI 79 2 0R0402-PAD-1-GP 1D05V_VTT RN2403
KSO13 5 80 EC_PECI R2438 1 2 43R2J-GP SRN100KJ-6-GP
KSO13/GPIO18 GPIO3/PECI_DATA PGD_IN R2441 1 H_PECI 4,20
17,27,30,31,36,37,48,49,51,63,82 PM_SLP_S3# 81 GPIO4/KSO14 SYS_PWROK DELAY 99ms RESET_OUT#/GPIO6 60 2 0R0402-PAD-1-GP SYS_PW ROK 17
83 85 RSMRST#_R R2442 1 2 10KR2J-3-GP KBC_GPIO15 R2416 1 2 22KR2J-GP
62,65 8051_RECOVER#_NUMLOCK_LED# PW R_BTN_OUT#_KBC 4 GPIO5/KSO15 OUT1/RSMRST# RSMRST# 17,45
17 PM_PW RBTN# 1 2 GPIO24/KSO16 GPIO8/RXD 86 KBC_SPI_IO2 25
R2444 0R0402-PAD-1-GP KSO17 108 87 113 AMBER_BATLED# R2448 1 2 100KR2J-1-GP
61,86 KSO17 GPIO26/KSO17 GPIO9/TXD KBC_SPI_IO3 25,65
61,62,86,87 KSI[0..7] KSI0 KBC_PW R_ON R2446 1
29 KSI0 100 2 100KR2J-1-GP
KSI1 28 88
KSI1 GPIO11/AB2A_DATA PCH_KBC_DATA 18,26,74
KSI2 27 89 86 KBC_SPI_IO2 R2423 1 DY 2 10KR2J-3-GP
KSI2 GPIO12/AB2A_CLK PCH_KBC_CLK 18,26,74
KSI3 26 90
KSI4 KSI3 GPIO13/AB2B_DATA KBC_PROCHOT 4 8051_RECOVER#_NUMLOCK_LED# R2420 1
25 KSI4 GPIO14/AB2B_CLK 91 A_SD# 27 83 2 100KR2J-1-GP
KSI5 24 92 KBC_GPIO15
KSI6 KSI5 GPIO15/FAN_TACH1 TACH_FAN_IN_R VCC1_POR# R2433 1
KBC_AGND 23 KSI6 GPIO16/TACH2PWM_IN 101 77 2 10KR2J-3-GP
KSI7 22 102 KBC_GPIO17 1 DY 2
KSI7
KBC1126-NU-GP GPIO17/A20M GATEA20 20
2
FET_B R2439
GPIO52/PWM3
CFETB/GPIO10 116
R2415 70 113 1 DY 20R2J-2-GP
0R0402-PAD-1-GP 30 LAN_POW ER_EN# PWMOK_PWMDEAD#_CKT#2/GPIO51 BAT_LED# AMBER_BATLED# 42 PW R_BD_LED# 61
PWR_LED#/8051TX 115 8051TX/S3_LED# 65
17 PCH_SUSCLK_KBC 1 2 SUSCLK32_KBC_IN 71 32KHZ_INPUT FDD_LED#/8051RX 114 8051RX/CAPS_LED 65 3D3V_S0
VCC1
R2417 0R0402-PAD-1-GP 1 2
CAP
VSS
VSS
VSS
VSS
VSS
VSS
2
1
20130626 MV
72
11
37
47
56
82
104
117
15
C2415 R2418
3D3V_AUX_KBC KBC_CAP 1 2 10KR2J-3-GP
17,34,49,63,86 PM_SLP_S4#
SC4D7U6D3V3KX-GP 20130626 MV D2402
2
K A TACH_FAN_IN_R
26 TACH_FAN_IN CH751H-40-1-GP
3D3V_AUX_S5 U2402 83.R0304.D8F
2ND = 83.00751.08F
2
1
25 RTC_PW R G
DY DY Wistron Corporation
2
C2416
1
2
R2432 NC7W Z07P6X-1GP Taipei Hsien 221, Taiwan, R.O.C.
PW M_BREATH_LED# 61
S
DY 73.7WZ07.0AJ Title
1
4
To PCH From BIOS 4
R3 closley to PCH side R1 closley to SPI ROM side
R3 R1
18 PCH_SPI_MOSI R2501 1 2 0R0402-PAD-1-GP SPI_MOSI R2502 1 2 33R2J-2-GP SPI_MOSI_C
20120812 SA
From KBC RTC Battery
R6
R2510 1 2 0R0402-PAD-1-GP SPI_SI_FLASH 24,65
R2511 1 2 0R0402-PAD-1-GP RTC Battery+Cable
SPI_SO_FLASH 24,65
R2512 1 2 0R0402-PAD-1-GP
PN:23.21212.033 3D3V_AUX_S5
SPI_CS0#_FLASH 24,65 RTC_AUX_S5
2nd=23.21221.023
R2514 1 2 0R0402-PAD-1-GP U2501
SPI_CLK_FLH 24,65
3 R2523 1 2 0R0402-PAD-1-GP KBC_SPI_IO2 24 2 3
+RTC_VCC
R2524 1 2 0R0402-PAD-1-GP KBC_SPI_IO3 24,65 RTC1 3
3
1 +RTC_VCC 1 2 RTC_PW R 1
1
WWAN R2520 1KR2J-1-GP
2 C2505
4 DY CH715FGP-GP-U SC1U6D3V2KX-GP
2
1
SPI_CLK SPI_CLK 87 To RF CAP 83.R0304.D81
ETY-CON2-22-GP C2506
SC1U6D3V2KX-GP 2ND = 83.R2004.G81
2
20.F1841.002 3rd = 83.00040.E81
RTC_PWR
24
1st = 20.F1639.002
SYSTEM SPI ROM Socket 2nd = 20.F1841.002
3D3V_S5 3D3V_AUX_S5 3rd = 20.F1804.002
SPI_PW R
1
R2508 R2509 without WWAN
0R0402-PAD-1-GP +RTC_VCC
DY 0R2J-2-GP
RTC3
SPI_CS#0 R2517 1 2 4K7R2J-2-GP SPI_PW R
2
1 +RTC_VCC
PWR
R2513 1
NON-WWAN GND 2
2 3K3R2J-3-GP NP1 NP1
2 2
NP2 NP2 DY
1
20120831 SA
BIOS2 BIOS1 C2507
SPI_CS#0 1 8 SPI_PW R BAT-AAA-BAT-054-P06-GP-U SC1U6D3V2KX-GP
2
SPI_CS#0 1 DY VCC 8 SPI_PW R 62.70001.061
SPI_MISO_C CS# SPI_HOLD#_1 SPI_MISO_C SPI_HOLD#_1 1 R2515 2
2 SO/SIO1 HOLD# 7 2 7 2nd = 62.70014.001
SPI_W P#_1 3 6 SPI_CLK_C SPI_WP#_1 3 6 3K3R2J-3-GP SPI_CLK_C
WP# SCLK SPI_MOSI_C SPI_MOSI_C
4 GND SI/SIO0 5 4 5 3rd = 20.F2316.002
SKT-SPI8P-2-GP C2501 RTC Battery PN:23.22065.001
1
SC18P50V2JN-1-GP
DY C2502 C2503
1
SC68P50V2JN-1GP
SCD1U16V2KX-3GP
3rd = 72.25Q64.F01 DY
2
1 <Core Design> 1
Title
Flash(KBC+PCH)/RTC
Size Document Number Rev
A3 2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 25 of 103
A B C D E
5 4 3 2 1
Thermal Sensor,FAN
3D3V_S0 3D3V_S0
1
2
D D
RN2601
FAN PWM LEVEL = 5V SRN2K2J-1-GP
20mil 55 THERM_SDA
4
3
5V_S0 5V_S0 5V_S0_FAN U2603
NAND gate THERM_SDA 1 6 PCH_KBC_DATA 18,24,74
5
U2602 FAN1 67 Meter_SMBDATA 1 4
R2601 ACES-CON4-19-GP 67 Meter_SMBCLK 2 3 3 4
24 FAN_PW M 1 B VCC 5 2 1 1
THERM# 2 0R0402-PAD-1-GP 20.F1637.004 SRN0J-6-GP 2N7002KDW -GP
A FAN_PW M_R FAN_PW M_Y THERM_SCL
3 GND Y 4 1 2 2 2nd = 20.F1808.004 84.2N702.A3F
R2605 0R0402-PAD-1-GP 3 3rd = 20.F1579.004 2nd = 75.00601.07C
24 TACH_FAN_IN 1 2 TACH_FAN_IN_C 4 55 THERM_SCL PCH_KBC_CLK 18,24,74
1
74AHCT1G00GW -GP C2601 R2602 0R0402-PAD-1-GP
1st = 73.01G00.01G DY
SC47P50V2JN-3GP
2nd = 73.7SET0.0BG
6
3rd = 73.01G00.0BG
1
1
R2604
A B Y
1
R2603 C2602 10KR2J-3-GP
2K2R2J-2-GP SC1U6D3V2KX-GP
L L H 5V_S0_FAN 1 AFTP2801 AFTE14P-GP
2
1
C2603 U2601
2
FAN_PW M_Y 1 AFTP2802 AFTE14P-GP Q2601 B
L H H PMBS3904-3-GP SC2200P50V2KX-2GP 1 8 THERM_SCL
2
TACH_FAN_IN_C 1 AFTP2803 AFTE14P-GP DXP1 VDD SCL THERM_SDA
2 7
E
DXN1 D+ SDA
3 D- ALERT# 6 THERM_SCI# 20
H L H GND 1 AFTP2804 AFTE14P-GP THERM# 4 5
T_CRIT# GND
84.S3904.011
H L 2ND = 84.T3904.H11
H 3rd = 84.03904.X11 NCT7718W -GP
4th = 84.03904.E11 74.07718.0B9
2nd = 74.00781.AB9
Co-Layout
3D3V_S0
B U2604 B
95 25.5K G709T1UF-GP
74.00709.A7F
2nd = 74.00709.0BF
90 22.1K
2
A <Core Design> A
85 18.7K R2613
0R0402-PAD-1-GP
Wistron Corporation
1
Title
AVDD_CODEC
1 2
L2701 MCB1608S300IBP-GP 5V_S0
SCD1U16V2KX-3GP
PM_SLP_S3# 17,24,30,31,36,37,48,49,51,63,82
0R0402-PAD-1-GP
C2705
C2706
SC1U6D3V2KX-GP
68.00909.191
1
Vout = 4.75 V
10KR2J-3-GP
2nd = 68.00217.B11
1
R2705
R2706
Vout = 1.25(1+R1/R2)
2
DY AVDD_CODEC
Q2702
R2708
2
D 2 1 5V_S0 AVDD_CODEC_EN 3 4 TPS793475_NR D
10KR2J-3-GP U2701 AUD_AGND EN NC#4
2 GND
1 5
SCD1U16V2KX-3GP
IN OUT
C2712
SC2D2U6D3V3KX-GP
C2720
SC2D2U6D3V3KX-GP
46 34 AUD_V_B DY
61,86 SPK_MUTE_LED_CTRL DMIC1/GPIO0/SPDIFOUT1 V-
1
C2713
R2720 1 2 100R2F-L1-GP-U DMIC_CLK_R 2 C2707
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
52,86 DMIC_CLK DMIC_CLK/GPIO1
C2708
C2709
C2710
R2721 1 2 DMIC_DATA_R 4 37 AUD_VREG SCD1U16V2KX-3GP HPA01091DBVR-GP C2711 DY
52,86 DMIC_DATA DMIC_0/GPIO2 VREG(+2.5V)
1
0R0402-PAD-1-GP 48 SCD01U50V2KX-1GP
2
62 REC_MUTE_LED_CTRL SPDIFOUT0/GPIO3 AUDIO_AVDD
AUD_VREFOUT_B 24 VREFOUT_C/GPIO4 AVDD1 27
38 74.01091.03F
2
AVDD2 AUD_AGND
R2701 1 2 HDA_CODEC_SDIN0 8 39
19 HDA_SDIN0 33R2J-2-GP HDA_CODEC_SDOUT 5 SDATA_IN PVDD 3D3V_S0
19,86 HDA_CODEC_SDOUT SDATA_OUT PVDD 45
AUD_AGND
HDA_CODEC_BITCLK 6 9
19,86 HDA_CODEC_BITCLK HDA_CODEC_SYNC 10 BITCLK DVDD
3
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
19 HDA_CODEC_SYNC HDA_CODEC_RST# 11 SYNC DVDD_IO C2701 SC10U6D3V3MX-GP
3D3V_S0 19,86 HDA_CODEC_RST# RESET#
1
C2702
C2704
C2703
47 1 AUD_DVDDCORE 1 2
EAPD DVDD_CORE
AUD_SENSE_A
DY
13 28
2
AUD_SENSE_B SENSE_A PORTA_L
14 SENSE_B PORTA_R 29
1
R2722 25 31
10KR2J-3-GP MONO_OUT PORTB_L HP_OUT_L 63
23 VREFOUT_A PORTB_R 32 HP_OUT_R 63
from KBC AUD_PC_BEEP 12 PCBEEP AUD_EXT_MIC_L C2722
D2701 19 2 1 SC1U25V3KX-1-GP
2
C 83.R0304.D8F C
2ND = 83.00751.08F C2724 42 44 AUD_SPK_R+
SCD1U16V2KX-3GP PVSS PORTD_+R AUD_SPK_R- AUD_SPK_R+ 29
3rd = 83.R3004.A8F 43
2
PORTD_-R AUD_SPK_R- 29
26 AVSS1
PORTE_L 15
30 AVSS2 PORTE_R 16
33 AVSS2
PORTF_L 17
7 DVSS PORTF_R 18
49 36 PUMP_CAPP
GND CAP+ PUMP_CAPN
CAP- 35 1 2
3D3V_S0 AUD_AGND SC4D7U6D3V3KX-GP C2714 AUD_CAP2 AVDD_CODEC
2
AUD_V_B R2727
2
71.92H91.C03 100KR2J-1-GP
R2726 AUD_VREG
4K7R2J-2-GP
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1
AUD_SENSE_B
SC1U6D3V2KX-GP
C2717
C2718
1
1
C2715
C2716
HDA_RST#_CODEC
2
DMIC_CLK_R
86 DMIC_CLK_R
1
B AUD_SPK_R- C2731 SC2200P50V2KX-2GP SPK_R- R2707 1 3D3R2F-GP AUD_AGND AUD_AGND AUD_AGND AUD_AGND B
1 2 2
AVDD_CODEC
Tie Analog GND and Digital GND
1
under codec by a single point R2715
1
2
10KR2J-3-GP AUD_SENSE_A
2
1
1 2 MIC_DETECT# 63,86
MONO_L2 1 MONO_L_0 1 2 MONO_L_1 2 1AUD_PC_BEEP C2719 R2719 10KR2F-2-GP
G2702 1 2 GAP-CLOSE-PW R-3-GP C2727 R2723 C2725 SC1KP50V2KX-1GP
2
SCD1U16V2KX-3GP 100KR2J-1-GP 1 SCD1U16V2KX-3GP
D
Wistron Corporation
AUD_AGND 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
audio ground must be connect to Taipei Hsien 221, Taiwan, R.O.C.
19 HDA_SPKR
Title
digital ground with an 80 mil copper
AUD_AGND
bridge located directly under codec Audio Codec 92HD91
Size Document Number Rev
to prevent ESD latch up. A3 2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 27 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AUDIO AMP(Reserved)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 28 of 103
5 4 3 2 1
5 4 3 2 1
D D
AUD_SPK_R+ 1
AUD_SPK_R- 1
1 AFTP3133
AFTP3130
AFTP3131
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
C AFTE14P-GP AFTP3135 1 C
SPK1 AFTE14P-GP AFTP3136 1
6
RC2901
AUD_SPK_L+ 4 AUD_SPK_R- 1 2 EMI
27 AUD_SPK_L+ AUD_SPK_L- AUD_SPK_R+
27 AUD_SPK_L- 3 3 4
AUD_SPK_R+ 2 AUD_SPK_L- 5 6
27 AUD_SPK_R+ AUD_SPK_L+ 7 8
AUD_SPK_R- 1
27 AUD_SPK_R- SRC1KP50VM-GP
5 77.61021.03L
ACES-CON4-17-GP-U1
20.F1621.004
2nd = 20.F1937.004
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
MIC/SPEAKER/AUDIO JACK
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 29 of 103
5 4 3 2 1
5 4 3 2 1
Remove R3003
1
C3024 C3022 C3009 C3012 C3016 C3017
SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
D D
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
2
C3001 to C3017
DEL LanChip Power VDD10
cap near pin3,8,22,30
+3.3V_LAN_S5 Rising time
(10%~90%)
1
C3023 C3020 C3007 C3021
Spec >1mS and <100mS cap near pin11,32 <200mils
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
2
3D3V_LAN_S5
EEPROM LED OPTION USE '00'
R3004 => LED0 : ACT (Amber)
1
3D3V_LAN_S5
84.S3904.011 LAN_LED3# 1
60 mils (average 300mA)
2
LANXOUT
TP3001 TPAD14-OP-GP
C
LANXIN
VDD10
PCIE_W AKE#_LAN_B B Q3002
2nd = 84.T3904.H11
20130718 MV
PMBS3904-3-GP
C
3rd = 84.03904.X11 C
E
1
32
31
30
29
28
27
26
25
2KR2J-1-GP U3001
R3009 C3008
AVDD33
AVDD10
CKXTAL2
CKXTAL1
LED0
LED2
LED1/GPO
RSET
1
0R2J-2-GP 33 C3014 C3015 C3013
2
GND
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
SCD1U16V2KX-3GP
PCIE_W AKE#_LAN 2 1 20130805 MV
DY
2
SC1U6D3V2KX-GP
1 24 REGOUT
31 MDIP0 MDIP0 REGOUT VDDREG
31 MDIN0 2 MDIN0 VDDREG 23
VDD10 3 22 VDD10
AVDD10 DVDD10 PCIE_W AKE#_LAN
31 MDIP1 4 MDIP1 LANWAKE# 21
3D3V_LAN_S5 rise time controlled between 0.5mS 5 20 ISOLATE#
31 MDIN1 MDIN1 ISOLATE#
6 19 PLT_RST# 4,15,19,56,58,59,63,65,73,86,87,88
and 100mS. 31 MDIP2
7
MDIP2 PERST#
18 PCIE_RXN6_R 1 2 C3011 SCD1U16V2KX-3GP
31 MDIN2 MDIN2 HSON PCIE_RXN6 16
VDD10 8 17 PCIE_RXP6_R 1 2 C3010 SCD1U16V2KX-3GP PCIE_RXP6 16
AVDD10 HSOP
REFCLK_N
REFCLK_P
CLKREQB
Put 4D7U L + 4D7U cap near pin24 <200mils
AVDD33
3D3V_S5 3D3V_LAN_S5
MDIN3
(2nd = 78.22610.81L)
MDIP3
HSIN
HSIP
Q3001
DMP2305U-7-GP RTL8151GH-CGT-GP-U1
9
10
11
12
13
14
15
16
71.08151.M05
S D Lan Power Inductance Spec
(1) IDC >= 600mA
(2) Tolerance < 20%
1
84.02305.G31 C3025
DB RTL8151GH
G
1
3D3V_LAN_S5
PCIE_TXN6 16
17,18 CLKREQ_LAN#
PCIE_TXP6 16 RTL8161GSH
2
LAN_POW ER_EN#_R
Install:L3003 C3030 C3031 C3026 C3001
DY:R3007
Regout Switch
1
R3002
Using Efuse
10KR2F-2-GP Without ASF
2
Q3004
1 6
25MHz Crystal Isolate Strap Pin
24,38 ADP_PRES 2 DY 5 PM_SLP_S3# 17,24,27,31,36,37,48,49,51,63,82
C3004 3D3V_S0
3 4 2 1 SC15P50V2JN-2-GP LANXOUT
1
A 2N7002KDW -GP <Core Design> A
R3011
1
2
XTAL-25MHZ-181-GP ISOLATE# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
X3001 Taipei Hsien 221, Taiwan, R.O.C.
2nd = 75.00601.07C
1
1st = 82.30020.D41
4
2
SC15P50V2JN-2-GP A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 30 of 103
5 4 3 2 1
5 4 3 2 1
close to XF3501
XF3101
D D
C3101 13 12 RJ45-8
30 MDIN3
2 1 XRF_RDC 15 10 MCT2 1 2 MCT2_C
14 11 RJ45-7 C3102 SCD01U50V2KX-1GP
30 MDIP3 1CT:1CT
SCD01U50V2KX-1GP
16 9 RJ45-5 SRN75J-1-GP
30 MDIN2
18 7 MCT3 1 2 MCT3_C
17 8 RJ45-4 C3103 SCD01U50V2KX-1GP 1 8 LAN_TERMINAL
30 MDIP2 1CT:1CT
2 7
19 6 RJ45-6 3 6
30 MDIN1
21 4 MCT0 1 2 MCT0_C 4 5
20 5 RJ45-3 C3106 SCD01U50V2KX-1GP
30 MDIP1 1CT:1CT
RN3101
22 3 RJ45-2
30 MDIN0
24 1 MCT1 1 2 MCT1_C
23 2 RJ45-1 C3109 SCD01U50V2KX-1GP
30 MDIP0
2
1CT:1CT
XFORM-24P-60-GP C3104
SC1KP2KV6KX-GP
1
1st = 68.05009.30D
2nd = 68.89240.30D
3rd = 68.IH601.301
C C
RJ45 Connector
Q3102
wavelength : Orange 605mm need check
S GREEN_LED#
16,18 LANLINK_STATUS D
RJ45
G 14 (1)route on bottom as differential pairs.
White = Lan Link 3D3V_LAN_S5 9 Green
B (2)Tx+/Tx- are pairs. Rx+/Rx- are pairs. B
2N7002K-2-GP GREEN 10(+),9(-)
GREEN_LED# 1 2 GREEN_R_LED# 10 (3)No vias, No 90 degree bends.
84.2N702.J31 R3101 RJ45-1 1
470R2J-2-GP
(4)pairs must be equal lengths.
2nd = 84.07002.I31
17,24,27,30,36,37,48,49,51,63,82 PM_SLP_S3# 3rd = 84.2N702.W31 RJ45-2 2 (5)6mil trace width,12mil separation.
RJ45-3 3 YELLOW (6)36mil between pairs and any other trace.
RJ45-4 4
RJ45-5
12(+),13(-) (7)Must not cross ground moat,
5
RJ45-6 6 except RJ-45 moat.
RJ45-7 7
YELLOW = LAN ACK RJ45-8 8
3D3V_LAN_S5 12
AMBER
30,86 GREEN_LED# YELLOW _LED# 1 2 YELLOW _R_LED# 13
R3102 15
30,86 YELLOW _LED# 470R2J-2-GP
RJ45-12P-51-GP-U
22.10327.231
2nd = 22.10327.151
3D3V_LAN_S5 3D3V_LAN_S5 3rd = 22.10327.171
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
USB_VCCB
1 POWER
2 USB 2.0 D-
16 USB30_RXN2 R3412 1 2
0R0402-PAD-1-GP 3 USB 2.0 D+
USB2
4 GND
D USB3_RX2- 5 1 D
USB3_RX2+ SSRX- VBUS
6 SSRX+ 5 StdA_SSRX-
8 2 USB_1- 6 StdA_SSRX+
SSTX- D- USB_1+
9 SSTX+ D+ 3
7 GND
16 USB30_RXP2 R3415 1 2
0R0402-PAD-1-GP 10 8 StdA_SSTX-
CHASSIS#10
4 PGND CHASSIS#11 11
20130710 MV CHASSIS#12 12 9 StdA_SSTX+
7 GND CHASSIS#13 13
TR3403
16 USB_PP1 3 4 USB_1+
PUT CAP CLOSE to USB3 SKT-USB13-117-GP
16 USB_PN1 2 1 USB_1- 22.10339.U11
MCM1012B900FBP-GP-U
2nd = 22.10339.U51 USB 3.0/2.0 Port Pairing
3rd = 22.10341.I41
68.01012.201 2nd = 68.12109.20B
1st = 68.10129.20A 3rd = 68.00396.001 USB3.0 USB2.0
USB_1+
16 USB30_TXN2 C3403 1 2USB3_TXN2_C R3410 1 2
0R0402-PAD-1-GP USB_1-
SCD1U16V2KX-3GP Port 1 Port 0
1
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
USB3_TX2- Port 2 Port 1
USB3_TX2+ C3415 C3416
Port 3 Port 2
2
SCD1U16V2KX-3GP DY DY Port 4 Port 3
C C
USB3_RX3- 5 1
USB3_RX3+ SSRX- VBUS
6 SSRX+
8 2 USB_2-
SSTX- D- USB_2+
9 SSTX+ D+ 3
R3413 1 2
16 USB30_RXP3
0R0402-PAD-1-GP
4 PGND
CHASSIS#10
CHASSIS#11
10
11
USB POWER
20130710 MV CHASSIS#12 12
7 GND CHASSIS#13 13
TR3401
16 USB_PP2 3 4 USB_2+
PUT CAP CLOSE to USB2 SKT-USB13-117-GP
16 USB_PN2 2 1 USB_2-
MCM1012B900FBP-GP-U
68.01012.201 2nd = 68.12109.20B USB_2+ 100 mil
B USB_2- 5V_S5 USB_VCCB B
1st = 68.10129.20A 3rd = 68.00396.001
U3405
16 USB30_TXN3 C3401 1 2USB3_TXN3_C R3407 1 2
0R0402-PAD-1-GP 2 6
IN#2 OUT#6
1
1
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SCD1U16V2KX-3GP 3 7
IN#3 OUT#7
1
C3417 C3418 C3409 8 C3410 C3412 C3411
OUT#8
1
USB3_TX3- TC3402
2
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC10P50V2JN-4GP
SCD1U16V2KX-3GP
USB3_TX3+ 4 ST100U6D3VBM-5GP
2
EN/EN#
DY DY DY 1 77.C1071.081
2
GND
SCD1U16V2KX-3GP
5 FLT# GND 9 2nd = 77.C1071.18L
3rd = 77.81071.06L
20130710 MV 4th = 80.10715.L04
16 USB30_TXP3 C3404 1 2USB3_TXP3_C R3408 1 2 TPS2001CDGNR-GP
0R0402-PAD-1-GP 74.02001.079
2nd = 74.06288.079
17,24,49,63,86 PM_SLP_S4# 3rd = 74.02311.079
Ultra Low Capacitance TVS Arrays Ultra Low Capacitance TVS Arrays
(Pin5.6.7.8 No Internal Connection) (Pin5.6.7.8 No Internal Connection) 2A Active High
U3403 U3402 5V_S5 1 DY 27534B_OC#2
R3420 USB_VCCB 1 AFTP6201 AFTE14P-GP
USB3_TX3+ 1 10 USB3_TX3+ USB3_TX2+ 1 10 USB3_TX2+ 10KR2J-3-GP
USB3_TX3- IN1 NC#10 USB3_TX3- USB3_TX2- IN1 NC#10 USB3_TX2- AFTP6202 AFTE14P-GP
2 IN2 NC#9 9 2 IN2 NC#9 9 1
3 GND GND 8 3 GND GND 8
USB3_RX3+ 4 7 USB3_RX3+ USB3_RX2+ 4 7 USB3_RX2+
USB3_RX3- IN3 NC#7 USB3_RX3- USB3_RX2- IN3 NC#7 USB3_RX2-
5 IN4 NC#6 6 5 IN4 NC#6 6
2 5 Title
5V_S5
USB_2+ 3 4 USB_2- 75.04223.07C USB 2.0/ 3.0 Port
Size Document Number Rev
2nd = 75.02304.07C A3
IP4223CZ6-1-GP 2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 34 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
USB Charger
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 35 of 103
5 4 3 2 1
5 4 3 2 1
5V_S0 5V_S5
DY +5VALW to +5VS Transfer
1 2 1 S
U3601
D 8
3A +3VALW to +3VS Transfer
C3601 2 S D 7
SCD1U25V2KX-GP 3 S D 6 +1.5VU to +1.5VS Transfer
Run Power G
D 5
+V1.05M_LAN to +V1.05S Transfer
1
15V_S0 C3607
1
1 2 SPW ON SCD1U16V2KX-3GP QM3002M3-GP C3610
R3614 84.30023.037 SCD1U16V2KX-3GP
2
47KR2J-2-GP DY
2
1
20130722 MV 2nd = 84.01528.037
D C3615 D
SCD01U50V2KX-1GP
2
1 R3602 2 SPW ON_5V
0R0402-PAD-1-GP
5V_S5
1
DY C3616
SCD01U50V2KX-1GP
2
1
84.T3906.A11
1
2
E
DY
2
SCD1U25V2KX-GP 3 S D 6
1
D
3906_8384_CE
1
R3613 C3608 G
D
1
1
200KR2J-L1-GP SCD1U16V2KX-3GP C3611
4
1
R3610 C3606 U3603 QM3002M3-GP SCD1U16V2KX-3GP
2
124KR2F-GP SCD1U25V2KX-GP 2N7002K-2-GP 84.30023.037 DY
2
2
PM_SLP_S3 84.2N702.J31 2nd = 84.01528.037
2
2nd = 84.07002.I31
2
3rd = 84.2N702.W31
E
S
C Q3601 Q3603 20130722 MV C
1
2N7002K-2-GP 84.T3906.A11
C
2
3rd = 84.2N702.W31 4th = 84.M3906.B11 R3609 1D35V_S0 1D35V_S3
61K9R2F-GP
3906_84_C
D3601
G
S
2 1 2
1D35V_S0 1D35V_S3
3 DY PG3602 GAP-CLOSE-PW R-3-GP
U3604
1 75.00099.B7D 1 2 1 S D 8 1 2
2nd = 75.00099.O7D
3rd = 75.07000.07D
C3604
SCD1U25V2KX-GP
2 S
3 S
D
D
7
6
10A
D PG3603 GAP-CLOSE-PW R-3-GP
PM_SLP_S3# 17,24,27,30,31,37,48,49,51,63,82 BAV99-13-GP 4th = 75.00099.Q7D G
5
DY 1 2
1
C3609 C3612
4
SCD1U16V2KX-3GP DY QM3006M3-GP SCD1U16V2KX-3GP
84.03006.B37 DY PG3604 GAP-CLOSE-PW R-3-GP
2
1st = 84.30043.037 1 2
2nd = 84.01525.037
45 PW R_5V_PH 1 2 PW R_5V_PH_RC_1 1 2 PW R_5V_PH_RC_2 DY PG3605 GAP-CLOSE-PW R-3-GP
R3611 10R2J-2-GP C3605 SCD01U50V2KX-1GP 1 2 SPW ON_1D5V 1 2
R3616 0R2J-2-GP
1
DY C3618
B SCD01U50V2KX-1GP B
2
R3607
470R2J-2-GP U3605
5V_S0 1 2 +5VS_DC 3 4
PM_SLP_S3 2 5 PM_SLP_S3
1 6 +3VS_DC 1 2 3D3V_S0
R3605
2N7002KDW -GP 470R2J-2-GP
84.2N702.A3F
2nd = 75.00601.07C
A <Core Design> A
POK 5V_S0
POK Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
1 2
R3704 76K8R2F-GP 3D3V_S5
0D675V_S0
1
3D3V_S0
1 2 R3732
R3708 15KR2F-GP DY 0R2J-2-GP
2
R3703
2VREF 3K3R2J-3-GP V3.3A_DS3_R
C3701 C3707
1
1 2 1 2 SC1KP50V2KX-1GP 1D35V_S0
SCD1U16V2KX-3GP
R3706 R3730 R3729 DY
D3701 34K8R2F-1-GP PWR_GOOD 24,46,53,87 DY 100KR2J-1-GP DY 200R2F-L-GP
1
D 1 2 PM_SLP_S3#_R K A D
17,24,27,30,31,36,48,49,51,63,82 PM_SLP_S3# R3712 3K3R2J-3-GP 2VREF_R_APX- R3702
2
CH751H-40-1-GP 1K8R2-GP
83.R0304.D8F 17 PM_DRAM_PWRGD 1
IN B VCC
5
2ND = 83.00751.08F 1 R3710 2 1 2
2
3RD = 83.R3004.A8F 1MR2F-L-GP R3711 1 2 PM_SYS_PWRGD 2 DY
24,46,53,87 PWR_GOOD IN A
1MR2F-L-GP R3701 0R2J-2-GP R3733
POK_B_APX+_R
DY VDDPWRGOOD_R
3 4 1 2 VDDPWRGOOD 4
GND OUT Y 0R0402-PAD-1-GP
U3702
R3714
1
74VHC1G09DFT2G-GP
POK_A_APX+ 1 2 POK_A_APX+_R 73.01G09.AAH R3734
3K3R2J-3-GP
10KR2F-2-GP
2
1
R3715
6
1MR2F-L-GP C3702 R3717 PM_DRAM_PWRGD 1 2 VDDPWRGOOD_R
SC3300P50V2KX-1GP 49K9R2F-L-GP R3705 0R0402-PAD-1-GP
DY
+
4 8 8 4
-
2
1
51 1D5V_S0_POK 1 2 U3701A U3701B
R3719 3K3R2J-3-GP AP393SG-13-GP-U AP393SG-13-GP-U
7
Close to CPU
POK_B_APX+ 1 2 S3 Power Reduction Circuit SM_DRAMPWROK
R3720 10KR2F-2-GP 1D35V_S3
1
1st = 74.10393.A21 1st = 74.10393.A21
1
1D05V_VTT
DY 2ND = 74.00393.S21 2ND = 74.00393.S21
1
R3721 C3703 3rd = 74.00393.Y21 3rd = 74.00393.Y21
61K9R2F-GP SC3300P50V2KX-1GP R3707 S3 Power Reduction Circuit
2
R3724 1 2 15KR2F-GP Bom Not: 1st/2nd/3rd Add in BOM 1KR2J-1-GP
DY
2
SM_DRAMRST#
3D3V_S0 R3713 0R0402-PAD-1-GP
2
1 2
4 SM_DRAMRST# S R3727
1
C3704 1KR2J-1-GP
SCD1U16V2KX-3GP D SM_DRAMRST#_D 1 2 DDR3_DRAMRST# 12,13
C R3725 C
1
1 DY 2 G
4K99R2F-L-GP DY DY C3705
Q3703 SC100P50V2JN-3GP
2
DRAMRST_CNTRL_PCH_G 1 DY 2 DRAMRST_CNTRL_PCH 18
R3726 0R2J-2-GP
2
DY C3706
SCD047U16V2KX-1-GP
1
VREF circuit -M1 (Voltage Driver Network) & M3 (Driven by Processor) Implementation
1 2 DDR_WR_VREF01_B4 1 2DDR_WR_VREF01_D1
5 DDR_WR_VREF01 5 DDR_WR_VREF02
R1226 0R0402-PAD-1-GP R1208 0R0402-PAD-1-GP
1
1
SA_DIMM_VREFDQ C1201 SB_DIMM_VREFDQ C1202
SCD022U16V2KX-3GP SCD022U16V2KX-3GP
2
2
+V_VREF_PATH1 +V_VREF_PATH2
1
1
R1221
R1209 24D9R2F-L-GP
24D9R2F-L-GP
B B
2
2
1D35V_S3 1D35V_S3
DDR_VREF_S3
1 DY 2
R1225 0R2J-2-GP
1
R1214 R1228
1KR2F-3-GP 1KR2F-3-GP
SODIMM1
2
R1232
DDR_WR_VREF01_B4 1 2 M3_1D5V_DQ0 1 2 1 2 +V_SM_VREF 1 2
M_VREF_DQ_DIMM0 M_VREF_CA_DIMM0 +V_SM_VREF_CNT 5
R1216 2R2F-GP R1215 0R0402-PAD-1-GP R1235 0R0402-PAD-1-GP 2R2F-GP
1
1
1
R1220
R1230 1KR2F-3-GP C1223
1KR2F-3-GP SCD022U16V2KX-3GP
2
2
+V_VREF_PATH3
2
1
R1227
24D9R2F-L-GP
1D35V_S3
2
1
R1231
1KR2F-3-GP
2
A A
DDR_WR_VREF01_D1 1 2 M3_1D5V_DQ1 1 2 2 1
M_VREF_DQ_DIMM1 M_VREF_CA_DIMM1
R1234 2R2F-GP R1229 0R0402-PAD-1-GP R1218 0R0402-PAD-1-GP
1
SODIMM2
Wistron Corporation
2
Title
POK
Size Document Number Rev
A2 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 37 of 103
5 4 3 2 1
5 4 3 2 1
ADP OCP
5V_S0
5V_S0
ADP OCP
2
OCP_OC# 20 2VREF
R3803
DY 665KR2F-GP
2
R3804 5V_S0
D
1
C3801 1 2 OCP_MAIN#_APX R3812
200KR2F-L-GP DY SC1U6D3V2KX-GP Q3801 5V_AUX_S5
D DY 2N7002K-2-GP
20KR2F-L-GP
D
U3801 84.2N702.J31 U3802
1
1
APX_IN 1
DY 5 2nd = 84.07002.I31 2VREF_APX+ 1 5
2 + 2 +
1
OCP_MAIN#_R - -
3 4
DY 3rd = 84.2N702.W31 3 4 ADC_VREF 24
S
C3802
1
1
R3805 SCD1U16V2KX-3GP
2
APX321SEG-7-GP R3808 24 OCP_PW M_OUT APX321SEG-7-GP
1
200KR2F-L-GP 74.00321.J1F DY 74.00321.J1F
DY
2
2OCP_MAIN#_APX_R
DY
118KR2F-1-GP
2
1
1
43 OCP_MAIN#
BAV70T-GP R3816
200KR2F-L-GP
2 R3810
2
Q3802 100R2J-2-GP
R3811 BSS84-7-F-GP 3 1 2 OCP_A_IN 24
100R2J-2-GP
1 2LIMIT_SIGNAL_100R S D LIMIT_SIGNAL_D 1 84.T3906.A11 3D3V_AUX_S5
42,86 LIMIT_SIGNAL
K
2nd = 84.03906.F11
83.4R703.03H D3802 3rd = 84.T3906.E11 Q3804
BZT52H-C4V7-GP AD+ 4th = 84.M3906.B11 MMBT3906-4-GP
D3801
G
B
C 2nd = 84.BSS84.B31 R3826 C
1
3rd = 84.00084.E31 2ND = 83.BAV70.H11 3rd = 83.4R703.E3H R3822 LIMIT_SIGNAL_100R 1 2 LIMIT_SIGNAL_E E C
VBIAS 3rd = 75.00070.J7D 220KR2J-L2-GP
ILIM 44 8K06R2F-GP
1
C
R3813
2
VBIAS R3829
1 2 V_3.9K_R B Q3803 8K66R2F-GP
44 V_3.9K
PMBS3904-3-GP
1
100KR2J-1-GP
2
E
1
1
R3814
3K9R2J-1-GP C3803 R3823
SC3900P50V2KX-2GP
84.S3904.011 130KR2F-GP
2nd = 84.T3904.H11
2
3rd = 84.03904.X11 ADP_A_ID 24
2
4th = 84.03904.E11
1
AD+
R3832
For Layout: 45K3R2F-L-GP
C3808 Close to DCIN1
1
2
R3802 R3801,C3809 Close to U2701
49K9R2F-L-GP
AD+_RC 2
R3833
1 2 VOLTAGE_ADC 24
576KR2F-GP
B B
1
C3808 C3809
SC100P50V2JN-3GP
SCD22U10V2KX-1GP
R3801
49K9R2F-L-GP
2
2
2
R3820
44 ICS 1 2 CURRENT_ADC 24
46K4R2F-2-GP
1
C3805 C3804
1
SC100P50V2JN-3GP
SCD22U10V2KX-1GP
2
2
3D3V_AUX_S5 AD+_IN_G
1
R3818 R3817
22KR2J-GP 200KR2F-L-GP 2VREF
LMV331SQ3T2G-GP
R3825
2
U3804 R3821
C3807 R3824 41K2R2F-GP C3806 Wistron Corporation
SCD1U16V2KX-3GP 255KR2F-GP SCD1U16V2KX-3GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
2nd = 74.00331.A2F
2
Title
3rd = 74.00331.I2F
ADP OCP
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 38 of 103
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
1D05_M
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 39 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Variant Name>
Title
<Title>
D D
C C
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TPS51225_5V/3D3V
Size Document Number Rev
A2 2013 S-Series Shark Bay 14 15 17 1
Date: Wednesday, July 03, 2013 Sheet 41 of 103
5 4 3 2 1
5 4 3 2 1
5V_AUX_S5 R4202 1 2 1 2
DY L4203
MLVS0402M04-GP-U
U4201
1 6
AD+ DCIN1 AMBER_BATLED# 2 5 BAT_GRNLED#
24 AMBER_BATLED# BAT_GRNLED# 19,24
D 8 7 3 4 D
6 5
4 3 2N7002KDW -GP
K
1
84.2N702.A3F MLVS0402M04-GP-U
1
1
R4205 DY C4201 C4202 C4203 C4204 D4202 DC_PIN1 2 1 DC_PIN2 2nd = 75.00601.07CL4202
SC1U25V3KX-1-GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SCD1U25V2KX-GP
15KR2J-1-GP
P6SMB27A-1-GP
RF_DY DY ACES-CONN8D-GP
5V_AUX_S5 2
R4201
1 1 2
DY DY
2
2
1KR2J-1-GP
2
A
20.81633.008
1
DC_PIN2 DC_PIN2 86
D4201 2nd = 20.81650.008
L30ESD24VC3-2-GP
83.P6SMB.KAG
3
2ND = 83.P6SBM.EAG
83.03024.0A1
2nd = 75.04024.07D AD+ 1 AFTP8204 AFTE14P-GP
3rd = 83.00024.AA1 LIMIT_SIGNAL 38,86 AD+ 1 AFTP8203 AFTE14P-GP
LIMIT_SIGNAL 1 AFTP8202 AFTE14P-GP
DC_PIN2 1 AFTP8208 AFTE14P-GP
DC_PIN1 1 AFTP8209 AFTE14P-GP
1 AFTP8201 AFTE14P-GP
1 AFTP8206 AFTE14P-GP
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DCIN JACK
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 42 of 103
5 4 3 2 1
5 4 3 2 1
Battery Connector
D D
BT+
3D3V_AUX_S5
1
C C
2
R4301 R4302 R4303
2K2R2J-2-GP
2K2R2J-2-GP
100KR2J-1-GP
1
C4301
2
C4302
1
SC220P50V2KX-3GP SC220P50V2KX-3GP BT+ 1 AFTP3901 AFTE14P-GP
2
BT+ 1 AFTP3902 AFTE14P-GP
BATCN1
7 8
2 3 RN4301 AB1A_DATA_R 5 6 MAIN_BAT_DET#_C AB1A_DATA_R 1 AFTP3903 AFTE14P-GP
24,86 AB1A_DATA
1 4 SRN100J-3-GP AB1A_CLK_R 3 4 OCP_MAIN#_C
24,86 AB1A_CLK
1 2 MAIN_BAT_DET#_C 1 2 AB1A_CLK_R 1 AFTP3904 AFTE14P-GP
24,86 MAIN_BAT_DET# R4304 1KR2J-1-GP
ACES-CONN8D-GP
20.81633.008 MAIN_BAT_DET#_C 1 AFTP3905 AFTE14P-GP
2nd = 20.81650.008
OCP_MAIN#_C 1 AFTP3906 AFTE14P-GP
1
C4303
2
GND 1 AFTP3908 AFTE14P-GP
B B
1
C4305 DY
SC100P50V2JN-3GP
2
R4305
DY 100R2J-2-GP
1
OCP_MAIN# 38
3D3V_AUX_S5
D4302
AB1A_DATA 1 6 MAIN_BAT_DET#
I/O1 I/O4
2 GND VDD 5
AB1A_CLK 3 4 OCP_MAIN#
I/O2 I/O3
A <Core Design> A
AZC099-04S-1-GP
Reserved
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 43 of 103
5 4 3 2 1
5 4 3 2 1
4
PU4401 PU4402 TPCC8131-GP
PR4401
1 S D 8 1 S D 8 D01R3721F-GP-U 84.08131.037
2 S D 7 2 S D 7 DC_IN_R 1 2
3 S D 6 3 S D 6
D 5 D 5 2nd = 84.07121.037
2
G G
87
TPCC8065-H-GP DC_IN_R PG4401 PG4402
4
4
1
2
TPCC8131-GP 84.08065.B37 GAP-CLOSE-PW R-3-GP PC4405 PC4406
1
PC4401 PR4403 84.08131.037 2nd = 84.07506.037 GAP-CLOSE-PW R-3-GP PR4402
1
1
SC10U25V5KX-GP
SC10U25V5KX-GP
1
SCD1U25V3KX-GP
BQ24726_ACP BQ24726_ACN
1 P2_G
2
A
PR4404 PC4419 +VBAT_DEBUG
2
1
1
1
SCD1U25V2KX-GP
PD4401 PC4402 DY PC4403 PC4404
1 2
4K02R2F-GP
SCD1U25V2KX-GP
VIN_G CH035H-40PT0-GP PR4405 SC1U25V3KX-1-GP
2
1st = 83.R3504.08F SCD1U25V2KX-GP
1
100KR2J-1-GP
2
1
5
6
7
8
PR4406
D
D
D
D
PU4404 PU4405
PC4408 TPCC8065-H-GP
ACN
ACP
2
20 BQ24726_VCC 1 2 84.08065.B37
BQ24726_ACDRV VCC
4 2nd = 84.07506.037
2
G
4
S
S
S
ADP_EN_D BQ24726_CMSRC 3 17 BQ24726_BST
1 2BQ24726_BST_R
1 2
CMSRC BTST 1R3J-L1-GP PC4409 68.4R71A.20H
3
2
1
C BQ24726_ACDET 6 ACDET
SCD047U25V3KX-3-GP 2nd = 68.4R710.20RBT_L BT+ C
18 BQ24726_HG
D
HIDRV PL4401
PR4409
PQ4401 5
2N7002K-2-GP ACPRES BQ24726_PH BT_L
PHASE 19 1 2 1 2
84.2N702.J31
COIL-4D7UH-33-GP D02R3721F-GP-U
PC4412
2nd = 84.07002.I31
3rd = 84.2N702.W31 24 CHARGER_CLK 9 15 BQ24726_LG
SCL LODRV
1
PC4410
5
6
7
8
8
G
S
24 CHARGER_DAT SDA
2
D
D
D
D
SC10U25V5KX-GP
2
2
16 BQ24726_REGN PU4406 PG4403 PG4404
REGN
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PR4410 1 2V_3.9K_DLIM 11 TPCC8065-H-GP
SC10U25V5KX-GP
DLIM
3
ADP_EN 24 38 V_3.9K 10KR2J-3-GP
1
G
1 2 4 84.08065.B37
S
S
S
7 13 BQ24726_SRP 2nd = 84.07506.037
38 ICS IOUT SRP
3
2
1
PD4402 BAT54C-10-GP
38 ILIM 10 ILIM SRN 12 75.00054.J7D
2nd = 75.00054.F7D
1
3D3V_AUX_S5 3rd = 75.00054.E7D
24 ADP_DET
PR4411
74.24736.073 PC4414
BQ24726_SRN
21 AGND GND 14
3D3V_AUX_S5 1 2 SC1U25V3KX-1-GP
2
5V_S0 AD+ 47KR2J-2-GP
1
1
BQ24736RGRR-GP
1
PC4407 PC4411
1
2
1
PR4416
2
2
PD4403 R402-PAD-H16-GP
2
1 ZZ.00RES.021 PC4415
PR4417 SCD1U25V2KX-GP
1
3 1 2 1MR2F-L-GP 1 2 BQ24726_SRN_R
BQ24726_AGND PR4418
BQ24726_ACDET_L
2 R402-PAD-H16-GP
ZZ.00RES.021
BAS16-1-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
1
PC4417
1
1
2nd = 83.00016.M11 PR4419 DY PC4418
3rd = 83.00016.P11 20KR2F-L-GP PC4416 CHARGER_CLK 1 4
SC100P50V2JN-3GP CHARGER_DAT 2 3 SNUBBER
2
2
D
2
PC4420
K
1
1
PR4420 84.2N702.J31 BQ24726_AGND
10KR2F-2-GP BQ24726_AGND 2nd = 84.07002.I31 BQ24726_AGND
3rd = 84.2N702.W31 CH511H-30GP-GP
SC10U25V5KX-GP
2
2
2
A
83.1R003.M8F
G
S
2D2R3J-2-GP
R4401 2nd = 83.R5003.G8H
1
CHG_RST 24 DY
BQ24726_AGND
A BQ24726_PH_R <Core Design> A
BQ24726_AGND
2
CHARGER BQ24736
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 44 of 103
5 4 3 2 1
5 4 3 2 1
PW R_3V_ENTIP
83.00355.F1F
2nd = 83.00355.D1F
1
3rd = 83.04148.D1H
1
PR4501 +VBAT_DEBUG
PC4506 78K7R2F-GP 1SS355GP-GP RT8223_PW R 3D3V_AUX_S5
SCD01U50V2KX-1GP
DY AD+ 1SS355GP-GP PD4502
PD4501
2
PR4522
2
A K 1 2 +VBAT_DEBUG_R K A DCBATOUT DY
1
83.00355.F1F 33R5J-2-GP PR4525
PW R_5V_ENTIP 2nd = 83.00355.D1F PR4523 0R2J-2-GP
1
3rd = 83.04148.D1H DY PC4505 1 2
SCD1U25V3KX-GP
K
D
BT+ 1SS355GP-GP D
PD4503
2
1
DY 0R0402-PAD-1-GP PR4524
2
1
PR4502 A K PW R_5V3V_ENC 1 2PW R_ENC_R 2 PR4521 1
110KR2F-GP PC4507 PD4504 0R0402-PAD-1-GP 0R0402-PAD-1-GP KBC_PW R_ON 24
1
2 SCD01U50V2KX-1GP 83.00355.F1F PDZ27B-3-GP PC4521
A
2nd = 83.00355.D1F 83.27R03.E3F SCD47U10V2KX-GP
2
2
3rd = 83.27R03.G3F PD4505
A DY K
1SS355GP-GP
83.00355.F1F
2nd = 83.00355.D1F
DCBATOUT
RT8223 for 3V5V
RT8223_PW R
DCBATOUT
1
PC4509 PC4510 PC4511 PC4502 PC4501
DY D
SCD1U25V2KX-GP
SC10U25V5KX-GP
SC68P50V2JN-1GP
SC10U25V5KX-GP
SCD1U25V3KX-GP
DY
2
2
8
7
6
5
SCD1U25V2KX-GP
SC2200P50V2KX-2GP
SC10U25V5KX-GP
SC10U25V5KX-GP
2
2
D
D
D
D
PU4501
D
5
6
7
8
C TPCC8067-H-GP C
D
D
D
D
84.08067.A37 PU4502
2nd = 84.07410.A37 TPCC8067-H-GP
16
4 PU4503 84.08067.A37
G
2nd = 84.07410.A37
1 S
2 S
3 S
VIN
G
4
S
S
S
PC4512 PC4513
Iomax=5A SCD1U25V3KX-GP PR4503 PR4504 SCD1U25V3KX-GP
Iomax=5.5A
G S
3
2
1
OCP>9A S G 2 1PW R_3V_BOOT_R1
2D2R3J-2-GP
2PW R_3V_BOOT9 BOOT2 BOOT1 22 PW R_5V_BOOT1 2PW R_5V_BOOT1_R
2D2R3J-2-GP
1 2 PW R_5V_PH 36 OCP>9A
3D3V_S5 PW R_3V_HG 10 21 PW R_5V_HG 20130531 MV 5V_S5
PL4501 UGATE2 UGATE1 PL4502
1 2 PW R_3V_PH 11 20 PW R_5V_PH 1 2
IND-2D2UH-122-GP PHASE2 PHASE1
PW R_3V_LG PW R_5V_LG IND-3D3UH-57GP
68.2R21B.10J D 12 LGATE2 LGATE1 19
1
5
6
7
8
1
PC4519 2nd = 68.3R310.20R
D
D
D
D
D
D
D
D
VOUT2 VOUT1
1
77.C2271.45L PG4526 TPCC8065-H-GP TPCC8065-H-GP ST220U6D3VBM-3-GP
2
1
GAP-CLOSE-PWR-3-GP
PW R_3V_FB 5 FB2 2 PW R_5V_FB
FB1
GAP-CLOSE-PWR-3-GP
G
4 4 2nd = 84.07506.037
G
2
S
S
S
1 2 PW R_5V3V_EN
13 EN 23 PW R_5V_PGD 1 2
1 S
2 S
3 S
RSMRST# 17,24
2
3
2
1
PW R_3V_ENTIP6 PW R_5V_ENTIP
S G2nd = 84.07506.037 2VREF ENTRIP2 ENTRIP1 1
2VREF 3 15
REF PGND
1
PC4514 PW R_5V3V_TON 4 25
B TONSEL GND B
SCD22U10V2KX-1GP
1
DY SNUBBER
2
1
1
PR4509 0R2J-2-GP PR4510
PR4508 0R2J-2-GP
VREG3
VREG5
1 2
51125_FB1_R
1 2
51125_FB2_R PC4515 DY
2
2
PC4516
DY SC18P50V2JN-1-GP RT8223MZQW -GP-U SC18P50V2JN-1-GP
8
17
2
74.08223.B73 20121224 SB
2
3D3V_AUX_S5 5V_AUX_S5
3D3V_AUX_S5_5_51123
PG4528
2
PG4529 2D2R3J-2-GP
1
R4502
5V_AUX_S5_51123
1 2 1 2
1
1
PR4512 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP 2 1 20KR2F-L-GP DY
10KR2F-2-GP 0R0402-PAD-1-GP AMB_TEMP_SD# 26
SNUBBER 2VREF 1 2
PR4514 PW R_5V_PH_R
2
0R0402-PAD-1-GP
2
PW R_3V_PH DY
2
3D3V_AUX_S5 2 PR4515 1
0R2J-2-GP EC4506
1
1
DY SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP
2
2 PR4516 1 DY
2
PW R_VCC_VREF
1
37W: PR4601
PR4611 178K(64.17835.6DL) 69.60037.031
2
NTC-100K-10-GP 2nd = 69.60028.011
1
PR4615 487K(64.48735.6DL) PR4613
75R2F-2-GP PR4614 PR4615
PR4614 549K(64.54935.6DL)
2
549KR2F-GP 487KR2F-2-GP
DY
1
PC4602 SC4700P50V2KX-1GP
2
D 10KR2F-2-GP 1 2 D
PR4602
47W: 1 2
2
PR4611 90.9K(64.90925.6DL) PR4611 PR4612 PR4616 PR4617 PR4618
PR4615 274K(64.27435.6DL) 1 2 1 2 150KR2F-L-GP 150KR2F-L-GP 150KR2F-L-GP
PR4614 226K(64.22635.6DL) 2 1
178KR2F-GP 39K2R2F-L-GP
1
PC4601 SC1KP50V2KX-1GP
1 DY 75R2F-2-GP
2 PW R_VCC_B-RAMP
PR4603
PW R_VCC_F-Imax
PR4604
PWR_VCC_THERM
PW R_VCC_O-USR
PWR_VCC_OCP-1
PWR_VCC_IMON
1 2PW R_VCC_SLEW A
39KR2F-GP
PR4605
DCBATOUT 2 1PW R_VCC_VBAT PR4619
1
10KR3F-L-GP PC4610 3D3V_S0 1 2 PM_PW ROK 6,17
SC1U6D3V2KX-GP
16
15
14
13
12
11
10
9
PU4601
2
2KR2F-3-GP
THERM
IMON
O-USR
SLEWA
OCP-I
B-RAMP
F-IMAX
VBAT
20130802 MV
C 3D3V_S5 C
17 8 PW R_GOOD_C 1 PR4624 2
47 PW R_VCC_CSP1 CSP1 VR_ON 61K9R2F-GP PW R_GOOD 24,37,53,87
PR4627 19 6 PW R_VCC_PW M1 47
47 PW R_VCC_CSN2 CSN2 PWM1
0R0402-PAD-1-GP
47 PW R_VCC_CSP2 20 CSP2 PWM2 5 PW R_VCC_PW M2 47
1
1 2 PW R_VCC_GFB 23 2 PW R_VCC_VDD
7,9 VSS_SENSE PR4610 0R0402-PAD-1-GP GFB VDD
PR4628 1 2 PW R_VCC_VFB 24 1
7
0R0402-PAD-1-GP VCC_SENSE PR4609 0R0402-PAD-1-GP VFB VDIO
VR_HOT#
ALERT#
DROOP
1
COMP
VREF
VCLK
GND
GND
V5A
PR4621
TPS51631RSMR-1-GP 1 2 3D3V_S5
25
26
27
28
29
30
31
32
33
74.51631.A73
10R3F-GP
1
PC4606
SC1U25V3KX-1-GP
PW R_VCC_DROOP
2
B B
SC100P50V2JN-3GP
PC4603 PC4607
1 2 PW R_VCC_COMP VCCIO_OUT 1 2
PR4607 SCD1U16V2KX-3GP
PR4606
PW R_VCC_VREF
PWR_VCC_V5A
1 2 1 2
10KR2F-2-GP H_CPU_SVIDDAT 7
2K94R2F-GP
1 2H_CPU_SVIDDAT
2
1 2 1 2 H_CPU_SVIDCLK 7
SCD33U6D3V2KX-1-GP PR4623 54D9R2F-L1-GP
PWR_VCC_DROOP_R
10KR2F-2-GP SC330P50V2KX-3GP
H_PROCHOT# 4
PR4608
1
1 2 5V_S5
DY PC4608
2 SC47P50V2JN-3GP
10R3F-GP
1
PC4605
A SC1U25V3KX-1-GP <Core Design> A
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TPS51631_CPUCORE(1/2)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 46 of 103
5 4 3 2 1
5 4 3 2 1
PWR_DCBATOUT_VCCCORE1
PWR_DCBATOUT_VCCCORE2
1
1
PC4701 PC4702 PC4703 EC4702 PC4708
PWR_DCBATOUT_VCCCORE1 PU4701 5V_S5
PC4704 SC2D2U6D3V3KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V3KX-GP
SC1KP50V2KX-1GP
2
2
5 2 1 2
1
VIN VDD PC4711 PC4712 PC4713 EC4704 PC4709
PR4701 PR4702 PC4705
SC1KP50V2KX-1GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V3KX-GP
1 2PWR_VCC_SKIP#1 1 6 PWR_VCC_BOOTR1
1 2VCC_BOOTR1_R
1 2
2
46 PWR_VCC_SKIP# 0R0402-PAD-1-GP SKIP# BOOT_R 2D2R3-1-U-GP SCD1U25V3KX-GP 68.R1510.201
8 7 PWR_VCC_BOOT1 2nd = 68.R1510.10D
46 PWR_VCC_PWM1 PWM BOOT PL4701
VCC_CORE
PGND
D 3 4 PWR_VCC_VSW1 1 2 D
PGND VSW
2
COIL-D15UH-1-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
VCC_CORE
PG4719
PG4720
CSD97374Q4M-GP-U1 PR4703
2D2R2F-GP Iomax=21A
74.97374.043
VCC_VSW12_GP 1
DY PWR_DCBATOUT_VCCCORE2 PU4702 5V_S5 OCP>60A
2
PC4717 SC2D2U6D3V3KX-GP
20130718 MV
VCC_VSW1_R 5 2 1 2
VIN VDD
1VCC_VSW1_GP
1
PR4709 PC4718
PC4706 1 2 PWR_VCC_SKIP#2 1 6 PWR_VCC_BOOTR2
1 2VCC_BOOTR2_R
1 2
SC1500P50V2KX-2GP 46 PWR_VCC_SKIP# PR4708 0R0402-PAD-1-GP SKIP# BOOT_R 2D2R3-1-U-GP SCD1U25V3KX-GP
2
DY PWR_VCC_BOOT2
68.R1510.201
46 PWR_VCC_PWM2
8
PWM BOOT
7 PL4702 2nd = 68.R1510.10D VCC_CORE
20130408 SC
PGND
GAP-CLOSE-PWR-3-GP
PR4721 3 4 PWR_VCC_VSW2 1 2
PGND VSW
PG4725
2K32R2F-1-GP
2
COIL-D15UH-1-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
CSD97374Q4M-GP-U1
PG4721
PG4722
74.97374.043 PR4710
PR4704 2D2R2F-GP
1 2 20130718 MV
1
DY
2
17K8R2F-GP
VCC_VSW22_GP
VCC_VSW2_R
PR4706
PR4705 69.60037.011
1VCC_VSW2_GP
1
1 2VCC_CSN1_R
1 2 PWR_VCC_CSN1 46
2nd = 69.60013.131 PC4719
DCBATOUT PWR_DCBATOUT_VCCCORE1 SC1500P50V2KX-2GP
2
3K01R2F-3-GP NTC-10K-26-GP
PG4701 DY
1 2
PC4707 SCD15U10V3KX-4-GP
GAP-CLOSE-PWR-3-GP 1 2
GAP-CLOSE-PWR-3-GP
PG4702 PR4717
1
PG4726
1 2 2K32R2F-1-GP
PT4701 PWR_VCC_CSP1 46
SE68U25VM-3-GP GAP-CLOSE-PWR-3-GP
2
1
PG4703
C 1 2 PR4718 C
1 2
GAP-CLOSE-PWR-3-GP
PG4704
17K8R2F-GP
1 2 PR4720
79.68612.30L PR4719
2nd = 79.68612.3BL GAP-CLOSE-PWR-3-GP 1 2VCC_CSN2_R
1 2 PWR_VCC_CSN2 46
PG4705
1 2 3K01R2F-3-GP NTC-10K-26-GP 69.60037.011
2nd = 69.60013.131
GAP-CLOSE-PWR-3-GP
PG4706 PC4721 SCD15U10V3KX-4-GP
1 2 1 2
GAP-CLOSE-PWR-3-GP
PWR_VCC_CSP2 46
VCC_CORE VCC_CORE VCC_CORE
DCBATOUT PWR_DCBATOUT_VCCCORE2
PG4713
1 2
1
PG4714 DY DY
ST470U2D5VDM-12-GP
ST470U2D5VDM-12-GP
ST470U2D5VDM-12-GP
1 2 2 2 2
GAP-CLOSE-PWR-3-GP
3
3
PG4715
1 2
GAP-CLOSE-PWR-3-GP
PG4716
1 2
GAP-CLOSE-PWR-3-GP
PG4717
1 2
GAP-CLOSE-PWR-3-GP
PG4718
1 2
B B
GAP-CLOSE-PWR-3-GP
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TPS51631_CPUCORE(2/2)
Size Document Number Rev
A2
2013 S-Series Shark Bay 14115 17
Date: Monday, August 12, 2013 Sheet 47 of 103
5 4 3 2 1
5 4 3 2 1
1 2 PW R_VDDQ_EN
17,24,27,30,31,36,37,49,51,63,82 PM_SLP_S3#
PR4803 0R0402-PAD-1-GP
3D3V_S0
1
D D
PC4802 DY
1
SCD1U16V2KX-3GP
2
PR4805
100KR2F-L1-GP
PU4801
2
PW R_VDDQ_EN_L 2 1 28 1 PW R_VDDQ_PGOOD
0R0402-PAD-1-GP PR4812 EN PGOOD
1
PC4803 27 2 PW R_VDDQ_LP# 1 2
RA LP# DY
1
93K1R2F-L-GP PW R_VDDQ_MODE
PW R_VDDQ_VREF MODE 3 2
PR4811
DY 1
0R2J-2-GP
26
2
VREF
2
PR4814
PW R_VDDQ_REFIN_1 2 1 PW R_VDDQ_REFIN 25 4 1 DY 2 5V_S5
0R0402-PAD-1-GP PR4813 REFIN NC#4 PR4816 0R2J-2-GP
2D2R3-1-U-GP
1D05V_PWR
1
2
2 1 PW R_VDDQ_VSNS 22 7 PC4806
PC4805 SC10P50V2JN-4GP VSNS SW#7
SCD1U25V3KX-GP
1
1D05V_PW R
Panasonic ETQP3W1R0WFN
C 1 2 PW R_VDDQ_SLEW 21 8 C
PC4807 SC4700P50V2KX-1GP SLEW SW#8 PL4801 7x7x3.
Isat : 13 A , DCR 6.9+-15%mOhm
1 2 PW R_VDDQ_TRIP 20 9 PW R_VDDQ_SW 1 2
PR4818 DY 78K7R2F-GP TRIP SW#9 COIL-1UH-61-GP
19 GND 68.1R01D.20H
10
PGND 2nd = 68.1R010.20C
1
1
1
PG4811 PC4808
GAP-CLOSE-PWR-3-GP
SCD1U16V2KX-3GP
PR4820 PC4821 PC4822 PC4823 PC4824 PC4825 PC4826
5V_S5 18 11 DY
2
V5 PGND
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
2 1PW R_VDDQ_TRIP 2D2R5F-2-GP
5V_S5
2
PR4815 0R2J-2-GP
2
Reserve PR4915 for OCP setting. 17 12
1PWR_VDDQ_SUNB 2
VIN PGND
Pin19 direct connect
to thermal pad 16 13
VIN PGND
20130606 MV
1
PC4809 15 14
SC1U25V3KX-1-GP VIN PGND
GND
PW R_VDDQ_VSNS
2
PG4812
TPS51367RVER-1-GP
29
74.51367.A43 PC4810 PWR_VDDQ_GSNS 1 2
SC330P50V3KX-GP
DY
2
GAP-CLOSE-PW R-3-GP
B PW R_DCBATOUT_1D05 B
DCBATOUT PW R_DCBATOUT_1D05
1D05V_PW R 1D05V_VTT
PG4813 PC4812 PC4813 PC4811 PC4814
1 2
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
2
1
SCD1U25V3KX-GP
1 2
GAP-CLOSE-PW R-3-GP
GAP-CLOSE-PW R-3-GP PG4802
PG4815 1 2
1 2
GAP-CLOSE-PW R-3-GP
GAP-CLOSE-PW R-3-GP PG4803
PG4816 1 2
1 2
GAP-CLOSE-PW R-3-GP
GAP-CLOSE-PW R-3-GP PG4804
1 2
GAP-CLOSE-PW R-3-GP
PG4805
1 2
GAP-CLOSE-PW R-3-GP
PG4806
<Variant Name>
A 1 2 A
GAP-CLOSE-PW R-3-GP
PG4807 Wistron Corporation
1 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GAP-CLOSE-PW R-3-GP
Title
TPS51367_1D05V_VTT
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 48 of 103
5 4 3 2 1
5 4 3 2 1
1D35V_PW R 1D35V_S3
PG4906
1 2
GAP-CLOSE-PW R-3-GP
PG4907
1 2
GAP-CLOSE-PW R-3-GP
D PG4908 D
1 2
DCBATOUT GAP-CLOSE-PW R-3-GP
PG4909
5V_S5
20130725 MV 1 2
GAP-CLOSE-PW R-3-GP
PC4902 PG4910
2
1 2
1
SC10U25V5KX-GP
PC4903
5
6
7
8
SC68P50V2JN-1GP C4916 GAP-CLOSE-PW R-3-GP
1
D
D
D
D
PC4901 PU4901 SC22U25V5MX-GP PG4911
RF
2
FDMC8884-GP-U
SC1U25V3KX-1-GP 1 2
2
GAP-CLOSE-PW R-3-GP
PG4912
G
S
S
S
1 2
PU4902
1D35V_PWR
4
3
2
1
20 12 PC4904 GAP-CLOSE-PW R-3-GP
PGOOD V5IN
PW R_0D75V_EN PR4902
SCD1U25V3KX-GP 84.08884.A37 Iomax=13A PG4913
17 VTTEN 2nd = 84.00412.037 1 2
VBST 15 PW R_1D5V_VBST 1 2 VBST_R 1 2 OCP>19A
PWR_1D5V_EN 16 2D2R3J-2-GP GAP-CLOSE-PW R-3-GP
EN/PSV PG4914
PW R_1D5V_VREF6 14 PW R_1D5V_DRVH 1 2
VREF DRVH
1
1D35V_PW R
PR4903 PL4901 GAP-CLOSE-PW R-3-GP
R1 10KR2F-2-GP 13 PW R_1D5V_SW 1 2 PG4915
C SW C
1 2
COIL-D82UH-2-GP
2
1
PW R_1D5V_REFIN 8 11 TPS51216_DRVL 68.R8210.10V PC4905 GAP-CLOSE-PW R-3-GP
REFIN DRVL
SCD1U16V2KX-3GP
2nd = 68.R8210.20B DY PT4901 PG4916
SCD1U25V3KX-GP
1
10 SE330U2VDM-L-GP 1 2
2
PGND
5
6
7
8
PW R_1D5V_MODE 19 PG4919
SCD01U50V2KX-1GP
MODE
2
D
D
D
D
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PW R-3-GP
PC4906
200KR2F-L-GP
1
PU4903 PG4917
2
2 PR4905 1
18 9 1 2
30K1R2F-L-GP
1
TRIP VDDQS
1
PR4904
82K5R2F-GP
2
G
VTTIN 2 4 Close to output 79.33719.L01
0D675V_PW R
S
S
S
R2 5 PG4918
VTTREF Cap pin1
3 2nd = 77.53371.21L 1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PWR_1D5V_VDDQS
3
2
1
VTT
PC4910
PC4911
SCD1U16V2KX-3GP
2
1
PC4908 GAP-CLOSE-PW R-3-GP
PC4909
1 84.07678.037
PR49062
SCD22U10V2KX-1GP VTTS
21 GND 2nd = 84.SSA12.A37
4
2
2
VTTGND
7 GND
TPS51216RUKR-GP
DY
74.51216.073 1D35V_PW R
SNUBBER
1
PC4912 Vout=1.8*(R2/(R1+R2)) PW R_1D5V_SW
SC1U25V3KX-1-GP
2
3D3V_S0
B B
2
1
R4901
PR4901 2D2R3J-2-GP
10KR2F-2-GP
0D675V_PW R 0D675V_S0
1
DY
2
PG4920
D4901 CH751H-40-1-GP 1 2
0D675V_PWR PW R_1D5V_SW _R
17,24,27,30,31,36,37,48,51,63,82 PM_SLP_S3# K A PW R_0D75V_EN
GAP-CLOSE-PW R-3-GP
Iomax=1A
2
83.R0304.D8F PG4921
2ND = 83.00751.08F 1 2 EC4906
1
1
PC4913 GAP-CLOSE-PW R-3-GP
SCD47U10V2KX-GP
DY
2
20121114 SB
1 2 PW R_1D5V_EN
17,24,34,63,86 PM_SLP_S4# PR4907 0R0402-PAD-1-GP
1
A <Core Design> A
DY C4901
SCD1U16V2KX-3GP
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
(Reserved)
Size Document Number Rev
A3
2013 S-Series Shark Bay 14115 17
Date: W ednesday, July 03, 2013 Sheet 50 of 103
5 4 3 2 1
5 4 3 2 1
D D
1D5V_PW R1 1D5V_S0
3D3V_S5 PG5106
1 2
GAP-CLOSE-PW R-3-GP
PG5107
1 2
1
PR5115 PC5128
1 2 1D5_VCNTL SC10U6D3V3MX-GP
0424 0R0402-PAD-1-GP
2
1
PU5102
PC5130 1D5V_PW R1
SC1U6D3V2KX-GP
2
VIN#5 5
6 VCNTL VOUT#4 4
37 1D5V_S0_POK 1D5V_S0_POK 7 3
POK VOUT#3
1
1 2 1D5V_EN 8 2 PR5117
17,24,27,30,31,36,37,48,49,63,82 PM_SLP_S3# EN FB R1
1
PR5116 0R0402-PAD-1-GP 9 1 PC5126 PC5129
VIN#9 GND
SC100P50V2JN-3GP
9K1R2J-1-GP SC10U6D3V3MX-GP
2
1
C C
DY
2
APL5930KAI-TRG-GP 1D5_FB 0323
DY
74.05930.03D
2
PC5125
SC1U6D3V2KX-GP 2nd = 74.00101.03D
1
R2 PR5118
10K2R2F-GP
2
0323
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
APL5930_1D5V_S0
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 51 of 103
5 4 3 2 1
5 4 3 2 1
1 AFTP4901 AFTE14P-GP
Camera Pin Define +LCDVDD
LVDS1
LCD Connector GPIO23 GPIO69 1 AFTP4902 AFTE14P-GP
46 PLT_ID2 PLT_ID3
44 PLT_ID3 19,20,87
43 PLT_ID2 18,24
42 Rampage 14" 0 1
41 TXCLKA_L- 55
40 TXCLKA_L+ 55
39 Renegade 15" 1 0
D 38 TXOUTA_L0- 55 D
37 TXOUTA_L0+ 55
36 Ricochet 17" 1 1
35 TXOUTA_L1- 55
34 TXOUTA_L1+ 55
33
32 5V_S0
TXOUTA_L2- 55
31 TXOUTA_L2+ 55
30
29 TXCLKB_L- 55 D5203
28 TXCLKB_L+ 55
27 TXOUTB_L0- 55 1 6
26 TXOUTB_L0+ 55
25 2 5
24
TXOUTB_L1- 55
TXOUTB_L1+ 55
DY
23 TXOUTB_L2- 55 USB_PP6_C 3 4 USB_PN6_C
22 TXOUTB_L2+ 55
21
20 LCD_SMBDATA_C RN5202 2 3 0R4P2R-PAD LCD_SMBDATA 55 IP4223CZ6-1-GP
19 LCD_SMBCLK_C 1 4 LCD_SMBCLK 55
18 RN5201
17 CAM_USB_10- 68.00143.341 75.04223.07C
RN
16 CAM_USB_10+ 3 2 2nd = 68.00387.011 2nd = 75.09904.07C
15 4 1 3D3V_S0 3rd = 75.02304.07C
14 CAMERA_ON 15,87 1 2 3D3V_S0
13 L5201 BLM18HB221SN1D-GP
DMIC_CLK 27,86 SRN2K2J-1-GP
12 DMIC_DATA 27,86
3D3V_S0_CAM_R 5V_S0 3D3V_S0
11 1
R5208
DY 2
0R3J-0-U-GP
3D3V_S0_CAM
10 5V_S0_R 1 R5206 2
1
C 9 DISP_OFF# DISP_OFF# 86 0R0402-PAD-1-GP C
8 BRIGHTNESS_CTRL R5210 1 2 1KR2J-1-GP BKLT_CTL 55 C5212 DY C5213 DY C5214 20130724 MV
SC2D2U6D3V3KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
7 3D3V_S0 DY 9
2
6 1
5 +LCDVDD
2
4 2 USB_PP6 16
3 R5205 3 USB_PP6_C 20130730 MV
2 DY 100KR2J-1-GP 4 USB_PN6_C
USB_PN6 16
20.F2191.008 5
TOUCH_DET_C#
1 DCBATOUT_LCD 6
1
45 2nd = 20.F1261.008 7 DISP_OFF_R#
8 DISP_OFF_L#
R5213
ACES-CON44-1-GP 10 1 R5207 2
R5212 1
1
20.K0678.044 0R0402-PAD-1-GP
2nd = 20.K0809.044 TOUCH1 20130724 MV
ACES-CON8-44-GP
D5204
0R0402-PAD-1-GP
CH751H-40-1-GP DY
2
K
83.R0304.D8F
2ND = 83.00751.08F
0R2J-2-GP
3rd = 83.R3004.A8F 20130722 MV
3D3V_AUX_S5 TOUCH_DET# 15
LID_SW #
PCH_GPIO51 15
3D3V_S0
1
5V_S0
83.R0304.D8F R5201 20130722 MV
1
D5202 +LCDVDD 2ND = 83.00751.08F 100KR2J-1-GP
B R5214 B
3rd = 83.R3004.A8F
DMIC_DATA 1 6 CAM_USB_10+ 0R0603-PAD-1-GP-U close to PCH2
D5201
2
3D3V_S0
2 5 C5211 C5201 C5202 DISP_OFF# A K U5202 Form PCH
2
LID_SW # 24,61,86
1
1
SC68P50V2JN-1GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
5 1 5V_S0_R
DMIC_CLK CAM_USB_10- VCC A L_BKLT_EN 15
3 4 CH751H-40-1-GP
2
2
1
IP4223CZ6-1-GP To EMI CAP LCD_BL_EN 4 3 Form Translate C5206 DY
Y GND
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD01U50V2KX-1GP
SC47P50V2JN-3GP
SCD1U16V2KX-3GP
RF-DY 2 1 LCD_BL_EN 86
SC4D7U6D3V3KX-GP
R5202 2KR2J-1-GP
2
75.04223.07C
1
1 DY 2 U74LVC1G08G-AL5-R-GP-U 20130730 MV
R5219 0R2J-2-GP ENBLT 55
2nd = 75.02304.07C R5203
73.01G08.EHG
Near LCD1 CONN Form Translate 2nd = 73.7SZ08.EAH
100KR2J-1-GP 20130730 MV 3rd = 73.01G08.L04
2
1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 R5215 R5204 RT9724GB-GP C5203 C5204 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
15 LVDS_VDD_EN 2 DY 2nd = 69.50007.G71
SC1KP50V2KX-1GP
SCD1U25V3KX-GP
FILTER-4P-135-GP Taipei Hsien 221, Taiwan, R.O.C.
DY 100KR2J-1-GP 74.09724.09F 3rd = 69.50007.A31
2
2
2nd = 68.12109.20B Title
1
3rd = 68.00396.001
LCD Connector
To EMI CAP Size Document Number Rev
20130417 SC A3 1
86 LCDVDD_EN 2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 52 of 103
5 4 3 2 1
5 4 3 2 1
Q5302
84.02305.G31
CRT Connector 5V_S0
1
F5301
2 +5VS_CRT_F2
DMP2305U-7-GP
D S
2nd = 84.02377.031
3rd = 84.02305.I31
5V_S0_CRT
POLYSW -1D1A6V-9-GP
G
69.48001.081
CRT1 2nd = 69.50011.081
1
1CRTVDD_EN#_1
Transmission line 3rd = 69.50013.061
C5320 C5322
characteristic SC1U6D3V2KX-GP SC1KP50V2KX-1GP
2
impedance for RGB
D signals Zo = 37.5 Ohm D
1
2
R5320 R5319
Transmission line characteristic 10KR2J-3-GP 10KR2J-3-GP RN5301
impedance Zo= 50 Ohm SRN2K2J-1-GP
2
CRTVDD_EN#
CRT RGB
4
3
L5301
MUX_R 1 2 MUX_L_R 1 2 CRT_R
D
BLM18BB470SN1D-GP R5311 0R0402-PAD-1-GP
68.00084.B61 2nd = 68.00375.331 Q5301
L5302 2N7002K-2-GP CRT1
MUX_G 1 2 MUX_L_G 1 2 CRT_G 84.2N702.J31 16
BLM18BB470SN1D-GP R5312 0R0402-PAD-1-GP 2nd = 84.07002.I31
68.00084.B61 2nd = 68.00375.331 3rd = 84.2N702.W31 6
L5303 CRT_R 1 11
MUX_B 1 2 MUX_L_B 1 2 CRT_B
S
BLM18BB470SN1D-GP R5313 0R0402-PAD-1-GP 7
68.00084.B61 2nd = 68.00375.331 24,37,46,87 PW R_GOOD CRT_G 2 12 DDC_DATA_CON DDC_DATA_CON
R5301 75R2F-2-GP
R5302 75R2F-2-GP
R5303 75R2F-2-GP
C5301
C5302
C5303
C5304
C5305
C5306
C5307
C5308
C5309
8
1
CRT_B 3 13 CRT_HSYNC_CON_1
R1
1
1
C5319 DY 9
SCD1U16V2KX-3GP CRT_VSYNC_CON_1
DY DY DY 4 14
1
1
10 C5323 C5321
2
SC22P50V2JN-4GP
SC22P50V2JN-4GP
5 15 DDC_CLK_CON DY DY
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
2
2
2
C 17 C
1
Place these resistors as C5325 C5324
SC33P50V2JN-3GP
SC33P50V2JN-3GP
D-SUB-15-81-GP-U1 DY DY
the closest components to
20.20401.015
2
connector CRT1
3D3V_S0 1st = 20.20496.015
2nd = 20.21095.015
3rd = 20.21115.015
2
1
RN5307
Transmission line characteristic
SRN10KJ-5-GP impedance Zo = 50 Ohm Close to CRT1
5V_S0_CRT
2nd = 83.00199.CAE
B
3 GND Y 4 20120921 SA Delete R5314 R5315 R5316 TVLSC7004AC0-GP
B
15 CRT_HSYNC 1 RN5302 4 3D3V_S0
15 CRT_VSYNC 2 3 U74AHCT1G125G-AL5-R-GP-U
U5304
0R4P2R-PAD
U5302 5V @ ext. CRT side 6 CRT_R
1 5 CRT_G 1
OE# VCC
M_VSYNC 2 RN5303
A HSYNC_5 1 CRT_HSYNC_CON_1
4 2 5
3 4 VSYNC_5 2 3 CRT_VSYNC_CON_1
GND Y
C5318
C5317
U74AHCT1G125G-AL5-R-GP-U SRN33J-5-GP-U 4
73.1G125.D0G CRT_B 3
1
2nd = 73.07125.0AG DY DY
3rd = 73.1G125.0JH 83.07004.0AE
TVLSC7004AC0-GP
2
3D3V_S0
2nd = 83.00199.CAE
SC10P50V2JN-4GP
SC10P50V2JN-4GP
2
1
RN5304 3D3V_S0
SRN2K2J-1-GP
Q5303
3
4
CRT_DDC_DATA_R 4 3 DDC_DATA_CON
3D3V_S0
A <Core Design> A
5 2
15 CRT_DDC_DATA 2 RN5308 3
15 CRT_DDC_CLK 1 4
0R4P2R-PAD
6 1
Wistron Corporation
1
C5310 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2N7002KDW -GP DY
RN
2
2nd = 75.00601.07CDDC_CLK_CON Title
CRT Connector
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 53 of 103
5 4 3 2 1
5 4 3 2 1
2
D 2 D
R5423 HDMI_DATA2_R_C#_CON 3
D
DY 0R2J-2-GP HDMI_DATA1_R_C_CON 4
Q5403 5
2N7002K-2-GP HDMI_DATA1_R_C#_CON 6
1
84.2N702.J31 5V_S0_CRT HDMI_DATA0_R_C_CON 7
2nd = 84.07002.I31 8
3rd = 84.2N702.W31 HDMI_DATA0_R_C#_CON 9
HDMI_CLK_R_C_CON 10
1
3D3V_S0 C5402 11
S
HDMI_CLK_R_C# 1 2 HDMI_CLK_R_C#_CON HDMI_DATA1_R_C# 1 2 HDMI_DATA1_R_C#_CON SCD1U16V2KX-3GP HDMI_CLK_R_C#_CON 12
R5402 0R0402-PAD-1-GP R5406 0R0402-PAD-1-GP 13
2
14
1
HDMI_DATA0_R_C 1 2 HDMI_DATA0_R_C_CON HDMI_DATA2_R_C 1 2 HDMI_DATA2_R_C_CON DDC_CLK_HDMI 15
R5403 0R0402-PAD-1-GP R5407 0R0402-PAD-1-GP R5413 DDC_DATA_HDMI 16
DY 100KR2J-1-GP 17
18
HPD_HDMI_CON 19
2
21
23
SKT-HDMI23-84-GP
22.10296.881
2nd = 22.10296.941
3D3V_S0 3rd = 22.10296.911
HDMI_DATA0_R_C# 1 2 HDMI_DATA0_R_C#_CON HDMI_DATA2_R_C# 1 2 HDMI_DATA2_R_C#_CON
R5404 0R0402-PAD-1-GP R5408 0R0402-PAD-1-GP
C C
1
20130710 MV 20120924 SA Add R5401 ~ R5408 Q5402
G R5410
1MR2J-1-GP
D
2
C5403 1 2 SCD1U16V2KX-3GP HDMI_CLK_R_C# S HDMI_PCH_DET 15,86
3 HDMI_CLK_R#
1
C5404 1 2 SCD1U16V2KX-3GP HDMI_CLK_R_C
3 HDMI_CLK_R R5412 2N7002K-2-GP
C5405 1 2 SCD1U16V2KX-3GP HDMI_DATA0_R_C# 20KR2F-L-GP 84.2N702.J31
3 HDMI_DATA0_R# C5406 SCD1U16V2KX-3GP HDMI_DATA0_R_C
3 HDMI_DATA0_R 1 2 2nd = 84.07002.I31
3rd = 84.2N702.W31
2
C5410 1 2 SCD1U16V2KX-3GP HDMI_DATA1_R_C#
3 HDMI_DATA1_R# C5407 SCD1U16V2KX-3GP HDMI_DATA1_R_C
3 HDMI_DATA1_R 1 2
8
7
6
5
8
7
6
5
RN5406 RN5407 HDMI_DATA2_R_C_CON 1 10 HDMI_DATA2_R_C_CON
HDMI_DATA2_R_C#_CON IN1 NC#10 HDMI_DATA2_R_C#_CON
SRN680J-GP SRN680J-GP 2 IN2 NC#9 9
3 GND GND 8
HDMI_DATA1_R_C_CON 4 7 HDMI_DATA1_R_C_CON
B HDMI_DATA1_R_C#_CON IN3 NC#7 HDMI_DATA1_R_C#_CON B
5 6
1
2
3
4
1
2
3
4
IN4 NC#6
HDMI_PLL_GND
TVW DF1004AD0-1-GP
75.01004.073
2nd = 75.00524.073
3rd = 75.01045.073
5V_S0_CRT U5402
HDMI_DATA0_R_C_CON 1 10 HDMI_DATA0_R_C_CON
HDMI_DATA0_R_C#_CON IN1 NC#10 HDMI_DATA0_R_C#_CON
2 IN2 NC#9 9
3 GND GND 8
4
3
2nd = 75.00524.073
15 PCH_HDMI_CLK 4 3 DDC_CLK_HDMI 3rd = 75.01045.073
5 2
6 1
2N7002KDW -GP
15 PCH_HDMI_DATA
84.2N702.A3F
A 2nd = 75.00601.07CDDC_DATA_HDMI <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Routing Guidelines: Taipei Hsien 221, Taiwan, R.O.C.
CTRLDATA must be routed longer than CTRLCLK within 1000 mils (25.4 mm). Title
The total delay on CTRLDATA should be longer than CTRLCLK. HDMI Level Shifter/Conn
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 54 of 103
5 4 3 2 1
5 4 3 2 1
1
C5507 C5509
SCD47U10V2KX-GP C5508 SCD47U10V2KX-GP C5513 C5514 C5510
SC1U6D3V2KX-GP SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SC1U6D3V2KX-GP
2
D D
15 L_BKLT_CTRL
52 TXCLKA_L+
52 TXCLKA_L-
52 TXOUTA_L2+
52 TXOUTA_L2-
VDDIO
52 TXOUTA_L1+
52 TXOUTA_L1-
1
C5505 52 TXOUTA_L0+
SCD01U50V2KX-1GP
52 TXOUTA_L0-
2
56
55
54
53
52
51
50
49
48
47
46
45
44
43
U5501
NC#56
NC#55
VDDIO
TA0N
TB0N
TC0N
TCK0N
TD0N
TA0P
TB0P
TC0P
TCK0P
PWMI
TD0P
C5515 1 2 SCD1U16V2KX-3GP U1301_AUXN1 42
3 eDP_AUXN_CPU DAUXN TA1N TXOUTB_L0- 52
C5516 1 2 SCD1U16V2KX-3GP U1301_AUXP 2 41
3 eDP_AUXP_CPU DAUXP TA1P TXOUTB_L0+ 52
3 GND TB1N 40 TXOUTB_L1- 52
C5519 1 2 SCD1U16V2KX-3GP U1301_TXP0 4 39
3 eDP_TXP0_CPU DRX0P TB1P TXOUTB_L1+ 52
C C5520 1 2 SCD1U16V2KX-3GP U1301_TXN0 5 38 VDDIO C
3 eDP_TXN0_CPU DRX0N VDDIO
VDDRX 6 37
VDDRX TC1N TXOUTB_L2- 52
1
C5518 1 2 SCD1U16V2KX-3GP U1301_TXP1 7 36 C5506
3 eDP_TXP1_CPU DRX1P TC1P TXOUTB_L2+ 52
SCD01U50V2KX-1GP
C5517 1 2 SCD1U16V2KX-3GP U1301_TXN1 8 35
3 eDP_TXN1_CPU DRX1N TCK1N TXCLKB_L- 52
RST# 9 34
2
RST# TCK1P TXCLKB_L+ 52
1
12 31
RLV_LNK/GPIO0
52 BKLT_CTL
2
CSDA/MSDA
SW_OUT#15
SW_OUT#16
back light controlled to Panel VDDIOX
CSCL/MSCL
14 29
TESTMODE
VDDIOX DDC_SCL LCD_SMBCLK 52
RLV_AMP
RLV_CFG
57 panel DDC
ENBLT
VDD12
GND
GNDX
GNDX
REXT
GND
PS8625QFN56GTR-GP
15
16
17
18
19
20
21
22
23
24
25
1PS8625_REXT 26
27
28
71.08625.003 R5510 0R0402-PAD-1-GP
EC5502 SC68P50V2JN-1GP PS8625_TESTMODE LVDS_EEPROM_DAT 1 2 THERM_SDA 26
LVDS_EEPROM_DAT
LVDS_EEPROM_CLK
SW_OUT
1RLV_AMP
RLV_CFG
RLV_LINK/GPIO0
1 2 RST# R5511 0R0402-PAD-1-GP
DY ENBLT LVDS_EEPROM_CLK 1 2
0329 THERM_SCL 26
ENBLT ENBLT 52
1 DY2 PD# VDD12
ENPVCC ENPVCC 52
1
EC5501 SC68P50V2JN-1GP
1
TP5501
C5504 C5503
2
2
SCD01U50V2KX-1GP
SCD1U16V2KX-3GP
B B
4K99R2F-L-GP
R5502
4K99R2F-L-GP
R5501
2
VCCIO_OUT
HDP Inversion for eDP
TPAD14-OP-GP
0424
1
R5513
10KR2J-3-GP
U5503
2N7002K-2-GP
2
eDP_HPD eDP_HPD 3
S
VDDIO VDDIO D
EMB_HPD G
1
R5506 R5509
4K7R2J-2-GP 4K7R2J-2-GP
VDDIO
VDDIO
DY 84.2N702.J31
1
2ND = 84.07002.I31
R5514 3RD = 84.2N702.W31
2
100KR2J-1-GP
1
RLV_CFG RLV_LINK/GPIO0
2
R5503 R5505
10KR2J-3-GP 10KR2J-3-GP
1
R5507 DY R5508
2
4K7R2J-2-GP 4K7R2J-2-GP
DY
A <Core Design> A
RST#
2
PD#
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
RLV_CFG : LVDS color depth and data RLV_LINK : LVDS signal link or dual link
C5511 C5512 Title
mapping selection, internal pull down ~80K. selection, internal pull down ~80K SC2D2U6D3V3KX-GP SC1U6D3V2KX-GP
eDP Translate to LVDS
2
HDD Connector
HDD1
23 P1
D 24
23
24
V33
V33 P2
P3
1.5A 5V_S0
D
V33
NP1 NP1 Put AC Coupling on connector side
NP2 NP2 V5 P7
V5 P8 Ultra Low Capacitance TVS Arrays
1
P9 C5605
V5 SCD1U16V2KX-3GP C5606 (Pin5.6.7.8 No Internal Connection)
S1 P13 SC1U6D3V2KX-GP
2
GND V12
S4 GND V12 P14 EMI Cap.
S7 GND V12 P15
P4 U5601
GND
P5 GND
P6 S2 SATA_TXP4_C C5601 1 2 SCD01U50V2KX-1GP SATA_TXP4 19 SATA_TXP4_C 1 10 SATA_TXP4_C
GND A+ SATA_TXN4_C C5602 1 IN1 NC#10
P10 GND A- S3 2 SCD01U50V2KX-1GP SATA_TXN4 19 SATA_TXN4_C 2 IN2 NC#9 9 SATA_TXN4_C
P12 GND 3 GND GND 8
S6 SATA_RXP4_C C5604 1 2 SCD01U50V2KX-1GP SATA_RXP4 19 SATA_RXN4_C 4 7 SATA_RXN4_C
B+ SATA_RXN4_C C5603 1 IN3 NC#7
P11 DAS/DSS B- S5 2 SCD01U50V2KX-1GP SATA_RXN4 19 SATA_RXP4_C 5 IN4 NC#6 6 SATA_RXP4_C
3rd = 22.10300.J31
20130718 MV
C C
5V_S0
ODD Connector
1
TC5601
1
SC10U6D3V3MX-GP
1
R5603 C5607
2
10KR2J-3-GP SCD1U16V2KX-3GP
2
2
5V_S0_ODD
S
3D3V_S0 2 1 SATA_PW R_EN_G_1 G Q5601
R5604 DMP2305U-7-GP
220KR2J-L2-GP 84.02305.G31
1
D
10KR2J-3-GP 1 6 SATA_PW R_EN_G P3 P1
+5V DP
P2 +5V
19,20,86 SATA_ODD_PW RGT 2 5 PLT_RST# 4,15,19,30,58,59,63,65,73,86,87,88 P4
2
MD
3 4 SCD01U50V2KX-1GP 2 1 C5609 SATA_TXN5_C S3
B 20 SATA_ODD_DET# 19
19
SATA_TXN5
SATA_TXP5 SCD01U50V2KX-1GP 2 1 C5608 SATA_TXP5_C S2
A-
A+
B
1
B+ GND
GND S7
DY GND 9
NP1 NP1 GND 8
NP2 NP2 GND S1
3D3V_S0
22.10300.I61
2nd = 22.10300.J71 SKT-SATA7P-6P-128-GP
1
R5602
3rd = 22.10300.K01
8K2R2J-3-GP 86 SATA_ODD_DA#_C
R5605
2
1 2 SATA_ODD_DA#_C
15 SATA_ODD_DA# 0R0402-PAD-1-GP
SATA_ODD_DET#_C
86 SATA_ODD_DET#_C
U5602
A SATA_TXP5_C 1 6 SATA_TXN5_C
<Variant Name>
A
2
DY 5 5V_S0_ODD
Wistron Corporation
SATA_RXP5_C 3 4 SATA_RXN5_C 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
IP4223CZ6-1-GP Title
75.04223.07C HDD/ODD
Size Document Number Rev
2nd = 83.09904.AAE A3
3rd = 75.02304.07C 2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 56 of 103
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
(Reserved)
Size Document Number Rev
A3
2013 S-Series Shark Bay 14115 17
Date: W ednesday, July 03, 2013 Sheet 57 of 103
5 4 3 2 1
5 4 3 2 1
WLAN Connector
Mini-Card--WLAN (Half)
3D3V_W LAN
1
D R5805 D
10KR2J-3-GP
3D3V_W LAN
DY
2
W LAN1
D5801
53
R5801 0R0402-PAD-1-GP NP1 16,18 WLAN_TRANSMIT_OFF# K A XMIT_OFF_R
1 2 PCIE_W AKE#_W LAN 1 2
17,30,59,63 PCIE_W AKE#
R5803 0R2J-2-GP 1SS355GP-GP
3 4
BT_OFF_C 1 DY 2 BT_COMBO#_5 5 6 83.00355.F1F
1 2 CLKREQD#_W LAN 7 8 LPC_FRAME#_MINI 65 2nd = 83.00355.D1F
18 PCIE_CLK_W LAN_REQ# R5802 0R0402-PAD-1-GP 9 10 LPC_AD3_MINI 65 3rd = 83.04148.D1H
18 CLK_PCIE_W LAN# 11 12 LPC_AD2_MINI 65
18 CLK_PCIE_W LAN 13 14 LPC_AD1_MINI 65
B+_DEBUG_MINI 15 16 LPC_AD0_MINI 65
65 BT_COMBO#_19 4,15,19,30,56,59,63,65,73,86,87,88 PLT_RST#
17 18 to EMI CAP
TPAD14-OP-GP TP5802 1 BT_COMBO#_19 19 20 XMIT_OFF_R XMIT_OFF_R 86
2
21 22 W LAN_RST# 1 DY 2 PLT_RST# 4,15,19,30,56,59,63,65,73,86,87,88
16 PCIE_RXN7 23 24 3D3V_W LAN R5825
16 PCIE_RXP7 25 26 R5812 1KR2J-1-GP
27 28 0R2J-2-GP
29 30 1 2
1
16 PCIE_TXN7 31 32 C5804 U5802
16 PCIE_TXP7 33 34 SCD1U16V2KX-3GP 1 6 WLAN_RST#
35 36 USB_PN13
37 38 USB_PP13 2 5
3D3V_W LAN 39 40
DY
C 41 42 LED_W IRELESS 1 2 WL_LED# 61 61 WL_LED# 3 4 LED_W IRELESS C
43 44 R5813 0R0402-PAD-1-GP
45 46 2N7002KDW -GP
47 48 1 2 3D3V_S0 84.2N702.A3F
R5816 49 50 R5811 75.00601.07C
3D3V_W LAN 2 DY 1 BT_OFF_C 51 52 3D3V_W LAN 10KR2F-2-GP
C5807
NP2
10KR2F-2-GP 54 1 2 LED_W IRELESS_R_S
DY
K
SKT-MINI52P-94-GP-U1
1
SCD022U16V2KX-3GP D5802
62.10043.E51 R5814
DY 1SS355GP-GP
D
A
2N7002K-2-GP 3rd = 62.10043.E51
2
83.00355.F1F
2
84.2N702.J31 2nd = 83.00355.D1F
2nd = 84.07002.I31 BT_OFF_C 86 R5809 3rd = 83.04148.D1H
3rd = 84.2N702.W31 DY 10KR2J-3-GP
G
1
LED_W IRELESS_R_G
17 BT_OFF U5801
1 6
3D3V_S0
2 5
24 W LAN_OFF DY
2
2
B R5807 B
3 4
R5808 4K7R2J-2-GP
2N7002KDW -GP
DY 1K2R2J-1-GP
84.2N702.A3F DY
1
20120924 Delete TR5804 R5804 R5814 2nd = 75.00601.07C
1
PCIE_CLK_W LAN_REQ# 18
R5810
USB_PN13 16
1 DY 2
0R2J-2-GP
USB_PP13 16
3D3V_S0
C5805
1 2
A DY
SCD1U16V2KX-3GP
S <Variant Name> A
1
R5806 Q5801
1 DY W LAN_OFF_G R5815
24 W LAN_OFF 2
10KR2J-3-GP
G
0R0805-PAD-1-GP-U Wistron Corporation
DMP2305U-7-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DY 2
Taipei Hsien 221, Taiwan, R.O.C.
84.02305.G31 20130718 MV
D
WWAN Connector
USB3_TXN1_C
PLT_RST#_W W AN 1 AFTP5416 AFTE14P-GP
3D3V_W W AN 3D3V_S5 3D3V_W W AN WW _LED# 1 AFTP5415 AFTE14P-GP R5919 20130531 MV
UIM_PW R 1 AFTP5401 AFTE14P-GP 2 DY 1
Mini-Card--WWAN PG5901 GAP-CLOSE-PW R-3-GP UIM_DATA 1 AFTP5402 AFTE14P-GP 0R2J-2-GP
2
1 2 UIM_CLK 1 AFTP5403 AFTE14P-GP SCD1U16V2KX-3GP
R5990 UIM_RST 1 AFTP5404 AFTE14P-GP DY C5909
WWAN 10KR2J-3-GP PG5902 GAP-CLOSE-PW R-3-GP UIM_VPP_R 1 AFTP5405 AFTE14P-GP USB3_TX1- 2 1 USB30_TXN1 16
USB3_TXP1_C
1 2 WIFI_RF_EN# 1 AFTP5406 AFTE14P-GP 20130802 MV
Q5903 WW AN_DET# 1 AFTP5407 AFTE14P-GP USB3_TX1+ 2 1 USB30_TXP1 16
1
24 W W AN_OFF G PG5903 GAP-CLOSE-PW R-3-GP USB_PN12 1 AFTP5408 AFTE14P-GP DY
1 2 USB_PP12 1 AFTP5409 AFTE14P-GP C5915
D POW ER_OFF POW ER_OFF 1 AFTP5410 AFTE14P-GP R5918 SCD1U16V2KX-3GP
WW ANSSD_M12DET1 AFTP5417 AFTE14P-GP 2 DY 1
D S WWAN 0R2J-2-GP D
83.R0304.D8F GPS_XMIT_OFF#_R 1 AFTP5418 AFTE14P-GP
84.2N702.J31 2N7002K-2-GP W W AN1
SIM_DETECT# 1 AFTP5419 AFTE14P-GP
2ND = 84.07002.I31 2ND = 83.R2004.C8F
3rd = 84.2N702.W31 3rd = 83.1PS76.01F 3D3V_W W AN 1 AFTP5411 AFTE14P-GP DY R5921
3D3V_W W AN A D5901 AFTP5412 AFTE14P-GP 0R2J-2-GP
DY_WWAN
K
CH751H-40-1-GP
NP1 NP1 NP2 NP2 1
AFTP5413 AFTE14P-GP
2 1
1
2 1 WW AN_DET# 1 AFTP5414 AFTE14P-GP
3_3VAUX PRESENCE_IND
4 3_3VAUX GND 3
86 W IFI_RF_EN# 6 5 USB3_RX1- USB30_RXN1 16
FULL_CARD_POWER_OFF# GND
1
GND
3D3V_S0 2 DY 1
R5901 R5920
10KR2F-2-GP
20 AUDIO0 WW ANSSD_M12DET
DY 0R2J-2-GP
20120814 SA 22 AUDIO1 WWAN/SSD_IND 21 WW ANSSD_M12DET 16 2 1
24 23 WAKE#_W W AN 2 DY 1 R5991 10KR2J-3-GP PCIE_W AKE# 17,30,58,63
GPS_XMIT_OFF#_R AUDIO2 RESERVED#23 WW AN_25
20,86 GPS_XMIT_OFF# 2 1 26 AUDIO3 RESERVED#25 25 2 1 3D3V_W W AN
R5911 UIM_VPP 2 R5922 1UIM_VPP_R 28 27 DY R5923
0R0402-PAD-1-GP UIM_RST 0R0402-PAD-1-GP UIM_RFU GND USB3_TX1- 10KR2F-2-GP
30 UIM_RESET PETN1/USB3_0_TX-/SSIC_TXN 29
UIM_CLK 20130722 MV 32 31 USB3_TX1+
UIM_DATA UIM_CLK PETP1/USB3_0_TX+/SSIC_TXP
34 UIM_DATA GND 33
UIM_PW R 36 35 USB3_RX1-
W W ANSSD_M12DET CONFIG_1 UIM_PWR PERN1/USB3_0_RX-/SSIC_RXN USB3_RX1+
38 DEVSLP PERP1/USB3_0_RX+/SSIC_RXP 37
40 GNSS0 GND 39
42 GNSS1 PETN0/SATA_B+ 41
2
44 GNSS2 PETP0/SATA_B- 43
R5914 R5916 46 45
GNSS3 GND
0R2J-2-GP 0R2J-2-GP 48 GNSS4 PERN0/SATA_A- 47
C 50 49 C
DY_WWAN DY_WWAN 52
PERST# PERP0/SATA_A+
51
1
CLKREQ# GND
54 PEWAKE# REFCLKN 53
CONFIG_0 CONFIG_1 56 NC#56 REFCLKP 55
58 NC#58 GND 57
60 59 ANTCTL0_TP 1 TPAD14-OP-GP TP5921
COEX3 ANTCTL0 ANTCTL1_TP TPAD14-OP-GP TP5922
62 COEX2 ANTCTL1 61 1
CONFIG_2 W W AN_DET# 64 63 ANTCTL2_TP 1 TPAD14-OP-GP TP5923
SIM_DETECT# COEX1 ANTCTL2 ANTCTL3_TP TPAD14-OP-GP TP5924
66 SIM_DETECT ANTCTL3 65 1
2
1
74 73 C5905
DY_WWAN DY_WWAN 3_3VAUX GND
1
SC33P50V2JN-3GP
C5902 75 CONFIG_2 R5903
1
2
76
CONFIG_2 CONFIG_3 77
2
77
WWAN
2
SKT-MINI67P-GP-U1
DY DY_WWAN 75.04223.07C
U5901
2nd = 83.09904.AAE
62.10043.I71 3rd = 75.02304.07C
2nd = 62.10043.K71
6 1
3D3V_W W AN
3rd = 62.10043.Q01
5 2
4th = 62.10043.P01 DY
4 3
1
C5911
SCD1U16V2KX-3GP
DY IP4223CZ6-1-GP SIM1
2
B B
UIM_PW R 1 VCC
1
UIM_RST 2
R5909 UIM_CLK RST
3 CLK
DY 47KR2J-2-GP UIM_VPP
5 GND
6 VPP
7
2
I/O
8 GND
UIM_DATA 9 GND
10 CD
NP1 NP1
SIM_DETECT# 2 1 SIM_DETECT_CON# NP2
R5924 NP2
0R0402-PAD-1-GP
WWAN
CARD-PUSH-7P-3-GP
2
20.I0123.001
1
DY DY DY C5914C5913 WWAN
C5917 C5916
1
3D3V_S5 SC22P50V2JN-4GP C5912
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC4D7U6D3V3KX-GP
3A 19,86 INTRUDER# WWAN
84.02305.G31 84.2N702.J31
2nd = 84.02377.031 2ND = 84.07002.I31
3D3V_W W AN 3rd = 84.2N702.W31 SCD1U16V2KX-3GP
3rd = 84.02035.031
D
Q5901 RTC_AUX_S5
S D DMP2305U-7-GP Q5902
DY_WWAN 2N7002K-2-GP
1
1
A C5906 WWAN C5903 <Core Design> A
1
SC10U6D3V3MX-GP
SC39P50V2JN-1GP
D D
C C
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Flash
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 60 of 103
5 4 3 2 1
5 4 3 2 1
1
1 3D3V_AUX_S5 1 AFTP8222 AFTE14P-GP
D 1 AFTP8223 AFTE14P-GP R6116 D
2 1 AFTP8224 AFTE14P-GP 100KR2J-1-GP
ON_OFF# 63,86
3 PW R_BD_LED_R# 1 2 PW R_BD_LED# 24 1 AFTP8226 AFTE14P-GP
R6117
4 DY R6108 0R2J-2-GP 1 AFTP8225 AFTE14P-GP
2
ON_OFF# 1 2 ON/OFFBTN_KBC# 24
6
Q6101 100R2J-2-GP
2
PTW O-CON4-9-GP-U1 S G6101
1
20.K0382.004 GAP-OPEN C6106
2nd = 20.K0465.004 86 PW R_BD_LED_R# D
SC1U6D3V2KX-GP
2
G PW M_BREATH_LED# 24
Function Button
2N7002K-2-GP
84.2N702.J31
FUN1
2nd = 84.07002.I31
3rd = 84.2N702.W31
11
1 3D3V_S0
2 3D3V_AUX_S5
3 KSO17 24,86
4 KSI0 24,62,86,87
5 R6109 KSI1 24,62,86
6 LID_SW #_R 1 2 100R2J-2-GP LID_SW # 24,52,86
7 W L_LED#_ALL 86
8 SPK_MUTE_LED_CTRL
C SPK_MUTE_LED_CTRL 27,86 C
9
10
12
ACES-CON10-26-GP
20.K0585.010
2nd = 20.K0624.010
1
3D3V_S0 R6107
10KR2J-3-GP
2
1
R6106 U6101
10KR2J-3-GP 1 6
B B
2 5 WL_LED#_U
R6101 58 W L_LED#
2
1 DY 2 W L_LED#_ALL 86 W L_LED#_ALL 3 4
58 W L_LED#
2N7002KDW -GP
0R2J-2-GP
84.2N702.A3F
2nd = 75.00601.07C
59 W W _LED# E C
84.S3904.011 Q6102
2ND = 84.T3904.H11 PMBS3904-3-GP
B
R6103
1KR2J-1-GP
2
20,59 W W AN_TRANSMIT_OFF#
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
8051_RECOVER#_NUMLOCK_LED#_R 1
1 AFTP6940
AFTP6929
AFTE14P-GP
AFTE14P-GP
KSI[0..7] 24,61,86,87
KB_CAPS_LED_R 1 AFTP6932 AFTE14P-GP
3D3V_S0 1 AFTP6931 AFTE14P-GP
KSO[0..13] 24,86
KB1 1 AFTP6934 AFTE14P-GP
35
1 KSO11 1 AFTP6907 AFTE14P-GP D6204
1 KSI_D_6 KSI_D_6 86
D 2 KSO0 1 AFTP6922 AFTE14P-GP 83.00056.Q11 D
3 KSO2 1 AFTP6916 AFTE14P-GP 24 KSI6 3 2ND = 83.00056.G11
4 KSO5 1 AFTP6919 AFTE14P-GP 3RD = 83.00056.Y11
5 KSI_D_14 1 AFTP6939 AFTE14P-GP 2 KSI_D_14 KSI_D_14 86
6 KSI_D_8 1 AFTP6930 AFTE14P-GP
7 KSI_D_12 1 AFTP6937 AFTE14P-GP BAW 56-5-GP
8 KSI_D_10 1 AFTP6935 AFTE14P-GP 8051_RECOVER#_NUMLOCK_LED#_R 8051_RECOVER#_NUMLOCK_LED#_R 87
9 KSI_D_0 1 AFTP6917 AFTE14P-GP KB_CAPS_LED_R KB_CAPS_LED_R 87
10 KSI_D_4 1 AFTP6924 AFTE14P-GP D6201 D6205
11 KSI_D_2 1 AFTP6921 AFTE14P-GP 1 KSI_D_1 1 KSI_D_2
KSI_D_1 86 KSI_D_2 86
12 KSI_D_1 1 AFTP6928 AFTE14P-GP 83.00056.Q11 83.00056.Q11
13 KSI_D_3 1 AFTP6920 AFTE14P-GP 24,61,86 KSI1 3 2ND = 83.00056.G11 24 KSI2 3 2ND = 83.00056.G11
14 KSO3 1 AFTP6911 AFTE14P-GP 3RD = 83.00056.Y11 3RD = 83.00056.Y11
15 KSO8 1 AFTP6913 AFTE14P-GP 2 KSI_D_9 2 KSI_D_10
KSI_D_9 86 KSI_D_10 86
16 KSO4 1 AFTP6915 AFTE14P-GP
17 KSO7 1 AFTP6914 AFTE14P-GP BAW 56-5-GP BAW 56-5-GP
18 KSO6 1 AFTP6912 AFTE14P-GP
19 KSO10 1 AFTP6906 AFTE14P-GP
20 KSO1 1 AFTP6918 AFTE14P-GP
21 KSI_D_5 1 AFTP6923 AFTE14P-GP D6202 D6206
22 KSI_D_6 1 AFTP6926 AFTE14P-GP 1 KSI_D_4 1 KSI_D_5
KSI_D_4 86 KSI_D_5 86
23 KSI7 1 AFTP6927 AFTE14P-GP 83.00056.Q11 83.00056.Q11
24 KSI_D_13 1 AFTP6938 AFTE14P-GP 24 KSI4 3 2ND = 83.00056.G11 24 KSI5 3 2ND = 83.00056.G11
25 KSI_D_11 1 AFTP6936 AFTE14P-GP 3RD = 83.00056.Y11 3RD = 83.00056.Y11
26 KSI_D_9 1 AFTP6933 AFTE14P-GP 2 KSI_D_12 2 KSI_D_13
KSI_D_12 86 KSI_D_13 86
27 KSO9 1 AFTP6925 AFTE14P-GP
28 KSO12 1 AFTP6910 AFTE14P-GP BAW 56-5-GP BAW 56-5-GP
29 KSO13 1 AFTP6909 AFTE14P-GP
30 8051_RECOVER#_NUMLOCK_LED#_R R6204 1 2 560R2J-3-GP
C 8051_RECOVER#_NUMLOCK_LED# 24,65 D6203 D6207 C
31 3D3V_S0
32 KB_CAPS_LED_R R6206 1 2 560R2J-3-GP 1 KSI_D_0 1 KSI_D_3
KB_CAPS_LED 24,86 KSI_D_0 86 KSI_D_3 86
33 REC_MUTE_LED_AMBER_R 83.00056.Q11 83.00056.Q11
34 24,61,86,87 KSI0 3 2ND = 83.00056.G11 24,86 KSI3 3 2ND = 83.00056.G11
3RD = 83.00056.Y11 3RD = 83.00056.Y11
36 2 KSI_D_8 KSI_D_8 86 2 KSI_D_11 KSI_D_11 86
STAR-CON34-GP BAW 56-5-GP BAW 56-5-GP
20.K0798.034
2nd = 20.K0811.034
On Keyboard LEDs
<MUTE> Internal MIC ON= No light; OFF/Mute= Amber
B B
Q6201
G REC_MUTE_LED_CTRL 27
R6205
470R2J-2-GP S R6201
10KR2J-3-GP
2N7002K-2-GP
1
84.2N702.J31
2nd = 84.07002.I31
3rd = 84.2N702.W31
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CRCN1
Right Side Audio & FP & USB Connector D
1
21 C6305
1 SCD1U16V2KX-3GP EC6301
SC1U6D3V2KX-GP MIC_DETECT# 1 AFTP3101 AFTE14P-GP
2
2 MICL 1 AFTP3102 AFTE14P-GP
3 IMCLK_C MICR 1 AFTP3103 AFTE14P-GP
4 IMDAT_C HP_OUT_L 1 AFTP3104 AFTE14P-GP
5 5V_S5 HP_OUT_R 1 AFTP3105 AFTE14P-GP
PCH_SMBDATA 12,13,18,67 USBCN1 HP_DETECT# AFTP3106 AFTE14P-GP
6 PCH_SMBCLK 12,13,18,67 1
7 31 AUD_VREFOUT_B 1 AFTP3107 AFTE14P-GP
HDD_HALTLED 19,87
8 SATA_LED# 19,20,87 1
9 PLT_RST# 4,15,19,30,56,58,59,65,73,86,87,88 20120921 Delete R6303 R6304 USB_PN3 1 AFTP6107 AFTE14P-GP
10 CLKREQ_MEDIA# 18 2
11 PCIE_W AKE#_R 1 DY 2 PCIE_W AKE# 17,30,58,59 3 USB_PP3 1 AFTP6108 AFTE14P-GP
12 R6302 0R2J-2-GP 4
CLK_PCIE_MEDIA 18
13 16 USB_PN8 5 5V_S5 1 AFTP6105 AFTE14P-GP
CLK_PCIE_MEDIA# 18
14 16 USB_PP8 6
15 7 5V_S5 1 AFTP6101 AFTE14P-GP
PCIE_TXP8 16
16 PCIE_TXN8 16 16 USB_PN9 8
17 16 USB_PP9 9 USB_PN9 1 AFTP6102 AFTE14P-GP
18 PCIE_RXP8 16 10
19 PCIE_RXN8 16 16 USB_PN3 11 USB_PP9 1 AFTP6103 AFTE14P-GP
20 CR_ON 16 USB_PP3 12
22 13 1 AFTP6104 AFTE14P-GP
20.K0614.020 17,24,34,49,86 PM_SLP_S4# 14
AFTP6106 AFTE14P-GP
ACES-CON20-22-GP-U
1st = 20.K0481.020 3D3V_S5 15 1
C
2nd = 20.K0392.020 20,86 FPR_LOCK# 16
C
17,18,86 FPR_OFF 17
18
27,86 HP_DETECT# 19
20 3D3V_S5 1 AFTP6403 AFTE14P-GP
PCIE_W AKE# 1 AFTP3127 AFTE14P-GP Fiji and Python no this function 21
27 HP_OUT_R USB_PN8 AFTP6404 AFTE14P-GP
22 1
CR_ON 1 AFTP3126 AFTE14P-GP Please connect to pin 11 pin20 23
27 HP_OUT_L USB_PP8 AFTP6405 AFTE14P-GP
24 1
27 MICL 25
RN
26 FPR_LOCK# 1 AFTP6406 AFTE14P-GP
PCH_SMBDATA AFTP3134 AFTE14P-GP RN6302 27 MICR
1 27
PCH_SMBCLK 1 AFTP3110 AFTE14P-GP IMCLK_C 1 4 IMCLK 24 AUD_VREFOUT_B AUD_VREFOUT_B 28 FPR_OFF 1 AFTP6407 AFTE14P-GP
PLT_RST# 1 AFTP3108 AFTE14P-GP IMDAT_C 2 3 IMDAT 24 AVDD_CODEC 29
CLKREQ_MEDIA# 1 AFTP3109 AFTE14P-GP 30 1 AFTP6408 AFTE14P-GP
0R4P2R-PAD 27,86 MIC_DETECT#
32
CLK_PCIE_MEDIA 1 AFTP3111 AFTE14P-GP
CLK_PCIE_MEDIA# 1 AFTP3112 AFTE14P-GP ACES-CON30-9-GP-U1
PCIE_TXP8 1 AFTP3113 AFTE14P-GP 20.K0510.030
2
PCIE_TXN8 AFTP3114 AFTE14P-GP RN6301 3D3V_S0 PM_SLP_S4# AFTP6109 AFTE14P-GP
PCIE_RXP8
1
AFTP3115 AFTE14P-GP R6301 AUD_AGND
2nd = 20.K0580.030 1
1
PCIE_RXN8 1 AFTP3116 AFTE14P-GP IMCLK 2 3 10KR2J-3-GP 1 AFTP6110 AFTE14P-GP
HDD_HALTLED 1 AFTP3117 AFTE14P-GP IMDAT 1 4 3D3V_S5
SATA_LED# 1 AFTP3118 AFTE14P-GP 1 AFTP6111 AFTE14P-GP
SC47P50V2JN-3GP
1
IMCLK_C AFTP3120 AFTE14P-GP SRN4K7J-8-GP
EC6311
1
SCD1U16V2KX-3GP
1
1
IMDAT_C 1 AFTP3121 AFTE14P-GP AUD_AGND
C6302
AVDD_CODEC 1 AFTP6112 AFTE14P-GP
2
3D3V_S0 1 AFTP3122 AFTE14P-GP
B AFTP3123 AFTE14P-GP B
3D3V_S0 1
AFTP3124 AFTE14P-GP
DY
1
1 AFTP3125 AFTE14P-GP
2 PM_SLP_S3#
3D3V_S0 PM_SLP_S3# 17,24,27,30,31,36,37,48,49,51,82
3 APS_PIN3 R1706 1 DY 2 0R2J-2-GP 3D3V_S5
4 PM_SLP_S5#
PM_SLP_S5# 17
5 PM_SLP_S4#
PM_SLP_S4# 17,24,34,49,86
6 PM_SLP_A#
U6301 PM_SLP_A# 17,24
7 APS_PIN7 R1705 1 DY 2 0R2J-2-GP 3D3V_S5
8
IMCLK_C 1 6 PCH_SMBDATA DY 9 RTC_RST# 19
10
A 2 5 11 ON_OFF# 61,86 <Core Design> A
12
IMDAT_C 3
DY_EMI4 PCH_SMBCLK 13 XDP_DBRESET#
XDP_DBRESET# 4,17
16
14
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
IP4223CZ6-1-GP Taipei Hsien 221, Taiwan, R.O.C.
ACES-CON14-12-GP
Title
20.K0633.014
75.04223.07C
2nd = 83.09904.AAE
IO Board Connector
Size Document Number Rev
3rd = 75.02304.07C A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 63 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM3,4 (2/4)
Size Document Number Rev
A2
2013 S-Series Shark Bay 14115 17
Date: Wednesday, July 03, 2013 Sheet 64 of 103
5 4 3 2 1
5 4 3 2 1
D
24 PIN LPC DEBUG CONN. D
+VBAT_DEBUG
DEBUG1
1 GROUND
18,86,88 CLK_PCI_LPC 2 LPC_PCI_CLK
3 GROUND
18,24,88 LPC_FRAME# 4 LPC_FRAME#
18,20,24,88 INT_SERIRQ 5 +V3S
4,15,19,30,56,58,59,63,73,86,87,88 PLT_RST# 6 LPC_RESET#
15,24 NMI_SMI_DBG# 7 +V3S
LPC_AD0 8
LPC_AD1 LPC_AD0
18,24,88 LPC_AD[0..3] 9 LPC_AD1
LPC_AD2 10
LPC_AD3 LPC_AD2
11 LPC_AD3
12 VCC_3VA
24 8051TX/S3_LED# 13 PWR_LED#
24 8051RX/CAPS_LED 14 CAPS_LED#
24,62 8051_RECOVER#_NUMLOCK_LED# 15 NUM_LED#
24 VCC1_POR# 16 VCC1_PWRGD
DY R6501 1 2 0R2J-2-GP SPI_CLK_JP 17
24,25 SPI_CLK_FLH R6502 1 0R2J-2-GP SPI_CS0#_JP SPI_CLK
24,25 SPI_CS0#_FLASH DY R6503 1
2
0R2J-2-GP SPI_SI_JP
18 SPI_CS#
24,25 SPI_SI_FLASH DY R6504 1
2
0R2J-2-GP SPI_SO_JP
19 SPI_SI
C
24,25 SPI_SO_FLASH DY 2
SPI_HOLD#_0
20 SPI_SO C
21 SPI_HOLD#
22 RESERVED#22
23 RESERVED#23
24 RESERVED#24
R6505 25 GND
24,25 KBC_SPI_IO3 1 2 26 GND
0R0402-PAD-1-GP NP1 DY
NP1
18,24 SPI_CS1# NP2 NP2
ACES-CONN24A-2-GP-U
20.F1954.024
SPI_PW R
20130626 MV
SPI_CS1# 1 DY 4K7R2J-2-GP
2
R6507
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Dubug connector
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 65 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SENSOR HUB
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 66 of 103
5 4 3 2 1
5 4 3 2 1
D D
ACCELEROMETER
3D3V_S0
I2C ADDRESS
1
C6701 C6702
SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP
0X50 GND
2
0X52 VCC
C C
U6701
1 VDD_IO RES#10 10
RES#13 13
14 VDD RES#15 15 Meter_SMBCLK 26
RES#16 16 Meter_SMBDATA 26
RN6701
11 4 2 3 PCH_SMBCLK 12,13,18,63
15 ACCEL_INT
9
INT1 SCL/SPC
6 1 DY 4 PCH_SMBDATA 12,13,18,63
R6701 INT2 SDA/SDI/SDO SRN0J-6-GP
3D3V_S0 1 2 G_CS 8 CS SDO/SA0 7 G_SDO 1 2 R6702 20120831 SA Swap
0R0402-PAD-1-GP DY 0R2J-2-GP
2 NC#2 GND 5
3 NC#3 GND 12
HP3DC2TR-GP
74.HP3DC.ABZ
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
G Sensor
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 67 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Thunderbolt (1/5)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 68 of 103
5 4 3 2 1
D D
C C
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Thunderbolt (2/5)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 69 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Thunderbolt (3/5)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 70 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Thunderbolt (4/5)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 71 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Thunderbolt (5/5)
Size Document Number Rev
A2 2013 S-Series Shark Bay 14 15 17 1
Date: Wednesday, July 03, 2013 Sheet 72 of 103
5 4 3 2 1
5 4 3 2 1
3 PEG_TXP[0..7] PEG_RXP[0..7] 3
VGA1A 1 OF 9
3 PEG_TXN[0..7] PEG_RXN[0..7] 3
DIS_PX
DIS_PX
PEG_TXP0 AA38 Y33 PEG_C_RXP0 C7318 1 2 SCD22U10V2KX-1GP PEG_RXP0
PEG_TXN0 PCIE_RX0P PCIE_TX0P
Y37 PCIE_RX0N PCIE_TX0N Y32 PEG_C_RXN0 C7317 1 2 SCD22U10V2KX-1GP PEG_RXN0
DIS_PX
DIS_PX
D PEG_TXP1 Y35 W33 PEG_C_RXP1 C7320 1 2 SCD22U10V2KX-1GP PEG_RXP1 D
PEG_TXN1 PCIE_RX1P PCIE_TX1P
W36 PCIE_RX1N PCIE_TX1N W32 PEG_C_RXN1 C7319 1 2 SCD22U10V2KX-1GP PEG_RXN1
DIS_PX
DIS_PX
PEG_TXP2 W38 U33 PEG_C_RXP2 C7321 1 2 SCD22U10V2KX-1GP PEG_RXP2
PEG_TXN2 PCIE_RX2P PCIE_TX2P
V37 PCIE_RX2N PCIE_TX2N U32 PEG_C_RXN2 C7322 1 2 SCD22U10V2KX-1GP PEG_RXN2
DIS_PX
DIS_PX
PEG_TXP3 V35 U30 PEG_C_RXP3 C7323 1 2 SCD22U10V2KX-1GP PEG_RXP3
PEG_TXN3 PCIE_RX3P PCIE_TX3P
U36 PCIE_RX3N PCIE_TX3N U29 PEG_C_RXN3 C7324 1 2 SCD22U10V2KX-1GP PEG_RXN3
DIS_PX
DIS_PX
PEG_TXP4 U38 T33 PEG_C_RXP4 C7325 1 2 SCD22U10V2KX-1GP PEG_RXP4
PEG_TXN4 PCIE_RX4P PCIE_TX4P PEG_C_RXN4 C7326
T37 PCIE_RX4N PCIE_TX4N T32 1 2 SCD22U10V2KX-1GP PEG_RXN4
DIS_PX
DIS_PX
PEG_TXP5 T35 T30 PEG_C_RXP5 C7328 1 2 SCD22U10V2KX-1GP PEG_RXP5
PEG_TXN5 PCIE_RX5P PCIE_TX5P PEG_C_RXN5 C7327
R36 PCIE_RX5N PCIE_TX5N T29 1 2 SCD22U10V2KX-1GP PEG_RXN5
DIS_PX
DIS_PX
PEG_TXP6 R38 P33 PEG_C_RXP6 C7330 1 2 SCD22U10V2KX-1GP PEG_RXP6
PEG_TXN6 PCIE_RX6P PCIE_TX6P
P37 PCIE_RX6N PCIE_TX6N P32 PEG_C_RXN6 C7329 1 2 SCD22U10V2KX-1GP PEG_RXN6
DIS_PX
DIS_PX
PEG_TXP7 P35 P30 PEG_C_RXP7 C7332 1 2 SCD22U10V2KX-1GP PEG_RXP7
PEG_TXN7 PCIE_RX7P PCIE_TX7P
N36 PCIE_RX7N PCIE_TX7N P29 PEG_C_RXN7 C7331 1 2 SCD22U10V2KX-1GP PEG_RXN7
NC#L36 NC#N29
CLOCK
18 CLK_PCIE_VGA AB35 3D3V_VGA_S0
PCIE_REFCLKP 0D95V_VGA_S0
18 CLK_PCIE_VGA# AA36 PCIE_REFCLKN
DIS_PX
CALIBRATION
DIS_PX DIS_PX GPIO5 74 GPIO5_AC_BATT R7314 1 2 100KR2J-1-GP
Y30 PCIE_CALRP R7316 1 2
R7317 PCIE_CALR_TX 1K69R2F-2-GP R7329 1
DY 2 10KR2J-3-GP
1 2 VGA_PW RGOOD AH16 Y29 PCIE_CALRN R7318 1 2
74 JTAG_TRST#_VGA JTAG SIGNAL OPTION
TEST_PG PCIE_CALR_RX 1KR2F-3-GP R7330 2
DY 1 10KR2J-3-GP Normal Debug pilot run
74 JTAG_TDI_VGA
1KR2F-3-GP DIS_PX Signal
VGA_RST# AA30 R7350 1
DY 2 10KR2J-3-GP
mode mode mode
PERST# 74 JTAG_TDO_VGA
R7324 1
DY 2 10KR2J-3-GP TESTEN "1"(PU) "1"(PU) "0"(PD)
74 JTAG_TMS_VGA
1
MARS-M2-XT-GP
C7333 DIS_PX R7351 1
DY 2 10KR2J-3-GP
DY SC47P50V2JN-3GP JTAG_TRST# "0"(PD) "1"(PU) NC
2
R7320
DIS_PX
2 1 1KR2J-1-GP
dGPU reset for PX/SG transitions 74 TESTEN
JTAG_TCK CLK "1"(PU) NC
R7323 1 2 10KR2J-3-GP
DY_DIS_PX 74 JTAG_TCK_VGA
JTAG_TMS "1"(PU) "1"(PU) NC
1 R7321 2
DY_DIS_PX
0R2J-2-GP
A
3D3V_S0 <Core Design> A
U7303
PLT_RST#
4,15,19,30,56,58,59,63,65,86,87,88 PLT_RST# 1 A VCC 5
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
15 DGPU_HOLD_RST# 2 B DIS_PX Taipei Hsien 221, Taiwan, R.O.C.
3 4 VGA_RST#
GND Y VGA_RST# 74 Title
U74LVC1G08G-AL5-R-GP-U
73.01G08.EHG GPU (1/5) PEG
Size Document Number Rev
A3 1
2nd = 73.7SZ08.EAH 2013 S-Series Shark Bay 14 15 17
3rd = 73.01G08.L04 Date: Monday, August 12, 2013 Sheet 73 of 103
5 4 3 2 1
5 4 3 2 1
3D3V_VGA_S0
LVDS Interface
Set DVP as 1.8-V (VDDR4/5) general I/O VGA1B 2 OF 9
VGA1G 7 OF 9
MUTI GFX
AD29 AU24
4
3
GENLK_CLK NC#AU24
AC29 AV23
GENLK_VSYNC NC#AV23 RN7404 AK27
SRN2K2J-1-GP VARY_BL
AT25 LVDS CONTROL AJ27
NC#AT25 DIGON
AJ21
SWAPLOCKA DPA NC#AR24
AR24 DIS_PX
AK21
SWAPLOCKB
D AU26 D
1
2
NC#AU26 Q7403
AV25
NC#AV25 GPIO_VGA_04_CLK 1 6 PCH_KBC_CLK 18,24,26 AK35
TXCBP_DPB3P
AR8 AT27 AL36
NC#AR8 NC#AT27 TXCBM_DPB3N
AU8 AR26 2 5
NC#AU8 NC#AR26
AP8
DBG_CNTL0 DIS_PX TX3P_DPB2P
AJ38
AW8 AR30 3 4 AK37
NC#AW8 NC#AR30 TX3M_DPB2N
AR3 AT29
NC#AR3 NC#AT29
AR1 AH35
NC#AR1 2N7002KDW-GP TX4P_DPB1P
AU1 AV31 PCH_KBC_DATA 18,24,26 AJ36
DBG_DATA0 NC#AV31 84.2N702.A3F TX4M_DPB1N
AU3 AU30
DBG_DATA1 DPB NC#AU30 GPIO_VGA_03_DATA
AW3
DBG_DATA2
2nd = 75.00601.07C TX5P_DPB0P
AG38
AP6 AR32 AH37
DBG_DATA3 NC#AR32 TX5M_DPB0N
AW5 AT31
DBG_DATA4 NC#AT31
AU5 AF35
DBG_DATA5 NC#AF35
AR6 AT33 AG36
DBG_DATA6 NC#AT32 NC#AG36
AW6 AU32
DBG_DATA7 NC#AU32
LVTMDP
AU6
DBG_DATA8
AT7 AU14
DBG_DATA9 NC#AU14
AV7 AV13
DBG_DATA10 NC#AV13
AN7 AP34
DBG_DATA11 TXCAP_DPA3P
AV9 AT15 AR34
DBG_DATA12 NC#AT15 TXCAM_DPA3N
AT9 AR14
DBG_DATA13 NC#AR14
AR10 AW37
DBG_DATA14 DPC TX0P_DPA2P
AW10 AU16 AU35
DBG_DATA15 NC#AU16 TX0M_DPA2N
AU10 AV15
DBG_DATA16 NC#AV15
AP10 AR37
DBG_DATA17 TX1P_DPA1P
AV11 AT17 AU39
DBG_DATA18 NC#AT17 TX1M_DPA1N
AT11 AR16
DBG_DATA19 NC#AR16
AR12 AP35
DBG_DATA20 TX2P_DPA0P
AW12 AU20 AR35
DBG_DATA21 NC#AU20 TX2M_DPA0N
AU12 AT19
DBG_DATA22 NC#AT19
AP12 AN36
DBG_DATA23 NC#AN36
AT21 AP37
NC#AT21 NC#AP37
SMBUS NC#AR20
AR20 DIS_PX
DPD
GPIO_VGA_04_CLK AJ23 AU22
GPIO_VGA_03_DATA SMBCLK NC#AU22
AH23 AV21
SMBDATA NC#AV21 MARS-M2-XT-GP
AT23
NC#AT23
AR22
NC#AR22
C AK26 C
SCL I2C
AJ26
SDA
AD39 DGPU_RED 1 TP7401 TPAD14-OP-GP ZZ.PAD14.001
R
GENERAL PURPOSE I/O AD37
D7450 1SS355GP-GP AVSSN
83.00355.F1F AH20
GPIO_0
A DIS_PX 2nd = 83.00355.D1F DGPU_GREEN TP7402 TPAD14-OP-GP
17,24 AC_PRESENT K AH18
GPIO_1 G
AE36 1 ZZ.PAD14.001
3rd = 83.04148.D1H AN16
GPIO_2 AVSSN
AD35
1
0R0402-PAD-1-GP HPD1 MLPS PS_1
R7415
2
2
1
DBG_VREFG PS_2
SCD1U16V2KX-3GP DIS_PX
2
2
SCD1U16V2KX-3GP
1
84.2N702.J31 PX_EN VGA_PS3
DIS_PX DIS_PX TP7458 1 AL21
PX_EN PS_3
AD33
R7418 C7406 R7421 C7407
2nd = 84.07002.I31
2
2
DY_DIS_PX Q7450 DY_DIS_PX DY_DIS_PX
S
2
D
DEBUG DDC/AUX
2N7002K-2-GP AM26
DDC1CLK
84.2N702.J31 DDC1DATA
AN26
2nd = 84.07002.I31 TESTEN AD28
73 TESTEN TESTEN
3rd = 84.2N702.W31 AUX1P
AM27
DIS_PX AUX1N
AL27
1D8V_VGA_S0
R7441 AM23 AM19 1D8V_VGA_S0
73 JTAG_TRST#_VGA JTAG_TRST# DDC2CLK
1 2 Q8550_2 JTAG_TDI_VGA AN23 AL19
73 VGA_RST# 73 JTAG_TDI_VGA
1
JTAG_TDI DDC2DATA
73 JTAG_TCK_VGA AK23
1
1
0R0402-PAD-1-GP C7423 JTAG_TCK R7425 R7427
73 JTAG_TMS_VGA AL24 AN20
SCD1U16V2KX-3GP JTAG_TDO_VGA JTAG_TMS AUX2P 40D2R2F-GP 40D2R2F-GP
73 JTAG_TDO_VGA AM24
JTAG_TDO AUX2N
AM20 DIS_PX
DY DY DIS_PX
2
2
26 VGA_DPLUS NC#AL30
AM30 VGA_PS3
2
1
1
THERMAL
AL29
1
SC2200P50V2KX-2GP VGA_DPLUS AF29 NC#AL29 R7426 C7409
AM29 DIS_PX 100R2F-L1-GP-U
2
2
26 VGA_DMINUS DMINUS SCD68U16V3KX-GP-U
Intel is H_THERMTRIP# AN21 DIS_PX 4K75R2F-1-GP DY_DIS_PX
2
NC#AN21
AM21 DIS_PX
2
TS_FDO NC#AM21
2 1 R7455 AK32
2
10KR2J-3-GP GPIO_28_FDO
AK30
NC#AK30
A 1D8V_VGA_S0
DIS_PX DIS_PXTSVDD AL31
TS_A NC#AK29
AK29
A
DIS_PX VGA_PS3 VRAM Select
L7404 (1.8V@20mA TSVDD) DGPU_DDC_CLK TP7406 TPAD14-OP-GP
DDCVGACLK
AJ30
DGPU_DDC_DATA
1
TP7407 TPAD14-OP-GP
ZZ.PAD14.001 Check table for Select Resistor
1 2
FCM1005MF-121T03-GP
AJ32
TSVDD DDCVGADATA
AJ31 1 ZZ.PAD14.001
AJ33
TSVSS
68.00217.701
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VGA1D 4 OF 9
VGA1C 3 OF 9
80 MDB[0..31]
78 MDA[0..31]
GDDR5/DDR3
GDDR5/DDR3 MDB0 C5 P8
DQB0_0 MAB0_0 MAB0 80,81
MDA0 C37 G24 MAA0 78,79 MDB1 C3 T9 MAB1 80,81
MDA1 DQA0_0 MAA0_0 MDB2 DQB0_1 MAB0_1
C35 J23 MAA1 78,79 E3 P9 MAB2 80,81
MDA2 DQA0_1 MAA0_1 MDB3 DQB0_2 MAB0_2
A35 H24 MAA2 78,79 E1 N7 MAB3 80,81
MDA3 DQA0_2 MAA0_2 MDB4 DQB0_3 MAB0_3
E34 J24 MAA3 78,79 F1 N8 MAB4 80,81
MDA4 DQA0_3 MAA0_3 MDB5 DQB0_4 MAB0_4
G32 H26 MAA4 78,79 F3 N9 MAB5 80,81
MDA5 DQA0_4 MAA0_4 MDB6 DQB0_5 MAB0_5
D33 J26 MAA5 78,79 F5 U9 MAB6 80,81
MDA6 DQA0_5 MAA0_5 MDB7 DQB0_6 MAB0_6
F32 H21 MAA6 78,79 G4 U8 MAB7 80,81
MDA7 DQA0_6 MAA0_6 MDB8 DQB0_7 MAB0_7
E32 G21 MAA7 78,79 H5 Y9 MAB8 80,81
MDA8 DQA0_7 MAA0_7 MDB9 DQB0_8 MAB1_0
D31 H19 MAA8 78,79 H6 W9 MAB9 80,81
MEMORY INTERFACE A
MDA9 DQA0_8 MAA1_0 MDB10 DQB0_9 MAB1_1
D F30 H20 MAA9 78,79 J4 AC8 MAB10 80,81 D
MDA10 DQA0_9 MAA1_1 MDB11 DQB0_10 MAB1_2
C30 L13 MAA10 78,79 K6 AC9 MAB11 80,81
MDA11 DQA0_10 MAA1_2 MDB12 DQB0_11 MAB1_3
A30 G16 MAA11 78,79 K5 AA7 MAB12 80,81
MDA12 DQA0_11 MAA1_3 MDB13 DQB0_12 MAB1_4
F28 J16 MAA12 78,79 L4 AA8 B_BA2 80,81
MDA13 DQA0_12 MAA1_4 MDB14 DQB0_13 MAB1_5
C28 H16 A_BA2 78,79 M6 Y8 B_BA0 80,81
MDA14 DQA0_13 MAA1_5 MDB15 DQB0_14 MAB1_6
A28 J17 A_BA0 78,79 M1 AA9 B_BA1 80,81
MDA15 DQA0_14 MAA1_6 MDB16 DQB0_15 MAB1_7
E28 H17 A_BA1 78,79 M3
MDA16 DQA0_15 MAA1_7 MDB17 DQB0_16
MEMORY INTERFACE B
D27 M5 H3 DQMB0 80
MDA17 DQA0_16 MDB18 DQB0_17 WCKB0_0
F26 A32 DQMA0 78 N4 H1 DQMB1 80
MDA18 DQA0_17 WCKA0_0 MDB19 DQB0_18 WCKB0_0#
C26 C32 DQMA1 78 P6 T3 DQMB2 80
MDA19 DQA0_18 WCKA0_0# MDB20 DQB0_19 WCKB0_1
A26 D23 DQMA2 78 P5 T5 DQMB3 80
MDA20 DQA0_19 WCKA0_1 MDB21 DQB0_20 WCKB0_1#
F24 E22 DQMA3 78 R4 AE4 DQMB4 81
MDA21 DQA0_20 WCKA0_1# MDB22 DQB0_21 WCKB1_0
C24 C14 DQMA4 79 T6 AF5 DQMB5 81
MDA22 DQA0_21 WCKA1_0 MDB23 DQB0_22 WCKB1_0#
A24 A14 DQMA5 79 T1 AK6 DQMB6 81
MDA23 DQA0_22 WCKA1_0# MDB24 DQB0_23 WCKB1_1
E24 E10 DQMA6 79 U4 AK5 DQMB7 81
MDA24 DQA0_23 WCKA1_1 MDB25 DQB0_24 WCKB1_1#
C22 D9 DQMA7 79 V6
MDA25 DQA0_24 WCKA1_1# MDB26 DQB0_25
A22 V1 F6 QSBP_0 80
MDA26 DQA0_25 MDB27 DQB0_26 EDCB0_0
F22 C34 QSAP_0 78 V3 K3 QSBP_1 80
MDA27 DQA0_26 EDCA0_0 MDB28 DQB0_27 EDCB0_1
D21 D29 QSAP_1 78 Y6 P3 QSBP_2 80
MDA28 DQA0_27 EDCA0_1 MDB29 DQB0_28 EDCB0_2
A20 D25 QSAP_2 78 Y1 V5 QSBP_3 80
MDA29 DQA0_28 EDCA0_2 MDB30 DQB0_29 EDCB0_3
F20 E20 QSAP_3 78 Y3 AB5 QSBP_4 81
MDA30 DQA0_29 EDCA0_3 MDB31 DQB0_30 EDCB1_0
D19 E16 QSAP_4 79 81 MDB[32..63] Y5 AH1 QSBP_5 81
MDA31 DQA0_30 EDCA1_0 MDB32 DQB0_31 EDCB1_1
79 MDA[32..63] E18 E12 QSAP_5 79 AA4 AJ9 QSBP_6 81
MDA32 DQA0_31 EDCA1_1 MDB33 DQB1_0 EDCB1_2
C18 J10 QSAP_6 79 AB6 AM5 QSBP_7 81
MDA33 DQA1_0 EDCA1_2 MDB34 DQB1_1 EDCB1_3
A18 D7 QSAP_7 79 AB1
MDA34 DQA1_1 EDCA1_3 MDB35 DQB1_2
F18 AB3 G7 QSBN_0 80
MDA35 DQA1_2 MDB36 DQB1_3 DDBIB0_0
D17 A34 QSAN_0 78 AD6 K1 QSBN_1 80
MDA36 DQA1_3 DDBIA0_0 MDB37 DQB1_4 DDBIB0_1
A16 E30 QSAN_1 78 AD1 P1 QSBN_2 80
MDA37 DQA1_4 DDBIA0_1 MDB38 DQB1_5 DDBIB0_2
F16 E26 QSAN_2 78 AD3 W4 QSBN_3 80
MDA38 DQA1_5 DDBIA0_2 MDB39 DQB1_6 DDBIB0_3
D15 C20 QSAN_3 78 AD5 AC4 QSBN_4 81
MDA39 DQA1_6 DDBIA0_3 MDB40 DQB1_7 DDBIB1_0
E14 C16 QSAN_4 79 AF1 AH3 QSBN_5 81
MDA40 DQA1_7 DDBIA1_0 MDB41 DQB1_8 DDBIB1_1
F14 C12 QSAN_5 79 AF3 AJ8 QSBN_6 81
MDA41 DQA1_8 DDBIA1_1 MDB42 DQB1_9 DDBIB1_2
D13 J11 QSAN_6 79 AF6 AM3 QSBN_7 81
MDA42 DQA1_9 DDBIA1_2 MDB43 DQB1_10 DDBIB1_3
F12 F8 QSAN_7 79 AG4
MDA43 DQA1_10 DDBIA1_3 MDB44 DQB1_11
A12 AH5 T7
MDA44 DQA1_11 MDB45 DQB1_12 ADBIB0 ODTB0 80
D11 J21 AH6 W7
MDA45 DQA1_12 ADBIA0 ODTA0 78 MDB46 DQB1_13 ADBIB1 ODTB1 81
F10 G19 AJ4
MDA46 DQA1_13 ADBIA1 ODTA1 79 MDB47 DQB1_14
A10 AK3 L9
MDA47 DQA1_14 MDB48 DQB1_15 CLKB0 CLKB0 80
C10 H27 AF8 L8
MDA48 DQA1_15 CLKA0 CLKA0 78 MDB49 DQB1_16 CLKB0# CLKB0# 80
G13 G27 AF9
MDA49 DQA1_16 CLKA0# CLKA0# 78 MDB50 DQB1_17
H13 AG8 AD8
MDA50 DQA1_17 MDB51 DQB1_18 CLKB1 CLKB1 81
C J13 J14 AG7 AD7 C
MDA51 DQA1_18 CLKA1 CLKA1 79 MDB52 DQB1_19 CLKB1# CLKB1# 81
H11 H14 AK9
MDA52 DQA1_19 CLKA1# CLKA1# 79 MDB53 DQB1_20
G10 AL7 T10
MDA53 DQA1_20 MDB54 DQB1_21 RASB0# RASB0# 80
G8 K23 AM8 Y10
MDA54 DQA1_21 RASA0# RASA0# 78 MDB55 DQB1_22 RASB1# RASB1# 81
K9 K19 AM7
MDA55 DQA1_22 RASA1# RASA1# 79 MDB56 DQB1_23
K10 AK1 W10
MDA56 DQA1_23 MDB57 DQB1_24 CASB0# CASB0# 80
G9 K20 AL4 AA10
MDA57 DQA1_24 CASA0# CASA0# 78 MDB58 DQB1_25 CASB1# CASB1# 81
A8 K17 AM6
MDA58 DQA1_25 CASA1# CASA1# 79 MDB59 DQB1_26
C8 AM1 P10
MDA59 DQA1_26 MDB60 DQB1_27 CSB0_0# CSB0#_0 80
E8 K24 AN4 L10
MDA60 DQA1_27 CSA0_0# CSA0#_0 78 MDB61 DQB1_28 CSB0_1#
A6 K27 AP3
MDA61 DQA1_28 CSA0_1# MDB62 DQB1_29
C6 AP1 AD10
MDA62 DQA1_29 MDB63 DQB1_30 CSB1_0# CSB1#_0 81
E6 M13 AP5 AC10
MDA63 DQA1_30 CSA1_0# CSA1#_0 79 DQB1_31 CSB1_1#
A5 K16
DQA1_31 CSA1_1#
U10
MVREFDA MVREFDB CKEB0 CKEB0 80
L18 K21 Y12 AA11
MVREFSA MVREFDA CKEA0 CKEA0 78 MVREFSB MVREFDB CKEB1 CKEB1 81
L20 J20 AA12
MVREFSA CKEA1 CKEA1 79 MVREFSB
N10
WEB0# WEB0# 80
L27 K26 AB11
NC#L27 WEA0# WEA0# 78 WEB1# WEB1# 81
N12 L15
NC#N12 WEA1# WEA1# 79
AG12
NC#AG12
T8 MAB13 80,81
MAB0_8
DIS_PX
R7524 1 MEM_CALRP0
M12
NC#M12 MAA0_8
H23 MAA13 78,79 MAB1_8/MAB_14
W8 MAB14 80,81
2 M27 J19 MAA14 78,79 U12
120R2F-GP MEM_CALRP0 MAA1_8/MAA_14 MAB_15
AH12 M21 V12 R7502
NC#AH12 MAA_15 RSVD#V12 R7520
M20
RSVD#M20 DRAM_RST DRAM_RST_RC
DIS_PX DRAM_RST
AH11 1 2
10R2J-2-GP
1 2 MEM_RST 78,79,80,81
DIS_PX DIS_PX
2
51R2J-2-GP
MARS-M2-XT-GP R7504 C7501 DIS_PX
DIS_PX
SC120P50V2JN-1GP
4K99R2F-L-GP
1
MARS-M2-XT-GP
PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC DIS_PX
1
1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0
B This basic topology should be used for DRAM_RST for B
1.5*(100/140.2)=1.07V DDR3/GDDR3/GDDR5.These Capacitors and Resistor values
1
1
R7510 R7511 R7512 R7513
are an example only. The Series R and || Cap values
Ra 40D2R2F-GP
Ra 40D2R2F-GP 40D2R2F-GP 40D2R2F-GP will depend on the DRAM load and will have to be
DIS_PX Ra Ra
DIS_PX DIS_PX DIS_PX calculated for different Memory ,DRAM Load and board
to pass Reset Signal Spec.
2
2
MVREFDA MVREFSA MVREFDB MVREFSB
1
1
DIS_PX R7514 C7502 R7515 C7503 R7516 C7504 R7517 C7505
Rb 100R2F-L1-GP-U SC1U6D3V2KX-GP
Rb 100R2F-L1-GP-U SC1U6D3V2KX-GP Rb 100R2F-L1-GP-U SC1U6D3V2KX-GP
Rb 100R2F-L1-GP-U SC1U6D3V2KX-GP
2
2
DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
2
2
DDR3/GDDR3 Memory Stuff Option(Mad/Park)
GDDR5 GDDR3 DDR3
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VGA1E 5 OF 9
For DDR3/GDDR5, MVDDQ = 1.5V 1D8V_VGA_S0
1D5V_VGA_S0
(1.5V@1000mA VDDR1) MEM I/O (1.8V@100mA PCIE_VDDR)
AC7 AA31
VDDR1 NC#AA31
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
AD11 AA32
1
C7601 C7604 C7605 C7606 C7608 C7609 C7610 C7611 VDDR1 NC#AA32 C7616 C7617 C7650
AF7 AA33
VDDR1 NC#AA33
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
AG10 AA34
VDDR1 NC#AA34
AJ7 W30
2
VDDR1 NC#W30
DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX AK8
VDDR1 NC#Y31
Y31 DIS_PX DIS_PX DIS_PX
AL9 V28
VDDR1 NC#V28 0D95V_VGA_S0
G11 W29
VDDR1 NC#W29
G14 AB37
VDDR1 PCIE_PVDD
G17 (0.95V@1300mA@GEN3/900mA@GEN2)
G20
VDDR1
VDDR1 PCIE_VDDC
G30 1.3A
PCIE
G23 G31
1
VDDR1 PCIE_VDDC C7630 C7631 C7632 C7633 C7670 C7671 C7672 C7602
G26 H29
VDDR1 PCIE_VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
D C7635 C7696 G29 H30 D
1
C7664 VDDR1 PCIE_VDDC
H10 J29
2
VDDR1 PCIE_VDDC
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
J7 J30
VDDR1 PCIE_VDDC
J9 L28
2
VDDR1 PCIE_VDDC
K11
VDDR1 PCIE_VDDC
M28 DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
DY DY DIS_PX K13
VDDR1 PCIE_VDDC
N28
K8 R28
VDDR1 PCIE_VDDC
L12 T28
VDDR1 PCIE_VDDC 0D95V_VGA_S0
L16 U28
VDDR1 PCIE_VDDC
L21
VDDR1
L23
VDDR1 (0.95V@1000mA)
L26 N27
VDDR1 BACO BIF_VDDC
L7 T27
VDDR1 BIF_VDDC
SC4D7U6D3V3KX-GP
M11
1
VDDR1 C7665
N11
VDDR1
P7 AA15
VDDR1 CORE VDDC
R11 AA17
2
VDDR1 VDDC
U11 AA20
VDDR1 VDDC
U7 AA22
VDDR1 VDDC
Y11 AA24 DIS_PX
VDDR1 VDDC
Y7 AA27
VDDR1 VDDC
AB16
1D8V_VGA_S0 VDDC
AB18
VDDC VGA_CORE
AB21
120R@300mA VDDC
VDDC
AB23 (0.95~1.12V@12900mA VDDC+VDDCI)
VDDC_CT AB26
L7601 (1.8V@219mA VDD_CT) 13mA LEVEL
TRANSLATION
VDDC
AB28
1
VDDC C7680 C7679 C7683 C7681 C7676 C7678 C7682 C7677
1 2 AF26 AC17
VDD_CT VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
FCM1005MF-121T03-GP AF27 AC20
1
VDD_CT VDDC
SCD1U16V2KX-3GP
68.00217.701 C7651 C7653 AG26 AC22
2
VDD_CT VDDC
SC1U6D3V2KX-GP
2nd = 68.00084.951 AG27
VDD_CT VDDC
AC24
3rd = 68.00225.091 AC27
2
VGA_VDDR3 VDDC
DIS_PX DIS_PX DIS_PX VDDC
AD18
I/O
VDDC
AD21 DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
3D3V_VGA_S0 AF23 AD23
VDDR3 VDDC
AF24 AD26 (0.95~1.12V@12900mA VDDC+VDDCI)
25mA AG23
VDDR3
VDDR3
VDDC
VDDC
AF17
1 R7614 2 AG24 AF20
1
VDDR3 VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
0R0603-PAD-1-GP-U AF22 C7649 C7694 C7656 C7695 C7648 C7652 C7654 C7607 C7612 C7613 C7614 C7615 C7622 C7624 C7628
1
1
VDDC
SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C7620 C7666 C7667 DVP AG16
VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
20130718 MV DY AD12 AG18
2
VDDR4 VDDC
C AF11 C
2
2
VDDR4
AF12 AH22
VDDR4 VDDC
DIS_PX DIS_PX AF13
VDDR4 VDDC
AH27
VDDC
AH28 DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
M26
VDDC
AF15 N24
VGA_VDDR4 VDDR4 VDDC
AG11 R18
L7602
170mA 300mA AG13
VDDR4
VDDR4
VDDC
VDDC
R21
1 2 AG15 R23
FCM1005MF-121T03-GP VDDR4 VDDC
VDDC
R26 (0.95~1.12V@12900mA VDDC+VDDCI)
SCD1U16V2KX-3GP
68.00217.701 T17
1
1
C7621 C7619 C7674 VDDC C7627 C7626 C7623 C7625
2nd = 68.00084.951 T20
1
VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DIS_PX T24
2
2
VDDC
U16
2
VDDC
DY DIS_PX DIS_PX DIS_PX VDDC
U18
VDDC
U21 DIS_PX DIS_PX DIS_PX DIS_PX
U23
VDDC
U26
VDDC
V17
VDDC
V20
VDDC
V22
VDDC
V24
VDDC
V27
VDDC
Y16
VDDC
Y18
VDDC
Y21
VDDC
Y23
VGA_CORE VDDC
Y26
VDDC VGA_CORE
Y28
VGA_CORE VDDC
3.5A
SCD1U16V2KX-3GP
AA13
1
VDDCI
SC1U6D3V2KX-GP
1
VDDCI C7691 C7688 C7686
AC12
VDDCI
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC10U6D3V3MX-GP
R7602 AC15
2
10R2F-L-GP VDDCI
AD13
2
VDDCI
DIS_PX DIS_PX VDDCI
AD16
M15 DIS_PX DIS_PX DIS_PX DIS_PX
2
VDDCI
M16
VDDCI
M18
VOLTAGE VDDCI
B
DIS_PX SENESE VDDCI
M23
B
N13
ISOLATED
VDDCI
82 VGA_SENSE+ AF28 N15
FB_VDDC VDDCI C7658
CORE I/O
N17
1
VDDCI
N20
VDDCI
SC10U6D3V3MX-GP
1FB_VDDCI AG28 N22
TP7602 TPAD14-OP-GP FB_VDDCI VDDCI
R12
2
VDDCI
R13
VDDCI
82 VGA_SENSE- AH29
FB_GND VDDCI
R16 DIS_PX
DIS_PX VDDCI
T12
T15
VDDCI
V15
VDDCI
DIS_PX VDDCI
Y13
1
R7601 MARS-M2-XT-GP
10R2F-L-GP
2
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VGA1F 6 OF 9
AB39 A3
PCIE_VSS GND
E39 A37
PCIE_VSS GND
F34 AA16
PCIE_VSS GND
F39 AA18
PCIE_VSS GND
G33 AA2
PCIE_VSS GND
G34 AA21
PCIE_VSS GND VGA1H 8 OF 9
H31 AA23
PCIE_VSS GND
H34 AA26
PCIE_VSS GND
H39 AA28
PCIE_VSS GND 0D95V_VGA_S0
J31 AA6
PCIE_VSS GND DP_VDDR DP_VDDC
J34 AB12
PCIE_VSS GND
K31 AB15 AP31
PCIE_VSS GND DP_VDDC
K34 AB17 AP32
PCIE_VSS GND DP_VDDC
K39 AB20 AN33
PCIE_VSS GND DP_VDDC
L31 AB22 AP33
PCIE_VSS GND DP_VDDC
D L34 AB24 AN24 D
PCIE_VSS GND NC#AN24
M34 AB27 AP24 AP13
PCIE_VSS GND NC#AP24 NC#AP13
M39 AC11 AP25 AT13
PCIE_VSS GND NC#AP25 NC#AT13
N31 AC13 AP26 AP14
PCIE_VSS GND NC#AP26 NC#AP14
N34 AC16 AU28 AP15
PCIE_VSS GND NC#AU28 NC#AP15
P31 AC18 AV29
PCIE_VSS GND NC#AV29
P34 AC2 AL33
PCIE_VSS GND DP_VDDC
P39 AC21 AM33
PCIE_VSS GND DP_VDDC
R34 AC23 AP20 AK33
PCIE_VSS GND NC#AP20 DP_VDDC
T31 AC26 AP21 AK34
PCIE_VSS GND NC#AP21 DP_VDDC
T34 AC28 AP22
PCIE_VSS GND NC#AP22
T39 AC6 AP23
PCIE_VSS GND NC#AP23
U31 AD15 AU18
PCIE_VSS GND NC#AU18
U34 AD17 AV19
PCIE_VSS GND DPLL_PVDD NC#AV19 DP GND
V34 AD20
PCIE_VSS GND
V39 AD22 AN27
PCIE_VSS GND DP_VSSR
W31 AD24 AH34 AP27
PCIE_VSS GND DP_VDDR DP_VSSR
W34 AD27 AJ34 AP28
PCIE_VSS GND DP_VDDR DP_VSSR
Y34 AD9 AF34 AW24
PCIE_VSS GND DP_VDDR DP_VSSR
Y39 AE2 AG34 AW26
PCIE_VSS GND DP_VDDR DP_VSSR
AE6 AM37 AN29
GND DP_VDDR DP_VSSR
AF10 AL38 AP29
GND DP_VDDR DP_VSSR
AF16 AP30
GND DP_VSSR
AF18 AW30
GND DP_VSSR
GND AF21 AW32
GND DP_VSSR
AG17 AN17
GND DP_VSSR
F15 AG2 AP16
GND GND DP_VSSR
F17 AG20 AP17
GND GND DP_VSSR
F19 AW14
GND DP_VSSR
F21 AG6 AW16
GND GND DP_VSSR
F23 AG9 AN19
GND GND DP_VSSR
F25 AH21 AP18
GND GND DP_VSSR
F27 AJ10 AP19
GND GND DP_VSSR
F29 AJ11 AW20
GND GND CALIBRATION DP_VSSR
F31 AJ2 AW22
GND GND DP_VSSR
F33 AJ28 AN34
GND GND DP_VSSR
F7 AJ6 AP39
GND GND DP_VSSR
F9 AK11 AW28 AR39
GND GND NC#AW28 DP_VSSR
G2 AK31 AU37
GND GND DP_VSSR
G6 AK7 AF39
GND GND DP_VSSR
H9 AL11 AH39
GND GND DP_VSSR
C J2 AL14 AW18 AK39 C
GND GND NC#AW18 DP_VSSR
J27 AL17 AL34
GND GND R7733 DP_VSSR
J6 AL2 AV27
GND GND 150R2F-1-GP DP_VSSR
J8 AL20 AR28
GND GND DP_VSSR
K14 1 DIS_PX 2 DPEF_CALR AM39 AV17
GND DP_CALR DP_VSSR
K7 AL23 AR18
GND GND DP_VSSR
L11 AL26 AN38
GND GND DP_VSSR
L17 AL32 AM35
GND GND DP_VSSR
L2 AL6
GND GND
L22 AL8
GND GND
L24
GND GND
AM11 DIS_PX
L6 AM31
GND GND
M17 AM9
GND GND
M22 AN11
GND GND
M24 AN2
GND GND MARS-M2-XT-GP
N16 AN30
GND GND
N18 AN6
GND GND
N2 AN8
GND GND
N21 AP11
GND GND
N23
GND GND
AP7 Clock Input Configuraiton -GDDR3/DDR3
N26 AP9
GND GND a) 27MHz crystal connected to XTALIN or XTALOUT or
N6 AR5
GND GND
R15 B11 b) 27MHz (1.8V) oscillator connected to XTALIN or
GND GND 1D8V_VGA_S0 DPLL_PVDD
R17 B13
GND GND
R2
GND GND
B15 c) 27MHz (3.3V) oscillator connected to XO_IN (Park, Madison, and Broadway only)
R20 B17
R22
GND GND
B19
75mA
GND GND
R24 B21
1
GND GND C7776 C7773 C7771
R27 B23
GND GND
SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
R6 B25 VGA1I 9 OF 9
GND GND
T11 B27
2
GND GND
T13 B29
GND GND
T16
GND GND
B31 DIS_PX DIS_PX
T18 B33
GND GND
T21
GND GND
B7 DY_DIS_PX
T23 B9
GND GND
T26 C1
GND GND XTALIN
U15 C39 DPLL_PVDD AM32 AV33
GND GND DP_VDDR XTALIN
U17 E35
GND GND
U2 E5 DPLL_VDDC AN31
GND GND DPLL_VDDC DP_VDDC
U20 F11
B GND GND 0D95V_VGA_S0 B
U22 F13
GND GND
U24
GND
AN32
DP_VSSR DIS_PX
U27
U6
GND
AG22
125mA AU34 XTALOUT
GND NC#AG22 XTALOUT R7701
V11
1
1
GND C7775 C7769 C7768
V16 1 2
GND
SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
V18 1MR2F-GP
GND
V21 H7 X7701
2
GND MPLL_PVDD
V23 MPLL_PVDD H8
GND MPLL_PVDD C7791
V26
GND DIS_PX DIS_PX XTALIN
W2 AW34 1 2 1 4
GND XO_IN SC12P50V2JN-3GP
W6
GND DIS_PX 1D8V_VGA_S0
DY_DIS_PX
Y15
GND SPLL_PVDD AM10
SPLL_PVDD DIS_PX DIS_PX
PLLS/XTAL
Y17 C7792
GND XTALOUT 1
Y20 2 3 2
GND SC12P50V2JN-3GP
Y22 A39
GND VSS_MECH#A39 MPLL_PVDD
Y24 AW1 SPLL_VDDC AN9 AW35
Y27
GND VSS_MECH#AW1
AW39
SPLL_VDDC XO_IN2 DIS_PX
GND VSS_MECH#AW39 XTAL-27MHZ-85-GP-U
L7714
1 2
130mA AN10 82.30034.641
MARS-M2-XT-GP FCM1005MF-121T03-GP SPLL_PVSS
1
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
2nd = 68.00084.951
3rd = 68.00225.091 AK10 CLKTESTA TPAD14-OP-GP
1 TP7704 3rd = 82.30034.681
2
DY_DIS_PX
DIS_PX
SPLL_PVDD
MARS-M2-XT-GP
L7716
1 2
75mA
FCM1005MF-121T03-GP
1
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
2nd = 68.00084.951
3rd = 68.00225.091
2
A A
DIS_PX
DIS_PX DIS_PX
DY_DIS_PX
0D95V_VGA_S0 SPLL_VDDC
<Core Design>
L7717
1 2
100mA
FCM1005MF-121T03-GP Wistron Corporation
1
68.00217.701 C7782 C7780 C7781 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
DIS_PX Title
DIS_PX DIS_PX
GPU (5/5) GND
DY_DIS_PX Size Document Number Rev
A2 2013 S-Series Shark Bay 14 15 17 1
Date: Friday, August 02, 2013 Sheet 77 of 103
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0 1D5V_VGA_S0
VRAM1 VRAM2
DY DY DIS_PX DIS_PX MDA[0..31] 75 DIS_PX DIS_PX DIS_PX DY MDA[0..31] 75
K8 E3 MDA3 K8 E3 MDA25
C7808 C7810 C7813 C7812 VDD DQL0 MDA5 C7821 C7819 VDD DQL0 MDA24
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 MDA1 C7809 C7816 N1 F2 MDA30
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
VDD DQL2 VDD DQL2
1
R9 F8 MDA6 R9 F8 MDA31
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
VDD DQL3 MDA2 VDD DQL3 MDA28
D B2 VDD DQL4 H3 B2 VDD DQL4 H3 D
D9 H8 MDA4 D9 H8 MDA27
2
VDD DQL5 MDA0 VDD DQL5 MDA29
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDA7 R1 H7 MDA26
VDD DQL7 VDD DQL7
N9 VDD N9 VDD
D7 MDA20 D7 MDA9
DQU0 MDA19 DQU0 MDA14
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
A1 C8 MDA23 A1 C8 MDA15
C7801 C7804 VDDQ DQU2 MDA16 C7820 C7806 VDDQ DQU2 MDA12
C1 C2 C1 C2
SC68P50V2JN-1GP
SC68P50V2JN-1GP
VDDQ DQU3 VDDQ DQU3
1
C9 A7 MDA22 C9 A7 MDA8
VDDQ DQU4 MDA17 VDDQ DQU4 MDA10
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 MDA21 E9 B8 MDA13
2
VDDQ DQU6 MDA18 VDDQ DQU6 MDA11
DIS_PX DIS_PX F1 VDDQ DQU7 A3 DIS_PX F1 VDDQ DQU7 A3
H9 VDDQ DIS_PX H9 VDDQ
H2 VDDQ DQSU C7 QSAP_2 75 H2 VDDQ DQSU C7 QSAP_1 75
DQSU# B7 QSAN_2 75 DQSU# B7 QSAN_1 75
VRAM_VREFDQ1 H1 VRAM_VREFDQ2 H1
VRAM_VREFCA1 VREFDQ VRAM_VREFCA2 VREFDQ
M8 VREFCA DQSL F3 QSAP_0 75 M8 VREFCA DQSL F3 QSAP_3 75
1 2 VRAM_ZQ1 L8 ZQ DQSL# G3 QSAN_0 75 1 2VRAM_ZQ2 L8 ZQ DQSL# G3 QSAN_3 75
R7801 DIS_PX 243R2F-2-GP R7802 DIS_PX 243R2F-2-GP
ODT K1 ODTA0 75 ODT K1 ODTA0 75
75,79 MAA0 N3 A0 75,79 MAA0 N3 A0
75,79 MAA1 P7 A1 75,79 MAA1 P7 A1
75,79 MAA2 P3 A2 CS# L2 CSA0#_0 75 75,79 MAA2 P3 A2 CS# L2 CSA0#_0 75
75,79 MAA3 N2 A3 RESET# T2 MEM_RST 75,79,80,81 75,79 MAA3 N2 A3 RESET# T2 MEM_RST 75,79,80,81
75,79 MAA4 P8 A4 75,79 MAA4 P8 A4
75,79 MAA5 P2 A5 75,79 MAA5 P2 A5
75,79 MAA6 R8 A6 NC#T7 T7 MAA14 75,79 75,79 MAA6 R8 A6 NC#T7 T7 MAA14 75,79
75,79 MAA7 R2 A7 NC#L9 L9 75,79 MAA7 R2 A7 NC#L9 L9
C T8 L1 T8 L1 C
75,79 MAA8 A8 NC#L1 75,79 MAA8 A8 NC#L1
75,79 MAA9 R3 A9 NC#J9 J9 75,79 MAA9 R3 A9 NC#J9 J9
75,79 MAA10 L7 A10/AP NC#J1 J1 75,79 MAA10 L7 A10/AP NC#J1 J1
75,79 MAA11 R7 A11 75,79 MAA11 R7 A11
75,79 MAA12 N7 A12/BC# 75,79 MAA12 N7 A12/BC#
75,79 MAA13 T3 A13 VSS J8 75,79 MAA13 T3 A13 VSS J8
M7 NC#M7 VSS M1 M7 NC#M7 VSS M1
20120717 SA VSS M9 VSS M9
20120801 SA VSS J2 VSS J2
75,79 A_BA0 M2 BA0 VSS P9 75,79 A_BA0 M2 BA0 VSS P9
75,79 A_BA1 N8 BA1 VSS G8 75,79 A_BA1 N8 BA1 VSS G8
75,79 A_BA2 M3 BA2 VSS B3 75,79 A_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
75 CLKA0 J7 CK VSS T9 75 CLKA0 J7 CK VSS T9
75 CLKA0# K7 CK# VSS E1 75 CLKA0# K7 CK# VSS E1
VSS P1 VSS P1
75 CKEA0 K9 CKE 75 CKEA0 K9 CKE
1
VSSQ G1 VSSQ G1
R7804 R7803 F9 F9
40D2R2F-GP 40D2R2F-GP VSSQ VSSQ
75 DQMA2 D3 DMU VSSQ E8 75 DQMA1 D3 DMU VSSQ E8
DIS_PX DIS_PX 75 DQMA0 E7 DML VSSQ E2 75 DQMA3 E7 DML VSSQ E2
D8 D8
2
VSSQ VSSQ
VSSQ D1 VSSQ D1
GPU_CLKA0_T 75 W EA0# L3 B9 75 WEA0# L3 B9
WE# VSSQ WE# VSSQ
75 CASA0# K3 CAS# VSSQ B1 75 CASA0# K3 CAS# VSSQ B1
75 RASA0# J3 RAS# VSSQ G9 75 RASA0# J3 RAS# VSSQ G9
1
1
R7805 R7807 R7809 R7811
4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
DIS_PX DIS_PX DIS_PX DIS_PX
2
2
VRAM_VREFDQ1 VRAM_VREFCA1 VRAM_VREFDQ2 VRAM_VREFCA2
1
1
C7803 C7805 C7811 C7807
R7806 SCD1U16V2KX-3GP R7808 SCD1U16V2KX-3GP R7810 SCD1U16V2KX-3GP R7812 SCD1U16V2KX-3GP
4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
2
2
DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
2
2
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM1,2 (1/4)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 78 of 103
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0 1D5V_VGA_S0
VRAM3
DIS_PX VRAM4
DIS_PX DIS_PX
DIS_PX DIS_PX MDA38
MDA[32..63] 75 DIS_PX DIS_PX DIS_PX MDA61
MDA[32..63] 75
K8 VDD DQL0 E3 K8 VDD DQL0 E3
C7908 C7911 C7910 C7913 K2 F7 MDA33 C7916 K2 F7 MDA57
VDD DQL1 MDA37 C7909 C7915 C7914 VDD DQL1 MDA63
N1 F2 N1 F2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
VDD DQL2 VDD DQL2
1
R9 F8 MDA39 R9 F8 MDA60
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
VDD DQL3 MDA32 VDD DQL3 MDA59
D B2 VDD DQL4 H3 B2 VDD DQL4 H3 D
D9 H8 MDA34 D9 H8 MDA56
2
VDD DQL5 MDA36 VDD DQL5 MDA62
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDA35 R1 H7 MDA58
VDD DQL7 VDD DQL7
N9 VDD N9 VDD
D7 MDA46 D7 MDA50
DQU0 MDA43 DQU0 MDA55
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
A1 C8 MDA45 A1 C8 MDA49
C7905 C7907 VDDQ DQU2 MDA40 C7906 C7912 VDDQ DQU2 MDA52
C1 C2 C1 C2
SC68P50V2JN-1GP
SC68P50V2JN-1GP
VDDQ DQU3 VDDQ DQU3
1
C9 A7 MDA44 C9 A7 MDA48
VDDQ DQU4 MDA41 VDDQ DQU4 MDA54
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 MDA47 E9 B8 MDA51
2
VDDQ DQU6 MDA42 VDDQ DQU6 MDA53
DIS_PX F1 VDDQ DQU7 A3 DIS_PX F1 VDDQ DQU7 A3
DIS_PX H9 VDDQ DIS_PX H9 VDDQ
H2 VDDQ DQSU C7 QSAP_5 75 H2 VDDQ DQSU C7 QSAP_6 75
DQSU# B7 QSAN_5 75 DQSU# B7 QSAN_6 75
VRAM_VREFDQ3 H1 VRAM_VREFDQ4 H1
VRAM_VREFCA3 VREFDQ VRAM_VREFCA4 VREFDQ
M8 VREFCA DQSL F3 QSAP_4 75 M8 VREFCA DQSL F3 QSAP_7 75
1 2 VRAM_ZQ3 L8 ZQ DQSL# G3 QSAN_4 75 1 2VRAM_ZQ4 L8 ZQ DQSL# G3 QSAN_7 75
R7903 DIS_PX 243R2F-2-GP R7904 DIS_PX 243R2F-2-GP
ODT K1 ODTA1 75 ODT K1 ODTA1 75
75,78 MAA0 N3 A0 75,78 MAA0 N3 A0
75,78 MAA1 P7 A1 75,78 MAA1 P7 A1
75,78 MAA2 P3 A2 CS# L2 CSA1#_0 75 75,78 MAA2 P3 A2 CS# L2 CSA1#_0 75
75,78 MAA3 N2 A3 RESET# T2 MEM_RST 75,78,80,81 75,78 MAA3 N2 A3 RESET# T2 MEM_RST 75,78,80,81
75,78 MAA4 P8 A4 75,78 MAA4 P8 A4
75,78 MAA5 P2 A5 75,78 MAA5 P2 A5
75,78 MAA6 R8 A6 NC#T7 T7 MAA14 75,78 75,78 MAA6 R8 A6 NC#T7 T7 MAA14 75,78
75,78 MAA7 R2 A7 NC#L9 L9 75,78 MAA7 R2 A7 NC#L9 L9
C T8 L1 T8 L1 C
75,78 MAA8 A8 NC#L1 75,78 MAA8 A8 NC#L1
75,78 MAA9 R3 A9 NC#J9 J9 75,78 MAA9 R3 A9 NC#J9 J9
75,78 MAA10 L7 A10/AP NC#J1 J1 75,78 MAA10 L7 A10/AP NC#J1 J1
75,78 MAA11 R7 A11 75,78 MAA11 R7 A11
75,78 MAA12 N7 A12/BC# 75,78 MAA12 N7 A12/BC#
75,78 MAA13 T3 A13 VSS J8 75,78 MAA13 T3 A13 VSS J8
M7 NC#M7 VSS M1 M7 NC#M7 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
75,78 A_BA0 M2 BA0 VSS P9 75,78 A_BA0 M2 BA0 VSS P9
75,78 A_BA1 N8 BA1 VSS G8 75,78 A_BA1 N8 BA1 VSS G8
75,78 A_BA2 M3 BA2 VSS B3 75,78 A_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
75 CLKA1 J7 CK VSS T9 75 CLKA1 J7 CK VSS T9
75 CLKA1# K7 CK# VSS E1 75 CLKA1# K7 CK# VSS E1
VSS P1 VSS P1
75 CKEA1 K9 CKE 75 CKEA1 K9 CKE
1
VSSQ G1 VSSQ G1
R7907 R7908 F9 F9
40D2R2F-GP 40D2R2F-GP VSSQ VSSQ
75 DQMA5 D3 DMU VSSQ E8 75 DQMA6 D3 DMU VSSQ E8
DIS_PX DIS_PX 75 DQMA4 E7 DML VSSQ E2 75 DQMA7 E7 DML VSSQ E2
D8 D8
2
VSSQ VSSQ
VSSQ D1 VSSQ D1
GPU_CLKA1_T 75 W EA1# L3 B9 75 WEA1# L3 B9
WE# VSSQ WE# VSSQ
75 CASA1# K3 CAS# VSSQ B1 75 CASA1# K3 CAS# VSSQ B1
75 RASA1# J3 RAS# VSSQ G9 75 RASA1# J3 RAS# VSSQ G9
1
1
R7901 R7905 R7909 R7911
4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
DIS_PX DIS_PX DIS_PX DIS_PX
2
2
VRAM_VREFDQ3 VRAM_VREFCA3 VRAM_VREFDQ4 VRAM_VREFCA4
1
1
C7901 C7904 C7902 C7917
R7902 SCD1U16V2KX-3GP R7906 SCD1U16V2KX-3GP R7910 SCD1U16V2KX-3GP R7912 SCD1U16V2KX-3GP
4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
2
2
DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
2
2
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM3,4 (2/4)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 79 of 103
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
VRAM5 1D5V_VGA_S0
DIS_PX VRAM6
DIS_PX DIS_PX DIS_PX MDB10
MDB[0..31] 75 DIS_PX
C8021 C8008 C8002 C8006
K8 VDD DQL0 E3
MDB11
DIS_PX DIS_PX DIS_PX MDB20
MDB[0..31] 75
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDB12 C8023 C8011 C8005 C8007 K2 F7 MDB18
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDD DQL2 VDD DQL1
1
R9 F8 MDB15 N1 F2 MDB23
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDD DQL3 VDD DQL2
1
B2 H3 MDB8 R9 F8 MDB19
SC1U6D3V2KX-GP
VDD DQL4 MDB13 VDD DQL3 MDB22
D9 H8 B2 H3
2
VDD DQL5 MDB9 VDD DQL4 MDB16
G7 G2 D9 H8
2
VDD DQL6 MDB14 VDD DQL5 MDB17
D R1 VDD DQL7 H7 G7 VDD DQL6 G2 D
N9 R1 H7 MDB21
VDD MDB30 VDD DQL7
DQU0 D7 N9 VDD
A8 C3 MDB26 D7 MDB1
VDDQ DQU1 DQU0
SC10U6D3V3MX-GP
A1 C8 MDB29 A8 C3 MDB7
VDDQ DQU2 VDDQ DQU1
SC10U6D3V3MX-GP
C8009 C8022 C1 C2 MDB27 A1 C8 MDB2
SC68P50V2JN-1GP
VDDQ DQU3 VDDQ DQU2
1
C9 A7 MDB28 C8010 C8024 C1 C2 MDB4
SC68P50V2JN-1GP
VDDQ DQU4 VDDQ DQU3
1
D2 A2 MDB25 C9 A7 MDB3
VDDQ DQU5 MDB31 VDDQ DQU4 MDB5
E9 B8 D2 A2
2
VDDQ DQU6 MDB24 VDDQ DQU5 MDB0
DIS_PX F1 A3 E9 B8
2
VDDQ DQU7 VDDQ DQU6 MDB6
DIS_PX H9 VDDQ DIS_PX F1 VDDQ DQU7 A3
H2 VDDQ DQSU C7 QSBP_3 75 DIS_PX H9 VDDQ
DQSU# B7 QSBN_3 75 H2 VDDQ DQSU C7 QSBP_0 75
VRAM_VREFDQ5 H1 B7 QSBN_0 75
VRAM_VREFCA5 VREFDQ VRAM_VREFDQ6 DQSU#
M8 VREFCA DQSL F3 QSBP_1 75 H1 VREFDQ
1 2 VRAM_ZQ5 L8 ZQ DQSL# G3 QSBN_1 75 VRAM_VREFCA6 M8 VREFCA DQSL F3 QSBP_2 75
R8004 DIS_PX 243R2F-2-GP 1 2 VRAM_ZQ6 L8 G3 QSBN_2 75
R8006 243R2F-2-GP ZQ DQSL#
ODT K1 ODTB0 75 DIS_PX
75,81 MAB0 N3 A0 ODT K1 ODTB0 75
75,81 MAB1 P7 A1 75,81 MAB0 N3 A0
75,81 MAB2 P3 A2 CS# L2 CSB0#_0 75 75,81 MAB1 P7 A1
75,81 MAB3 N2 A3 RESET# T2 MEM_RST 75,78,79,81 75,81 MAB2 P3 A2 CS# L2 CSB0#_0 75
75,81 MAB4 P8 A4 75,81 MAB3 N2 A3 RESET# T2 MEM_RST 75,78,79,81
75,81 MAB5 P2 A5 75,81 MAB4 P8 A4
75,81 MAB6 R8 A6 NC#T7 T7 MAB14 75,81 75,81 MAB5 P2 A5
75,81 MAB7 R2 A7 NC#L9 L9 75,81 MAB6 R8 A6 NC#T7 T7 MAB14 75,81
75,81 MAB8 T8 A8 NC#L1 L1 75,81 MAB7 R2 A7 NC#L9 L9
75,81 MAB9 R3 A9 NC#J9 J9 75,81 MAB8 T8 A8 NC#L1 L1
75,81 MAB10 L7 A10/AP NC#J1 J1 75,81 MAB9 R3 A9 NC#J9 J9
C R7 L7 J1 C
75,81 MAB11 A11 75,81 MAB10 A10/AP NC#J1
75,81 MAB12 N7 A12/BC# 75,81 MAB11 R7 A11
75,81 MAB13 T3 A13 VSS J8 75,81 MAB12 N7 A12/BC#
M7 NC#M7 VSS M1 75,81 MAB13 T3 A13 VSS J8
VSS M9 M7 NC#M7 VSS M1
VSS J2 VSS M9
75,81 B_BA0 M2 BA0 VSS P9 VSS J2
75,81 B_BA1 N8 BA1 VSS G8 75,81 B_BA0 M2 BA0 VSS P9
75,81 B_BA2 M3 BA2 VSS B3 75,81 B_BA1 N8 BA1 VSS G8
VSS T1 75,81 B_BA2 M3 BA2 VSS B3
VSS A9 VSS T1
75 CLKB0 J7 CK VSS T9 VSS A9
75 CLKB0# K7 CK# VSS E1 75 CLKB0 J7 CK VSS T9
VSS P1 75 CLKB0# K7 CK# VSS E1
1
H5TQ2G63BFR-11C-GP
H5TQ2G63BFR-11C-GP
B B
1D5V_VGA_S0 1D5V_VGA_S0
1D5V_VGA_S0 1D5V_VGA_S0
1
1
R8012 R8010
R8001 R8003 4K99R2F-L-GP 4K99R2F-L-GP
4K99R2F-L-GP 4K99R2F-L-GP DIS_PX DIS_PX
DIS_PX DIS_PX
2
2
VRAM_VREFDQ6 VRAM_VREFCA6
VRAM_VREFDQ5 VRAM_VREFCA5
1
C8013 C8012
1
2
4K99R2F-L-GP 4K99R2F-L-GP DIS_PX DIS_PX DIS_PX DIS_PX
2
2
2
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM5,6 (3/4)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 80 of 103
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0 1D5V_VGA_S0
DIS_PX VRAM7 VRAM8
DIS_PX DIS_PX DIS_PXDIS_PX
DIS_PX DIS_PX MDB33
MDB[32..63] 75 DIS_PX MDB53
MDB[32..63] 75
K8 VDD DQL0 E3 K8 VDD DQL0 E3
C8102 C8107 C8108 C8109 K2 F7 MDB38 C8105 C8116 C8113 C8115 K2 F7 MDB49
VDD DQL1 MDB37 VDD DQL1 MDB55
N1 F2 N1 F2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
VDD DQL2 VDD DQL2
1
D R9 F8 MDB36 R9 F8 MDB51 D
VDD DQL3 MDB34 VDD DQL3 MDB54
B2 H3 B2 H3
1 SCD1U16V2KX-3GP
VDD DQL4 MDB32 VDD DQL4 MDB48
D9 H8 D9 H8
2
VDD DQL5 MDB39 VDD DQL5 MDB52
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDB35 R1 H7 MDB50
VDD DQL7 VDD DQL7
N9 VDD N9 VDD
D7 MDB44 D7 MDB57
DQU0 MDB41 DQU0 MDB59
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
A1 C8 MDB45 A1 C8 MDB56
C8110 C8111 VDDQ DQU2 MDB40 C8114 C8112 VDDQ DQU2 MDB62
C1 C2 C1 C2
SC68P50V2JN-1GP
SC68P50V2JN-1GP
VDDQ DQU3 VDDQ DQU3
1
C9 A7 MDB46 C9 A7 MDB61
VDDQ DQU4 MDB42 VDDQ DQU4 MDB58
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 MDB47 E9 B8 MDB63
2
VDDQ DQU6 MDB43 VDDQ DQU6 MDB60
DIS_PX F1 VDDQ DQU7 A3 DIS_PX F1 VDDQ DQU7 A3
DIS_PX H9 VDDQ DIS_PX H9 VDDQ
H2 VDDQ DQSU C7 QSBP_5 75 H2 VDDQ DQSU C7 QSBP_7 75
DQSU# B7 QSBN_5 75 DQSU# B7 QSBN_7 75
VRAM_VREFDQ7 H1 VRAM_VREFDQ8 H1
VRAM_VREFCA7 VREFDQ VRAM_VREFCA8 VREFDQ
M8 VREFCA DQSL F3 QSBP_4 75 M8 VREFCA DQSL F3 QSBP_6 75
1 2 VRAM_ZQ7 L8 G3 QSBN_4 75 1 2 VRAM_ZQ8 L8 G3 QSBN_6 75
R8103 243R2F-2-GP ZQ DQSL# R8104 243R2F-2-GP ZQ DQSL#
DIS_PX DIS_PX
ODT K1 ODTB1 75 ODT K1 ODTB1 75
75,80 MAB0 N3 A0 75,80 MAB0 N3 A0
75,80 MAB1 P7 A1 75,80 MAB1 P7 A1
75,80 MAB2 P3 A2 CS# L2 CSB1#_0 75 75,80 MAB2 P3 A2 CS# L2 CSB1#_0 75
75,80 MAB3 N2 A3 RESET# T2 MEM_RST 75,78,79,80 75,80 MAB3 N2 A3 RESET# T2 MEM_RST 75,78,79,80
75,80 MAB4 P8 A4 75,80 MAB4 P8 A4
75,80 MAB5 P2 A5 75,80 MAB5 P2 A5
75,80 MAB6 R8 A6 NC#T7 T7 MAB14 75,80 75,80 MAB6 R8 A6 NC#T7 T7 MAB14 75,80
C R2 L9 R2 L9 C
75,80 MAB7 A7 NC#L9 75,80 MAB7 A7 NC#L9
75,80 MAB8 T8 A8 NC#L1 L1 75,80 MAB8 T8 A8 NC#L1 L1
75,80 MAB9 R3 A9 NC#J9 J9 75,80 MAB9 R3 A9 NC#J9 J9
75,80 MAB10 L7 A10/AP NC#J1 J1 75,80 MAB10 L7 A10/AP NC#J1 J1
75,80 MAB11 R7 A11 75,80 MAB11 R7 A11
75,80 MAB12 N7 A12/BC# 75,80 MAB12 N7 A12/BC#
75,80 MAB13 T3 A13 VSS J8 75,80 MAB13 T3 A13 VSS J8
20120801 SA M7 NC#M7 VSS M1 20120801 SA M7 NC#M7 VSS M1
20120717 SA VSS M9 20120717 SA VSS M9
VSS J2 VSS J2
75,80 B_BA0 M2 BA0 VSS P9 75,80 B_BA0 M2 BA0 VSS P9
75,80 B_BA1 N8 BA1 VSS G8 75,80 B_BA1 N8 BA1 VSS G8
75,80 B_BA2 M3 BA2 VSS B3 75,80 B_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
75 CLKB1 J7 CK VSS T9 75 CLKB1 J7 CK VSS T9
75 CLKB1# K7 CK# VSS E1 75 CLKB1# K7 CK# VSS E1
VSS P1 VSS P1
1
H5TQ2G63BFR-11C-GP H5TQ2G63BFR-11C-GP
1
R8101 R8105 R8109 R8111
4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
DIS_PX DIS_PX DIS_PX DIS_PX
2
2
VRAM_VREFDQ7 VRAM_VREFCA7 VRAM_VREFDQ8 VRAM_VREFCA8
1
1
C8101 C8104 C8117 C8106
R8102 SCD1U16V2KX-3GP R8106 SCD1U16V2KX-3GP R8110 SCD1U16V2KX-3GP R8112 SCD1U16V2KX-3GP
4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
2
2
DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
2
2
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM7,8 (4/4)
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: Monday, August 12, 2013 Sheet 81 of 103
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_vga_core V-BOOT VID0 VID1 VID2 VID3 VID4 VID5 VID6
3D3V_VGA_S0 0.85V 0 0 1 0 1 1 0
1
DCBATOUT
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
DIS_PX DIS_PX DY DIS_PX DY
D D
PR8202 PR8203 PR8204 PR8205 PR8206
2
PWR_VGA_CORE_VID6
PR8215 1 DIS_PX 2 0R0402-PAD-1-GP PWR_VGA_CORE_VID5
74 VGA_VID5
PR8216 1 DIS_PX 2 0R0402-PAD-1-GP PWR_VGA_CORE_VID4
74 VGA_VID4 DIS_PX PWR_VGA_CORE_VID3
PR8217 1 2 0R0402-PAD-1-GP
74 VGA_VID3 DIS_PX PWR_VGA_CORE_VID2
PR8218 1 2 0R0402-PAD-1-GP
74 VGA_VID2 DIS_PX PWR_VGA_CORE_VID1
PR8241 1 2 0R0402-PAD-1-GP
74 VGA_VID1
PWR_VGA_CORE_VID0
1
1
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
DIS_PX DY DY DIS_PX DY DIS_PX DIS_PX
PR8208 PR8209 PR8210 PR8211 PR8212 PR8213 PR8214
2
5V_S5
1
PR8220
10R2J-2-GP
DIS_PX
2
DCBATOUT
1
PT8201
SE100U25VM-10GP
8209A_EN/DEM_VGA
2
PC8220 PC8218 PC8222 PC8217 PC8221
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
1
2
PC8202
PWR_VGA_CORE_VCC
DIS_PX DIS_PX DIS_PX
DIS_PX
SC1U25V3KX-1-GP
SC1U6D3V2KX-GP
C DIS_PX 79.10112.3JL C
1
3D3V_VGA_S0
DIS_PX
2nd = 79.10712.3BL
5
6
7
8
5
6
7
8
D
D
D
D
D
D
D
D
PU8204 PU8207
1
GND_3211 TPCA8065-H-GP TPCA8065-H-GP
PR8243
DIS_PX DIS_PX DIS_PX
32
31
30
29
28
27
26
25
DIS_PX 10KR2J-3-GP PU8201
Design Current = 27A
G
S
S
S
G
S
S
S
OCP>55A
VID0
VID1
VID2
VID3
VID4
VID5
VID6
EN
2
GND_3211 2 1 PC8203
4
3
2
1
4
3
2
1
SC1KP50V2KX-1GP 20130718 MV PC8211 84.08065.037 84.08065.037
SCD22U25V3KX-GP VGA_CORE
PR8222 2nd = 84.00036.037 2nd = 84.00036.037
20,83 PWR_VGA_CORE_PGOOD 1
PWRGD DIS_PX VCC
24 DIS_PX
PWR_VGA_CORE_BOOT 1 PR8240 2 PWR_VGA_CORE_BOOT_R PWR_VGA_CORE_UG
1 2 2
IMON BST
23 PL8201 DIS_PX
2
DIS_PX 3 22 PWR_VGA_CORE_UG 0R0603-PAD-1-GP-U
100KR2F-L1-GP PWR_VGA_CORE_FBRTN CLKEN# DRVH PWR_VGA_CORE_SW PWR_VGA_CORE_SW
4 21 1 2
PWR_VGA_CORE_FB FBRTN SW
PWR_VGA_CORE_COMP
5
FB PVCC
20
PWR_VGA_CORE_LG
5V_S5 DIS_PX DIS_PX DIS_PX
6 19 IND-D22UH-31-GP
SC100P50V2JN-3GP
COMP DRVL
PC8226
PC8225
PT8205
PT8204
PT8203
7 18 68.R2210.10Q
SC22P50V2JN-4GP
5
6
7
8
5
6
7
8
1
ILIM GND
DIS_PX 33 DY
CSCOMP
1
D
D
D
D
D
D
D
D
PC8204 PR8225 1K58R2F-GP GND PC8212 PU8205 PU8206
DIS_PX DY
CSREF
RAMP
LLINE
CSFB
PC8206 IREF SC2D2U6D3V3KX-GP TPCA8057-H-GP TPCA8057-H-GP PG8206 PG8207
RPM
2
2
RT DIS_PX
2
SCD1U25V3KX-GP
SC10U6D3V3MX-GP
SE470UF2VDM-GP
SE470UF2VDM-GP
SE560U2D5VM-8-GP
PC8205 PWR_VGA_CORE_CSCOMP DIS_PX DIS_PX
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
1
1
PWR_VGA_CORE_LG
G
DIS_PX SC470P50V2KX-3GP DIS_PX 4 4
9
10
11
12
13
14
15
16
S
S
S
S
S
S
1 2 1 2 1 2 ADP3211MNR2G-GP
PWR_VGA_CORE_FB_L
DIS_PX 74.03211.033
3
2
1
3
2
1
PR8223 PR8224 GND_3211
2
1KR2F-3-GP 20KR2F-L-GP PWR_VGA_CORE_IREF
PWR_VGA_CORE_RPM
PWR_VGA_CORE_RT
PWR_VGA_CORE_CSCOMP
PWR_VGA_CORE_FB_R
PWR_VGA_CORE_CSREF
PWR_VGA_CORE_LLINE
PWR_VGA_CORE_CSFB
PR8229 PR8230
80K6R2F-GP
2
PR8235 69.60029.001
PR8226 PR8227 DIS_PX DIS_PX DIS_PX DIS_PX PR8231 NTC-220K-2-GP 2nd = 69.60064.001
191KR2F-1-GP
300KR2F-L-GP
B 0R0402-PAD-1-GP B
0R0402-PAD-1-GP 422KR2F-1-GP
DIS_PX
2
PR8237
1
DIS_PX
1
2
2
DCBATOUT
76 VGA_SENSE-
1
1 DIS_PX2
76 VGA_SENSE+ PR8234 DIS_PX
PR8232 20KR2F-L-GP
1KR2F-3-GP
2
1
DIS_PX
PC8207
PWR_VGA_CORE_CSCOMP
SC1KP50V2KX-1GP
2
GND_3211 PC8208
SC1KP50V2KX-1GP
GND_3211
2
5V_S0
GND_3211
2
DYPR8246
100KR2J-1-GP
A A
1
PWR_VGA_CORE_EN_R#
83 PWR_VGA_CORE_EN_R#
4
PQ8201 VGA_CORE <Core Design>
2N7002KDW-GP
84.2N702.A3F DY
PR8245 1 2 8209A_EN/DEM_VGA 2nd = 84.2N702.E3F Wistron Corporation
2
15,83 DGPU_PWR_EN# 10KR2F-2-GP 3RD = 84.2N702.F3F 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DIS_PX PR8247 Taipei Hsien 221, Taiwan, R.O.C.
1
DIS_PX PC8224
SCD1U16V2KX-3GP DY 100R2J-2-GP Title
K A PD8201 DIS_PX
2
1
17,24,27,30,31,36,37,48,49,51,63 PM_SLP_S3# 1SS355GP-GP
83.00355.F1F
8209A_EN/DEM_VGA PQ9201_3 VGA_CORE
Size Document Number Rev
2nd = 83.00355.D1F A2 2013 S-Series Shark Bay 14 15 17 1
3rd = 83.04148.D1H
Date: Monday, August 12, 2013 Sheet 82 of 103
5 4 3 2 1
5 4 3 2 1
PG8303
1 2
G9661 for 1D8V_S0 GAP-CLOSE-PWR-3-GP
PG8304
1 2
GAP-CLOSE-PWR-3-GP
0D95V_S0 5V_S5
D D
3D3V_S0 3D3V_S0_CAM
1
PR8318
1D35V_S3 0R0402-PAD-1-GP
Iomax>4A
5V_S5
2
2 PR8301 1
1
0R0603-PAD-1-GP-U
1
PC8314 PR8313 20130718 MV
SC10U6D3V3MX-GP 0R0402-PAD-1-GP PG8306
1 2 3D3V_S0
1
DIS_PX PC8328
1
10KR2J-3-GP
GAP-CLOSE-PWR-3-GP PC8321 SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
1 2 PG8305 PR8310 SC1U6D3V2KX-GP DIS_PX
2
15,82 DGPU_PWR_EN# PR8312 22KR2J-GP 1 2
DIS_PX DIS_PX 1D8V_PWR
2
1
PC8313
DY_DIS_PX
DIS_PX GAP-CLOSE-PWR-3-GP Iomax=1A
3.5A
2
PWR_1V_VDD
2
PG8301 OCP>2.5A
1 2 20 DGPU_PWROK 1 2
0D95V_PWR 0D95V_VGA_S0 PR8308
Vo(cal.)=1.005V GAP-CLOSE-PWR-3-GP 0R0402-PAD-1-GP
PWR_1V_EN PU8303
1 2 PG8302 1D8V_PWR
20,82 PWR_VGA_CORE_PGOOD
PR8304 DIS_PX 1 2 20130408 SC
0R0402-PAD-1-GP DY_DIS_PX 5 PU8304
VIN#5 PR8306 GAP-CLOSE-PWR-3-GP
20130408 SC 6 4
1
1
3D3V_VGA_S0 PC8318 VCNTL VOUT#4 2KR2F-3-GP PC8315 PC8317 PC8316 1D8V_S0_VGA_PG
7 3 1 9
1
POK VOUT#3 POK GND
SCD47U10V2KX-GP
SC10U6D3V3MX-GP
DY PWR_1D8V_VGA_S0_EN PWR_1D8V_VGA_S0_EN_R
8 2 SC10U6D3V3MX-GP 1 2 2 8 R1
1
EN FB VEN GND
SC100P50V2JN-3GP
9 1 DIS_PX DY PR8303 3 7 PR8309 PC8304 PC8307
2
2
1
SC100P50V2JN-3GP
0R0402-PAD-1-GP PWR_1D8V_VDD 13KR2F-GP
PR8324
DIS_PX 4
VPP VO
6 DIS_PX SC10U6D3V3MX-GP
5
2
2K2R2J-2-GP NC#5
0D95V_PWR DIS_PX DY
2
1
APL5930KAI-TRG-GP PWR_1V_ADJ PWR_1D8V_VGA_FB
DIS_PX 20130408 SC
74.05930.03D Iomax=3.5A PC8324 G9661-25ADJF11U-GP-U DIS_PX
2
1
SCD47U10V2KX-GP
2
1D5V_VGA_EN 2nd = 74.00101.03D PR8315 OCP>4.2A DY_DIS_PX
1
10K2R2F-GP 74.09661.07D R2 PR8305
DIS_PX 10K2R2F-GP
2nd = 74.09025.D3D
2
C
DIS_PX C
2
VOUT = 0.8x (R1+R2) / R2
0323
20130513 SC
1D5V_PWR 1D5V_VGA_S0
PG8337
DCBATOUT PWR_DCBATOUT_1D5V 1 2
SSID = PWR.Plane.Regulator_1p5v
PG8342
1 2
GAP-CLOSE-PWR-3-GP 3D3V_VGA_S0
PG8344
GAP-CLOSE-PWR-3-GP PWR_DCBATOUT_1D5V 1 2
3D3V_VGA_S0 PG8346 GAP-CLOSE-PWR-3-GP
1 2
PC8350 PC8349 PC8339 PG8338 84.02130.031
GAP-CLOSE-PWR-3-GP 1 2 2ND = 84.00102.031
DIS_PX
SC10U25V5KX-GP
SC10U25V5KX-GP
1
2
10KR2J-3-GP
SCD1U25V3KX-GP
3rd = 84.03413.B31 3D3V_VGA_S0
B PR8363 GAP-CLOSE-PWR-3-GP B
1D5V_PWR PQ8302
60mA
1
5
6
7
8
DIS_PX PG8335 Iomax=5.2A 3D3V_S0 S DMP2130L-7-GP
D
D
D
D
SCD1U16V2KX-3GP
1 2 D
DIS_PX DIS_PX
2
OCP>7.8A
D
1
G
PWR_1D8V_VGA_S0_EN GAP-CLOSE-PWR-3-GP PC8329
PU8332 PR8316
DIS_PX
DIS_PX
G
FDMC8884-GP-U PG8339 100KR2J-1-GP
2
G
S
S
S
PR8350 PU8331 DIS_PX PC8335
1st = 84.08067.A37 1 2 DIS_PX
2nd = 84.07410.A37 DIS_PX DIS_PX
4
3
2
1
2
1 2DIS_PX PR8352 SCD1U25V3KX-GP GAP-CLOSE-PWR-3-GP
28KR2F-GP 1 11 2D2R3J-2-GP 20130409 SC DIS_PX SOFT_STAR 1 2
PWR_1D5V_VGA_TRIP 2 PGOOD GND
10 PWR_1D5V_VGA_BOOT 1 2PWR_1D5V_VGA_BOOT_R
2
DIS_PX
1 1D5V_PWR PC8301
TRIP VBST PL8331
1D5V_VGA_EN 1 2 PWR_1D5V_VGA_EN 3 9 PWR_1D5V_VGA_UGATE SCD022U16V2KX-3GP
2
PR8353 PWR_1D5V_VGA_FB 4 EN DRVH PWR_1D5V_VGA_PHASE
8 1 2
1
0R0402-PAD-1-GP PWR_1D5V_VGA_CCM5 VFB SW IND-1UH-168-GP PR8307
7 5V_S0
2
TST V5IN
2D2R5J-1-GP
GAP-CLOSE-PWR-3-GP
6 PWR_1D5V_VGA_LGATE PR8359 68.1R01D.10R 4K7R2J-2-GP
DY
1
DRVL PR8314
20130408 SC 2nd = 68.1R010.20E DIS_PX
1
1
PG8336
PC8340 PC8333 PC8332 470R2J-2-GP
1
1
1
PC8341 PR8351 TPS51211DSCR-GP-U SC1U6D3V2KX-GP SCD1U16V2KX-3GP PT8331 SCD1U16V2KX-3GP
DIS_PX
151211_SW_GND_1D5V 2
5
6
7
8
1
D
D
D
D
DIS_PX PU8335
2
2
74.51211.073 DIS_PX
DY_DIS_PX
4
79.22719.20L
G
S
S
S
1D5V_VGA_S0
DIS_PX
20130409 SC 84.2N702.A3F
3
PC8342 2nd = 75.00601.07C
DIS_PX
DY
1
1
PR8356
2
1
PR8366 3.3V_RUN_VGA_1
DIS_PX470R2J-2-GP 22K6R2F-1-GP PC8338
SC18P50V2JN-1-GP
2
DY DIS_PX
DIS_1D5V_VGA_S02
2
2 1 PR8338
DY
PWR_VGA_CORE_EN_R# 82
0R2J-2-GP PR8311
PWR_1D5V_VGA_FB 0R0402-PAD-1-GP
A PQ8337 A
1 2PE_GPIO1_R
VGA_1D5V_EN# 15,82 DGPU_PWR_EN#
G
2nd = 84.07002.I31
DIS_PX
84.2N702.J31 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
3rd = 84.2N702.W31 Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
B B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU Memory(2/5)
Size Document Number Rev
A2
1 15 17
2013 S-Series Shark Bay 14
Date: Wednesday, July 03, 2013 Sheet 84 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU_DP/LVDS/CRT/GPIO(3/5)
Size Document Number Rev
A1
2013 S-Series Shark Bay 14115 17
Wednesday, July 03, 2013
Date: Sheet 85 of 103
5 4 3 2 1
5 4 3 2 1
HOLE335R115-GP
62 KSI_D_4 KSI_D_6
34.15F09.002
ZZ.00PAD.N11
ZZ.00PAD.N11
H21 H22 SC1KP50V2KX-1GP KSI_D_0 5 662 KSI_D_5 5 6 KSO7 5 6
SPRING-97-GP
HOLE276R178-GP
HOLE276R178-GP
GNDPADSR375-GP
GNDPADSR375-GP
62 KSI_D_0 KSI_D_5
62 KSI_D_8 KSI_D_8 7 8 KSO1 7 8 KSO4 7 8
DY
DCBATOUT EC4007 1 2 SCD1U25V2KX-GP EMI SRC1KP50VM-GP SRC1KP50VM-GP SRC1KP50VM-GP
EC4002 1 2 SC82P50V2JN-3GP RF 1
1
EC4004 1 2 SC2200P50V2KX-2GP RF 20121005 SA
1
EC4005 1 2 SCD1U25V2KX-GP RF DY
EC6907 1 SC100P50V2JN-L-GP
2 KSI[0..7] 24,61,62,87
24,62 KB_CAPS_LED
ZZ.00PAD.N11
EC4605 SC68P50V2JN-1GP GNDPADSR375-GP GNDPADSR375-GP
1 2 RF-DY HOLE335R115-GP
HOLE256R115-GP
HOLE276R178-GP
HOLE276R178-GP
DCBATOUT
ZZ.00PAD.N11
EC4112 1 2 SCD1U25V2KX-GP EMI EC4602 1 2 SC82P50V2JN-3GP RF-DY
EC4603 SC2200P50V2KX-2GP RF
EC4101 1 2 SC68P50V2JN-1GP EC4604
1 2
SC1U25V3KX-1-GP
CLOSE USBCN1
PU4101 DCBATOUT RF 1 2 RF
EC4102 1 2 SCD1U25V2KX-GP EMI
EC4103 1 2 SC2200P50V2KX-2GP RF EC6214 1 2 SCD1U16V2KX-3GP DY
CLOSE USB2 USB_VCCB
1
1
PU4102 EC4107 1 2 SC68P50V2JN-1GP RF-DY EC4908 1 2 SC68P50V2JN-1GP RF EC6213 1 2 SCD1U16V2KX-3GP DY
DCBATOUT
EC4108 1 2 SC82P50V2JN-3GP
DCBATOUT
EC4907 1 2 SC1KP50V2KX-1GP H12 ZZ.00PAD.D01 CLOSE USB3 USB_VCCB
EC4109 1
RF RF-DY H2 H5 H6 H11 H13
DY
2 SC2200P50V2KX-2GP RF
ZZ.00PAD.D01
ZZ.00PAD.801
EC4910 1 2 SC68P50V2JN-1GP RF-DY EC6212 1 2SC1KP50V2KX-1GP
HOLE335R115-GP
HOLE335R115-GP
HOLE335R115-GP
HOLE335R115-GP
HOLE256R142-GP
HOLE335R115-GP
+LCDVDD 17,24,34,49,63 PM_SLP_S4#
EC4909 1 2 SC1KP50V2KX-1GP RF-DY CLOSE U6204 DY
EC6211 1 2SC1KP50V2KX-1GP
EC5304 SC68P50V2JN-1GP 17,24,34,49,63 PM_SLP_S4#
3D3V_WLAN 1 2 RF-DY CLOSE U6205
1
1
EC5305 1 2 SC82P50V2JN-3GP RF-DY
EC5306 1 2 SC2200P50V2KX-2GP RF-DY
EC5307 1 2 SCD1U25V2KX-GP RF-DY
A EC2401 2 1 SC12P50V2JN-3GP RF-DY A
18,65,88 CLK_PCI_LPC EC2402 2 1 SC12P50V2JN-3GP RF-DY
18,24 CLK_PCI_KBC
H15 <Core Design>
2nd = 34.4KD36.101
2nd = 34.4KD36.101
2nd = 34.4KD36.101
S1 S3 S4
H17 H8 H9 H10
ZZ.00PAD.N11
EC4918 1 2 SC2200P50V2KX-2GP RF
HOLE276R178-GP
HOLE276R178-GP
HOLE335R115-GP
STF256R168H65-GP
STF256R168H65-GP
STF256R168H65-GP
+LCDVDD
34.4KD36.001
34.4KD36.001
34.4KD36.001
ZZ.00PAD.N11
WWAN
EC4919 1 2 SC1KP50V2KX-1GP RF 3D3V_WWAN EC5405 1 2 SC68P50V2JN-1GP RF-DY
1
1
EC5406 1 2 SC82P50V2JN-3GP Title
RF-DY
30 LANXIN
EC3404 1 2 SC56P50V2JN-2GP RF-DY UNUSED PARTS/EMI Capacitors
Size Document Number Rev
20130730 MV Custom
2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 86 of 103
5 4 3 2 1
5 4 3 2 1
1
EC9401
SC1U25V3KX-1-GP
1
1
EC4008 EC4607
2
1
1
EC3102 SC1U25V3KX-1-GP EC4114 EC4113 SC1U25V3KX-1-GP EC6910 EC6911
SC1U6D3V2KX-GP EC3904 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
SC1U25V3KX-1-GP SC1U25V3KX-1-GP DY_EMI
2
2
SCD1U25V3KX-GP
2
DY_EMI DY_EMI DY_EMI DY_EMI
D DY_EMI D
DY_EMI DY_EMI DY_EMI
1D35V_PWR
1D35V_S3 1D35V_S3 5V_S5
20121009 SA
AVDD_CODEC 3D3V_S0 5V_S0 DCBATOUT_LCD 5V_S0
2
1
1
EC4608
2
C EC4611 EC4612 EC4613 EC4614 EC4623 EC4624 EC4625 EC4626 C4915 C5613 EC6101 EC6102 SC68P50V2JN-1GP C
1
1
1
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC2200P50V2KX-2GP SC68P50V2JN-1GP
RF-DY
2
1
1
RF RF RF RF RF RF RF RF RF-DY RF-DY
1
2
SC68P50V2JN-1GP SC68P50V2JN-1GP SC68P50V2JN-1GP
2
RF-DY RF-DY RF-DY RF-DY RF-DY
1D35V_S3 1D35V_S3
Close to PL4601
AUD_AGND 20130731 MV
Close to U2901 Close to LVDS1 Close to HDD1 Close to USBCN1 20130812 MV
0D675V_S0 5V_S5 USB_VCCB BT_L
2
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SPR1
RF RF RF RF RF RF RF 1
1
2
EC4622 EC4621 EC6203 EC6206 SPRING-12-GP-U1
EC6202 EC6201 EC4010 EC4115
SC68P50V2JN-1GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP SC68P50V2JN-1GP
1
2
RF-DY RF-DY RF-DY RF-DY SC2200P50V2KX-2GP SC68P50V2JN-1GP SC68P50V2JN-1GP SC68P50V2JN-1GP
EMI
1
RF-DY RF-DY RF-DY RF-DY
34.41Y19.001
Close to U6205 Close to U6205 Close to PL4001 Close to PL4101 1st = 34.4YW17.001
5V_S0 EC3601 1 2 SC2200P50V2KX-2GP RF-DY Close to U3601 DCBATOUT EC8205 1 2 SC68P50V2JN-1GP RF-DY Close to PU8201
EC3602 1 2 SC82P50V2JN-3GP RF-DY EC8202 1 2 SC82P50V2JN-3GP RF-DY AD+_IN_G C4405 1 2 SC82P50V2JN-3GP RF_DY 5V_S0 EC3615 1 2 SCD1U25V2KX-GP DY_EMI 5V_S5 EC4501 1 2 SCD1U25V2KX-GP DY_EMI
EC8203 1 2 SCD1U25V2KX-GP RF-DY
B RF_DY EC3616 1 2 SCD1U25V2KX-GP DY_EMI EC4502 1 2 SCD1U25V2KX-GP DY_EMI B
C4406 1 2 SC2200P50V2KX-2GP
3D3V_S0 EC3603 1 2 SC2200P50V2KX-2GP RF-DY Close to U3602 VGA_CORE EC8204 1 2 SC82P50V2JN-3GP RF-DY EC3617 1 2 SCD1U25V2KX-GP DY_EMI EC4503 1 2 SCD1U25V2KX-GP DY_EMI
EC3604 1 2 SC82P50V2JN-3GP RF-DY
20130730 MV EC4504 1 2 SCD1U25V2KX-GP DY_EMI
PWR_DCBATOUT_1D5V EC8301 1 2 SC68P50V2JN-1GP RF-DY Close to PU8332 3D3V_S0 EC5219 1 2 SC1KP50V2KX-1GP EMI EC3619 1 2 SCD1U25V2KX-GP DY_EMI EC4505 1 2 SCD1U25V2KX-GP DY_EMI
1D35V_S0 EC3605 1 2 SC2200P50V2KX-2GP RF-DY Close to U3604 EC8302 1 2 SC82P50V2JN-3GP RF-DY
EC3606 1 2 SC82P50V2JN-3GP RF-DY EC8303 1 2 SCD1U25V2KX-GP RF-DY EC3620 1 2 SCD1U25V2KX-GP DY_EMI EC4507 1 2 SCD1U25V2KX-GP DY_EMI
3D3V_AUX_S5 EC5220 1 2 SC1KP50V2KX-1GP EMI
20130806 MV EC4508 1 2 SCD1U25V2KX-GP DY_EMI
1D8V_PWR EC8305 1 2 SC82P50V2JN-3GP RF-DY Close to PU8304
PWR_DCBATOUT_VCCCORE1 EC4701 1 2 SC2200P50V2KX-2GP RF-DY Close to PU4701 EC8304 1 2 SCD1U25V2KX-GP RF-DY EC3622 1 2 SCD1U25V2KX-GP DY_EMI EC4509 1 2 SCD1U25V2KX-GP DY_EMI
EC4703 1 2 SC82P50V2JN-3GP RF-DY BT+ EC1905 1 2 SC1U25V3KX-1-GP EMI
EC4710 1 2 SC68P50V2JN-1GP RF-DY EC4406 1 2 SCD1U25V2KX-GP EMI 20130730 MV
EC4709 SCD1U25V2KX-GP 44 DC_IN_R
DCBATOUT 1 2 RF-DY
0D95V_PWR EC8307 1 2 SC82P50V2JN-3GP RF-DY EC4512 1 2 SCD1U25V2KX-GP DY_EMI
EC8306 1 2 SCD1U25V2KX-GP RF-DY VCC_CORE EC1001 1 2 SC22U6D3V5MX-2GP EC4407 1 2 SCD1U25V2KX-GP EMI
PWR_DCBATOUT_VCCCORE2 EC4708 1 2 SC82P50V2JN-3GP RF-DY Close to PU4702 EMI EC4513 1 2 SCD1U25V2KX-GP DY_EMI
EC4707 1 2 SCD1U25V2KX-GP RF-DY EC1002 1 2 SC22U6D3V5MX-2GP
EC4705 1 2 SC68P50V2JN-1GP RF-DY EMI EC4408 1 2 SCD1U25V2KX-GP EMI EC4514 1 2 SCD1U25V2KX-GP DY_EMI
DCBATOUT EC4706 1 2 SC2200P50V2KX-2GP RF-DY EC2501 1 2 SC18P50V2JN-1-GP RF-DY
25 SPI_CLK EC4410 1
DCBATOUT 2 SCD1U25V2KX-GP DY_EMI
PWR_DCBATOUT_1D05 EC4801 1 2 SC68P50V2JN-1GP RF-DY Close to PU4801 15,52 CAMERA_ON C1504 1 2 SC18P50V2JN-1-GP RF_DY close to PCH2 1D05V_PWR 1 2 EMI EC4411 1 2 SCD1U25V2KX-GP DY_EMI
EC4802 1 2 SC82P50V2JN-3GP RF-DY EC4815 SCD1U16V2KX-3GP 5V_S0_CRT EC5308 1 2 SCD1U25V2KX-GP DY_EMI
EC4803 1 2 SC2200P50V2KX-2GP RF-DY EC4412 1 2 SCD1U25V2KX-GP DY_EMI
EC4804 1 2 SCD1U25V2KX-GP EMI 20130513 SC between PU4801 and PC4813 EC5309 1 2 SCD1U25V2KX-GP DY_EMI
18 CLK_PCI_FB C1805 1 2 SC18P50V2JN-1-GP RF_DY close to PCH2 EC4413 1 2 SCD1U25V2KX-GP EMI
1D5V_PWR1 EC5104 1 2 SC68P50V2JN-1GP RF-DY Close to PU5102 EC4414 1 2 SCD1U25V2KX-GP DY_EMI
EC5106 1 2 SC82P50V2JN-3GP RF-DY 3D3V_S0 C5215 1 2 SC82P50V2JN-3GP RF_DY close to LVDS1 Pin7
EC5107 1 2 SC2200P50V2KX-2GP RF-DY RF_DY
A EC5105 1 2 SCD1U25V2KX-GP RF-DY C5218 1 2 SC2200P50V2KX-2GP A
<Variant Name>
VDD12 EC5503 1 2 SC82P50V2JN-3GP RF-DY Close to U5501
VDDRX EC5504 1 2 SC82P50V2JN-3GP RF-DY 1D05V_VTT EC2101 1 2 SCD1U25V2KX-GP DY_EMI
EC5505 SC82P50V2JN-3GP
VDDIO
VDDIOX EC5506
1
1
2
2 SC82P50V2JN-3GP
RF-DY
RF-DY 3D3V_S0 C3614 1 2 SC82P50V2JN-3GP RF_DY close to U3605 EC2102 1 2 SCD1U25V2KX-GP DY_EMI Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
RF_DY Taipei Hsien 221, Taiwan, R.O.C.
20130429 SC C3613 1 2 SC2200P50V2KX-2GP EC2105 1 2 SCD1U25V2KX-GP DY_EMI
4,18 CLK_DP_N_R EC401 1 2 SC15P50V2JN-2-GP RF Close to CPU
EC402 2 SC15P50V2JN-2-GP EC2106 1 2 SCD1U25V2KX-GP Title
4,18 CLK_DP_P_R 1 RF DY_EMI
DCBATOUT C4902 1 2 SC1KP50V2KX-1GP RF_DY close to
RF_DY
PU4901
EC2107 1 2 SCD1U25V2KX-GP EMI GPU_DPPWR/GND(5/5)
EC403 2 SC15P50V2JN-2-GP C4903 2 SCD1U25V2KX-GP Size Document Number Rev
4,18 CK_DP_SSC_N 1 RF 20130510 SC 1
Custom
4,18 CK_DP_SSC_P EC404 1 2 SC15P50V2JN-2-GP RF Close to CPU 2013 S-Series Shark Bay 14 15 17 1
Date: Monday, August 12, 2013 Sheet 87 of 103
5 4 3 2 1
5 4 3 2 1
D D
3D3V_S0
1
R8801
3D3V_S0 L8801 4K7R2J-2-GP
DY
1 2 TPM_PWR
2
DY_TPM TPM_PP
1
1
DY_TPM DY_TPM DY_TPM DY_TPM TPM_GPIO
5 6
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C C
2
2
VDD LRESET#9
NC#8 8 DY_TPM
R8804 0R2J-2-GP
13 7 TPM_PP
NC#13 PP
14 NC#14 NC#15 15
SERIRQ 27 INT_SERIRQ 18,20,24,65
3D3V_S0
18,65,86 CLK_PCI_LPC 21 LCLK DY_TPM NC#1 1
28 NC#28 NC#3 3
18,24,65 LPC_FRAME# 22 LFRAME# NC#12 12
1
4,15,19,30,56,58,59,63,65,73,86,87 PLT_RST# 16 LRESET#16 R8803
4K7R2J-2-GP
18,24,65 LPC_AD0 26 LAD0 GND 4 DY_TPM
18,24,65 LPC_AD1 23 LAD1 GND 11
18,24,65 LPC_AD2 20 18
2
LAD2 GND
18,24,65 LPC_AD3 17 LAD3 GND 25
TPM_GPIO
SLB9656TT1D2-FW4D32-GP
71.09656.E0W
20130730 MV
B B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TPM
Size Document Number Rev
Custom
2013 S-Series Shark Bay 14115 17
Date: Monday, August 12, 2013 Sheet 88 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
B B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM5,6 (3/4)
Size Document Number Rev
A2
2013 S-Series Shark Bay 14115 17
Date: Wednesday, July 03, 2013 Sheet 90 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM7,8 (4/4)
Size Document Number Rev
A2
2013 S-Series Shark Bay 14115 17
Date: Wednesday, July 03, 2013 Sheet 91 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
NCP3218_VGACORE25W
Size Document Number Rev
A2
2013 S-Series Shark Bay 14115 17
Date: Wednesday, July 03, 2013 Sheet 92 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A3
2013 S-Series Shark Bay 14115 17
Date: W ednesday, July 03, 2013 Sheet 94 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A3
2013 S-Series Shark Bay 14115 17
Date: W ednesday, July 03, 2013 Sheet 95 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A Shark Bay SV A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_XDP
Size Document Number Rev
A3
2013 S-Series Shark Bay 14 15 17 1
Date: W ednesday, July 03, 2013 Sheet 96 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A3 1
2013 S-Series Shark Bay 14 15 17
Date: W ednesday, July 03, 2013 Sheet 97 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Change History
Size Document Number Rev
A3
2013 S-Series Shark Bay 14115 17
Date: W ednesday, July 03, 2013 Sheet 98 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Power Sequence
Size Document Number Rev
A3
2013 S-Series Shark Bay 14115 17
Date: W ednesday, July 03, 2013 Sheet 99 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
mSATA
Size Document Number Rev
A3
2013 S-Series Shark Bay 14115 17
Date: W ednesday, July 03, 2013 Sheet 103 of 103
5 4 3 2 1