MOLOKAI Block Diagram: VF-co-cc

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A B C D E

PCB LAYER
DC/DC IMVP4
Switching Power
ISL6218 32
MOLOKAI Block Diagram L1:COMPONENT
L2:GND
INPUTS OUTPUT SPR.01.2004 CPU Project Code:91.43E01.001 L3:SIGNAL1
4 DCBATOUT VCC_CORE Banias/Dothan 4

L4:SIGNAL2
03249-SC
SYSTEM DC/DC CLOCK 5,6 L5:VCC
Generator
MAX1715 34 ICS950810 3 HOST BUS L6:GND
INPUTS OUTPUTS 100MHz CRT 13 L7:SIGNAL3
1D35V_S0 L8:COMPONENT
DCBATOUT DDR 266/333 DVO CH7011 TV_OUT
2D5V_S3 DDR Montara-GM+ (CHRONTEL)

cc
DRAM 7,8,9
15
10,11,12
Socket
DC/DC&CHARGER *2 LVDS
LCD POWER SW
MAX1645
Hub I/F 14

TPS2220A
35 Ultra 20
3 DMA-100 PCI BUS 3

INPUTS OUTPUTS HDD 26


SD/MS CARD CARDBUS
AD+ BT+ IDE BUS ICH4-M READER + 1394 SLOT B 22

o-
OPTICAL 16,17,18 PCI7420 21
USB2.0
CardReader
DC/DC LPC BUS
MAX1999 33 1394

USB2.0
INPUTS OUTPUTS
BIOS KBC MINIPCI

-c
3D3V_S5
DCBATOUT 5V_S5 ROM M38859 LAN 802.11B
49LF004-334C BCM4401
27 28 23 802.11G 19

2
AC-LINK 2

USB 2.0 Line-out


G913C/APL1085
APL5331kAC/G1211X
38
2 Ports RJ-45
VF
29
INPUTS OUTPUTS MODEM
TOUCH INT AC 97 MIC
3D3V_S0 1D8V_VCCA_S0 DAUGHTER
3D3V_S5 1D5V_S5 PAD KB CARD Codec
3D3V_S0 1D5V_S0 29 STAC9750
2D5V_S3 1D25V_S0
1D35V_S0 VCC_IO_S0
24
RJ-11 Amplifier
(TBD)
TPA0312 25

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BLOCK DIAGRAM
Size Document Number Rev
A3
Wistron Confidential Date: Monday, April 05, 2004
MOLOKAI
Sheet 1 of 39
SC

A B C D E
A B C D E

S5 S3 S0
5V_S0 5V_S0 13,14,17,18,19,20,24,26,28,30,32,34,36,38,39
5V_S5 5V_S5 18,33,34,36
3D3V_S0 3D3V_S0 3,7,8,9,10,13,14,15,16,17,18,19,20,21,22,24,25,26,27,29,30,31,32,36,38,39
3D3V_S5 3D3V_S5 4,16,17,18,28,30,31,33,36,38,39 3D3V_S3 3D3V_S3 14,25,28,30,34,36,39

1D5V_S5 1D5V_S5 18,38 2D5V_S3 2D5V_S3 7,9,10,11,34,38,39


1D5V_S0 1D5V_S0 7,8,9,15,16,18,27,38,39
VCC_RTC_S5 VCC_RTC_S5 17 1D25V_DDRVREF_S3 1D25V_DDRVREF_S3 7,10,34
4 1D25V_S0 1D25V_S0 11,12,38 4

1D35V_S0
1D35V_S0 7,9,34,38,39

VCC_CORE_S0 VCC_CORE_S0 6,32,39

VCC_IO_S0 VCC_IO_S0 4,5,6,7,9,17,18,32,38,39

AC-IN / BAT.-IN LAN-AC 1D8V_VCCA_S0 1D8V_VCCA_S0 5,38

AD+ AD+ 35,37,39

DCBATOUT DCBATOUT 14,32,33,34,35,36,38,39 3D3V_LAN_S5AC 3D3V_LAN_S5AC 23,29,36,37 5VA_AUD_S3 5VA_AUD_S3 24


AUDIO

cc
3D3V_LCD_S0 3D3V_LCD_S0 14 LCD

CRT_VCC_S0 CRT_VCC_S0 13 CRT

TV3D3V1_S0 TV3D3V1_S0 15

TV3D3VA_S0 TV3D3VA_S0 15 TV-OUT


3 3
TV3D3V2_S0 TV3D3V2_S0 15

OTHERS TV1D5V_S0 TV1D5V_S0 15

o-
5V_AUX 5V_AUX 30,31,33,35,37,38,39

3D3V_AUX 3D3V_AUX 14,17,33

3D3V_RTC 3D3V_RTC 17,28

ICH_VBIAS ICH_VBIAS 17

MAX1999_REF MAX1999_REF 33,38

-c
MAX1999_VCC MAX1999_VCC 33

2 2
VF
PCI TABLE

DEVICE IDSEL IRQ REQ# / GNT#

PIRQB#
SD/MS CARD READER+1394 AD20 PIRQC# REQ#1 / GNT#1
PIRQF#
PCI7420

1 MINI PCI 802.11B/G AD17 PIRQE# REQ#0 / GNT#0 1


PIRQG#
Wistron Corporation
LAN BCM4401 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AD21 PIRQD# REQ#4 / GNT#4 Taipei Hsien 221, Taiwan, R.O.C.

Title
Table of Content
Size Document Number Rev
A3 SC
MOLOKAI
Date: Saturday, April 17, 2004 Sheet 2 of 39

A B C D E
R208
PLACE NEAR EACH PIN
3D3V_S0 1 2 CLKGEN_+3VRUN
3D3V_S0 Filtering CKT for 0R5J-1

1
Host Freq. Setting 48MHz power plane
R192 BC139 BC237 BC238 BC228 BC239 BC141 BC231 BC227
1 2 CLKGEN_48MPWR SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1

2
FS1/0 = 00 166MHz

1
FS1/0 = 01 100MHz 0R5J-1 DUMMY-SC10U10V5ZY
BC145 BC128 BC229 BC230
FS1/0 = 10 200MHz SCD1U16V SCD01U16V2KX SCD1U10V2MX-1

2
FS1/0 = 11 133MHz R218

SC10U10V5ZY CLKGEN_APWR 1 2 3D3V_S0


FS2 = 0 unbuffer mode (disable 66MHz-IN) 0R5J-1

1
FS2 = 1 buffer mode
BC142 BC143 BC144
SCD1U10V2MX-1 SCD01U16V2KX DUMMY-SC10U10V5ZY

2
Mult0 = 0 Rr=221,Iref=5mA =>Vswing=1.0V@50ohm No stuff: U40

cc
Mult0 = 1 Rr=475,Iref=2.32mA =>Vswing=0.7V@50ohm caps are internal
1 26
to CK-TITAN. VDDREF VDDA RN26 SRN33-2-U2
8 CLK_CPU 5
VDDPCI R1601
CPU & MEMORY Freq. Selection BC140 14 27 1 4 2 49D9R3F
VDDPCI GND R1611
2 1 19 2 3 2 49D9R3F
3D3V_S0 VDD3V66
32 45 CLK_CPU# 5
DUMMY-SC10P50V2JN-1 VDD3V66 CPUCLKT2 RN25 SRN33-2-U2
37 44 CLK_MCH 7
3D3V_S0 VDD48 CPUCLKC2

2
46 1 4 R1581 2 49D9R3F
X2 VDDCPU R1591
50 49 2 3 2 49D9R3F
VDDCPU CPUCLKT1
1

48 CLK_MCH# 7
X-14D31818M-7 CPUCLKC1
1

2 RN24 DUMMY-SRN33-2-U2 R155 1 2 DUMMY-R2


X1 CLK_ITP_CPU 4,5

1
R483 R185 R181 BC127 52 1 4 CLK_ITP_R R1541 2 DUMMY-49D9R3F
10KR2 1KR2 DUMMY-R2 CPUCLKT0 R1571
2 1 3 51 2 3 CLK_ITP#_R 2 DUMMY-49D9R3F
R187 1KR2 X2 CPUCLKC0 R156 1 2 DUMMY-R2 CLK_ITP_CPU# 4,5
DUMMY-SC10P50V2JN-1 1 2 SEL2 40 24 TP90
FS2 3V66_5
2

23 TP89
CK-408 3V66_4 TPAD28
CK-408_MULT0 55 22 R217 1 2 33R2

o-
FS1 3V66_3 TPAD28 CLK66_GMCH 8
21 R216 1 2 33R2
3V66_2 CLK66_ICH 16
1

54
FS0
1

R484 25 7 R209 1 2 33R2


17 PM_SLP_S1# PD# PCICLK_F2 CLKPCIF_ICH 17
DUMMY-R2 R182 34
1KR2 17 PM_STPPCI# PCI_STOP#
R184 53 6 TP86
17,32 PM_STPCPU# CPU_STOP# PCICLK_F1
DUMMY-R2 28 TPAD28
32 CLK_PWD# VTT_PWRGD#
2

CK-408_MULT0 43 5 TP84
MULTSEL0 PCICLK_F0
2

TPAD28
2

SMBD_ICH 29 18 TP88
10,17 SMBD_ICH SDATA PCICLK6
10,17 SMBC_ICH SMBC_ICH 30 TPAD28
SCLK R215 1
17 2 33R2 PCLK_CBUS 21
R191 1 PCICLK5
8 CLK66_DREF_GMCH 2 33R2 33
3V66_0 R214 1
35 16 2 33R2 PCLK_KBC 28
3V66_1/VCH_CLK PCICLK4

-c
R603 1 2 DUMMY-33R2
1 R186 2 42 13 R213 1 2 33R2
IREF PCICLK3 PCLK_FWH 27
R190 1 2 33R2 475R3F
21 CLK48_DOT
41 12 R212 1 2 33R2
GND PCICLK2 PCLK_MINI 19
02/09/2004 11 R211 1 2 33R2
PCICLK1 PCLK_LAN 23
4
GND TP182 TPAD28
9 10
GND PCICLK0
15
GND R188 1
20 39 2 33R2 CLK48_ICH 16
GND 48MHZ_USB
31
GND R189 1
36 38 2 33R2 CLK48_DREF_GMCH 8
GND 48MHZ_DOT
47
GND R183 1
56 2 33R2
VF
REF CLK14_ICH 17
R655 1 2 DY-33R2 CLK14_AUDIO 24
ICS950810CG

SC:Because codec 01/15/2004


change to use
crystal so dummy
CLK source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Clock GEN.
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 3 of 39
A B C D E

4 4

ITP Debug Pad

VCC_IO_S0 VCC_IO_S0

CPU ITP Conn.

cc
1

1
R454 R440 R456 R442
150R2
54D9R3F 54D9R3F 39D2R3F
TPAD28 TP60

2
TDI_FLEX TPAD28 TP63
5 H_TDI
5 H_TMS TMS_FLEX TPAD28 TP71
TRST_FLEX TPAD28 TP62 TCK(PIN 5)
5 H_TRST#
TCK_FLEX TPAD28 TP61
3 5 H_TCK R441 3
1 2 TDO_FLEX TPAD28 TP64
5 H_TDO DUMMY-22D6R3F TPAD28 TP9
3,5 CLK_ITP_CPU# CLK_ITP_CPU# TCK(PIN A13)
CLK_ITP_CPU TPAD28 TP8
3,5 CLK_ITP_CPU
R453 H_TCK TPAD28 TP67

o-
GTL_CPURST# 1 2 RESET_FLEX# TPAD28 TP66 FBO(PIN 11)
5,7 GTL_CPURST# DUMMY-22D6R3F TPAD28 TP17
5 H_BPM5_PREQ#
1
TPAD28 TP74
5 H_BPM4_PRDY#
R439 3D3V_S5 TPAD28 TP16
27D4R3F 5 H_BPM3_ITP#
TPAD28 TP70
5 H_BPM2_ITP#
2

1
Should place near conn.
R455 TPAD28 TP73
150R2 5 H_BPM1_ITP#
TPAD28 TP13
2 5 H_BPM0_ITP#
TPAD28 TP68
5 ITP_DBRESET#

-c
VCC_IO_S0 TPAD28 TP69
TPAD28 TP65

1
TPAD28 TP72
C365
DUMMY-SCD1U10V2MX-1

2
2 2
VF
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ITP
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 4 of 39

A B C D E
A B C D E

CPU VCCA POWER: 7 GTL_D#[15..0] U68C


GTL_D#[47..32] 7
At Dothan CPU application, POWER is 1.5V or 1.8V.
GTL_D#15 C25 Y25 GTL_D#47
D15# D47#
GTL_D#14 E23 AA26 GTL_D#46
1D8V_VCCA_S0 D14# D46#
For CPU VCCA[0:3] PLL GTL_D#13 B23 Y23 GTL_D#45
D13# D45#
GTL_D#12 C26 V26 GTL_D#44
place one 0.01u & 10u for D12# D44#
GTL_D#11 E24 U25 GTL_D#43
D11# D43#
each VCCA pin GTL_D#10 D24 V24 GTL_D#42
D10# D42#
GTL_D#9 B24 U26 GTL_D#41
D9# D41#
GTL_D#8 C20 AA23 GTL_D#40
D8# D40#
1

1
GTL_D#7 B20 R23 GTL_D#39
BC87 BC75 BC108 BC104 BC106 BC105 BC86 BC90 D7# D39#
GTL_D#6 A21 R26 GTL_D#38
SC10U6D3V5MX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX D6# D38#
4 GTL_D#5 B26 R24 GTL_D#37 4
D5# D37#
2

2
GTL_D#4 A24 V23 GTL_D#36
DY-SC10U6D3V5MX DY-SC10U6D3V5MX DY-SC10U6D3V5MX D4# D36#
GTL_D#3 B21 U23 GTL_D#35
D3# D35#
GTL_D#2 A22 T25 GTL_D#34
D2# D34#
GTL_D#1 A25 AA24 GTL_D#33
D1# D33#
GTL_D#0 A19 Y26 GTL_D#32
D0# D32#
Layout note: T24 GTL_DINV#2 7
DINV2#
7 GTL_DINV#0 D25 W25 GTL_DSTBN#2 7
U68D COMP0 and COMP2 need to DINV0# DSTBN2#
7 GTL_DSTBN#0 C23 W24 GTL_DSTBP#2 7
DSTBN0# DSTBP2#
be Zo=27.4ohm traces. 7 GTL_DSTBP#0 C22
DSTBP0#
3 CLK_CPU B15 C9 H_BPM3_ITP# H_BPM3_ITP# 4 7 GTL_D#[31..16] GTL_D#[63..48] 7
BCLK0 BPM3# COMP1 and COMP3 should be GTL_D#63
3 CLK_CPU# B14 A9 H_BPM2_ITP# H_BPM2_ITP# 4 GTL_D#31 K25 AF26
BCLK1 BPM2# D31# D63# GTL_D#62
A16 B8 H_BPM1_ITP# H_BPM1_ITP# 4 routed asx Zo=54.9ohm, GTL_D#30 N25 AF22
3,4 CLK_ITP_CPU ITP_CLK0 BPM1# D30# D62# GTL_D#61
3,4 CLK_ITP_CPU# A15 C8 H_BPM0_ITP# H_BPM0_ITP# 4 GTL_D#29 H26 AF25
ITP_CLK1 BPM0# traces shorter than 0.5". D29# D61# GTL_D#60
GTL_D#28 M25 AD21
54D9R3F R135 D28# D60# GTL_D#59
17 CC_A20M# C2 AB1 27D4-3 1 2 GTL_D#27 N24 AE21
A20M# COMP3 27D4R3F R136 VCC_IO_S0 D27# D59# GTL_D#58
17 CC_FERR# CC_FERR# D3 AB2 27D4-1 1 2 GTL_D#26 L26 AF20
FERR# COMP2 D26# D58#

cc
A3 P26 27D4-4 1 2 54D9R3F R110 SC: Change GTL_D#25 J25 AD24 GTL_D#57
17 CC_IGNNE# IGNNE# COMP1 D25# D57#
P25 27D4-2 1 2 27D4R3F R109 to 1KR2F for GTL_D#24 M23 AF23 GTL_D#56
COMP0 D24# D56#

1
GTL_D#23 J23 AE22 GTL_D#55
R108
GTLREF pass D23# D55# GTL_D#54
B7 CC_DPSLP# 7,17 GTL_D#22 G24 AD23
DPSLP# 1KR2F D22# D54# GTL_D#53
17 CC_INTR D1 GTL_D#21 F25 AC25
LINT0 D21# D53# GTL_D#52
17 CC_NMI D4 AC1 Voltage divider placed GTL_D#20 H24 AC22
LINT1 GTLREF3 D20# D52# GTL_D#51
G1 GTL_D#19 M26 AC20
GTLREF2 within 0.5" of CPU pin D19# D51#

2
B4 E26 GTL_D#18 L23 AB24 GTL_D#50
17 CC_SMI# SMI# GTLREF1 D18# D50#
C6 AD26 H_GTLREF_0 via a Zo=55ohm trace. GTL_D#17 G25 AC23 GTL_D#49
17 CC_STPCLK# STPCLK# GTLREF0 D17# D49#
2/3 RATIO GTL_D#16 H23 AB25 GTL_D#48
D16# D48#

1
AC26
VCCA3

1
3 1D8V_VCCA_S0 N1 120mA B17 CC_PROCHOT# R107 J26 AD20 3
VCCA2 PROCHOT# 2KR3F 7 GTL_DINV#1 DINV1# DINV3# GTL_DINV#3 7
B1 E4 CC_CPUPWRGD C134 K24 AE24
VCCA1 PWRGOOD CC_CPUPWRGD 7,17 7 GTL_DSTBN#1
DUMMY-SCD1U16V DSTBN1# DSTBN3# GTL_DSTBN#3 7
F26 7 GTL_DSTBP#1 L24 AE25 GTL_DSTBP#3 7
VCCA0 DSTBP1# DSTBP3#

2
2
TP20 B2
TP10 RSVD
AF7

o-
TPAD28 RSVD BGA479-SKT-2-U
VCC_IO_S0 TP7
TPAD28 C14
RSVD U68B TP18
R113 TP14
TPAD28 C3
RSVD 7 GTL_A#[16..3] TPAD28
1 2 TPAD28 TEST3 C16
RSVD
1

TP19 E1 GTL_A#16 AA2


R116 DUMMY-1KR2 RSVD A16#
TPAD28 THERMDP1 30 GTL_A#15 Y3 N2 GTL_ADS# 7
150R2 A15# ADS#
A6 L1 GTL_BNR# 7
17 CC_CPUSLP# H_TCK SLP# BNR#
4 H_TCK A13 GTL_A#14 AA3 J3 GTL_BPRI# 7
TCK TP6 C165 A14# BPRI#
C5 TEST1 GTL_A#13 U1 N4 GTL_BR0# 7
TEST1 A13# BR0#
2

H_TDI H_TDI C12 F23 TEST2 TP15


TPAD28 SC1000P50V GTL_A#12 Y1 A7
4 H_TDI TDI TEST2 A12# DBR# ITP_DBRESET# 4
4 H_TDO H_TDO A12 B18 TPAD28 GTL_A#11 Y4 M2 GTL_DBSY# 7
TDO THERMDA A11# DBSY#
A18 THERMDN 30 GTL_A#10 W2 L4 GTL_DEFER# 7
TP12 THERMDC A10# DEFER#
AE7 C17 PM_THERMTRIP# 17 GTL_A#9 T4 H2 GTL_DRDY# 7
TP11 VCCSENSE THERMTRIP# A9# DRDY#
TPAD28 AF6 C11 H_TMS H_TMS 4 GTL_A#8 W1 K3 GTL_HIT# 7
VSSSENSE TMS A8# HIT#
TPAD28 B13 H_TRST# 4 GTL_A#7 V2 K4 GTL_HITM# 7
TRST# A7# HITM#

-c
GTL_A#6 R3 A4 GTL_IERR#
32 H_VID[5:0] A6# IERR#
1

H_VID5 H4 GTL_A#5 V3 B5 CC_INIT# 17,27


VID5 R115 A5# INIT#
H_VID4 G4 GTL_A#4 U4 J2 GTL_LOCK# 7
VID4 A4# LOCK#
1

H_VID3 G3 680R2 A10


VID3 PRDY# H_BPM4_PRDY# 4
H_VID2 F3 GTL_A#3 P4 B10 H_BPM5_PREQ# 4
R131 VID2 A3# PREQ#
H_VID1 F2 B11 GTL_CPURST# 4,7
VID1 RESET#
2

R132 H_VID0 E2
DUMMY-54D9R3F DUMMY-54D9R3F VID0
U3
ADSTB0#
2

7 GTL_ADSTB#0 M3
2 TRDY# GTL_TRDY# 7 2
BGA479-SKT-2-U
L2 GTL_RS#2 7
RS2#
K1 GTL_RS#1 7
RS1#
7 GTL_A#[31..17] H1 GTL_RS#0 7
RS0#
VF
GTL_A#31 AF1 C19 GTL_DPWR# 7
VCC_IO_S0 A31# DPWR#
GTL_A#30 AE1
A30#
GTL_A#29 AF3
A29#
GTL_A#28 AD6
R450 1 A28#
GTL_IERR# 2 56R2J GTL_A#27 AE2
A27#
GTL_A#26 AD5 GTL_REQ#[0..4] 7
A26#
CC_CPUPWRGD R133 1 2 330R2 GTL_A#25 AC6
A25# GTL_REQ#4
GTL_A#24 AB4 T1
R114 1 A24# REQ4# GTL_REQ#3
CC_PROCHOT# 2 56R2J GTL_A#23 AD2 P1
A23# REQ3# GTL_REQ#2
GTL_A#22 AE4 T2
A22# REQ2# GTL_REQ#1
GTL_A#21 AD3 P3
A21# REQ1#
GTL_A#20 AC3 R2 GTL_REQ#0
GTL_A#19 A20# REQ0#
AC7
A19#
GTL_A#18 AC4
GTL_A#17 A18#
AF4
A17#

7 GTL_ADSTB#1 AE5
ADSTB1#

BGA479-SKT-2-U

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Banias CPU (1 of 2)
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 5 of 39

A B C D E
1
2
3
4
U68A
2 1 2 1 2 1

C24 C21

VCC_IO_S0
VSS VSS

C179
C181
C138
C182
D2 C18
VSS VSS

VCC_CORE_S0
VCC_CORE_S0
VCC_CORE_S0
D5 C15
VSS VSS

BGA479-SKT-2-U
D7 C13
VSS VSS
D9 C10
VSS VSS

SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
D11 C7
VSS VSS
2 1 2 1 D13 C4
VSS VSS
D15 C1
VSS VSS

C148

BC99
D17 B25
VSS

A
A

VSS

C159
C153
D19 VSS B22
D21 VSS B19
VSS VSS
D23 B16
VSS VSS
D26 B12
VSS VSS
E3 B9
VSS VSS

SC10U6D3V5MX
SC10U6D3V5MX
E6 VSS B6
VSS

C149

BC98
2 1 2 1 B3
VSS
E8 A26
VSS VSS
E10 A23
VSS VSS

C146
C155
E12 A20
VSS VSS
E14 VSS A17
E16 VSS A14
VSS VSS
E18 A11
VSS VSS

C151
E20 A8
VSS

BC188
VSS

SC10U6D3V5MX
SC10U6D3V5MX
E22 A5
VSS VSS
2 1 2 1 E25 VSS A2
F1 VSS AD25
VSS VSS
AE3
VSS

C145
C152
F4 AE6
VSS VSS
F5 AE8
VSS VSS

C150
F7 VSS AE10

BC102
F9 VSS AE12
VSS VSS

10uF_10V *1 ,0805,X5R
F11 AE14
10uF_6.3V *18 ,0805,X5R VSS VSS

SC10U6D3V5MX
SC10U6D3V5MX
F13 AE16
VSS VSS
2 1 2 1 F15 AE18
VSS VSS
F17 VSS AE20
F19 VSS AE23
VSS VSS

C147
C156
C173
F21 AE26
VSS

BC103
VSS

Place near CPU


Place near CPU
AF2
VSS
F24 AF5
VSS VSS
G6 VSS AF9
G2 VSS AF11
VSS VSS

SC10U6D3V5MX
SC10U6D3V5MX
G22 AF13

B
B

VSS VSS
2 1 G23 AF15
VSS VSS
C172

BC89
2 1 G26 AF17
VSS VSS
H3 VSS AF19
VSS

C154
H5 AF21
VSS VSS

C133
H21 AF24
VSS VSS
H25
J1 VSS D6
VSS VCC
J4 VCC D8
SC10U6D3V5MX VSS
C175

BC76
J6 D18
VSS VCC

SC10U6D3V5MX
2 1 J22 D20
VSS VCC
J24 D22
VSS VCC
K2 E5
VSS VCC
C178

K5 VCC E7
K21 VSS E9
VSS VCC
K23 E17
VSS VCC

0.1uF_10V *10 ,0402,X7R


K26 E19
VSS VCC
0.1uF_10V *18 ,0402,X7R

C174

BC88
L3 E21
VSS VCC
SC10U6D3V5MX

L6 VCC F6
2 1 L22 VSS F8
VSS VCC
L25 F18
VSS VCC
M1 F20
VSS VCC
C176

M4 F22
VSS VCC
M5 VCC G5
M21 VSS G21
VSS VCC
C177

M24 H6
VCC

BC200
VSS
VF
N3 H22
VSS VCC
SC10U6D3V5MX

N6 J5
VSS VCC
2 1 N22 VCC J21
N23 VSS K22
VSS VCC
N26 U5
VSS VCC
C158

P2 V6
VSS VCC
V22
VCC

C
C161
C136
C

P5 VCC W5
P21 VSS W21
VSS VCC
P24 Y6
VSS VCC
SC10U6D3V5MX

R1 Y22
VSS VCC
2 1 R4 AA5
VSS VCC

POSCAP 100uF_4V*1
2 1 R6 AA7

SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1


VSS VCC
R22 AA9
DUMMY-ST100U4VBM VSS VCC
C160

R25 AA11
TC8 VSS VCC
C137

T3 AA13
-c
VSS VCC
T5 AA15
VSS VCC
T21 VCC AA17
T23 VSS AA19
VSS VCC
SC10U6D3V5MX

T26 AA21
VSS VCC
2 1 U2 AB6
VSS VCC
U6 AB8
VSS VCC
C135

U22 VCC AB10


VSS
C141

U24 AB12
VSS VCC
V1 AB14
VSS VCC
V4 AB16
VSS VCC
V5 AB18
VSS VCC
V21 VCC AB20
VSS
SC10U6D3V5MX

V25 AB22
VSS VCC
C162

2 1 W3 AC9
VSS VCC
W6 AC11
VSS VCC
W22 AC13
VSS VCC
C180

W23 VCC AC15


o-
W26 VSS AC17
VSS VCC
Y2 AC19
VSS VCC
Y5 AD8
VSS VCC
C142

Y21 AD10
VSS VCC
SC10U6D3V5MX

Y24 VCC AD12


AA1 VSS AD14
VSS VCC
AA4 AD16
VCC
D
D

AA6 VSS AD18


VSS VCC
AA8 AE9
VSS VCC
AA10 VCC AE11
AA12 VSS AE13
VSS VCC
C143

AA14 AE15
VSS VCC
AA16 AE17
VSS VCC
AA18 AE19
cc
VSS VCC
AA20 VCC AF8
AA22 VSS AF10
VSS VCC
AA25 AF12
VSS VCC
AB3 AF14
VSS VCC
AB5 AF16
VSS VCC
C186

AB7 21A AF18


Title

Size

VSS VCC
A3

AB9
AB11 VSS D10
VSS VCCP
AB13 D12
VSS VCCP
VCC_CORE_S0

AB15 D14
VSS VCCP
AB17 VCCP D16
AB19 VSS E11
VSS VCCP
AB21 E13
VSS VCCP
C185

AB23 E15
VSS VCCP
AB26 F10
VSS VCCP
AC2 F12
Document Number

VSS VCCP
AC5 F14
VCCP
Date: Thursday, April 15, 2004

AC8 VSS F16


VSS VCCP
AC10 K6
SCD1U10V2MX-1 SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1

VSS VCCP
AC12 L5
VSS VCCP
AC14 VCCP L21
AC16 VSS M6
VSS VCCP
AC18 M22
VSS VCCP
AC21 N5
VSS VCCP
AC24 N21
MOLOKAI

VSS VCCP
AD1 P6
E
E

VSS VCCP
AD4 P22
Sheet

VSS VCCP
AD7 R5
VSS VCCP
AD9 R21
6
Banias CPU (2 of 2)

VSS VCCP
AD11 T6
VSS VCCP
AD13 VCCP T22
AD15 VSS U21
VSS 2.5AVCCP
AD17
of

AD19 VSS P23


VSS VCCQ0
VCC_IO_S0

AD22 W4
Taipei Hsien 221, Taiwan, R.O.C.

VSS VCCQ1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

39
Rev
Wistron Corporation

SC
1
2
3
4
A B C D E

CPU
GMCH
CPURST# U61A
U61C M_DATA[71..0] 12
(GTL_CPURST#) GTL_D#[63..0] 5 10,12 M_A[12..0]
5 GTL_A#[31:3] M_DQS[8..0] 12
GTL_A#3 P23 K22 GTL_D#0 M_A0 AC18 AG2 M_DQS0
HA[3]# HD[0]# SMA[0] SDQS[0]
GTL_A#4 T25 H27 GTL_D#1 M_A1 AD14 AE5 M_DM0 M_DM[8..0] 12
HA[4]# HD[1]# M_A2 SMA[1] SDM[0] M_DATA0
ITP GTL_A#5 T28 K25 GTL_D#2 AD13 AF2
HA[5]# HD[2]# M_A3 SMA[2] SDQ[0] M_DATA1
GTL_A#6 R27 L24 GTL_D#3 AD17 AE3
1D5V_S0 HA[6]# HD[3]# SMA[3] SDQ[1] M_DATA2
4 GTL_A#7 U23 J27 GTL_D#4 M_A4 AD11 AF4 4
HA[7]# HD[4]# M_A5 SMA[4] SDQ[2] M_DATA3
GTL_A#8 U24 G28 GTL_D#5 AC13 AH2
HA[8]# HD[5]# M_A6 SMA[5] SDQ[3] M_DATA4
GTL_A#9 R24 L27 GTL_D#6 AD8 AD3
HA[9]# HD[6]# SMA[6] SDQ[4]
1

GTL_A#10 U28 L23 GTL_D#7 M_A7 AD7 AE2 M_DATA5


R330 HA[10]# HD[7]# M_A8 SMA[7] SDQ[5] M_DATA6
GTL_A#11 V28 L25 GTL_D#8 AC6 AG4
226R3F HA[11]# HD[8]# M_A9 SMA[8] SDQ[6] M_DATA7
GTL_A#12 U27 J24 GTL_D#9 AC5 AH3
Close to pin GTL_A#13 T27
GTL_A#14 V27
HA[12]#
HA[13]#
HD[9]#
HD[10]#
H25
K23
GTL_D#10
GTL_D#11
M_A10
M_A11
AC19
AD5
SMA[9]
SMA[10] DDR SDQ[7]
AH5 M_DQS1
SCD1U10V2MX-1

HA[14]# HD[11]# SMA[11]


MEMORY SDQS[1]
1 2

PSWING GTL_A#15 U25 G27 GTL_D#12 M_A12 AB5 AE6 M_DM1


HA[15]# HD[12]# SMA[12] SDM[1]
1

GTL_A#16 V26 K26 GTL_D#13 AD6 M_DATA8


C303 R331 C304 HA[16]# HD[13]# SDQ[8] M_DATA9
GTL_A#17 Y24 J23 GTL_D#14 10,12 M_AB1 AD16 AG5
147R3F SCD01U16V2KX HA[17]# HD[14]# SMAB[1] SDQ[9] M_DATA10
GTL_A#18 V25 H26 GTL_D#15 10,12 M_AB2 AC12 AG7
HA[18]# HD[15]# SMAB[2] SDQ[10]
2

GTL_A#19 V23 AF11 AE8 M_DATA11


HA[19]# 10,12 M_AB4 SMAB[4] SDQ[11]
GTL_A#20 W25 K27 AD10 AF5 M_DATA12
HA[20]# HDSTBP[0]# GTL_DSTBP#0 5 10,12 M_AB5 SMAB[5] SDQ[12]
2

HLVREF GTL_A#21 Y25 J28 AH4 M_DATA13


HA[21]# HDSTBN[0]# GTL_DSTBN#0 5 SDQ[13]
1

GTL_A#22AA27 J25 AD25 AF7 M_DATA14


HA[22]# DINV[0]# GTL_DINV#0 5 10,12 M_WE# SWE# SDQ[14]
1

C305 GTL_A#23 W24 AC24 AH6 M_DATA15


SCD1U10V2MX-1

HA[23]# 10,12 M_CAS# SCAS# SDQ[15]


R332 C306 GTL_A#24 W23 F25 GTL_D#16 AC21
HA[24]# HD[16]# 10,12 M_RAS# SRAS#

cc
2

113R3F SCD01U16V2KX GTL_A#25 W27 F26 GTL_D#17 AH8 M_DQS2


HA[25]# HD[17]# SDQS[2]
GTL_A#26 Y27 B27 GTL_D#18 AE9 M_DM2
HA[26]# HD[18]# SDM[2]
GTL_A#27AA28 H23 GTL_D#19 AF8 M_DATA16
HA[27]# HD[19]# SDQ[16]
2

GTL_A#28 W28 E27 GTL_D#20 AG8 M_DATA17


GTL_A#29AB27
GTL_A#30 Y26
GTL_A#31AB28
HA[28]#
HA[29]#
HA[30]#
HOST HD[20]#
HD[21]#
HD[22]#
G25
F28
D27
GTL_D#21
GTL_D#22
GTL_D#23
10,12 M_BS0#
10,12 M_BS1#
AD22
AD20
SBA[0]
SBA[1]
SDQ[17]
SDQ[18]
SDQ[19]
AH9 M_DATA18
AG10M_DATA19
AH7 M_DATA20
HA[31]# HD[23]# SDQ[20]
G24 GTL_D#24 10,12 M_CS0_R# AD23 AD9 M_DATA21
HD[24]# SCS[0]# SDQ[21]
5 GTL_ADSTB#0 T26 C28 GTL_D#25 10,12 M_CS1_R# AD26 AF10 M_DATA22
HADSTB[0]# HD[25]# SCS[1]# SDQ[22]
5 GTL_ADSTB#1 AA26 B26 GTL_D#26 10,12 M_CS2_R# AC22 AE11 M_DATA23
HADSTB[1]# HD[26]# SCS[2]# SDQ[23]
G22 GTL_D#27 10,12 M_CS3_R# AC25
VCC_IO_S0 HD[27]# SCS[3]#
3
5 GTL_REQ#[4:0] C26 GTL_D#28 AE12 M_DQS3 3
HD[28]# SDQS[3]
GTL_REQ#0 R28 E26 GTL_D#29 AH12 M_DM3
HREQ[0]# HD[29]# SDM[3]
GTL_REQ#1 P25 G23 GTL_D#30 10,12 M_CKE0_R# AC7 AH10 M_DATA24
HREQ[1]# HD[30]# SCKE[0] SDQ[24]
1

GTL_REQ#2 R23 B28 GTL_D#31 10,12 M_CKE1_R# AB7 AH11 M_DATA25


R422 HREQ[2]# HD[31]# SCKE[1] SDQ[25]
GTL_REQ#3 R25 10,12 M_CKE2_R# AC9 AG13M_DATA26
301R3F HREQ[3]# SCKE[2] SDQ[26]
GTL_REQ#4 T23 D26 AC10 AF14 M_DATA27

o-
HREQ[4]# HDSTBP[1]# GTL_DSTBP#1 5 10,12 M_CKE3_R# SCKE[3] SDQ[27]
C27 GTL_DSTBN#1 5 AG11M_DATA28
HDSTBN[1]# SDQ[28]
3 CLK_MCH AE29 E25 GTL_DINV#1 5 AD12 M_DATA29
BCLK DINV[1]# SDQ[29]
2

HYSWING 3 CLK_MCH# AD29 10 CLK_DDR0 AB2 AF13 M_DATA30


BCLK# SCK[0] SDQ[30]
B21 GTL_D#32 10 CLK_DDR0# AA2 AH13 M_DATA31
HD[32]# SCK[0]# SDQ[31]
1

5 GTL_ADS# L28 G21 GTL_D#33 10 CLK_DDR1 AC26


ADS# HD[33]# SCK[1]
1

R423 N24 C24 GTL_D#34 AB25 AH17 M_DQS4


5 GTL_DRDY# DRDY# HD[34]# 10 CLK_DDR1# SCK[1]# SDQS[4]
150R3F C352 M28 C23 GTL_D#35 AC3 AD19 M_DM4
5 GTL_DEFER# DEFER# HD[35]# 10 CLK_DDR2 SCK[2] SDM[4]
SCD1U10V2MX-1 M25 D22 GTL_D#36 AD4 AH16 M_DATA32
5 GTL_TRDY# HTRDY# HD[36]# 10 CLK_DDR2# SCK[2]# SDQ[32]
2

5 GTL_RS#0 N23 C25 GTL_D#37 10 CLK_DDR3 AC2 AG17M_DATA33


RS[0]# HD[37]# SCK[3] SDQ[33]
2

5 GTL_RS#1 P26 E24 GTL_D#38 10 CLK_DDR3# AD2 AF19 M_DATA34


RS[1]# HD[38]# SCK[3]# SDQ[34]
5 GTL_RS#2 M27 D24 GTL_D#39 10 CLK_DDR4 AB23 AE20 M_DATA35
RS[2]# HD[39]# SCK[4] SDQ[35]
15,17,18,19,20,21,23,27,28 PCIRST#_3 AD28 G20 GTL_D#40 10 CLK_DDR4# AB24 AD18 M_DATA36
RSTIN# HD[40]# SCK[4]# SDQ[36]
5 GTL_BR0# M23 E23 GTL_D#41 10 CLK_DDR5 AA3 AE18 M_DATA37
BREQ0# HD[41]# SCK[5] SDQ[37]
5 GTL_BNR# N25 B22 GTL_D#42 10 CLK_DDR5# AB4 AH18 M_DATA38
BNR# HD[42]# SCK[5]# SDQ[38]

-c
P28 B23 GTL_D#43 AG19M_DATA39 2D5V_S3
5 GTL_BPRI# BPRI# HD[43]# SDQ[39]
5 GTL_DBSY# M26 F23 GTL_D#44
DBSY# HD[44]# 2D5V_S3 M_DQS7
5 GTL_HITM# N28 F21 GTL_D#45 AH27 AE21 M_DQS5
HITM# HD[45]# M_DM7 SDQS[7] SDQS[5]
5 GTL_HIT# N27 C20 GTL_D#46 AH28 AD21 M_DM5
HIT# HD[46]# SDM[7] SDM[5]

1
P27 C21 GTL_D#47 M_DATA56 AH26 AH20 M_DATA40
VCC_IO_S0 5 GTL_LOCK# HLOCK# HD[47]# SDQ[56] SDQ[40]

1
AE26 AG20M_DATA41 R334

SCD1U10V2MX-1
M_DATA57
SDQ[57] SDQ[41]

1
Y23 E21 R380 M_DATA58 AG28 AF22 M_DATA42 60D4R3F
5,17 CC_DPSLP# DPSLP# HDSTBP[2]# GTL_DSTBP#2 5 SDQ[58] SDQ[42]
F15 E22 604R3F M_DATA59 AF28 AH22 M_DATA43

C308
4,5 GTL_CPURST# CPURST# HDSTBN[2]# GTL_DSTBN#2 5 SDQ[59] SDQ[43]
1

GMCH_PWROK J11 B25 GTL_DINV#2 5 M_DATA60 AG26 AF20 M_DATA44


PWROK DINV[2]# SDQ[60] SDQ[44]

2
2 2
R92 M_DATA61 AF26 AH19 M_DATA45 SMRCOMP
SDQ[61] SDQ[45]

2
301R3F AA22 G18 GTL_D#48 SMVSWINGL M_DATA62 AE27 AH21 M_DATA46
5 GTL_DPWR# DPWR# HD[48]# SDQ[62] SDQ[46]

1
E19 GTL_D#49 M_DATA63 AD27 AG22M_DATA47
HD[49]# SDQ[63] SDQ[47]

1
HL_0 U7 E20 GTL_D#50 R333

SCD1U10V2MX-1
HL[0] HD[50]#
2

1
HXSWING HL_1 U4 G17 GTL_D#51 R378 M_DQS8 AD15 AH24 M_DQS6 60D4R3F
VF
HL_2 HL[1] HD[51]# 150R3F C337 SDQS[8] SDQS[6]
U3 D20 GTL_D#52 M_DM8 AH15 AD24 M_DM6
HUB LINK

HL[2] HD[52]# SDM[8] SDM[6]


1

HL_3 V3 F19 GTL_D#53 M_DATA64 AG14 AE23 M_DATA48


HL[3] HD[53]# SDQ[64] SDQ[48]

2
1

R93 HL_4 W2 C19 GTL_D#54 M_DATA65 AE14 AH23 M_DATA49


HL[4] HD[54]# SDQ[65] SDQ[49]

2
150R3F C103 HL_5 W6 C17 GTL_D#55 M_DATA66 AE17 AE24 M_DATA50
SCD1U10V2MX-1 HL_6 HL[5] HD[55]# SDQ[66] SDQ[50]
V6 F17 GTL_D#56 M_DATA67 AG16 AH25 M_DATA51
HL[6] HD[56]# SDQ[67] SDQ[51]
2

HL_7 W7 B19 GTL_D#57 M_DATA68 AH14 AG23M_DATA52


HL[7] HD[57]# SDQ[68] SDQ[52]
2

HL_8 T3 G16 GTL_D#58 2D5V_S3 M_DATA69 AE15 AF23 M_DATA53


HL_9 HL[8] HD[58]# SDQ[69] SDQ[53]
V5 E16 GTL_D#59 M_DATA70 AF16 AF25 M_DATA54
HL_10 HL[9] HD[59]# M_DATA71 SDQ[70] SDQ[54]
16 HL_[10:0] V4 C16 GTL_D#60 AF17 AG25M_DATA55
HL[10] HD[60]# SDQ[71] SDQ[55]

1
W3 E17 GTL_D#61
1D35V_S0 16 HL_STB V2
HLSTB HD[61]#
D16 GTL_D#62 R379 AJ22 1D25V_DDRVREF_S3
16 HL_STB# HLSTB# HD[62]# SMVSWINGL
HLVREF W1 C18 GTL_D#63 150R3F AB1 SMRCOMP
HLVREF HD[63]# SMRCOMP
1 R329 2 HLZCOMP T2 AJ19 AJ24
37D4R3F HLZCOMP SMVSWINGH SMVREF_0
change E18 GTL_DSTBP#3 5
HDSTBP[3]#

2
1 R421 2 27D4R3F HYRCOMP H28 D18 GTL_DSTBN#3 5
SMVSWINGH C347 C345
3D3V_S0 for HYRCOMP HDSTBN[3]#

1
G19 MONTARA-GM

SCD1U10V2MX-1

SCD01U16V2KX
DINV[3]# GTL_DINV#3 5
MGM+ 1 R94 2 27D4R3F HXRCOMP B20 1

SCD1U10V2MX-1
HXRCOMP

1
K21 HDVREF R381
HDVREF[0] HDVREF 9

2
R91 PSWING U2 J21 604R3F C335
PSWING HDVREF[1]
2

2 1 CC_CPUPWRGD 5,17 J17


R70 HDVREF[2] 2
HYSWING K28
HYSWING
2

470R2 HXSWING B18


470R2 HXSWING
Y22 HAVREF HAVREF 9
Q20 HAVREF
1 17 AGPBUSY# F7 Y28 HCCVREF HCCVREF 9 1
AGPBUSY# HCCVREF
1

6 1
5 2
4 3 HXRCOMP,HYRCOMP as Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
UMX1N-U
18mil wide trace MONTARA-GM Taipei Hsien 221, Taiwan, R.O.C.

Title

1 2 GMCH_PWROK Montara (1 of 3)
3D3V_S0 300R3 Size Document Number Rev
R72 A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 7 of 39

A B C D E
A B C D E

FOR MGM+ internal pull down


1D5V_S0 GST[2:0] FSB DDR Gfx Core Clock Low Gfx Core Clock High
U61E
000 400 266 133 200
AA29 AE13 R63 R61
VSS VSS
W29 AB13 2 1 ADDID7 GST[0] 1 2 001 400 200 100 200
VSS VSS
U29 U13
VSS VSS 1KR2 DUMMY-1KR2
N29 R13 010 400 200 100 133
VSS VSS 1D5V_S0
L29 N13 R60
VSS VSS
J29 H13 GST[1] 1 2 111 400 333 166 250
VSS VSS
G29 F13 DEFAULT NOT USE TV ENCODER
VSS VSS DUMMY-1KR2
E29 D13
VSS VSS R76
4 C29 A13 R40 4
VSS VSS 3D3V_S0
AE28 AJ12 1 2 DVODETECT 1 2 change
VSS VSS
AC28 AG12
VSS VSS DUMMY-1KR2 DUMMY-1KR2 for
E28 AA12 IF USE TV ENCODER ADD R63 ,REMOVE GST[2]
VSS VSS
D28 J12 R76 AND R66 MGM+
VSS VSS
AJ27 AJ11
VSS VSS
AG27 AC11
VSS VSS

AA5
D12
B12
F12

3
4
AC27 AB11

G5

G6

C4

D3
C3

D2
C2

D7
E5

E3
E2

B3

B2
F5

F4

F6

F3

F2
L7

L4
VSS VSS U61B RN5
F27 H11
VSS VSS SRN2D7KJ
A27 F11
VSS VSS

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AJ26 D11 15 TV_D[0..11]
VSS VSS
AB26 AJ10
W26
VSS
VSS GND VSS
VSS
AE10 15 TV_HSYNC R3
DVOBD[0]

2
1
U26 AA10 R5 G9 DAT_DDC1 13
VSS VSS DVOBD[1] DDCA_DATA
R26 J10 15 TV_VSYNC R6 B6 CLK_DDC1 13
VSS VSS DVOBD[2] DDCA_CLK
N26 C10 R4 C5 DAT_DDC_EDID 14
VSS VSS DVOBD[3] DDCPDATA
L26 AG9 P6 B4 CLK_DDC_EDID 14
VSS VSS DVOBD[4] DDCPCLK
J26 AB9 P5
VSS VSS DVOBD[5]

cc
G26 W9 N5 A7 DAC_RED 13
VSS VSS DVOBD[6] RED
AE25 U9 P2 A8
VSS VSS DVOBD[7] RED#
AA25 T9 N2 C8
D25
VSS
VSS
VSS
VSS
R9 N3
DVOBD[8]
DVOBD[9]
DVOB CRT GREEN
GREEN#
D8
DAC_GREEN 13
short trace
A25 N9 M1 C9 DAC_BLUE 13
VSS VSS 1D5V_S0 DVOBD[10] BLUE
AG24 L9 M5 D9
VSS VSS DVOBD[11] BLUE#

1
AA24 E9 H10 DAC_HSYNC 13
VSS VSS R328 HSYNC
V24 AC8 P3 J9 DAC_VSYNC 13
VSS VSS DVOBCLK VSYNC

2
T24 Y8 P4
VSS VSS 100KR2 DVOBCLK# TP1
P24 V8 M2 G8 BL_PWM
VSS VSS R326 DVOBFLDSTL PANELBKLTCTL
M24 T8 T6 F8 TPAD28
NB_BL_ON 14
VSS VSS DVOBHSYNC PANELBKLTEN

2
3 K24 P8 100KR2 T5 A5 3
VSS VSS DVOBVSYNC PANELVDDEN LCDVDD_ON 14
H24 K8 L2
VSS VSS DVOBBLANK#
VIDEO
1

F24 H8 F14 TXOUT0+ 14


VSS VSS IYAP[0]
B24 AJ7 G2 G14 TXOUT0- 14
VSS VSS DVOBCINTR# IYAM[0]
AJ23 AE7 E14 TXOUT1+ 14
VSS VSS IYAP[1]
AC23 AA7 M3 E15

o-
VSS VSS 15 TV_STALL DVOBCCLKINT IYAM[1] TXOUT1- 14
AA23 R7 C14 TXOUT2+ 14
VSS VSS IYAP[2]

1
D23 M7 R66 TV_D0 K5 C15
VSS VSS DVOCD[0] IYAM[2] TXOUT2- 14
A23 J7 TV_D1 K1 B13
VSS VSS DVOCD[1] IYAP[3]
AE22 G7 TV_D2 K3 C13

DUMMY-100KR2
VSS VSS 1D5V_S0 DVOCD[2] IYAM[3]
W22 E7 TV_D3 K2 E13 TXCLK+ 14
VSS VSS DVOCD[3] ICLKAP
U22 C7 TV_D4 J6 D14 TXCLK- 14
VSS VSS DVOCD[4] ICLKAM

2
R22 AG6 TV_D5 J5
VSS VSS DVOCD[5] LVDS
2

N22 Y6 TV_D6 H2 G12


VSS VSS DVOCD[6] IYBP[0]
L22 L6 TV_D7 H1 H12
VSS VSS R324 DVOCD[7] IYBM[0]
J22 Y5 TV_D8 H3 E11
VSS VSS 1KR2F DVOCD[8] IYBP[1]
F22 U5 TV_D9 H4 E12
C22
VSS
VSS
VSS
VSS
B5 TV_D10 H6
DVOCD[9]
DVOCD[10]
DVOC IYBM[1]
IYBP[2]
C11
1

AG21 AE4 GVREF TV_D11 G3 C12


VSS VSS DVOCD[11] IYBM[2]
AB21 AC4 G10
VSS VSS IYBP[3]

-c
2

AA21 AA4 15 TV_CLK TV_CLK J3 G11


VSS VSS DVOCCLK IYBM[3] 1D5V_S0
1

Y21 W4 15 TV_CLK# TV_CLK# J2


VSS VSS R325 C301 100KR2 1 DVOCCLK#
V21 T4 2 H5 E10
VSS VSS 1KR2F SCD1U10V2MX-1 R64 TV_HSYNC DVOCFLDSTL ICLKBM
T21 N4 K6 F10
VSS VSS DVOCHSYNC ICLKBP
2

P21 K4 TV_VSYNC L5 TP183


VSS VSS DVOCVSYNC
1

M21 G4 L3 H9 LCLKCTLA TPAD28


VSS VSS DVOCBLANK# LCLKCTLA
H21
VSS VSS
D4 R32340D2R3F LCLKCTLB
C6 LCLKCTLB
D21 AJ3 1 2 DVORCOMP D1 TPAD28 RP1
VSS VSS GVREF DVORCOMP TP184
A21 AG3 F1 P7 MDDCCLK 1 10
2 VSS VSS GVREF MDDCCLK 2
AJ20 R2 T7 MDDCDATA 2 9 MI2CCLK
VSS VSS MDDCDATA MDVI_CLK
AC20 AJ1 3 CLK66_GMCH Y3 N7 3 8 MI2CDATA
VSS VSS GCLKIN MDVICLK MDVI_DAT
AA20 AE1 M6 4 7
VSS VSS MDVIDATA MI2CCLK
J20 AA1 D5 K7 5 6
VSS VSS DPMS MI2CCLK MI2CDATA
F20 U1 B7 N6
VF
VSS VSS 3 CLK48_DREF_GMCH DREFCLK MI2CDATA
AE19 L1 3 CLK66_DREF_GMCH B17 SRP2K2
VSS VSS DREFSSCLK 1D5V_S0
AB19 G1 D6 E8 REFSET
VSS VSS EXTTS_0 REFSET 3D3V_S0
1

H19 C1
VSS VSS R95 R62 R67
D19 F16 A10
VSS VSS 10R2 10R2 LIBG
A19 AG15 SB:03/03/2004
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VSS VSS

1
AJ18 AB15
DUMMY-R2

VSS VSS MONTARA-GM R75 R65


AG18 U15
VSS VSS
AH29

AC16
AC15
2

AJ29

B29
A29
AJ28
A28
AA9
AJ4
AJ2
A2
AH1
B1
1K5R3F 127R3F

1
AA18 R15
VSS VSS
1 2

3
4
J18 N15 R677 R678
VSS VSS 2K7R2J 2K7R2J RN74
F18 H15
SC2D2P50V2CN

SC10P50V2JN-1

VSS VSS

2
1

AC17 D15 C58 SRN8K2J


C63

VSS VSS
C102

M_RCVO#
AB17 AC14 SB: for SIV pass M_RCVI#
DUMMY-C2

VSS VSS

2
U17 AA14
VSS VSS
2

TP58
TP57
TP56
TP55
TP59
TP54

TP46
TP47
TP44
TP48

R17 T14
TP2
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28

VSS VSS

2
1
N17 P14
VSS VSS
2

1
H17 J14 CHT2222A
VSS VSS Q62
D17
VSS
A17 MI2CCLK 2 3 TV_I2C_CLK 15
VSS
AE16 B8
VSS VSSADAC

1
AA16 B11 1D5V_S0 3D3V_S0 DDR Feedback(inside the package) CHT2222A
VSS VSSALVDS Q63
TP45

T16
TP4
TP3
TPAD28
TPAD28
TPAD28

VSS R71 Route transitioned to buttom


P16 2 1 MI2CDATA 2 3 TV_I2C_DATA 15
VSS
1

J16 side with vias near ball


VSS R59
1 1
10KR2F-U
MONTARA-GM 1KR2
R73 Wistron Corporation
2

CLK48_DPMS 1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


PM_THRM# 17,30
Taipei Hsien 221, Taiwan, R.O.C.
3

D DUMMY-R2
1 Q19 Title
17,30 PM_SUS_CLK 2N7002
G Montara (2 of 3)
S
2

Size Document Number Rev


A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 8 of 39

A B C D E
A B C D E

2D5V_S3
1D5V_S0
U61D
P9 AG29
VCCDVO VCCSM
M9 AF29
VCCDVO VCCSM

1
K9 AC29 C336 C357 C358 C311 C309 C77 C76
C72 C82 C74 C60 VCCDVO VCCSM
R8 AF27
SC10U6D3V5MX SC10U6D3V5MX SCD1U10V2MX-1 SCD1U10V2MX-1 VCCDVO VCCSM SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
N8 AJ25
VCCDVO VCCSM

2
M8 AF24 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
VCCDVO VCCSM
L8 AB22
VCCDVO VCCSM
4 J8 AJ21 4
VCCDVO VCCSM
H7 90mA AF21

ST100U4VBM
VCCDVO VCCSM

1
E6 AB20 C316 C330 C329 C338 TC12
VCCDVO VCCSM SCD1U10V2MX-1 TC14
M4 AF18

ST220U4VDM-6
VCCDVO VCCSM SCD1U10V2MX-1 SCD1U10V2MX-1
J4 AB18
VCCDVO VCCSM

2
E4 AJ17 SCD1U10V2MX-1
VCCDVO VCCSM
N1 AB16
VCCDVO VCCSM
J1 AF15 SC: populate
VCCDVO VCCSM
E1 25mA VCCSM AB14 220uF for 2.5V
1D35V_S0 VCCDVO
AJ13
VCCSM undershoot
AA13
VCCSM issue.
W21 AF12
VCC VCCSM
AA19 AB12
VCC VCCSM
AA17 AA11
VCC VCCSM
1

1
T17 AB10
C113
SCD1U10V2MX-1
C84
SCD1U10V2MX-1
C130
SCD1U10V2MX-1
C109 C85
SCD1U10V2MX-1 SC10U6D3V5MX
C80
SC10U6D3V5MX
TC3
ST100U4VBM
P17
U16
VCC
VCC
VCC
POWER VCCSM
VCCSM
VCCSM
AJ9
AF9
2

2
R16 Y9
VCC VCCSM

cc
N16 AB8
VCC VCCSM
AA15 AA8
VCC VCCSM 2D5V_S3
SC: Populate T15
VCC
2.24A VCCSM
Y7
2D5V_S3 P15 AF6
C331 for 2.5V
VCC VCCSM L16
J15 AB6 2D5V_VCC_QSM_S3 1 2
undershoot VCC VCCSM
U14 AA6

DUMMY-SC22U10V-1
issue VCC VCCSM

1
R14 IND-D68UH-6
VCC C328 C312
N14 AJ5
VCC VCCSM
1

1
H14 Y4 SCD1U10V2MX-1 SC10U6D3V5MX R335
ST100U4VBM

C297
VCC VCCSM

2
C313 C112 C86 C87 T13 AF3 VSS_QSM_GND 1 2
C331

SC10U6D3V5MX SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 VCC VCCSM


P13 AB3
VCC VCCSM
2

2
3 AG1 1R5 3
VCCSM 1D35V_S0
A12 AC1
1D5V_S0 VCCTXLVDS VCCSM
D10 L15
1D5V_S0 VCCTXLVDS
Caps for VCCALVDS B10 AJ8 1D2V_VCC_ASM_S0 1 2
VCCTXLVDS 50mA VCCQSM
F9 AJ6
DUMMY-SC47U10V-1

DUMMY-SC22U10V-1
VCCTXLVDS VCCQSM

1
IND-1UH-6

DUMMY-ST100U4VBM
o-
1

1
B15 AF1 C310 C307 TC11
C78 C61 C79 C81 VCCDLVDS VCCASM SCD1U10V2MX-1 SC10U6D3V5MX
B14 AD1
C302

C59
VCCDLVDS 90mA VCCASM

2
SCD1U10V2MX-1 SCD01U16V2KX SC10U6D3V5MX SCD1U10V2MX-1 J13 40mA
VCCDLVDS
2

2
G13
1D35V_S0 VCCDLVDS C354 SCD1U10V2MX-1
V29 1 2
VTTHF C353 SCD1U10V2MX-1
1D5V_S0 A11 70mA M29 1 2
VCCALVDS VTTHF C350 SCD1U10V2MX-1
R356 L17 H29 1 2
VTTHF C129 SCD1U10V2MX-1
1 21D2V_ADPLLA_S0
1 2 1D2V_ADPLLA-1_S0 A6 A24 1 2
3D3V_S0 1R5 VCCADPLLA VTTHF C104 SCD1U10V2MX-1
B16 A22 1 2
VCCADPLLB VTTHF
1

1
Caps for VCCGPIO IND-D1UH
ESR<50mohm,ESL<2.5mH TC13 C315 Y2
ST100U4VBM VCCAGPLL
D29 AB29
1D35V_S0 TC8,C78 on the same side VCCAHPLL VTTLF
2

2
SCD1U10V2MX-1 1D5V_S0 Y29
VTTLF
1

R74 L4 B9 K29
VCCADAC VTTLF

-c
C57 C56 1 21D2V_ADPLLB_S0
1 2 A9 F29 VCC_IO_S0
VCCADAC 70mA
1D2V_ADPLLB-1_S0
SCD1U10V2MX-1 SC10U6D3V5MX 1R5 IND-D1UH VTTLF
A26
VTTLF
2

V22
TC15 C101 3D3V_S0 VTTLF
ESR<50mohm,ESL<2.5mH T22
ST100U4VBM SCD1U10V2MX-1 VTTLF

1
TC9,C81 on the same side P22
VTTLF
2

A3 M22 C131 C108 C110 C105 C184


VCCGPIO VTTLF SC10U6D3V5MX SC10U6D3V5MX SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
A4 20mA H22
1D35V_S0 VCCGPIO VTTLF

2
1D35V_S0 690mA U21
1D35V_S0 VTTLF
V9 R21
2 VCCHL VTTLF 2
Caps for VCCHL W8 N21
VCCHL VTTLF
U8 L21

DUMMY-ST100U4VBM
1D35V_S0 VCCHL VTTLF
1

1
V7 H20
VCCHL VTTLF
1

C64 U6 90mA A20 TC6 C139 C163 C140


C83 C65 C114 SCD1U10V2MX-1 VCCHL VTTLF SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
W5 J19
VF
VCCHL VTTLF
2

2
SC10U6D3V5MX SCD1U10V2MX-1 SCD1U10V2MX-1 Cap for Y1 H18
VCCHL VTTLF
2

VCCAGPLL V1 A18
C107 VCCHL VTTLF
H16
SCD1U10V2MX-1 VTTLF
G15
VTTLF
2

Cap for
VCCAHPLL
MONTARA-GM

1D5V_S0
Caps for VCCADAC
Reference Voltage: 2/3 Vcc_IO_S0
1

VCC_IO_S0 VCC_IO_S0 VCC_IO_S0


C73 C75
SCD1U10V2MX-1 SCD01U16V2KX
2

1
R425 R99 R96
49D9R3F 49D9R3F 49D9R3F
1 1
This two cap chould connect to
2

2
VSSADAC first then to GND
7 HCCVREF HCCVREF 7 HAVREF HAVREF 7 HDVREF HDVREF Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

1
Taipei Hsien 221, Taiwan, R.O.C.
1

1
R424 R98 R97
C355 BC199 100R3F BC65 C111 100R3F C106 BC64 100R3F Title
SCD1U10V2MX-1SC1U10V3KX SC1U10V3KX SCD1U10V2MX-1 SCD1U10V2MX-1 SC1U10V3KX
Montara (3 of 3)
2

2
2

2
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 9 of 39

A B C D E
A B C D E

DIMM1 DIMM2
Use old symbol change PN only
DM1 DM2

M_A_SR0 112 121 M_A0 112 121


12 M_A_SR0 A0 /CS0 M_CS0_R# 7,12 7,12 M_A0 A0 /CS0 M_CS2_R# 7,12
7,12 M_A1 M_A1 111 122 M_CS1_R# 7,12 7,12 M_AB1 111 122 M_CS3_R# 7,12
A1 /CS1 A1 /CS1
7,12 M_A2 M_A2 110 7,12 M_AB2 110
M_A_SR3 A2 A2
12 M_A_SR3 109 96 M_CKE0_R# 7,12 7,12 M_A3 M_A3 109 96 M_CKE2_R# 7,12
A3 CKE0 A3 CKE0
7,12 M_A4 M_A4 108 95 M_CKE1_R# 7,12 7,12 M_AB4 108 95 M_CKE3_R# 7,12
A4 CKE1 A4 CKE1
7,12 M_A5 M_A5 107 7,12 M_AB5 107
A5 A5
12 M_A_SR6 M_A_SR6 106 11 M_DQS_R0 7,12 M_A6 M_A6 106 11 M_DQS_R0
A6 DQS0 M_A7 A6 DQS0
12 M_A_SR7 M_A_SR7 105 25 M_DQS_R1 7,12 M_A7 105 25 M_DQS_R1
A7 DQS1 M_A8 A7 DQS1
12 M_A_SR8 M_A_SR8 102 47 M_DQS_R2 7,12 M_A8 102 47 M_DQS_R2
4 A8 DQS2 M_A9 A8 DQS2 4
12 M_A_SR9 M_A_SR9 101 61 M_DQS_R3 7,12 M_A9 101 61 M_DQS_R3
A9 DQS3 M_A10 A9 DQS3
12 M_A_SR10 M_A_SR10 115 133 M_DQS_R4 7,12 M_A10 115 133 M_DQS_R4
A10 / AP DQS4 A10 / AP DQS4
12 M_A_SR11 M_A_SR11 100 147 M_DQS_R5 7,12 M_A11 M_A11 100 147 M_DQS_R5
A11 DQS5 M_A12 A11 DQS5
12 M_A_SR12 M_A_SR12 99 169 M_DQS_R6 7,12 M_A12 99 169 M_DQS_R6
A12 DQS6 A12 DQS6
183 M_DQS_R7 183 M_DQS_R7
DQS7 DQS7
12 M_BS0_SR# 117 77 M_DQS_R8 7,12 M_BS0# 117 77 M_DQS_R8
BA0 DQS8 BA0 DQS8
12 M_BS1_SR# 116 7,12 M_BS1# 116
BA1 BA1
12 M_DM_R_0 M_DQS_R[0..8] 12 12 M_DM_R_0
DM0 DM0
M_DATA_R_0 5 26 M_DM_R_1 M_DATA_R_0 5 26 M_DM_R_1
DQ0 DM1 DQ0 DM1
12 M_DATA_R_[71..0] M_DATA_R_1 7 48 M_DM_R_2 M_DATA_R_1 7 48 M_DM_R_2
DQ1 DM2 DQ1 DM2
M_DATA_R_2 13 62 M_DM_R_3 M_DATA_R_2 13 62 M_DM_R_3
DQ2 DM3 DQ2 DM3
M_DATA_R_3 17 134 M_DM_R_4 M_DATA_R_3 17 134 M_DM_R_4
DQ3 DM4 DQ3 DM4
M_DATA_R_4 6 148 M_DM_R_5 M_DATA_R_4 6 148 M_DM_R_5
DQ4 DM5 DQ4 DM5
M_DATA_R_5 8 170 M_DM_R_6 M_DATA_R_5 8 170 M_DM_R_6
DQ5 DM6 DQ5 DM6
M_DATA_R_6 14 184 M_DM_R_7 M_DATA_R_6 14 184 M_DM_R_7
DQ6 DM7 DQ6 DM7
M_DATA_R_7 18 78 M_DM_R_8 M_DATA_R_7 18 78 M_DM_R_8
DQ7 DM8 DQ7 DM8
M_DATA_R_8 19 M_DM_R_[8..0] 12 M_DATA_R_8 19
DQ8 DQ8
M_DATA_R_9 23 35 CLK_DDR0 7 M_DATA_R_9 23 35 CLK_DDR3 7
DQ9 CK0 DQ9 CK0
M_DATA_R_10 29 37 CLK_DDR0# 7 M_DATA_R_10 29 37 CLK_DDR3# 7
DQ10 /CK0 DQ10 /CK0
M_DATA_R_11 31 160 M_DATA_R_11 31 160

cc
DQ11 CK1 CLK_DDR1 7 DQ11 CK1 CLK_DDR4 7
M_DATA_R_12 20 158 CLK_DDR1# 7 M_DATA_R_12 20 158 CLK_DDR4# 7
DQ12 /CK1 DQ12 /CK1
M_DATA_R_13 24 89 CLK_DDR2 7 M_DATA_R_13 24 89 CLK_DDR5 7
DQ13 CK2 DQ13 CK2
M_DATA_R_14 30 91 CLK_DDR2# 7 M_DATA_R_14 30 91 CLK_DDR5# 7
DQ14 /CK2 DQ14 /CK2
M_DATA_R_15 32 M_DATA_R_15 32
DQ15 DQ15
M_DATA_R_16 41 195 SMBC_ICH 3,17 M_DATA_R_16 41 195 SMBC_ICH
DQ16 SCL DQ16 SCL
M_DATA_R_17 43 193 SMBD_ICH 3,17 M_DATA_R_17 43 193 SMBD_ICH
DQ17 SDA DQ17 SDA
M_DATA_R_18 49 M_DATA_R_18 49
DQ18 DQ18
53 194 53 194
REVERSE TYPE
M_DATA_R_19 M_DATA_R_19 3D3V_S0
DQ19 SA0 DQ19 SA0
M_DATA_R_20 42 196 M_DATA_R_20 42 196
DQ20 SA1 DQ20 SA1
M_DATA_R_21 44 198 M_DATA_R_21 44 198

NORMAL TYPE
DQ21 SA2 DQ21 SA2
M_DATA_R_22 50 M_DATA_R_22 50
DQ22 DQ22
M_DATA_R_23 54 9 M_DATA_R_23 54 9
3 DQ23 VDD DQ23 VDD 3
M_DATA_R_24 55 10 M_DATA_R_24 55 10
DQ24 VDD DQ24 VDD
M_DATA_R_25 59 21 M_DATA_R_25 59 21
DQ25 VDD DQ25 VDD
M_DATA_R_26 65 22 M_DATA_R_26 65 22
DQ26 VDD DQ26 VDD
M_DATA_R_27 67 33 M_DATA_R_27 67 33
DQ27 VDD DQ27 VDD
M_DATA_R_28 56 34 M_DATA_R_28 56 34
DQ28 VDD DQ28 VDD
M_DATA_R_29 60 36 M_DATA_R_29 60 36
DQ29 VDD DQ29 VDD

o-
M_DATA_R_30 66 45 M_DATA_R_30 66 45
DQ30 VDD DQ30 VDD
M_DATA_R_31 68 46 M_DATA_R_31 68 46
DQ31 VDD DQ31 VDD
M_DATA_R_32 127 57 M_DATA_R_32 127 57
DQ32 VDD DQ32 VDD
M_DATA_R_33 129 58 M_DATA_R_33 129 58
M_DATA_R_34
M_DATA_R_35
135
139
DQ33
DQ34
VDD
VDD
69
70
M_DATA_R_34
M_DATA_R_35
135
139
DQ33
DQ34
VDD
VDD
69
70
(Normal Type)
M_DATA_R_36
M_DATA_R_37
128
130
DQ35
DQ36
VDD
VDD
81
82
M_DATA_R_36
M_DATA_R_37
128
130
DQ35
DQ36
VDD
VDD
81
82
DIMM 2(BOT side)
DQ37 VDD DQ37 VDD
M_DATA_R_38 136 92 M_DATA_R_38 136 92
DQ38 VDD DQ38 VDD
M_DATA_R_39 140 93 M_DATA_R_39 140 93
DQ39 VDD DQ39 VDD
M_DATA_R_40 141 94 M_DATA_R_40 141 94
DQ40 VDD DQ40 VDD
M_DATA_R_41 145 113 M_DATA_R_41 145 113
DQ41 VDD DQ41 VDD
M_DATA_R_42 151 114 M_DATA_R_42 151 114
DQ42 VDD DQ42 VDD
M_DATA_R_43 153 131 M_DATA_R_43 153 131
DQ43 VDD DQ43 VDD
M_DATA_R_44 142 132 M_DATA_R_44 142 132
DQ44 VDD DQ44 VDD
M_DATA_R_45 146 143 M_DATA_R_45 146 143
DQ45 VDD DQ45 VDD

-c
M_DATA_R_46 152 144 M_DATA_R_46 152 144
DQ46 VDD DQ46 VDD
M_DATA_R_47 154 155 M_DATA_R_47 154 155
DQ47 VDD DQ47 VDD
M_DATA_R_48 163 156 M_DATA_R_48 163 156
DQ48 VDD DQ48 VDD
M_DATA_R_49 165 157 M_DATA_R_49 165 157
DQ49 VDD DQ49 VDD
M_DATA_R_50 171 167 M_DATA_R_50 171 167
DQ50 VDD DQ50 VDD
M_DATA_R_51 175 168 M_DATA_R_51 175 168
DQ51 VDD DQ51 VDD
164 179 164 179
M_DATA_R_52
M_DATA_R_53 166
DQ52
DQ53
VDD
VDD
180
M_DATA_R_52
M_DATA_R_53 166
DQ52
DQ53
VDD
VDD
180 Montara-GM+
M_DATA_R_54 172 191 M_DATA_R_54 172 191 (BOT side)
DQ54 VDD DQ54 VDD
M_DATA_R_55 176 192 2D5V_S3 M_DATA_R_55 176 192 2D5V_S3
2 DQ55 VDD DQ55 VDD 2
M_DATA_R_56 177 M_DATA_R_56 177
DQ56 DQ56
M_DATA_R_57 181 3 M_DATA_R_57 181 3
DQ57 VSS DQ57 VSS
M_DATA_R_58 187 4 M_DATA_R_58 187 4
DQ58 VSS DQ58 VSS
M_DATA_R_59 189 15 M_DATA_R_59 189 15
DQ59 VSS DQ59 VSS
M_DATA_R_60 178 16 M_DATA_R_60 178 16
DQ60 VSS DQ60 VSS
M_DATA_R_61 182 27 M_DATA_R_61 182 27
VF
DQ61 VSS DQ61 VSS
M_DATA_R_62 188 28 M_DATA_R_62 188 28
DQ62 VSS DQ62 VSS
M_DATA_R_63 190 38 M_DATA_R_63 190 38
DQ63 VSS DQ63 VSS
39 39
VSS VSS
M_DATA_R_64 71 40 M_DATA_R_64 71 40
CB0 VSS CB0 VSS
M_DATA_R_65 73 51 M_DATA_R_65 73 51
CB1 VSS CB1 VSS
M_DATA_R_66 79 52 M_DATA_R_66 79 52
CB2 VSS CB2 VSS
M_DATA_R_67 83 63 M_DATA_R_67 83 63
M_DATA_R_68
M_DATA_R_69
72
74
CB3
CB4
VSS
VSS
64
75
M_DATA_R_68
M_DATA_R_69
72
74
CB3
CB4
VSS
VSS
64
75
(REVERSE TYPE)
M_DATA_R_70
M_DATA_R_71
80
84
CB5
CB6
VSS
VSS
76
87
M_DATA_R_70
M_DATA_R_71
80
84
CB5
CB6
VSS
VSS
76
87
DIMM 1(Top side)
CB7 VSS CB7 VSS
88 88
VSS VSS
85 90 85 90
NC VSS NC VSS
DM0_RESET# 86 103 DM1_RESET# 86 103
TPAD28 TP49 NC/(RESET#) VSS TPAD28 TP50 NC/(RESET#) VSS
DM0_A13 97 104 DM1_A13 97 104
TPAD28 TP5 NC/A13 VSS TPAD28 TP53 NC/A13 VSS
DM0_BA2 98 125 DM1_BA2 98 125
TPAD28 TP51 NC/BA2 VSS TPAD28 TP52 NC/BA2 VSS
123 126 123 126
NC VSS NC VSS
124 137 124 137
NC VSS NC VSS
200 138 200 138
NC VSS NC VSS
149 149
VSS VSS
12 M_RAS_SR# 118 150 7,12 M_RAS# 118 150
/RAS VSS /RAS VSS
12 M_CAS_SR# 120 159 7,12 M_CAS# 120 159
/CAS VSS /CAS VSS
12 M_WE_SR# 119 161 7,12 M_WE# 119 161
/WE VSS /WE VSS
162 162
VSS VSS
1D25V_DDRVREF_S3 1 173 1D25V_DDRVREF_S3 1 173
VREF VSS VREF VSS
2 174 2 174
SCD1U10V2MX-1

SCD1U10V2MX-1

1 VREF VSS VREF VSS 1


3D3V_S0 197 185 3D3V_S0 197 185
VDDSPD VSS VDDSPD VSS
1

199 186 199 186


BC17 VDDID VSS BC34 VDDID VSS
202 201 201 202
GND GND GND GND Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


SKTSODIMM200-1U1 Taipei Hsien 221, Taiwan, R.O.C.
62.10017.311 SKT-SODIMM200-7U
62.10024.481 Title
Top Side BOT side DDR Socket
Size Document Number Rev
Custom SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 10 of 39

A B C D E
A B C D E

1D25V_S0 0.01u_25V*24,0402-X7R

4 BC47 BC49 BC40 BC36 BC35 BC37 BC39 BC42 BC41 BC38 BC60 BC59 4
SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX

BC58 BC62 BC61 BC51 BC52 BC46 BC48 BC50 BC72 BC73 BC69 BC67
SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX

cc
0.1u_10V*24,0402-X5R
1

1
BC55 BC57 BC84 BC82 BC83 BC85 BC78 BC81 BC71 BC74 BC68 BC70
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2

2
3 3
1

1
BC92 BC96 BC95 BC94 BC91 BC93 BC97 BC77 BC80 BC79 BC66 BC56
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1

o-
2

2
FOR DDR SKTS POWER PIN

-c
10u_6.3V*1,0805-X5R
0.1u_10V*24,0402-X5R
2D5V_S3

2 2
1

1
C360 BC185 BC191 BC192 BC193 BC201 BC203 BC202 BC204
SC10U6D3V5MX SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2

2
VF 1

1
BC187 BC184 BC181 BC182 BC183 BC186 BC180 BC195
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2

2
1

1
BC194 C66 C314 C333 C319 C318 C317 C332
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2

2
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR Decoupling CPA
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 11 of 39

A B C D E
A B C D E

SERIES DAMPING PARALLEL TERMINATION


Put decap near power(1.25V) and pull-up resistor
1D25V_S0
1D25V_S0
R338 10R2 R384 10R2 R343 56R2J R412 56R2J
M_DQS0 1 2 M_DQS_R0 M_DQS4 1 2 M_DQS_R4 M_DQS_R0 1 2 1 2 M_DQS_R4 5 4 5 4 M_A2
7,10 M_AB1
M_A3 6 3 6 3 M_A4
M_DATA4 8 1 M_DATA_R_4 M_DATA32 8 1 M_DATA_R_32 M_DATA_R_6 4 5 5 4 M_DATA_R_36 7 2 7 2
7,10 M_AB5 M_AB2 7,10
M_DATA5 7 2 M_DATA_R_5 M_DATA33 7 2 M_DATA_R_33 M_DATA_R_7 3 6 6 3 M_DATA_R_37 M_A7 8 1 8 1 M_A6
M_DATA0 6 3 M_DATA_R_0 M_DATA36 6 3 M_DATA_R_36 M_DATA_R_3 2 7 7 2 M_DATA_R_33
4 M_DATA1 5 4 M_DATA_R_1 M_DATA37 5 4 M_DATA_R_37 M_DATA_R_2 1 8 8 1 M_DATA_R_32 RN46 SRN56-3 RN13 SRN56-3 4
Put decap near power(1.25V) and pull-up resistor
RN33 SRN10-1 RN44 SRN10-1 RN3 SRN56-3 RN12 SRN56-3
M_DATA2 8 1 M_DATA_R_2 M_DATA38 8 1 M_DATA_R_38 M_DATA_R_1 4 5 5 4 M_DATA_R_35
M_DATA3 7 2 M_DATA_R_3 M_DATA39 7 2 M_DATA_R_39 M_DATA_R_0 3 6 6 3 M_DATA_R_34
7,10 M_CS2_R# 5 4 5 4 M_CS3_R# 7,10
M_DATA6 6 3 M_DATA_R_6 M_DATA34 6 3 M_DATA_R_34 M_DATA_R_5 2 7 7 2 M_DATA_R_39 M_WE# 6 3 6 3 M_CAS#
M_DATA7 5 4 M_DATA_R_7 M_DATA35 5 4 M_DATA_R_35 M_DATA_R_4 1 8 8 1 M_DATA_R_38 M_BS0# 7 2 7 2 M_RAS#
M_A10 8 1 8 1 M_BS1#
RN32 SRN10-1 RN47 SRN10-1 RN2 SRN56-3 RN18 SRN56-3
Put decap near power(1.25V) and pull-up resistor RN45 SRN56-3 RN14 SRN56-3
R339 10R2 R407 10R2 R342 56R2J R413 56R2J
M_DQS1 1 2 M_DQS_R1 M_DQS5 1 2 M_DQS_R5 M_DQS_R1 1 2 1 2 M_DQS_R5 Put decap near power(1.25V) and pull-up resistor
RN15
M_DATA8 8 1 M_DATA_R_8 M_DATA45 8 1 M_DATA_R_45 M_DATA_R_13 4 5 5 4 M_DATA_R_44 M_A5 4 5 1 2 R388 56R2J
M_CKE0_R# 7,10
M_DATA9 7 2 M_DATA_R_9 M_DATA40 7 2 M_DATA_R_40 M_DATA_R_12 3 6 6 3 M_DATA_R_45 M_A0 3 6 1 2 R386 56R2J
M_CKE2_R# 7,10
M_DATA12 6 3 M_DATA_R_12 M_DATA41 6 3 M_DATA_R_41 M_DATA_R_9 2 7 7 2 M_DATA_R_41 2 7 1 2 R367 56R2J
7,10 M_AB4 M_CKE1_R# 7,10
M_DATA13 5 4 M_DATA_R_13 M_DATA44 5 4 M_DATA_R_44 M_DATA_R_8 1 8 8 1 M_DATA_R_40 M_A1 1 8 1 2 R391 56R2J
M_CKE3_R# 7,10

cc
RN31 SRN10-1 RN48 SRN10-1 RN1 SRN56-3 RN16 SRN56-3 SRN56-3
M_DATA11 8 1 M_DATA_R_11 M_DATA46 8 1 M_DATA_R_46 M_DATA_R_15 4 5 5 4 M_DATA_R_42 Put decap near power(1.25V) and pull-up resistor
M_DATA10 7 2 M_DATA_R_10 M_DATA47 7 2 M_DATA_R_47 M_DATA_R_14 3 6 6 3 M_DATA_R_43 M_DATA_R_71 5 4
M_DATA14 6 3 M_DATA_R_14 M_DATA42 6 3 M_DATA_R_42 M_DATA_R_10 2 7 7 2 M_DATA_R_46 M_DATA_R_70 6 3
M_DATA15 5 4 M_DATA_R_15 M_DATA43 5 4 M_DATA_R_43 M_DATA_R_11 1 8 8 1 M_DATA_R_47 M_DATA_R_66 7 2 1 2 R382 56R2J M_CS0_R# 7,10
M_DATA_R_67 8 1
RN34 SRN10-1 RN49 SRN10-1 RN4 SRN56-3 RN17 SRN56-3 1 2 R409 56R2J M_CS1_R# 7,10
Put decap near power(1.25V) and pull-up resistor RN9 SRN56-3
R358 10R2 R428 10R2 R360 56R2J R433 56R2J M_DATA_R_65 5 4 R3891 56R2J 2 M_A12
M_DQS2 1 2 M_DQS_R2 M_DQS6 1 2 M_DQS_R6 M_DQS_R2 1 2 1 2 M_DQS_R6 M_DATA_R_64 6 3 R3851 56R2J 2 M_A8
M_DATA_R_68 7 2 R3901 56R2J 2 M_A9
3 M_DATA20 8 1 M_DATA_R_20 M_DATA53 8 1 M_DATA_R_53 M_DATA_R_17 4 5 5 4 M_DATA_R_49 M_DATA_R_69 8 1 R3871 56R2J 2 M_A11 3
M_DATA21 7 2 M_DATA_R_21 M_DATA52 7 2 M_DATA_R_52 M_DATA_R_16 3 6 6 3 M_DATA_R_48
M_DATA16 6 3 M_DATA_R_16 M_DATA49 6 3 M_DATA_R_49 M_DATA_R_21 2 7 7 2 M_DATA_R_53 RN11 SRN56-3
M_DATA17 5 4 M_DATA_R_17 M_DATA48 5 4 M_DATA_R_48 M_DATA_R_20 1 8 8 1 M_DATA_R_52 R374 56R2J
M_DQS_R8 1 2
RN36 SRN10-1 RN50 SRN10-1 RN8 SRN56-3 RN19 SRN56-3

o-
M_DATA22 8 1 M_DATA_R_22 M_DATA50 8 1 M_DATA_R_50 M_DATA_R_18 4 5 5 4 M_DATA_R_51
M_DATA18 7 2 M_DATA_R_18 M_DATA54 7 2 M_DATA_R_54 M_DATA_R_19 3 6 6 3 M_DATA_R_55 M_DM_R_0 R340 1 2 56R2J
M_DATA23 6 3 M_DATA_R_23 M_DATA55 6 3 M_DATA_R_55 M_DATA_R_23 2 7 7 2 M_DATA_R_54 M_DM_R_1 R341 1 2 56R2J
M_DATA19 5 4 M_DATA_R_19 M_DATA51 5 4 M_DATA_R_51 M_DATA_R_22 1 8 8 1 M_DATA_R_50 M_DM_R_2 R359 1 2 56R2J
M_DM_R_3 R371 1 2 56R2J
M_DQS_R[8..0] 10
RN35 SRN10-1 RN51 SRN10-1 RN7 SRN56-3 RN21 SRN56-3 M_DM_R_4 R410 1 2 56R2J
Put decap near power(1.25V) and pull-up resistor M_DM_R_5 R411 1 2 56R2J
R366 10R2 R429 10R2 R373 56R2J R432 56R2J M_DM_R_6 R431 1 2 56R2J
M_DQS[8..0] 7
M_DQS3 1 2 M_DQS_R3 M_DQS7 1 2 M_DQS_R7 M_DQS_R3 1 2 1 2 M_DQS_R7 M_DM_R_7 R430 1 2 56R2J
M_DM_R_8 R372 1 2 56R2J
M_DATA[71..0] 7
M_DATA24 8 1 M_DATA_R_24 M_DATA56 8 1 M_DATA_R_56 M_DATA_R_28 4 5 5 4 M_DATA_R_61
M_DATA25 7 2 M_DATA_R_25 M_DATA57 7 2 M_DATA_R_57 M_DATA_R_29 3 6 6 3 M_DATA_R_60
M_DATA28 6 3 M_DATA_R_28 M_DATA61 6 3 M_DATA_R_61 M_DATA_R_24 2 7 7 2 M_DATA_R_57 M_DATA_R_[71..0] 10
M_DATA29 5 4 M_DATA_R_29 M_DATA60 5 4 M_DATA_R_60 M_DATA_R_25 1 8 8 1 M_DATA_R_56

-c
RN40 SRN10-1 RN52 SRN10-1 RN6 SRN56-3 RN20 SRN56-3
M_DATA30 8 1 M_DATA_R_30 M_DATA63 8 1 M_DATA_R_63 M_DATA_R_31 4 5 5 4 M_DATA_R_59
M_DATA27 7 2 M_DATA_R_27 M_DATA62 7 2 M_DATA_R_62 M_DATA_R_27 3 6 6 3 M_DATA_R_58 M_A[12..0] 7,10
M_DATA26 6 3 M_DATA_R_26 M_DATA59 6 3 M_DATA_R_59 M_DATA_R_26 2 7 7 2 M_DATA_R_62
M_DATA31 5 4 M_DATA_R_31 M_DATA58 5 4 M_DATA_R_58 M_DATA_R_30 1 8 8 1 M_DATA_R_63 M_DM_R_[8..0] 10
RN38 SRN10-1 RN53 SRN10-1 RN10 SRN56-3 RN22 SRN56-3
2 M_DM[8..0] 7 2
R368 10R2
M_DQS8 1 2 M_DQS_R8

M_DATA65 8 1 M_DATA_R_65
M_DATA64 7 2 M_DATA_R_64
VF
M_DATA68 6 3 M_DATA_R_68
M_DATA69 5 4 M_DATA_R_69
RN42
RN37 SRN10-1 4 5
7,10 M_BS1# M_BS1_SR# 10
M_DATA66 8 1 M_DATA_R_66 M_A10 3 6 M_A_SR10 10
M_DATA67 7 2 M_DATA_R_67 7,10 M_RAS# 2 7 M_RAS_SR# 10
M_DATA70 6 3 M_DATA_R_70 7,10 M_BS0# 1 8 M_BS0_SR# 10
M_DATA71 5 4 M_DATA_R_71
SRN10-1
RN39 SRN10-1 Command Signals USE Topology 2
R336 10R2 R406
M_DM0 1 2 M_DM_R_0 1 2
7,10 M_WE# M_WE_SR# 10

R337 10R2 RN41 10R2


M_DM1 1 2 M_DM_R_1
M_A0 4 5 R405
M_A_SR0 10
R357 10R2 M_A7 3 6 1 2
M_A_SR7 10 7,10 M_CAS# M_CAS_SR# 10
M_DM2 1 2 M_DM_R_2 M_A8 2 7 M_A_SR8 10
M_A3 1 8 10R2
M_A_SR3 10
R370 10R2
M_DM3 1 2 M_DM_R_3
SRN10-1
R383 10R2 RN43
1
M_DM4 1 2 M_DM_R_4 1
M_A12 4 5 M_A_SR12 10
R408 10R2 M_A6 3 6 M_A_SR6 10
M_DM5 1 2 M_DM_R_5 M_A11 2 7 M_A_SR11 10
Wistron Corporation
M_A9 1 8 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M_A_SR9 10
R426 10R2 Taipei Hsien 221, Taiwan, R.O.C.
M_DM6 1 2 M_DM_R_6
SRN10-1 Title
R427 10R2 DDR Serial/Terminator Resistor
M_DM7 1 2 M_DM_R_7
Size Document Number Rev
R369 10R2 A3
MOLOKAI SC
M_DM8 1 2 M_DM_R_8
Date: Thursday, April 15, 2004 Sheet 12 of 39

A B C D E
A B C D E

Ferrite bead impedance:


75ohm@100MHz CRT 5V_S0

D20 F9
CRT_VCC_S0

L18
8 DAC_RED 1 2 CRT_R 2 1 CRT_VCC_1_S0 1 2
CRT_G
MLB-160808-10 CRT_B SSM5817SL FUSE-1A6V
5V_S0
L19
1 2 BC189
8 DAC_GREEN
D44 SCD01U16V2KX

2
MLB-160808-10 2 CRT1
4 R415 R414 17 4
L20 3 3K3R2 3K3R2
8 DAC_BLUE 1 2 MH1
1

1
C88 C89 C90 MLB-160808-10 6
SC15P50V2JN

SC15P50V2JN

SC15P50V2JN
2

1
R79 R80 R81 BAV99-2 11
D45 CRT_R 1
2
1

1 75R2F 75R2F 75R2F 7


3 DAT_DDC1_5 12

2
CRT_G 2

SC47P50V2JN
1
SB: for SIV pass 1 8
5V_S0 JVGA_HS 13

C481
BAV99-2 CRT_B 3

2
D46 9
2 JVGA_VS 14

1
4
BC63 3 10

cc
SCD1U10V2MX-1 CLK_DDC1_5 15

2
1 5

SC47P50V2JN
1
U25A BAV99-2 MH2

C482
14

2
R78 L5 16
1 2 2 3 HSYNC_5 1 2 JVGA_HS
8 DAC_HSYNC
33R2 33R2 FOX-CONN15-2-U
TSAHCT125 20.20305.015
14

7
4
3
R100 L6 3

8 DAC_VSYNC 1 2 5 6 VSYNC_5 1 2 JVGA_VS


U25B
33R2 33R2
TSAHCT125
7

1
C116 C117

o-
DUMMY-SC3D3P50V DUMMY-SC3D3P50V

2
Layout Note:
Must be a ground return path for
CLOSE TO CRT CONN CRT_R,CRT_G,CRT_B

2
DDC_CLK & DATE LEVEL SHIFT

3D3V_S0 3D3V_S0

-c 2
1

VF
R416
10KR2
1

R435 R434
2

2K2R3 2K2R3
1

Q40 2N7002
G
2

8 DAT_DDC1 2 3 DAT_DDC1_5
S

D
1

Q41 2N7002
G

8 CLK_DDC1 2 3 CLK_DDC1_5
S

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CRT CONN.
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 13 of 39

A B C D E
A B C D E

DCBATOUT 3D3V_S0

Layout 40 mil
INVERTER/LED

1
R297
10KR2

1
C12

LCD CONN C40 D4

2
SCD1U50V3ZY SC4D7U35V-U 6 1 COVERUP 28,30

2
01/30/04
FPBACK 5 2 NB_BL_ON NB_BL_ON 8
1 1
R668 INV1

31
3D3V_LCD_S0 1 2 01/28/2004 4 3 BACKLT_OFF#
25,28 KBC_SPKR BACKLT_OFF# 16
01/27/2004 2 1
DUMMY-R2 4 3 RB731U

SCD1U16V

SCD1U16V
1

1
C17 6 5 HDD_LED#

C2

C1
HDD_LED# 26
PWR_STBY_LED# 8 7 CAPS_LED#

SC10U10V5ZY
17 PWR_STBY_LED# CAPS_LED# 28
10 9 NUM_LED#
LCD1 NUM_LED# 28

2
12 11 CHARGE_LED#
CHARGE_LED# 35
47 45 3D3V_S3 14 13 SCROLL_LED# SCROLL_LED# 28
MH1 28 BRIGHTNESS BRIGHTNESS 16 15
1 18 17
20 19 80211_LED#
2 3D3V_S0 22 21

1
48 3 FPBACK 24 23 5V_S0
4 26 25

C292
5 28 27

SCD1U16V

SCD1U16V
C290
3D3V_S0 3D3V_AUX

cc
2

2
6 30 29

1
7

C295

C293
DAT_DDC_EDID 8
8 CLK_DDC_EDID 8
49 9

SCD1U16V

SCD1U16V
32

2
10 TXCLK+
TXCLK+ 8
11 TXCLK- TXCLK- 8
12
13 TXOUT2+ TXOUT2+ 8
14 TXOUT2- AMP-CONN30D-1-U
TXOUT2- 8
50 15 20.D0144.215 Change Inv1 to 20.D0144.215
16 TXOUT1+ 2nd source:20.D0070.215
TXOUT1+ 8
2 17 TXOUT1- TXOUT1- 8
2
18
19 TXOUT0+ TXOUT0+ 8
20 TXOUT0- TXOUT0- 8
21 C284 SC1000P50V PWR_STBY_LED#
51 22 C286 SC1000P50V 80211_LED#

o-
23 C294 SC1000P50V FPBACK
24 C2911 2 SCD1U16V BRIGHTNESS
25 C283 SC1000P50V HDD_LED#
26 C285 SC1000P50V CAPS_LED#
27 C287 SC1000P50V NUM_LED# 3D3V_S0 U4 3D3V_LCD_S0
C289 SC1000P50V SI3445DV-U
Layout 40 mil
28 CHARGE_LED#
29 6
52 30 4 5

1
31 2

SCD1U16V
C3
S
32 1

1
33

2
1
34 R304

G
35 C19 C18 200KR2J
53 36 SC1U10V3ZY SC1U10V3KX

-c

3
37

2
38
39 3D3V_S0
40 3D3V_S0
41 D43
U6A

1
54 42 1 2
14

43 U6B R279
TSLCX14-U

14
44 TSLCX14-U S1N4148-U 1KR2
MH2 80211_LED# 2 1 LAN_R_ON 19 R278
3 3
55 46 LCDVDD_ON 3 4 1 2
8 LCDVDD_ON

2
1

12KR2J
7

3
JAE-CON44 R654 D

7
20.F0577.044 100KR2 01/19/2004 1 Q35
VF
2N7002
G
S
2

2
S0/S1 S3 S4 S5 Functions when LID is closed
Power On / Battery Low LED LOW HIGH HIGH HIGH readable
(PWR_LED#)
Sleep / Waking LED HIGH LOW HIGH HIGH (Don't flash during waking) readable
(STDBY_LED#)
Disk Media HDD,ODD access indicator not readable
(MEDIA_LED#)
Charging LED On when charging. not readable
(CHARGE_LED#) Flashing when charging error is occured.
4 Wireless LED On when wireless is On not readable 4
(80211_LED#)
NUM Lock On when Number key is locked not readable Wistron Corporation
(NUM_LED#) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CAPS Lock On when Caps lock is On not readable
(MEDIA_LED#) Title
LCD CONN & INVERTER
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 14 of 39

A B C D E
A B C D E

3D3V_S0 TV3D3V1_S0 TV3D3VA_S0


R16
1 2 3D3V_S0
Layout
40 mil
1

1
0R5J-1 R303
BC15 BC31 BC12 BC13 BC30 BC14 C731 C732 C733 1 2
SCD1U16V SCD1U16V DUMMY-SCD1U16V SCD1U16V SC4D7U10V5ZY SC1000P50V SC1000P50V SC1000P50V
2

2
DUMMY-SCD1U16V 33R5

1
4 SC: Add BC175 BC11 C734 4
1000p for BC176 BC174 SC1000P50V SC1000P50V
EMI SCD1U16V DY-SC22U10V6ZY-U SC22U10V6ZY-U

2
SC: Add
1000p for
3D3V_S0 TV3D3V2_S0 EMI

R300
1 2
0R5J-1

1
BC171 BC172 C735
SCD1U16V SC4D7U10V5ZY SC1000P50V

2
SC: Add
1D5V_S0 TV1D5V_S0 1000p for
EMI

cc
SC: Add
R327 1000p for
1 2 EMI
1

0R5J-1 TV1D5V_S0
BC179 BC177 BC178 C736
SCD1U16V SC1000P50V

1
DUMMY-SCD1U16V SC4D7U10V5ZY
2

R44
10KR2

TV3D3VA_S0 TV3D3V1_S0

2
3 3
TV_VREF TV1D5V_S0
TV3D3V2_S0

1
1

R41
BC32 10KR2

o-
SCD1U16V
2

U14

33

18
44
49
12

45

25
24
23
22
21
20
19
2

9
2
AVDD
AVDD
VDD

NC
NC
NC
NC
NC
NC
NC
NC
NC
DVDD
DVDD
DVDD
DVDDV
TV_D[0..11] 8

3 63 TV_D0
VREF D[0] TV_D1
8 TV_HSYNC 4 62
H D[1] TV_D2
8 TV_VSYNC 5 61
V D[2] TV_D3
7 60
R43 GPIO[1] D[3]
1 2 10KR2 8 59 TV_D4
R42 GPIO[0] D[4]
1 2 10KR2 10 58 TV_D5
AS D[5]
55 TV_D6
D[6]

-c
14 54 TV_D7
8 TV_I2C_DATA SD D[7]
15 53 TV_D8
BC29 8 TV_I2C_CLK SC D[8]
52 TV_D9
D[9]
1 2 TV_XO 8 TV_CLK 57 51 TV_D10
XCLK D[10] DUMMY-R2
8 TV_CLK# 56 50 TV_D11
SC22P50V2JN-1 XCLK# D[11] R15
2

43 36 TV_CVBS1 2
X1 XO CVBS
42 39
XI/FIN CVBS/B
2 XTAL-14D318M 2
7,17,18,19,20,21,23,27,28 PCIRST#_3 13 48 CRMA CRMA 37
RESET# C/HSYNC
1

BC10 82.30005.171 47 38
BCO C/R

1
1 2 TV_XI 46 37
8 TV_STALL P-OUT Y/G

1
TV_ISET 35 R322

SC47P50V2JN
SC22P50V2JN-1 ISET 75R2F C729
VF

2
DGND
DGND
DGND
AGND
AGND
AGND

GND
GND

2
SC: Add
NC
NC
NC
NC
NC
NC
NC

47pF for
1

EMI issue
26
27
28
29
30
31
32

16
17
41

6
11
64

40
34
R302
140R3F CH7011-F
LUMA LUMA 37
2

1
R301

SC47P50V2JN
75 Ohm close to chip 75R2F C730
CH7011 Addresss:

2
2
0X75 AS pull-up (int. pull-up)
0X76 AS pull-down

3D3V_S0

1
Power up default: 1
3,7,8,9,10,13,14,16,17,18,19,20,21,22,24,25,26,27,29,30,31,32,36,38,39 3D3V_S0
NTSC GPIO0 pull-down Wistron Corporation
1D5V_S0 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PAL GPIO0 pull-up (int. pull-up) Taipei Hsien 221, Taiwan, R.O.C.

Title
7,8,9,16,18,27,38,39 1D5V_S0
TV_ENCODER
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 15 of 39

A B C D E
A B C D E

3D3V_S5

HUB INTERFACE LAYOUT


RP2 U49A
HL_[10..0] 7 Route signals with 20 mil space routing. to
USB_OC#2 1 10
2 9 C20 L19 HL_0 others group traces
29 USBP0 USBP0P HI0
USB_OC#0 3 8 USB_OC#1 29 USBN0 D20 L20 HL_1 Signals must match +/- 0.1" of HUB_STB/STB#
USBP1 USBP0N HI1
USB_OC#3 4 7 USB_OC#5 A21 M19 HL_2
TPAD28 TP124 USBP1P HI2 signals.
5 6 USB_OC#4 USBN1 B21 M21 HL_3
TPAD28 TP125 USBP1N HI3 1D5V_S0
USBP2 C18 P19 HL_4

HUBLINK
TPAD28 TP126 USBP2P HI4
SRP10K USBN2 D18 R19 HL_5 Banias/Montara-GM Banias/Odem RDDP

USB_I/F
TPAD28 TP127 USBP2N HI5
26 USBP3 USBP3 A19 T20 HL_6 Checklist Ver.2.0 P.120
USBP3P HI6

1
26 USBN3 USBN3 B19 R20 HL_7
USBP3N HI7 48.7 ohm 1% pull When board
R195
4 29 USBP4 C16 P23 HL_8 4
USBP4P HI8 R492
up to 1D5V_S0 impedance is 55 226R3F
29 USBN4 D16 L22 HL_9
USBP4N HI9 56R2J 1D5V_S0 +/-15% Ohm
USBP5 A17 N22 HL_10 Close to pin
3D3V_S0 TP32 USBN5 USBP5P HI10 HL_11
B17 K21 1 2

SCD1U10V2MX-1
36.5 ohm to GND
USBP5N HI11 R197

1 2
RN58 TP31
TPAD28 1 2 HUB_VSWING

1
1 8 THRM_SDN_EN# TPAD28 USB_OC#0 B15 P21 48D7R3F
29 USB_OC#0 OC0# HI_STB/HI_STBS HL_STB 7
2 7 BAY_PWROFF# USB_OC#1 C14 N20 BC132 R196 BC133
OC1# HI_STB#/HI_STBF HL_STB# 7 147R3F SCD01U16V2KX
3 6 CHKPW USB_OC#2 A15 CLOSE TO PIN with in 0.5"
OC2#

2
4 5 BOOTBLOCK# USB_OC#3 B14 R23
USB_OC#4 OC3# HICOMP 10 mil trace,20 mil space
29 USB_OC#4 A14 R22 HUB_VSWING
OC4# HI_VSWING

2
SRN10K-2 USB_OC#5 D14 M23 HUB_VREF
OC5# HIREF
T21 CLK66_ICH 3 HUB_VREF
3D3V_S0 CLK66

1
35 CHARGE_OFF J20
GPIO32 C399 R194 C400
G22

SCD1U10V2MX-1
R269 27 FWH_WP# GPIO33

1
1 2 EN_HP_OUT F20 A10 TP38 113R3F

LAN I/F
EN_HP_OUT
GPIO34 LAN_RXD0

2
BAY_PWROFF# G20 A9 TP37
TPAD28 R493 SCD01U16V2KX
26 BAY_PWROFF# GPIO35 LAN_RXD1

GPIO
3D3V_S0 10KR2 F21 A11 TP39
TPAD28 10R2
19 RADIO_ON GPIO36 LAN_RXD2

2
R608 PLANARID0 H20 B10 TP36
TPAD28
GPIO37 LAN_TXD0

cc
1 2 ICH_GPIO41 F23 C10 TP113
TPAD28
14 BACKLT_OFF# GPIO38 LAN_TXD1

1 2
PLANARID1 H22 A12 TP41
TPAD28
10KR2 GPIO39 LAN_TXD2 LAN_RSTSYNC TP35
30 THRM_SDN_EN# G23 B11 TPAD28
ICH_GPIO41 GPIO40 LAN_RSTSYNC TP112 BC236
R486 H21 C11 TPAD28 SB: Change
RADIO_ON CHKPW GPIO41 LAN_CLK SC10P50V2JN-1
1 2 F22 TPAD28 R514 and R521
GPIO42

2
BOOTBLOCK# E23 D11 TP115
10KR2 GPIO43 EE_DIN TP116
from 0 ohm to
D10

I/F
EEPROM
EE_CS TPAD28 33R2 for solve
CLK48_ICH F19 C12 TP114
TPAD28
3 CLK48_ICH CLK48 EE_SHCLK
A8 TP40
TPAD28
under voltage
SW2 EE_DOUT R515 33R2
ON OFF TPAD28 1 2 MDC_AC_SYNC 29
B23 C9 ICH_AC_SYNC R514 1 2 33R2
AC_SYNC 24
CHKPW USBRBIAS# AC_SYNC R521 33R2
4 1 D9 ICH_AC_DOUT 1 2

I/F
AC'97
3 3
AC_SDOUT AC_SDATA_DOUT 24
3 2 BOOTBLOCK# A23 B8 R520 1 2 33R2
USBRBIAS AC_BIT_CLK ICH_AC_BITCLK 24 MDC_AC_DOUT 29
C13 AC_RST#
AC_RST#
1

D13 3D3V_S0
AC_SDIN0 AC_SDATA_IN0 24
HDS402E R489 A13 R518 1 2 0R2-0
18D2R3F AC_SDIN1 AC_DIN1 29 CODEC_AC_RST# 24
B13 ICH_AC_DIN2 R519 1 2 0R2-0

o-
AC_SDIN2 MDC_AC_RST# 29
TP111

1
TPAD28
2

SW1-4 SW2-3 ICH4-M-U R516 Place these resistor near R517


C419 DUMMY-R2 AC_SDATA_DOUT1 2
CHKPW Place R220 near S/B DUMMY-C2 S/B as possible
ENABLE ON X DUMMY-1KR3
1 2

2
BOOTBLOCK
ENABLE X ON
PIDE_D[0..15] 26
PIDE_A[0..2] 26
U49E RESERVED FOR VERSION DETECTION
SIDE_D[0..15] 26
3D3V_S0
SIDE_A[0..2] 26
PIDE_D15 Y11 Y17 SIDE_D15
PIDE_D14 PDD15 SDD15
W11 AA17 SIDE_D14
R507 4K7R2 PIDE_D13 PDD14 SDD14
W10 Y16 SIDE_D13
PDD13 SDD13

-c

1
1 2 SIDE_DACK# PIDE_D12 AB10 AB16 SIDE_D12
3D3V_S0 PDD12 SDD12

1
PIDE_D11 W9 Y15 SIDE_D11
1 2 PIDE_DACK# PIDE_D10 AC9
PDD11 SDD11
AA15 SIDE_D10 R503 R488 Planar ID(1,0)
PIDE_D9 PDD10 SDD10 SIDE_D9 10KR2 DUMMY-10KR2
ICH4 Integrated Pull-up and Pull-down Resistors Y9 AC15 SA: 0, 0
R523 4K7R2 PIDE_D8 PDD9 SDD9 SIDE_D8
AB9 Y14
PDD8 SDD8

2
PIDE_D7 AA8 AA14 SIDE_D7 SB: 0, 1
PDD7 SDD7

2
PIDE_D6 Y8 W14 SIDE_D6 PLANARID0
PDD6 SDD6
PIDE_D5 AB8
PDD5 SDD5
AB15 SIDE_D5 PLANARID1 SC: 1, 0
EE_DIN, EE_DOUT, PME#, PWRBTN# PIDE_D4 AA7 W15 SIDE_D4
2
PIDE_D3 PDD4 SDD4 SIDE_D3 -1: 1, 1 2
AA10 AC16
PDD3 SDD3

1
GNT[B:A]#/GNT[5]#/GPIO[17:16], ICH4 internal 20K pull-ups PIDE_D2 Y10 W16 SIDE_D2
PIDE_D1 PDD2 SDD2 SIDE_D1 R504 R487
AC11 AB17
PDD1 SDD1 SIDE_D0 DUMMY-10KR2 10KR2
LAD[3:0]#/FWH[3:0]#, LDRQ[1:0], PIDE_D0 AB11 W17
PDD0 SDD0
VF

2
LAN_RXD[2:0] ICH4 internal 10K pull-ups 26 PIDE_IOW# W12 AA18 SIDE_IOW# 26
PDIOW# SDIOW#
26 PIDE_DACK# Y12 AB19 SIDE_DACK# 26
PDDACK# SDDACK#
26 PIDE_DREQ AA11 AB18 SIDE_DREQ 26
PDDREQ SDDREQ
AC_BITCLK, AC_RST#, AC_SDIN[2:0], ICH4 internal 20K pull-downs 26 PIDE_IOR# AC12 Y18 SIDE_IOR# 26
PDIOR# SDIOR#
26 PIDE_IORDY AB12 AC19 SIDE_IORDY 26
PIORDY SIORDY
AC_SDOUT, AC_SYNC, DPRSLPVR, SPKR
R527 R219
3D3V_S0 1 2 PIDE_A0 AA13 AA20 SIDE_A0 1 2 3D3V_S0
PDA0 SDA0
USB[5:0][P,N] ICH4 internal 15K pull-downs PIDE_A1 AB13 AC20 SIDE_A1
4K7R2 PDA1 SDA1 4K7R2
PIDE_A2 W13 AC21 SIDE_A2
PDA2 SDA2
PDD[7]/SDD[7], PDDREQ / SDDREQ ICH4 internal 11.5K pull-downs
26 PIDE_CS1# Y13 AB21 SIDE_CS1# 26
PDCS1# SDCS1#
26 PIDE_CS3# AB14 AC22 SIDE_CS3# 26
PDCS3# SDCS3#
LANCLK ICH4 internal 100K pull-downs
AC13 PIDE_IRQ14 26
IRQ14
AA19 SIDE_IRQ15 26
IRQ15
ICH4 IDE Integrated Series Termination Resistors
ICH4-M-U

PDD[15:0],SDD[15:0],PDIOW#,SDIOW#,
1 1
PDIOR#,PDIOW#,PDREQ,SDREQ, R592 4K7R2 3D3V_S0
approximately 33 ohm 3D3V_S0 1 2 PIDE_IOW# RN59
PDDACK#, SDDACK#, PIORDY,SIORDY, 2 3 PIDE_IRQ14 Wistron Corporation
1 2 PIDE_IOR# 1 4 SIDE_IRQ15 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PDA[2:0],SDA[2:0], PDCS1#,SDCS1#, Taipei Hsien 221, Taiwan, R.O.C.
R593 4K7R2 SRN8K2J
PDCS3#,SDCS3#,IRQ14,IRQ15, R594 4K7R2 Title
1 2 SIDE_IOW#
3D3V_S0 ICH4-M (1 of 3)
1 2 SIDE_IOR# Size Document Number Rev
A3 SC
R595 4K7R2 MOLOKAI
Date: Thursday, April 15, 2004 Sheet 16 of 39

A B C D E
A B C D E

PCI/Interrupt I/F Pullups


3D3V_S0
RN65 RN66
PCI_AD[31..0] 19,21,23 RTC Circuitry
PCI_STOP# 1 8 1 8 PCI_PLOCK# PCI_C/BE#[3..0] 19,21,23
PCI_TRDY# 2 7 2 7 PCI_DEVSEL# VCC_RTC_S5 3D3V_AUX 3D3V_RTC
PCI_FRAME# 3 6 3 6 PCI_PERR# U49D
PCI_SERR# 4 5 4 5 PCI_IRDY#

1
PIRQA# D5 P4 PCI_AD31
PIRQA# AD31 D25
SRN8K2-U SRN8K2-U 21 PIRQB# C2 D2 PCI_AD30
PIRQB# AD30
21 PIRQC# B4 R1 PCI_AD29
PIRQC# AD29 RB751V-40-U

1
23 PIRQD# A3 D3 PCI_AD28
3D3V_S0 PIRQD# AD28 BC53
19 PIRQE# C8 P2 PCI_AD27
PIRQE#/GPIO2 AD27

2
D7 E1 PCI_AD26 SC1U10V3KX
21 PIRQF# PIRQF#/GPIO3 AD26

2
4 C3 P1 PCI_AD25 4
19 PIRQG# PIRQG#/GPIO4 AD25

1
RN62 RN63 ICH_GPIO5 C4 E2 PCI_AD24
PCI_REQA# PIRQA# PIRQH#/GPIO5 AD24 BC155 RTC1
1 8 1 8 M5 PCI_AD23
PCI_REQ#0 AD23 SC1U10V3KX
PIRQF# 2 7 2 7 23 PCI_REQ#4 B6 E4 PCI_AD22
REQ4# AD22

2
PIRQC# 3 6 3 6 PCI_REQ#1 PCI_REQ#3 C7 N3 PCI_AD21 5
PIRQD# PCI_REQ#2 PCI_REQ#2 REQ3# AD21
4 5 4 5 B3 E3 PCI_AD20
REQ2# AD20
21 PCI_REQ#1 A2 N2 PCI_AD19 R199 D26 R68
REQ1# AD19
SRN8K2-U SRN8K2-U 19 PCI_REQ#0 B1
REQ0# AD18
E5 PCI_AD18 LAYOUT: RTCRST# 1 2 2 1 1 2 RTBAT 1
PCI_REQB# A6 N1 PCI_AD17 MAKE PAD 2
3D3V_S0 REQB#/REQ5#/GPIO1 AD17 180KR2 1KR2
PCI_REQA# B5 F4 PCI_AD16 3
REQA#/GPIO0 AD16 ACCESSABLE RB751V-40-U
F5 PCI_AD15
AD15

2
RN64 RN60 23 PCI_GNT#4 D6 L3 PCI_AD14
GNT4# AD14

1
PCIRST#_3 1 8 1 8 PIRQE# TPAD28 TP110 PCI_GNT#3 B7 H2 PCI_AD13 GP1 4
PIRQG# TPAD28 TP109 PCI_GNT#2 GNT3# AD13 BC136
2 7 2 7 PCI_REQB# A7 L2 PCI_AD12
GNT2# AD12 GAP-OPEN SCD1U10V2MX-1
PCI_SERIRQ 3 6 3 6 PCI_REQ#3 21 PCI_GNT#1 E6 G4 PCI_AD11
GNT1# AD11

2
PIRQB# 4 5 4 5 PCI_REQ#4 C1 L1 PCI_AD10 RTCRST# RTCRST# delay SCON3
19 PCI_GNT#0 GNT0# AD10

1
PCI_GNTB# C5 G2 PCI_AD9 21.D0010.103
PCI_GNTA# GNTB#/GNT5#/GPIO17 AD9 18~25ms
SRN8K2-U SRN8K2-U E8 K2 PCI_AD8
GNTA#/GPIO16 AD8 ICH_VBIAS BC146
J5 PCI_AD7

cc
AD7
19,21,23 PCI_FRAME# F1 H4 PCI_AD6
FRAME# AD6
19,21,23 PCI_IRDY# L5 J4 PCI_AD5 ICH_VBIAS
IRDY# AD5
19,21,23 PCI_TRDY# F2 G5 PCI_AD4
TRDY# AD4

1
M3 K1 PCI_AD3 SCD047U25V3KX
19,21,23 PCI_DEVSEL# DEVSEL# AD3
F3 H3 PCI_AD2 R233
19,21,23 PCI_STOP# STOP# AD2
ICH_PME# G1 J3 PCI_AD1 10MR2J
19,21,23 PCI_PAR PAR AD1
Internal 19,21,23 PCI_PERR# L4 H5 PCI_AD0
PERR# AD0
Pull-up 21 PCI_PLOCK# PCI_PLOCK# M2 BC156
PLOCK#

2
19,21,23 PCI_SERR# K5 N4 PCI_C/BE#3 RTCX1 1 2
3D3V_S0 ICH_PME# SERR# C/BE3#
19,21,23 ICH_PME# W2 M4 PCI_C/BE#2
PME# C/BE2# RTCX2 SC12P50V2JN-1
7,15,18,19,20,21,23,27,28 PCIRST#_3 U5 K4 PCI_C/BE#1
R539 1 PCIRST# C/BE1#
3 2 8K2R2 ICH_GPIO5 3 CLKPCIF_ICH CLKPCIF_ICH P5 J2 PCI_C/BE#0 3
R540 1 PCICLK C/BE0#
2 8K2R2 PM_THRM#

3
R522 ICH4-M-U R234
10R2 10MR2J X4
3D3V_S5 3D3V_S5

o-
X-32D768KHZ-12-U
BIOS NOTE:
SC10P50V2JN-1

RN68
1 2

2
4 1 BATLOW#
SYS_RESET# BC264
BIOS should disable PM_STPCPU# on CK_Titan.
3 2
(Use H_DPSLP# instead)
SRN10KJ U49B BC154
2

1
3D3V_S0 1 2
RN69 J19 R2 R541
APICCLK AGPBUSY#/GPIO6 AGPBUSY# 7 10KR2
4 1 PCI_CLKRUN# R506 10KR2 H19 R3 SC12P50V2JN-1
APICD0 GPIO7 ECSMI 28
3 2 AGPBUSY# 1 2 K20 V4
APICD1 GPIO8 ECSWI 28

2
SRN10KJ TP92 V23 V5 R165
5 CC_STPCLK# STPCLK# GPIO12 ECSCI 28
1 2 MUTE TPAD28 AB23 W3 BAY_PWROK# 1 2 PM_SLP_S1#
5 CC_A20M# A20M# GPIO13 BAY_PWROK# 26 PM_SLP_S1# 3
5 CC_CPUSLP# U21
DUMMY-10KR2 CPUSLP# 0R2-0 3D3V_S5
5,7 CC_CPUPWRGD Y23 Y21 PM_STPPCI# 3
R494 1 CPUPWRGD STP_PCI#/GPIO18
2 100KR2 VGATE VCC_IO_S0
5 CC_INTR AB22 W18 PM_SLP_S1#_G U41
INTR SLP_S1#/GPIO19

-c
R526 1 2 100KR2 RSMRST# V21 W19 PM_SLP_S1#_G 1 5
5 CC_NMI NMI STP_CPU#/GPIO20 PM_STPCPU# 3,32 A VCC
1

W23 T3 PM_C3_STAT# TPAD28


5 CC_SMI# SMI# C3_STAT#/GPIO21 TP119
R496 W21 Y20 PM_CPUPERF# TPAD28 PM_SLP_S3# 2
5 CC_IGNNE# IGNEE# CPUPERF#/GPIO22 TP93 B
56R2J Y22 J21 ICH_GMUXSEL# TPAD28 BC134
28 ICH_A20GATE A20GATE SSMUXSEL/GPIO23 TP91 DUMMY-SCD1U16V3KX
R495 U22 AC2 PCI_CLKRUN# 3 4
28 RCIN# RCIN# CLKRUN#/GPIO24 PCI_CLKRUN# 19,21,23 GND Y
TP117 PCI_GNTA# 1 2 AA21 V2 EXT_POR_L
5 CC_FERR# FERR# GPIO25 EXT_POR_L 23
2

TPAD28 56R2J V22 W1 DUMMY-NC7SZ08-U


5,27 CC_INIT# INIT# GPIO27 MUTE 25
TP118 PCI_GNTB# W4 PWR_LED# R673 1 2 0R2-0
GPIO28 PWR_STBY_LED# 14
TPAD28 19,21,28 PCI_SERIRQ J22 01/30/04
2 SERIRQ 2
Y4 PM_SLP_S3# 24,30,33,34,36
SLP_S3#
27,28 LPC_LFRAME# T5 Y2 PM_SLP_S4# 28,31,34,35,36
LFRAME#/FWH4 SLP_S4#
LPC_LDRQ0# U3 AA2 PM_SLP_S5# TP122
LDRQ0# SLP_S5#
VCC_RTC_S5 TPAD28 TP121 LPC_LDRQ1# U4 Y1 ICH_RI# R543 1 2 10KR2 3D3V_S5
TPAD28 3D3V_S5 5V_S0 3D3V_S0
TPAD28 TP120 LDRQ1# RI#
AA1 SB_PWRBTN# 31
PWRBTN#
VF
LPC_LAD0 T2 Y3 SYS_RESET# R542
LAD0/FWH0 SYS_RESET#
27,28 LPC_LAD[3..0] LPC_LAD1 R4 Y5 1 2
LAD1/FWH1 LAN_RST#
1

LPC_LAD2 T4 AB2 BATLOW#


R525 LAD2/FWH2 BATLOW#/TP0 10KR2
LPC_LAD3 U2 AB3 PM_SUS_STAT# PM_SUS_STAT# 28
LAD3/FWH3 SUS_STAT#/LPCPD#

1
V19 VGATE 32
100KR2 VGATE/VRMPWRGD R528
8,30 PM_SUS_CLK AA4 W20 THRMTRIP#
SUSCLK THRMTRIP#

3
4

3
4
V1 PM_THRM# 0R2-0
THRM# PM_THRM# 8,30
2

W6 RN61 RN27
RTCRST# INTRUDER# SRN10KJ
W7 AC3
RTCRST# SMLINK0

2
AB6 AB1 SRN4D7KJ
25,30 G768D_PWROK PWROK SMLINK1
30 RSMRST# AA6 AB4 SMBD_SB
RSMRST# SMBDATA
AB5 AC4 SMBC_SB
VCCRTC SMBCLK

2
1

2
1
1
S5 VCC_RTC_S5 ICH_VBIAS Y6 AA5 SMB_ALERT# Q49

G
VBIAS SMBALERT#/GPIO11
OK RTCX1 AC7
RTCX1
RTCX2 AC6 H23 SB_SPKR SB_SPKR 25 SMBC_SB 3 2 SMBC_ICH 3,10
RTCX2 SPKR

1
2N7002

G
V20 J23 CLK14_ICH Q48

S
D
32 DPRSLPVR DPRSLPVR CLK14 CLK14_ICH 3
CC_DPSLP# U23 SMBD_SB 3 2
5,7 CC_DPSLP# DPSLP# SMBD_ICH 3,10
2N7002

S
D
ICH4-M-U R491
Should go high no sooner than 10mS CLK termination DUMMY-33R2
after both +3VRUN and +1.5VRUN If ICH-4 LAN not used,10K ohm
close to ICH4 3D3V_S5

1 2
have reach their nominal voltage PD
1 1
or connect directly to R524
Should go high no sooner than 10mS VCC_IO_S0 BC233 SMB_ALERT# 1 2
----RSMRST#(SUSPWROK)
DUMMY-SC10P50V2JN-1
after both +3VSUS and +1.5VSUS Wistron Corporation
2

But in Bon conncet to 10KR2


2

have reach their nominal voltage 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PWROK(DELAY_IMVP_PWRGD)
R497
H/W Strapping 3D3V_S0 Taipei Hsien 221, Taiwan, R.O.C.
56R2J R490
SB_SPKR 1 2 Title
R498 ICH4-M (2 of 3)
1

THRMTRIP# 1 2 DUMMY-1KR2
PM_THERMTRIP# 5
Stuff for No Reboot Size Document Number Rev
56R2J Custom SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 17 of 39

A B C D E
A B C D E

3D3V_S0

1
U49C
BC269 BC265 BC252 BC247 BC147 BC168
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V5ZY SC4D7U10V5ZY A5 B22
VCC3_3 VSS

2
B2 AC23
VCC3_3 VSS
H6 AC18
VCC3_3 VSS
4 J1 AC14 4
VCC3_3 VSS
K6 AC10
VCC3_3 VSS
M10 AC5
VCC3_3 VSS
P6 AC1
VCC3_3 VSS

1
U1 AB20
BC270 BC259 BC263 VCC3_3 528mA VSS
P12 AB7
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 VCC3_3 VSS
V10 AA22
VCC3_3 VSS

2
V16 AA16
VCC3_3 VSS
V18 AA12
3D3V_S5 VCC3_3 VSS
AC8 AA9
VCC3_3 VSS
AC17 AA3
VCC3_3 VSS
H18 Y19
VCC3_3 VSS
J18 Y7
VCC3_3 VSS

1
W22
C404 BC245 BC246 VSS
E9 W8
SC4D7U10V5ZY SCD1U10V2MX-1 SCD1U10V2MX-1 VCCLAN3_3/VCCSUS3_3 VSS
F9 9.2mA W5
VCCLAN3_3/VCCSUS3_3 VSS

2
E11 M20
VCCSUS3_3 VSS
F10 V17
VCCSUS3_3 VSS

cc
3D3V_S5 V9 V15
VCCSUS3_3 VSS
V8 V3
VCCSUS3_3 VSS
V7 T23
VCCSUS3_3 VSS
F15 P20
VCCSUS3_3 165mA VSS

1
F16 T19
BC255 BC254 BC267 BC258 VCCSUS3_3 VSS
F17 T1
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V5ZY VCCSUS3_3 VSS
F18 R21
VCCSUS3_3 VSS

2
K14 R18
VCCSUS3_3 VSS
R5
1D5V_S0 VSS
K10 P22
VCC1_5 VSS
K12 P13
VCC1_5 VSS
3 K18 P11 3
VCC1_5 VSS
1

1
K22 P3
C405 C401 C420 BC261 BC260 C406 C408 C407 BC262 VCC1_5 VSS
P10 N23
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V5ZY VCC1_5 550mA VSS
T18 N21
1D5V_S0 VCC1_5 VSS
2

2
V14 N19
VCC1_5 VSS
U19 N14

o-
VCC1_5 VSS
L23 N13
VCCHI VSS
M14 N12
VCCHI VSS

1
P18 N11
*Within a given well, 5VREF needs to be up before the
5V_S0 C398 BC250 BC248 BC122 VCCHI 99mA VSS
T22 N10
corresponding 3.3V rail SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V5ZY VCCHI VSS
N5
VSS

2
F6 M13
VCCLAN1_5/VCCSUS1_5 VSS

1
F7 15.5mA M12
D40 1D5V_S5 VCCLAN1_5/VCCSUS1_5 VSS
E12 M11
VCCSUS1_5 VSS
R6 M1
3D3V_S0 RB751V-40-U VCCSUS1_5 VSS
T6 M22
VCCSUS1_5 VSS
U6 L21
VCCSUS1_5 VSS

1 2

1
G18 L14
VCCSUS1_5 67.5mA VSS
1

BC243 BC268 BC257 BC256 BC130 E13 L13


D41 R512 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V5ZY VCCSUS1_5 VSS
F14 L12
VCCSUS1_5 VSS

-c 2

2
1KR2 E20 L11
RB751V-40-U VCCSUS1_5 VSS
L10
VSS
E7 K23
V5REF VSS
2

2 V5REF_RUN V6
V5REF VSS
U20
K19
VSS
1

V5REF_SUS E15 K13


BC266 BC253 V5REF_SUS VSS
K11
SCD1U10V2MX-1 SC1U10V3ZY VSS
P14 K3
V_CPU_IO VSS
2

U18 2.5mA J6
2 V_CPU_IO VSS 2
AA23 H1
V_CPU_IO VSS
G21
3D3V_S5 5V_S5 VSS
C22 G19
VCCPLL VSS
G6
VSS
G3
VF
VSS
1

D1 F8
D29 R513 VSS VSS
C23 E22
1KR2 VSS VSS
C21 E21
RB751V-40-U VSS VSS
C19 E19
VSS VSS
C17 E18
VCC_IO_S0 VSS VSS
2

C15 E17
VSS VSS
C6 E16
VSS VSS
1

D22 E14
BC244 BC241 VSS VSS
B20 E10
VSS VSS
1

1
SCD1U10V2MX-1 SC1U10V3ZY B18 D23
VSS VSS
2

BC251 BC249 BC135 B16 D21


SCD1U10V2MX-1 SCD1U10V2MX-1SC1U10V3ZY VSS VSS
B12 D19
VSS VSS
2

2
B9 D17
VSS VSS
A22 D15
VSS VSS
A20 D12
VSS VSS
A18 D8
1D5V_S0 VSS VSS
A16 D4
VSS VSS
A4
5V_S0 VSS
A1
U25C VSS
1
14

10

BC235 BC234 ICH4-M-U


R392 SCD1U10V2MX-1 SC1U10V3ZY
2

,23,27,28
1 PCIRST#_3 PCIRST#_3 9 8 1 2 RSTDRV#_5 26 1

33R2
TSAHCT125 Wistron Corporation
7

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
PCIRST#_3 3V to 5V level shift for HDD & CDROM ICH4-M (3 of 3)
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 18 of 39

A B C D E
A B C D E

Mini PCI
1 802.11B/G 5V_S0 3D3V_S0
1

DUMMY-SC4D7U10V5ZY

1
BC165 BC138
BC153 BC166 BC137 BC159 BC226 BC164
DUMMY-SC4D7U10V5ZY SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V

2
125
CN13

1 2 RN73
PCI_AD[0..31] 17,21,23 LED_WLAN24_ON 2 3
3 4 PIN 3-16 : LAN RESERVE LED_WLAN5_ON 1 4
5 6 3D3V_S0

cc
7 8 SRN100KJ
9 10 U87
11 12 LED_WLAN24_ON 1 5
A VCC
16 RADIO_ON RADIO_ON 13 14 LED_WLAN5_ON 2 01/27/2004
B
15 16 3 4 LAN_R_ON 14
3D3V_S0 GND Y
17 PIRQG# 17 18
19 20 PIRQE# 17 NC7SZ32-U
21 22 01/19/2004
23 24
3 PCLK_MINI 25 26 PCIRST#_3 7,15,17,18,20,21,23,27,28
27 28 3D3V_S0
2
17 PCI_REQ#0 29 30 PCI_GNT#0 17
2
31 32
PCI_AD31 33 34 ICH_PME# ICH_PME# 17,21,23
1

PCI_AD29 35 36
R245 37 38 PCI_AD30
DUMMY-10R2 PCI_AD27 39 40

o-
PCI_AD25 41 42 PCI_AD28
43 44 PCI_AD26
2

45 46 PCI_AD24 R232
17,21,23 PCI_C/BE#3
PCI_AD23 47 48 MOD_IDSEL 1 2 PCI_AD17
DUMMY-SC10P50V2JN-1

49 50
1

PCI_AD21 51 52 PCI_AD22 10R2


C240

PCI_AD19 53 54 PCI_AD20
55 56 PCI_PAR 17,21,23
2

PCI_AD17 57 58 PCI_AD18
17,21,23 PCI_C/BE#2 59 60 PCI_AD16
17,21,23 PCI_IRDY# 61 62
63 64 PCI_FRAME# 17,21,23
17,21,23 PCI_CLKRUN# 65 66 PCI_TRDY# 17,21,23
17,21,23 PCI_SERR# 67 68 PCI_STOP# 17,21,23

-c
SB: for SIV pass 69 70
17,21,23 PCI_PERR# 71 72 PCI_DEVSEL# 17,21,23
17,21,23 PCI_C/BE#1 73 74
PCI_AD14 75 76 PCI_AD15
77 78 PCI_AD13
PCI_AD12 79 80 PCI_AD11
PCI_AD10 81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_C/BE#0 PCI_C/BE#0 17,21,23
3 3
PCI_AD7 87 88
89 90 PCI_AD6
PCI_AD5 91 92 PCI_AD4
5V_S0 93 94 PCI_AD2
PCI_AD3 95 96 PCI_AD0
VF
97 98 (VCC)
PCI_AD1 99 100 PCI_SERIRQ 17,21,28
101 102
103 104 (M66EN)
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124

MODEM124P-1
126

4 4

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Mini PCI Socket
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 19 of 39

A B C D E
5V_S0

1
BC125

PCMCIA socket C196


SCD1U16V SC4D7U10V5ZY

2
A_CC/BE#[3..0] 21
CN5 U39

21 CB_DATA 3 9 A_SKT_VCC_S0
DATA AVCC
21 CB_CLOCK 4 10
CLOCK AVCC
69 A_CAD[31..0] 21 21 CB_LATCH 5
LATCH
7,15,17,18,19,21,23,27,28 PCIRST#_3 12
RESET#
1 1 2 21 8 A_SKT_VPP_S0
3D3V_S0 SHDN# AVPP
35 R152 10KR2
2 A_CAD0 3D3V_S0 13 15
A_CCD1#_C 3.3V OC#
36
3 A_CAD1
37 A_CAD2 1
5V

1
4 A_CAD3 SKT1 2 24
C205 BC120 5V NC
38 A_CAD4 1 2 23
SCD1U16V SC4D7U10V5ZY NC
5 A_CAD5 22
NC

2
39 A_CAD6 3 4 7 19
12V NC
6 A_CAD7 20 18
12V NC

cc
40 CARDBUS-SKT45 17
A_RSVD_D14 21 NC
7 A_CC/BE#0 21.H0080.001 16
NC
41 A_CAD8 11 14
GND NC
8 A_CAD9 25 6
GND NC
42 A_CAD10
9 A_CAD11
43 TSP2220A
A_CVS1 21
10 A_CAD12
44 A_CAD13
11 A_CAD14
45 A_CAD15
12 A_CC/BE#1
46 A_CAD16
13 A_CPAR 21
47 A_RSVD_A18 21
14 A_CPERR# 21
48

o-
A_CBLOCK# 21
15 A_CGNT# 21
49 A_CSTOP# 21
16 A_CINT# 21
50 A_SKT_VPP_S0 3D3V_S0
A_CDEVSEL# 21
17 A_SKT_VCC_S0 R17810KR2
51 Proto1:
18 A_SKT_VPP_S0 change to 1 2 CB_DATA

1
52 0402 size

1
19 A_CCLK 21 1 2 CB_LATCH
53 C418 C197 R153 R179 10KR2
A_CTRDY# 21 SCD1U16V
20 SCD1U16V 100KR2
A_CIRDY# 21

2
54 A_CFRAME# 21

2
21 A_CC/BE#2
55 A_CAD17

-c
22 A_CAD18 A_SKT_VCC_S0
56 A_CAD19
23 A_CAD20
57 A_CVS2 21
24 A_CAD21

1
58 A_CRST# 21
25 A_CAD22 BC119 BC240 C417
59 SC22U10V6ZY-U SC1000P50V SCD1U16V 5V_S0
A_CSERR# 21

2
26 A_CAD23 13,14,17,18,19,24,26,28,30,32,34,36,38,39 5V_S0
60 A_CREQ# 21
27 A_CAD24
61 A_CC/BE#3
28 A_CAD25
62
VF
A_CAUDIO 21
29 A_CAD26
63 A_CSTSCHG 21
30 A_CAD27
64 A_CAD28
31 A_CAD29
65 A_CAD30
32 A_RSVD_D2 21
66 A_CAD31
33 3D3V_S0
A_CCLKRUN# 21
67 A_CCD2#_C
3,7,8,9,10,13,14,15,16,17,18,19,21,22,24,25,26,27,29,30,31,32,36,38,39 3D3V_S0
34
68
A_SKT_VCC_S0
70 21 A_SKT_VCC_S0

CARDBUS68P-9
62.10024.491

A_CCD1#_C R485
1 2 A_CCD1# 21
1

22R2 C396
SC220P50V2JN Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
A_CCD2#_C 1 R566 2
A_CCD2# 21
Title
1

22R2
C442 CARDBUS CONN / PWR SW
Size Document Number Rev
SC220P50V2JN
2

A3 SC
MOLOKAI
Date: Wednesday, April 14, 2004 Sheet 20 of 39
A B C D E

3D3V_S0 A_SKT_VCC_S0
3D3V_S0 C232SCD1U16V

1
02/24/2004 1 2
R248 Change from slotB to slotA C231SCD1U16V
U48B 4K7R2 U48D U48C 1 2

1
C425 C254 V1 D19 A4
VCCP VCCB VCCA

2
SCD1U16V SC1U10V3ZY W8 K19 A10
VCCP VCCB VCCA

2
A_CAD[31..0] 20
PCI_AD31 T2 P2 E13 B_CAD31 TP130 E3 A_CAD31
AD31 SUSPEND# B_CAD31/B_D10 TP131 A_CAD31/A_D10
PCI_AD30 P5 A16 B_CAD30 TPAD28 D1 A_CAD30
AD30 R508 1 47KR2 B_CAD30/B_D9 TP132 A_CAD30/A_D9 A_CAD29
PCI_AD29 U1 2 E14 B_CAD29 TPAD28 D2
AD29 B_CAD29/B_D1 TP133 A_CAD29/A_D1 A_CAD28
4 PCI_AD28 U2 M1 CB_DATA 20 B16 B_CAD28 TPAD28 D3 4
AD28 DATA B_CAD28/B_D8 A_CAD28/A_D8
PCI_AD27 T3 L5 CB_CLOCK 20 A17 TPAD28 E5 A_CAD27
AD27 CLOCK B_CAD27/B_D0 TP135 A_CAD27/A_D0
PCI_AD26 P6 M2 CB_LATCH 20 F14 B_CAD26 B3 A_CAD26
AD26 LATCH B_CAD26/B_A0 TP136 A_CAD26/A_A0
PCI_AD25 V2 D17 B_CAD25 TPAD28 A3 A_CAD25
AD25 B_CAD25/B_A1 A_CAD25/A_A1
PCI_AD24 U3 C19 TPAD28 E6 A_CAD24
AD24 B_CAD24/B_A2 TP138 A_CAD24/A_A2
PCI_AD23 W3 F15 B_CAD23 C5 A_CAD23
AD23 B_CAD23/B_A3 TP139 A_CAD23/A_A3
PCI_AD22 U4 L7 CB_SPKR 25 E18 B_CAD22 TPAD28 B5 A_CAD22
AD22 SPKROUT B_CAD22/B_A4 TP140 A_CAD22/A_A4
PCI_AD21 R6 G15 B_CAD21 TPAD28 A5 A_CAD21
AD21 R533 1 43KR3 B_CAD21/B_A5 TP141 A_CAD21/A_A5
PCI_AD20 V4 2 F17 B_CAD20 TPAD28 B6 A_CAD20
AD20 B_CAD20/B_A6 TP83 A_CAD20/A_A6
PCI_AD19 W4 M3 PIRQB# 17 H14 B_CAD19 TPAD28 A6 A_CAD19
AD19 MFUNC0 B_CAD19/B_A25 TP142 A_CAD19/A_A25
PCI_AD18 U5 L6 PIRQC# 17 F19 B_CAD18 TPAD28 C7 A_CAD18
AD18 MFUNC1 B_CAD18/B_A7 TP81 A_CAD18/A_A7
PCI_AD17 N7 N1 PIRQF# 17 H15 B_CAD17 TPAD28 B7 A_CAD17
AD17 MFUNC2 B_CAD17/B_A24 TP87 A_CAD17/A_A24
PCI_AD16 V5 N2 K18 B_CAD16 TPAD28 B10 A_CAD16
AD16 MFUNC3 PCI_SERIRQ 17,19,28 B_CAD16/B_A17 TP143 A_CAD16/A_A17
PCI_AD15 W7 N3 K13 B_CAD15 TPAD28 G10 A_CAD15
AD15 MFUNC4 CB_MFUNC5 PCI_PLOCK# 17 B_CAD15/B_IOWR# A_CAD15/A_IOWR#
PCI_AD14 U8 M5 K14 TPAD28 F10 A_CAD14
AD14 MFUNC5 B_CAD14/B_A9 TP145 A_CAD14/A_A9
PCI_AD13 V8 P1 PCI_CLKRUN# 17,19,23 L17 B_CAD13 C11 A_CAD13
AD13 MFUNC6 B_CAD13/B_IORD# TP27 A_CAD13/A_IORD#
PCI_AD12 N10 L18 B_CAD12 TPAD28 B11 A_CAD12
AD12 B_CAD12/B_A11 TP146 A_CAD12/A_A11
PCI_AD11 R9 L19 B_CAD11 TPAD28 A11 A_CAD11
AD11 B_CAD11/B_OE# A_CAD11/A_OE#

cc
PCI_AD10 V9 3D3V_S0 L15 TPAD28 E11 A_CAD10
AD10 B_CAD10/B_CE2# B_CAD9 TP148 A_CAD10/A_CE2#
PCI_AD9 W9 M18 C12 A_CAD9
PCI_AD8
PCI_AD7
V10
W10
AD9
AD8 CLK_48
L2
R246 10KR2
B_CAD9/B_A10
B_CAD8/B_D15
M19
L13
B_CAD8
B_CAD7
TP149
TPAD28
TP150
CardBus A_CAD9/A_A10
A_CAD8/A_D15
A12
E12
A_CAD8
A_CAD7
TPAD28
PCI_AD6 R10
AD7
AD6
1 2 CardBus B_CAD7/B_D7
B_CAD6/B_D13
N17 B_CAD6 TP151
TPAD28 A A_CAD7/A_D7
A_CAD6/A_D13
B13 A_CAD6
PCI_AD5 W11 N18 B_CAD5 TP152
TPAD28 C13 A_CAD5
PCI_AD4 V11
AD5 B B_CAD5/B_D6
M14 B_CAD4 TP153
TPAD28
A_CAD5/A_D6
B14 A_CAD4
PCI_AD3
PCI_AD2
U11
N11
AD4
AD3
PCI BUS B_CAD4/B_D12
B_CAD3/B_D5
M15
P18
B_CAD3
B_CAD2
TP154
TPAD28
TP155
A_CAD4/A_D12
A_CAD3/A_D5
A14
C14
A_CAD3
A_CAD2
AD2 B_CAD2/B_D11 TPAD28 A_CAD2/A_D11
PCI_AD1 R11 P19 B_CAD1 TP156
TPAD28 F12 A_CAD1
AD1 CLK48_DOT 3 B_CAD1/B_D4 TP157 A_CAD1/A_D4
PCI_AD0 W12 P17 B_CAD0 TPAD28 A15 A_CAD0
AD0 B_CAD0/B_D3 A_CAD0/A_D3

2
3 TPAD28 3
17,19,23 PCI_AD[31..0] A_CC/BE#[3..0] 20
PCI_C/BE#3 W2 R231 D18 B_CC/BE#3 TP158 B4 A_CC/BE#3
C/BE3# B_CC/BE3#/B_REG# TP24 A_CC/BE3#/A_REG#
PCI_C/BE#2 R7 G17 B_CC/BE#2 TPAD28 A7 A_CC/BE#2
C/BE2# DUMMY-R2 B_CC/BE2#/B_A12 TP159 A_CC/BE2#/A_A12
PCI_C/BE#1 P9 K17 B_CC/BE#1 TPAD28 C10 A_CC/BE#1
C/BE1# B_CC/BE1#/B_A8 TP160 A_CC/BE1#/A_A8 A_CC/BE#0
PCI_C/BE#0 U10 M17 B_CC/BE#0 TPAD28 B12
C/BE0# B_CC/BE0#/B_CE1# A_CAUDIO/A_BVD2(SPKR#)

o-
17,19,23 PCI_C/BE#[3..0] TPAD28

2 1
N9 J18 B_CPAR TP26 A9
17,19,23 PCI_PAR PAR B_CPAR/B_A13 A_CPAR/A_A13 A_CPAR 20
TPAD28
W5 C230 G18 B_CFRAME# TP104
17,19,23 PCI_FRAME# FRAME# B_CFRAME#/B_A23
V6 H13 B_CTRDY# TP105
TPAD28 E8
17,19,23 PCI_TRDY# TRDY# DUMMY-C2 B_CTRDY#/B_A22 A_CFRAME#/A_A23 A_CFRAME# 20
U6 G19 B_CIRDY# TP30
TPAD28 C8
17,19,23 PCI_IRDY# IRDY# B_CIRDY#/B_A15 A_CTRDY#/A_A22 A_CTRDY# 20
W6 J15 B_CSTOP# TP29
TPAD28 F9
17,19,23 PCI_STOP# STOP# B_CSTOP#/B_A20 A_CIRDY#/A_A15 A_CIRDY# 20
R532 R8 H18 B_CDEVSEL# TP25
TPAD28 G9
17,19,23 PCI_DEVSEL# DEVSEL# B_SDEVSL#/B_A21 A_CSTOP#/A_A20 A_CSTOP# 20
1

PCI_AD20 1 2 PCI7620_IDSEL V3 02/09/2004 J17 B_CBLOCK# TP85


TPAD28 A8
IDSEL B_CBLOCK#/B_A19 A_CDEVSL#/A_A21 A_CDEVSEL# 20
10R2 TPAD28 B9
A_CBLOCK#/A_A19 A_CBLOCK# 20
U7 J13 B_CPERR# TP106
17,19,23 PCI_PERR# PERR# B_CPERR#/B_A14
V7 B18 B_CSERR# TP161
TPAD28 C9
17,19,23 PCI_SERR# SERR# B_CSERR#/B_WAIT# A_CPERR#/A_A14 A_CPERR# 20
TPAD28 B2 A_CSERR# 20
TP162 A_CSERR#/A_WAIT#
17 PCI_REQ#1 T1 E17 B_CREQ#
REQ# B_CREQ#/B_INPACK#
17 PCI_GNT#1 R2 H19 TPAD28 F6 A_CREQ# 20
GNT# B_CGNT#/B_WE# A_CREQ#/A_INPACK#

-c
E9 A_CGNT# 20
B_CSTSCHG TP164 A_CGNT#/A_WE#
3 PCLK_CBUS R1 A18
PCLK B_CSTSCHG/B_BVD1(STSCHG#/R1#) TP165
7,15,17,18,19,20,23,27,28 PCIRST#_3 P3 B17 B_CCLKRUN# TPAD28 C3 A_CSTSCHG 20
PRST# B_CCLKRUN#(B_WP/IOIS16#) A_CSTSCHG/A_BVD1/(STSCHG#/R1#)
N5 H17 B_CCLK TPAD28 C2 A_CCLKRUN# 20
GRST# B_CCLK/B_A16 TP82 A_CCLKRUN#/A_WP/(IOIS16#) BCCLK1
B8 2 A_CCLK 20
B_CINT# TP166 A_CCLK/A_A16 R511 22R2
B19 TPAD28
B_CINT#/B_READY/(IREQ#)
17,19,23 ICH_PME# R3 TPAD28 A2 A_CINT# 20
RI_OUT#/PME# TP167 A_CINT#/A_READY/(IREQ#)
E19 B_CRST#
B_CRST#/B_RESET
TPAD28 C6 A_CRST# 20
2 A_CRST#/A_RESET 2
1

PCI7420GHK-U C17 B_CAUDIO TP168


R247 B_CAUDIO/B_BVD2/(SPKR#)
TPAD28 B1 A_CAUDIO 20
3D3V_S0 10R2 B_CCD1# TP169 A_CAUDIO/A_DVD2/SPKR#
N15
A_SKT_VCC_S0 B_CCD1#/B_CD1# TP170
02/09/2004- C16 B_CCD2# TPAD28 B15 A_CCD1# 20
U48A B_CCD2#/B_CD2# TP171 A_CCD1#/A_CD1#
C18 B_CVS1 TPAD28 C1
VF
Change to 71.07420.00U A_CCD2# 20
B_CVS1/B_VS1# A_CCD2#/A_CD2#
2

F18 B_CVS2 TP172


TPAD28 C4
B_CVS2/B_VS2# A_CVS1/A_VS1# A_CVS1 20
G7 E7
SC10P50V2JN-1

VCC TPAD28 A_CVS2/A_VS2# A_CVS2 20


1

G8 N19 B_RSVD_D14 TP28


VCC B_RSVD/B_D14
1

G11 R510 C15 B_RSVD_D2 TP102 A13


C241

VCC B_RSVD/B_D2 TPAD28 A_RSVD/A_D14 A_RSVD_D14 20


G12 DUMMY-10KR2 K15 B_RSVD_A18 TP107
TPAD28 F5
VCC B_RSVD/B_A18 A_RSVD/A_D2 A_RSVD_D2 20
G13 TPAD28 E10 A_RSVD_A18 20
VCC A_RSVD/A_A18
2

H10
VCC
2

H12 A_CREQ# PCI7420GHK-U


VCC PCI7420GHK-U
J8
VCC
K8
VCC A_SKT_VCC_S0
K12
VCC
M7
VCC
M11 1.8V Output from internal voltage regulator 20 A_SKT_VCC_S0
VCC 3D3V_S0
M13 K5
VCC VR_PORT 3D3V_S0
N8 J19
DUMMY-SC4D7U10V5ZY

SC4D7U10V5ZY
VCC VR_PORT
U9 3,7,8,9,10,13,14,15,16,17,18,19,20,22,24,25,26,27,29,30,31,32,36,38,39 3D3V_S0
GND

1
M10 C244 C228
GND U48E C431 C415 C416 C426 C414
M9
GND
M8 L1 R509
GND VR_EN#

2
L12 K7 1 2
GND SCL 220R2J SC1U10V3ZY SCD1U16V SCD1U16V
L11
GND SCD1U16V SCD1U16V
L10 R243
GND U48F
2

1 L9 1
GND R244 C233
L8 L3 1 2
GND C229 SDA 220R2J
K11 M12 H5
K10
GND
GND
0R2-0 SC1U10V3ZY SC1U10V3ZY N13
NC
NC
RSVD
RSVD
J5 Wistron Corporation
K9 PCI7420GHK-U R14 J6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GND NC RSVD
1

J12 U16 K1 Taipei Hsien 221, Taiwan, R.O.C.


GND NC RSVD
J11 P14 K2
GND NC RSVD Title
J10 DON'T SUPPORT ROM FUNCTION PULL DOWN 220OHM P15 K3
GND NC RSVD
J9 Internal voltage regulator enable R19
H11
GND TEST0 CARDBUS /PCI7420
GND Size Document Number Rev
H9
GND A3
H8 PCI7420GHK-U SC
GND MOLOKAI
Date: Thursday, April 15, 2004 Sheet 21 of 39

A
PCI7420GHK-U B C D E
A B C D E

3D3V_S0
3,7,8,9,10,13,14,15,16,17,18,19,20,21,24,25,26,27,29,30,31,32,36,38,39 3D3V_S0
U48H

F3 1394_AVDD
MC_PWR_CTRL_1
F2 1394_PWR_CLASS_ID0 3D3V_S0
MS_BS R267
G2 1394_PWR_CLASS_ID1
MS_DATA1
G1 1394_PWR_CLASS_ID2 1 2
MS_SDIO(DATA0) U48G 0R5J-1
G3
MS_DATA2

1
E1 R563 R564
MC_CD_1# R565 C427 C429 C430 C256
H7 R12
MS_DATA3 AVD2 SCD1U16V SCD1U16V SCD1U16V SC4D7U10V5ZY
4 G5 U15 4
MS_CLK 220R2J AVD3

2
220R2J 220R2J V17
AVD4 R536 6K34R3F
U19
VDPLL

1
PCI7420GHK-U W15 1 2
R0
V15
R1
U14 TPBIAS0
U48I TPBIAS0
SB: 2004/03/09 V14 TPA0P
TPA0+
F1 please put near W14 TPA0N
MC_PWR_CTRL_0 TPA0-
J2 SD_DATA3
SD_DAT3 U48
3D3V_S0
H2 SD_CMD V13 TPB0P
SD_CMD R679 TPB0+
W13 TPB0N
SD_CLK1 TPB0- R535 4K7R2
H1 SD_CLK 1 2
SD_CLK
R17 1 2
56R2J PHY_TEST_MA
H3 SD_DATA0
SD_DAT0
J1 SD_DATA2 U17 1 2
SD_DAT2 FILTER0 C428 SCD1U16V
J7 SD_DATA1
SD_DAT1

cc
E2 MC_CD_0# U18
MC_CD_0# FILTER1 R534 4K7R2
J3 SD_WP P12 1 2
SD_WP CPS R537 4K7R2
R18 1 2
CNA C243
PCI7420GHK-U
T19 1394_XO 1 2
XO
SC30P50V2JN

2
X6
T18
3 XI 3
N12 1394_PWR_CLASS_ID0 X-24D576MHZ-19
For SD/MS Card Power PC0

1
U12 1394_PWR_CLASS_ID1
PC1 C242
V12 1394_PWR_CLASS_ID2
PC2
1394_XI 1 2
U45 3D3V_S0 3D3V_CARD_S0 T17

o-
VSPLL Close to pin SC30P50V2JN
U13
AGN2
SB==>02/20/2004,Del U51 2 5 R13
GND IN AGN3
3 W17
NC AGN4
MC_PWR_CTRL_0 4 1
ON/OFF# OUT
V19
AAT4250-U 20mil C253 TPBIAS1
1

SC1U10V3ZY V18 TPA1P_F TP123


C218 TPA1+ TP43
W18 TPA1N_F TPAD28
SCD1U16V TPA1-
TPAD28
2

V16 TPB1P_F
TPB1+
W16 TPB1N_F
TPB1-

1
R251 R252

-c
C441
SCD1U16V

1KR2

1KR2

2
PCI7420GHK-U

2
DUMMY PORT

2
CLOSE TO CHIP 2

L13
TPA0+ 3 4
VF

1
BC167
TPA0- 2 1 R250 R249
SCD33U16V3ZY 56R2J

2
DLW21HN900SQ2 56R2J
JK1 TPBIAS0

2
5 TPA0P
1 2 TPB0+ TPA0N
SB: 2004/03/08 CN11 L14 TPB0P
change to dummy 3D3V_CARD_S0 3D3V_S0 3D3V_S0 3 4 2 1 R264 TPB0N
for TI suggest 16 15 6
MH2 1 2 1 4K99R2F2
11 SD_WP SKT-1394-4P-6-U TPB0- 3 4 R265 56R2J
10 1394_TPB1_R
DUMMY-47KR2

DUMMY-10KR2

DUMMY-10KR2
5
6
7
8

8 SD_DATA1 DLW21HN900SQ2 1 2 1 2
RN30 R261 R263 R206 7 SD_DATA0 R266 56R2J
12 MC_CD_0# C255
6 3D3V_CARD_S0 SC220P50V2JN
DUMMY-SRN47K 5 SD_CLK1
2

4
4
3
2
1

MC_CD_0# 3
1

2 SD_CMD
SD_WP C217 C202
SD_CMD 1 SD_DATA3 SCD1U16V SC1U10V3ZY
2

1
SD_DATA1 9 SD_DATA2 1
SD_DATA0 MH1
SD_DATA3 14 13
SD_DATA2 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CARDBUS-SKT48
62.10024.511 Title
SD/MS CARD READER AND 1394
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 22 of 39

A B C D E
3D3V_LAN_S5AC 1D8V_AUX_LAN
1 Close to power pin Close to power pin

1
BC271 BC272 BC273 BC274 BC275 C492 C493 C494 C495 C496 C497 C498 C499 BC276 BC277 BC278 BC279 BC280 C516 C517
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V-U SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V-U SCD1U10V2MX-1 SCD1U10V2MX-1SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V-U SCD1U10V2MX-1 SCD1U10V2MX-1
2

2
Place PLLVDD2_LAN/PLLVDD3_LAN
1D8V_AUX_LAN
CKT as close to chip as
AVDDL_LAN possible 1D8V_AUX_LAN
BIASVDD_LAN Place near Chip L26
1D8V_AUX_LAN 3D3V_LAN_S5AC 3D3V_LAN_S5AC PLLVDD2_LAN PLLVDD2_LAN 1 2
MLB-1608080600A

1
C500 C501
SC2D2U10V5KX
SC1000P50V

2
3D3V_LAN_S5AC

112

106

115
125

1
U79

17
44

79
94

19

30
40
52

58
57

70
69

64
63

65
68
7
C504
SC1U10V3KX 3D3V_LAN_S5AC

XTAL_AVSS
PLLVDD
EPHY_AVDD

XTAL_AVDD
BIASVSS
VDDIO
VDDIO
VDDIO

PLLGND
EPHY_AGND

BIASVDD

2
VDDC
VDDC
VDDC

VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI

1
R609 R610 R611 R612 L29
BIASVDD_LAN 1 2

49D9R3F

49D9R3F

49D9R3F

49D9R3F
R614 MLB-1608080600A

1
17,19,21 ICH_PME# 113 72 RDAC 1 2
PCI_PME_L RDAC C505 C506
17,19,21 PCI_PERR# 28
PCI_PERR_L

2
Place RDAC CKT SB:03/01/2004 1K24R2F SCD1U10V2MX-1 SCD1U10V2MX-1

2
61 TDN
as close to TRD0-
17 PCI_REQ#4 121 62 TDP
PCI_REQ_L chip as TRD0+
17,19,21 PCI_TRDY# 23 60 RDN 01/27/2004
PCI_TRDY_L TRD1-
possible 59 RDP Change name From R613 to L?
TRD1+

17,19,21 PCI_PAR 31
PCI_PAR

17,19,21 PCI_AD[0..31] PCI_AD0 55


PCI_AD0
PCI_AD1
PCI_AD2
54
53
PCI_AD1 LAN EEPROM

cc
PCI_AD2
PCI_AD3 51 76 LAN_LINK100#
PCI_AD3 SPD100LEDB 3D3V_LAN_S5AC
PCI_AD4 50 78
PCI_AD4 SPD1000LEDB
PCI_AD5 49 75 LAN_LINK10#
PCI_AD5 LINKLEDB
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
48
45
42
41
39
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
Broadcom LAN TRAFFICLEDB

EEDATA_PXE
77

93
LAN_TX/RX#

SPROM_CS
SPROM_CLK
SPROM_DOUT
1
2
3
U80
CS
SK
D1
VCC
N.C
ORG
8
7
6
PCI_AD11 38 90 SPROM_DIN 4 5 C518
PCI_AD11 EECLK_PXE D0 GND SCD01U16V2KX
PCI_AD12 37
PCI_AD12
PCI_AD13 36 95 SPROM_CLK M93C46-W-U
PCI_AD13 SPROM_CLK
PCI_AD14 34 98 SPROM_CS
PCI_AD14 SPROM_CS
PCI_AD15 33
PCI_AD15
PCI_AD16 16 BCM4401 requires
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
15
14
11
10
9
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
BCM4401 16-Bit R/W data
width

PCI_AD22 8

o-
PCI_AD22
PCI_AD23 6
PCI_AD23
PCI_AD24 3
PCI_AD24 Note: The BCM4401L has weak internal
PCI_AD25 1 91 1D8V_AUX_LAN
PCI_AD26 PCI_AD25 REG18OUT pulldown resistors on the follow signals:
128 92
PCI_AD26 REG18OUT
PCI_AD27 127
PCI_AD27
PCI_AD28 126
PCI_AD28 SPROM_CS,SPROM_CLK,SPROM_DOUT,SPROM_DIN
PCI_AD29 124 97 3D3V_LAN_S5AC
PCI_AD29 REGSUP18
PCI_AD30 123 96
PCI_AD30 REGSUP18
PCI_AD31 122
PCI_AD31
PCI_C/BE#0 43 80
17,19,21 PCI_C/BE#[0..3] PCI_CBE0_L TCK
PCI_C/BE#1 32 82
PCI_CBE1_L TDI
PCI_C/BE#2 18 83
PCI_CBE2_L TDO
PCI_C/BE#3 4 81
PCI_CBE3_L TMS
73
TRST_L
17,19,21 PCI_DEVSEL# 26
PCI_DEVSEL_L
17,19,21 PCI_FRAME# 20
PCI_FRAME_L
119 25 3D3V_LAN_S5AC
01/28/2004

-c
17 PCI_GNT#4 100R2
R615 PCI_GNT_L VESD 3D3V_LAN_S5AC
PCI_AD21 1 2 5 56
PCI_IDSEL VESD
17 PIRQD# 116 114
PCI_INTA_L VESD
17,19,21 PCI_IRDY# 21
PCI_IRDY_L

SCD1U10V2MX-1
10/100M Lan Transformer

1
27 3D3V_LAN_S5AC

SCD1U10V2MX-1
17,19,21 PCI_STOP# PCI_STOP_L
117 C721 R620 R621 C722
7,15,17,18,19,20,21,27,28 PCIRST#_3 PCI_RST_L R616 1
17,19,21 PCI_SERR# 29 87 2 1KR2 0R2-0 0R2-0
PCI_SERR_L VAUXPRSNT

2
U81

89 EPHY_TESTMODE
118 R619
3 PCLK_LAN PCI_CLK

2
102 PCI_CLKRUN_L

66 LAN_X0 1 2 RDP 1 16 RJ45_3

99 SPROM_DOUT
XTALO RD RX RJ45_3 37
1

67 LAN_X1 RDN 2 15 RJ45_6


EPHY_VREF

SPROM_DIN
XTALI RD RX RJ45_6 37
R622 101 EXT_POR_L 200R2F XFR_RDC 3
CT CT
14
22R2
GPIO1

108 GPIO0

X8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1 2 XFR_TDC 6 11
103 NC
86 NC
NC

109 NC
110 NC
NC

NC
NC CT CT
2

TDP 7 10 RJ45_1 RJ45_1 37


BCM4401KQL-1 XTAL-25MHZ-3-U TDN TD TX
8 9 RJ45_2
VF
TD TX RJ45_2 37
2
12
13
24
35
46
47
74
84
100
111
120

22

105
85

71
88

104
107

BC282 71.04401.A0G
SC5P BC283 BC284

1
XFORM-179-U
SC22P50V2JN-1 SC22P50V2JN-1 R624 R625
R623 68.HBB14.301
17,19,21 PCI_CLKRUN# 1 2 SPROM_DIN 75R2 75R2
2

0R2-0 SPROM_DOUT

2
01/30/04
R653 BC285

2
3D3V_LAN_S5AC 3D3V_LAN_S5AC DUMMY-1KR2 SC1000P3KV8KX
1

EXT_POR# R626 1 2 10KR2 3D3V_LAN_S5AC

1
1

R660
S
D

10KR2 3 2

Q58 01/28/2004 Q61 01/29/2004


2

2N7002
G
1

R2
IN 1 GND
LAN_LINK10# 2 R1
3 OUT 1 2 LAN_LINK10 LAN_LINK10 37
EXT_POR_L 17
R661 510R2J
DTA144EUA-1-U2 3D3V_LAN_S5AC 3D3V_LAN_S5AC EXT_POR_L is an
3D3V_LAN_S5AC 3D3V_LAN_S5AC active low signal
used to place the
1

R662 BCM4401 into IDDQ


1

10KR2
R663
mode, <5 mA current
10KR2 Q59 consumption
2

R2
Q60 1
2

IN GND
LAN_TX/RX# 2
IN
R2
1 GND
R1
3 1 2 LAN_TX/RX LAN_TX/RX 37
Wistron Corporation
LAN_LINK100# 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
OUT
R1
3 1 2 LAN_LINK100 R664 510R2J Taipei Hsien 221, Taiwan, R.O.C.
LAN_LINK100 37
DTA144EUA-1-U2
OUT
R665 510R2J Title
DTA144EUA-1-U2
10/100 LAN
Size Document Number Rev
Custom SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 23 of 39
01/28/2004
5V_S3 R666
01/15/2004
1 2 5VA_AUD_S3

1
C509 C720 BC287 BC288 DUMMY-R3

1
SC1U10V3KX SCD01U16V2KX SC4D7U10V-U SCD1U10V2MX-1

2
U82 R627 BC289 BC290
DUMMY-10KR3F SC4D7U10V-U DUMMY-SC1000P50V3KX
1 5
IN OUT
2
GND

2
17,30,33,34,36 PM_SLP_S3# 3 4
SB: Remove CLK14 and EN BYPASS

1
change to 24.576 MHZ
crystall for EMI pass SB: change Connect to TPS793475 R628 C510
PM_SLP_S3# to reduce DUMMY-28KR3F
SC1U10V3KX
R656 power consumption in
3 CLK14_AUDIO 1 2

2
S3 mode
BC286 DUMMY-0R2-0
CODEC_XIN

2
SC22P50V2JN-1
2

R667
X9
DUMMY-1MR2
X-24D576MHZ-19 01/28/2004
1

1
BC322
CODEC_XOUT
R629

cc
SC22P50V2JN-1 1 2

DUMMY-R3 U83
R630
1 2 45 12
CID0 PC_BEEP
46 13
DUMMY-R3 CID1 PHONE
AC'97 LINK 14 LINE_IN

ANALOG INPUT
AUX_L
CODEC_XIN 2 15
XTL_IN AUX_R
16 AC_SYNC CODEC_XOUT 3 16
R631 2 XTL_OUT VIDEO_L
16 ICH_AC_BITCLK 1 33R2 10 17 BC292
R632 2 SYNC VIDEO_R
1 33R2 6 18 SCD1U16V3KX

I/F
AC97-Link
29 AC_BTCLK_MDC CODEC_BCLK
BIT_CLK CD_L
16 AC_SDATA_DOUT 5 19
R633 2 SDATA_OUT CD_GND
16 AC_SDATA_IN0 1 33R2 CODEC_SDI1 8 20 C511
5VA_AUD_S3 SDATA_IN CD_R
16 CODEC_AC_RST# 11 21 C_CODEC_MIC1 1 2 CODEC_MIC1
RESET# MIC1
22 CODEC_MIC2
MIC2 SCD22U10V3KX
25 23
AVDD1 LINE_IN_L
38 24

o-
AVDD2 LINE_IN_R
1

BC296 BC293
BC294 BC295 26 28 AUD_VREFO SC1U10V3KX
SCD1U10V2MX-1 SCD1U10V2MX-1 AVSS1 VREFOUT
42
AVSS2
2

SC1U10V3KX TO Audio OP
1 35 AUDIO_OUT_L 25
3D3V_S0 DVDD1 LINE_OUT_L
9 36 AUDIO_OUT_R 25
DVDD2 LINE_OUT_R
37
MONO_OUT
4

OUTPUT
DVSS1
7 39 HP_SPK_L
DVSS2 HP_OUT_L
1

40
BC297 BC298 BC299 HP_COMM
CODEC_VREF 27 41 HP_SPK_R
SCD1U10V2MX-1 SCD1U10V2MX-1 SC2D2U10V5KX VREF HP_OUT_R
2

29 Jack Sense GPIO0 43 SPK_SHUTDOWN# 25


AFILT1 TP173
30 44 SPDIF_SHDN
AFILT2 GPIO1

-c
TPAD28
32 47 EAPD EAPD 25
CAP2 EAPD
31 R658
NC
1

33 48 CODEC_SPDIF 1 2 3D3V_S0
BC300 BC301 NC SPDIF
34
SCD1U10V2MX-1 SC2D2U10V5KX NC 10KR2
2

STAC9750-CC1-U 01/19/2004
3D3V_S0
DAC Ref Voltage
BC302
filter CAP
1

BC303
SC1000P50V

2
BC304
SC1000P50V BC305 SCD1U10V2MX-1 R634
VF 2

SC1000P50V 100KR2
LOUT1

1
25 HP_NB_SENSE G2
G1
5
TC24 SE220U10V-1-U R635 0R2-0 4
EXT MIC JACK HP_SPK_R

HP_SPK_L
1

1
2 HP_SPK_R1

2 HP_SPK_L1
1

1
2

2
HP_SPK_R2

HP_SPK_L2
3
6
2
5V_S0 1
TC25 SE220U10V-1-U R636 0R2-0
BC306 BC307 AUDIO-JK29
01/27/2004 SC270P50V3JN SC270P50V3JN 22.10088.541
1

MIC1 Change from 150u to 220u


R681 G2
1KR2 G1
L28 R682 5
BLM11A121S 2KR2 4
HEADPHONE JACK
2

R683 1 2 1 2 3
100R2 6
CODEC_MIC1 1 2 1 2 2
1
C724 C725 C726BLM11A121S C727 C728
L27
SC100P50V2JN

SC100P50V2JN

SC4D7U10V5ZY

SC100P50V2JN

SC100P50V2JN

AUDIO-JK29
22.10088.541
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB: Change for EMI solution
Title
AUDIO (1 of 2) -- Codec
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 24 of 39
5V_S3

GAIN0 GAIN1
0 0
AV
6dB AUDIO OP 5V_S3

3
4
0 1 10dB RN71

1
SRN100KJ
1 0 15.6dB BC308 BC309
SC4D7U10V-U SCD1U10V2MX-1

2
1 1 21.6dB R638 01/30/04

2
1
DUMMY-1KR2 U84

cc
1 2 AUDIO_G0 2 4 SPK_LOUT+ R669 2 1 0R2-0 SPK_LOUT1+
GAIN0 LOUT+ SPK_LOUT- R670 0R2-0
1 2 AUDIO_G1 3 9 2 1 SPK_LOUT1-
GAIN1 LOUT- R671 0R2-0
From CODEC LINE OUT 2 1 SPK_ROUT1+
BC310 R639 1KR2 R672 2 1 0R2-0 SPK_ROUT1-
1 2 AUDIO_OUT_R1 23 21 SPK_ROUT+
24 AUDIO_OUT_R RLINEIN ROUT+
20 16 SPK_ROUT-
SCD1U10V2MX-1 RHPIN ROUT-
8
RIN BC311 BC312
BC313 1
GND SC1000P50V SC1000P50V
24 AUDIO_OUT_L 1 2 AUDIO_OUT_L1 5 12
LLINEIN GND

5
6 13 BC314 BC315
SCD1U10V2MX-1 5V_S3 LHPIN GND SPK1
10 24
LIN GND SC1000P50V SC1000P50V SPK_LOUT1- MLX-CON4-U
25 4
GND

1
BC316 BC317 SPK_LOUT1+ 3 21.D0010.104
C513 C514 14 SPK_ROUT1+ 2
SC1000P50V SC1000P50V SCD1U10V2MX-1 SCD1U10V2MX-1 PC-BEEP SPK_ROUT1-
17 18 1
HP/LINE# PVDD

2
BC318 SPK_SDN# 22 7

o-
SCD1U16V3KX SHUTDOWN# PVDD
15
R674 U85 SE/BTL#
PC BEEP 11 19
BYPASS VDD

6
0R2-0

2
1 2KBC_SPKR_1 1 5 R640 BC319
14,28 KBC_SPKR A VCC
3 4 1 2 1 2 PC_SPKRIN R641 TPA0312
17 SB_SPKR B Y
21 CB_SPKR 6 2 SB: Change to JH2 that one
C GND 100KR2
2

10KR2 SCD1U10V2MX-1 BC320


R642 SCD47U16V

1
1

NC7SZ386P6X-U BC321
01/30/04 R643 8K2R2
100KR2 SC1000P50V
1
2

-c
3D3V_S3 3D3V_S0
2

R644
U46D

14
100KR2
12
1

11 SPK_SDN#
SPK_SHUTDOWN# SPK_SHUTDOWN# 24 17,30 G768D_PWROK 13

1
Q55 Q56 Q57 TSLCX08-U R680

7
47K 3 OUT 47K 3 OUT 47K 3 OUT 100KR2
MUTE 2 R1 2 R1 2 R1
VF
17 MUTE 24 EAPD 24 HP_NB_SENSE
IN 1 GND IN 1 GND IN 1 GND

2
R2 From Codec R2 From HP Jack R2
DTC144EUA DTC144EUA DTC144EUA
From ICH4

SB: 2004/03/09 To solve speaker pop sound issue

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AUDIO ( 2 of 2 ) --Phone Jack
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 25 of 39
A B C D E

DUMMY-0R5
R482 5V_BAY_S0
2 1

1
5V_S0
U77 PIDE_D[0..15] 16

SI3445DV-U
5V_BAY_S0 R150
DUMMY-R2 HDD CONN PIDE_A[0..2] 16

6
4 5

D
CN9

2
2 F6 SIDE_IORDY_1

S
1 5V_BAY_1_S0 1 2 SIDE_DREQ 45

1
C395

1
4 FUSE-2A6V MH1 4

1
SCD1U16V R151 1 RSTDRV#_5 RSTDRV#_5 18

2
BC225 BC221 DUMMY-R2

3
SCD1U16V SC10U10V5ZY 2

2
3 PIDE_D7

1
R172 PIDE_D8 4

2
BAY_IN_LOOP 1 2 BAY_EN# C200 5 PIDE_D6
SC3D3U10V5ZY PIDE_D9 6

2
10KR2 7 PIDE_D5

2
PIDE_D10 8
5V_S0 D27 9 PIDE_D4
BAY_PWROK# 17 PIDE_D11 10
S1N4148-U
U43 11 PIDE_D3
1 5 Pull high at ICH4 side PIDE_D12 12
NC VCC

1
16 BAY_PWROFF# 2 13 PIDE_D2
A

3
3 4 BAYOFF PIDE_D13 14
GND Y 5V_BAY_S0 Q27 15 PIDE_D1
NC7SZ14-U DTC124EUA-U1 PIDE_D14 16
U42

cc
17 PIDE_D0
SIDE_IRQ15_1

3 22 K PIDE_D15 18
VCC
SIDE_IORDY_1

2 CD_RST# 2 19
RESET#
1 20
5V_BAY_S0 GND
21 PIDE_DREQ PIDE_DREQ 16
22
MAX809MEUR-T-U 22 K 23 PIDE_IOW# PIDE_IOW# 16
24
1

Q28 25 PIDE_IOR# PIDE_IOR# 16

1
S
2

G2N7002 26
1 Q11_G R200 R198 R77 27 PIDE_IORDY PIDE_IORDY 16
3
D S Q29 RSTDRV#_5 1 2 1 2 HDD_CSEL 28 3
2

2N7002 10KR2 29 PIDE_DACK# PIDE_DACK# 16


G
3

1 DUMMY-0R2-0 470R2 30
3D3V_S0 31 PIDE_IRQ14
D PIDE_IRQ14 16
32
3

33 PIDE_A1

o-
34
U46A 35 PIDE_A0
14
SIDE_IRQ15 PIDE_A2 36
SIDE_IRQ15 16
1 R147 37 PIDE_CS1#
PIDE_CS1# 16
SIDE_IORDY 3 BAY_IN#_1 1 2 PIDE_CS3# 38
SIDE_IORDY 16 BAY_IN# 28 16 PIDE_CS3#
BAY_IN_LOOP 2 39 HDD_LED# HDD_LED# 14
100R2 40
TSLCX08-U 41
7

5V_S0 42
43
44

1
MH2

R602 46

-c
DUMMY-1KR2

CDROM SYN-CONN44D-4

2
20.F0510.044
02/10/2004
SIDE_D[15..0] 16

1
IDE1

1
D32
53

51

FOX-CONN50-2 C339 C340 C491


2
SCD1U10V2MX-1 SC4D7U10V5ZY SC10U10V5ZY SSM34A 2

2
CD_AUDR 26 1 CD_AUDL TP176
TP175

2
TP177 CD_AGND 27 2 TPAD28
TPAD28 SIDE_D8 28 3 CD_RST# CLOSE TO PIN
TPAD28 SIDE_D9 29 4 SIDE_D7
VF
SIDE_D10 30 5 SIDE_D6
SIDE_D11 31 6 SIDE_D5
SIDE_D12 32 7 SIDE_D4
SIDE_D13 33 8 SIDE_D3
SIDE_D14 34 9 SIDE_D2
SIDE_D15 35 10 SIDE_D1
SIDE_DREQ 36 11 SIDE_D0
16 SIDE_DREQ
SIDE_IOR# 37 12
16 SIDE_IOR#
38 13 SIDE_IOW#
SIDE_IOW# 16
SIDE_DACK# 39 14 SIDE_IORDY_1
16 SIDE_DACK#
BAY_ID0 40 15 SIDE_IRQ15_1
28 BAY_ID0
28 BAY_ID1 BAY_ID1 41 16 SIDE_A1 SIDE_A1 16
16 SIDE_A2 SIDE_A2 42 17 SIDE_A0 SIDE_A0 16
SIDE_CS3# 43 18 SIDE_CS1#
16 SIDE_CS3# SIDE_CS1# 16
44 19 CDROM_LED#
45 20 TP181 TPAD28
5V_BAY_S0 46 21 5V_BAY_S0
47 22
48 23 R171
49 24 CSEL BAY_IN_LOOP 1 2 5V_S0
1

50 25
C194 C201 C193 10KR2
2

1 1
54

52

SCD1U16V SCD1U16V SCD1U16V

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Optical Bay ID,00 CDROM;01 2nd-HDD Taipei Hsien 221, Taiwan, R.O.C.

Title
16 USBP3
HDD/CD ROM
16 USBN3
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 26 of 39

A B C D E
A B C D E

Boot Device must have ID[3:0] = 0000


Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46

RN29 RN28
4 5 4 SELECT_FWH 5 4 FWH_FGPI3 4
6 3 FWH_FGPI4 6 3 FWH_FGPI2
7 2 7 2 FWH_FGPI1
8 1 8 1 FWH_FGPI0
Unused FGPI pins must not be float

SRN10K-2 SRN10K-2

3D3V_S0 1D5V_S0

SB: Because new add R684


7,15,17,18,19,20,21,23,28 PCIRST#_3

1
is 330 ohm so need change
R260 from 1K to 4.7K to R260 R259
4K7R2 1K5R2
make FWH_INIT# low level

1
be correct

cc
R585

3
68R2 Q33
1FWH_INT_Q

2
MMBT3904-1-U

2
84.03904.B11
U55 R684
CC_INIT1# 1 2 CC_INIT# 5,17
1 32 FWH_INIT#
NC OE#/INIT# 330R2
2 31 LPC_LFRAME# 17,28
3D3V_S0 3D3V_S0 NC WE#/FWH4
3 30
NC NC
3 4 29 3
SELECT_FWH VSS DQ7/RES
5 28 SB: for SIV pass
IC DQ6/RES
FWH_FGPI4 6 27
A10/FGPI4 DQ5/RES
3 PCLK_FWH 7 26
R/C#(CLK) DQ4/RES
8 25 LPC_LAD3
VDD DQ3/LAD3
9 24

o-
NC VSS
1

10 23 LPC_LAD2
R262 R240 RST# DQ2/LAD2
FWH_FGPI3 11 22 LPC_LAD1
10R2 10KR2 A9(FGPI3) DQ1/LAD1
FWH_FGPI2 12 21 LPC_LAD0
A8(FGPI2) DQ0/LAD0
63.10334.1D1 FWH_FGPI1 13 20
FWH_FGPI0 A7(FGPI1) A0/ID0
14 19
A6(FGPI0) A1/ID1
2

PCLK_FWH_2
16 FWH_WP# 15 18
A5(WP#) A2/ID2
16 17
SC10P50V2JN-1

A4(TBL#) A3/ID3 LPC_LAD[3..0] 17,28


1
BC163

49LF004A-33
2

-c
3D3V_S0
2
VF
1

BC162 BC149 BC158 BC157 BC150


DUMMY-SC10U10V5ZY SCD1U10V2MX-1SCD1U10V2MX-1 SCD1U10V2MX-1SCD1U10V2MX-1
2

78.10492.4B1 78.10492.4B1 78.10492.4B1 78.10492.4B1

3D3V_S0

3,7,8,9,10,13,14,15,16,17,18,19,20,21,22,24,25,26,29,30,31,32,36,38,39 3D3V_S0

5V_S0

13,14,17,18,19,20,24,26,28,30,32,34,36,38,39 5V_S0
1 1
1D5V_S0

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
7,8,9,15,16,18,38,39 1D5V_S0
Taipei Hsien 221, Taiwan, R.O.C.

Title
FWH/Debug Port
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 27 of 39

A B C D E
A B C D E
3D3V_S3

RN54 RN23
BAT_IN_KBC# 8 1 1 8 MUTE_LED# KBC_P65 R6451 2 10KR2 3D3V_S3
AD_IN_KBC 7 2 2 7 BAY_ID0 RN57
MATRIX2 6 3 3 6 BAY_ID1 1 8 ECSWI 3D3V_S3
5V_S0 3D3V_S3 MATRIX1 5 4 4 5 802.11LED# 2 7 ECSMI
3 6 CLK_RUN#

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
3D3V_S3 4 5

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
ECSCI

2
SRN10K SRN10K

1
R48 SRN10K R31
10KR2 R344
10KR2

1
10KR2 3D3V_S3
BC220 BC216
2

1
SC10U10V5ZY SCD1U16V 2 1 BL2_1#
35 BL2#

2
4 RTC_IN 4

54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39

62
61
60
59
58
57
56
55

71
3D3V_RTC R590 D10 S1N4148-U

3
D U75 BAT_IN# 2 1 BAT_IN_KBC#
35,37 BAT_IN#

P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
P1-0
P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7

P3-2
P3-3
P3-4
P3-5
P3-6
P3-7

VCC
P3-0/PWM-00
P3-1/PWM-10
1 Q16 DUMMY-10KR2
2N7002 D38 S1N4148-U
G

1
3

R361 D S 1 USB_EN# AD_IN 2 1 AD_IN_KBC


P6-0/AN-0 USB_EN# 29 31,36,37 AD_IN
2
1 2 1 Q17 TPAD28 TP178 MUTE_LED# 38 80 AD_IN_KBC
P2-0/CMPREF P6-1/AN-1

2
2N7002 37 79 BAT_IN_KBC# R591 D39 S1N4148-U
G 35 FLASH_GPIO1 P2-1 P6-2/AN-2
10KR2 S 36 78 802.11LED# TP179
TPAD28
35 FLASH_GPIO2 P2-2 P6-3/AN-3
2

RTC_IN 35 77 X_BTM# TP22TPAD28 DUMMY-10KR2


P2-3 P6-4/AN-4 TP180
TPAD28
14 SCROLL_LED# 34 76 KBC_P65
P2-4(LED-0) P6-5/AN-5
33 75 AD_OFF 37
14 CAPS_LED# P2-5(LED-1) P6-6/AN-6

1
32 74 SW_THRM_SDN 30
14 NUM_LED# P2-6(LED-2) P6-7/AN-7
KBCFLASH 31
P2-7(LED-3) 3D3V_S3
17,31,34,35,36 PM_SLP_S4# 17 BAY_IN# 26
MATRIX1 P5-0/INT-5
27 16 ECSMI ECSMI 17
P4-0/XCOUT P5-1/INT-20 RN56
MATRIX2 26 15 ECSWI ECSWI 17 RN55
P4-1/XCIN P5-2/INT-30
1

3D3V_S5 U76B BAY_ID0 23 14 KROW7 8 1 1 8 KROW2


10

26 BAY_ID0 P4-2/INT-0 P5-3/INT-40 PM_SUS_STAT# 17


BC222 BAY_ID1 22 13 KROW5 7 2 2 7 KROW1

cc
26 BAY_ID1 P4-3/INT-1 P5-4/CNTR-0 COVERUP 14,30
SCD1U16V 14 9 21 12 BL2_1# KROW6 6 3 3 6 KROW4
VCC Q 17 RCIN# P4-4/RXD P5-5/CNTR-1
PR
2

12 17 ICH_A20GATE ICH_A20GATE 20 11 BRIGHTNESS 14 KROW8 5 4 4 5 KROW3


D ECSCI P4-5/TXD P5-6/DA-1/PWM-01
17 ECSCI 19 10 KBC_SPKR 14,25
CLK_RUN# P4-6/SCLK P5-7/DA-2/PWM-11
PCIRST#_3 11 18 SRN10K
CLK P4-7/SRDY#/CLKRUN#

3
8 KBRESET_S3# SRN10K
Q R476
7 28 XIN_KBC
CL

GND XIN
XOUT
29 XOUT_KBC 2 (NEAR M38859)
TSLCX74-U 72 KBC_REF
VREF
13

DUMMY-R2

1
X7

P8-4/LFRAME#
P8-5/LRESET#

1
P8-7/SERIRQ
BC217 RESON-8MHZ-U

P8-0/LAD-0
P8-1/LAD-1
P8-2/LAD-2
P8-3/LAD-3

P7-5/INT-41
P7-4/INT-31
P7-3/INT-21
3 SCD1U16V R148 82.10009.001 3

P8-6/LCLK
Internal KeyBoard Connector

P7-7/SCL
P7-6/SDA

2
3D3V_S5 78.10492.4B1 (3.3V) 1 2

RESET#
CNVSS
5V_S0
CN3

AVSS
P7-2
P7-1
P7-0

VSS

1
29 470R2
1 KCOL16 15KR3F 63.47134.151

3
R149

o-
70
69
68
67
66
65
64
63

2
3
4
5
6
7
8
9

25
24
30
73
2 KCOL3 M38859FFHP
3 KCOL1 Use 38857 symbol (2.5V) 1 D23
17,27 LPC_LAD0

1 2
4 KCOL4 and change to KBC_REF_1 APL431-U
17,27 LPC_LAD1

KBDATA_5
5

MDATA_5
KCOL12 74.00431.F3B

KBCLK_5
MCLK_5
17,27 LPC_LAD2 38859 P/N

2
6 KCOL9 R170 5V_S0
17,27 LPC_LAD3 47KR3F
7 KCOL10 Q21
17,27 LPC_LFRAME#
R167
R2
8 KCOL8 CNVSS Q22 1
7,15,17,18,19,20,21,23,27 PCIRST#_3 IN
9 47K 3 OUTCNVSS_2 2
GND
KCOL13 KBRESET_S3#
3 PCLK_KBC

2
R1
10 KCOL2 KBCFLASH 2 R1 3 1 2
17,19,21 PCI_SERIRQ
11 1 GND
OUT
KCOL7 MATRIX1 TDATA_5 IN
12 KCOL6 R2 DTA124EE DUMMY-R2
30 KBC_SCL_5
1

13 KCOL14 MATRIX2 TCLK_5 5V_S0 5V_S0 DTC144EUA 84.00124.01H D24


S1N4148-U
30 KBC_SDA_5
14 KCOL15 R477 84.00144.B1K 1
CNVSS_1 2
15 KCOL11 10R2
2

16 KROW3 BC218 CNVSS


SC15P50V2JN

SC15P50V2JN

-c 5
6
7
8

1
17 KROW4
SC10P50V2JN-1
C191

C192

1 2

1
18 KROW1 SC68P50V2JN RN67 R169 BC123 R166
19 R168
BC219

KCOL5
KROW2 SRN10K 4K7R2 4K7R2 SCD1U16V 10KR2
20

2
1
21 KROW8

G
2

2
22 KROW6

4
3
2
1
23 KROW5 KBC_SDA_5 2 3 BT_SDA_5 35,37
24 KROW7 5V_S0
25

D
2 26 Keyboard Matrix Q23 2N7002 2
27 MATRIX2
28 MATRIX1

1
30 US JAP Europe

G
VF
KBC_SCL_5 2 3 BT_SCL_5 35,37
MLX-CON28-1 MATRIX1 LOW LOW HIGH
20.K0004.028

D
MATRIX2 LOW HIGH LOW Q24 2N7002

5V_S0
TouchPad Connector
2C453SC100P50V2JN
1 KCOL4
For EMI
2C454SC100P50V2JN
1 KCOL1 R481
2C455SC100P50V2JN
1 KCOL3 2 1
2C456SC100P50V2JN
1 KCOL16
1

2C457SC100P50V2JN
1 KCOL8 R479 BC114 BC115 0R2-0
2C458SC100P50V2JN
1 KCOL10 R480 10KR2 SCD1U16V SC1U10V3ZY
2

2C459SC100P50V2JN
1 KCOL9 10KR2
2C460SC100P50V2JN
1 KCOL12 CN2
2

8
2C461SC100P50V2JN
1 KCOL6
2C462SC100P50V2JN
1 KCOL7 TCLK_5 1
2C463SC100P50V2JN
1 KCOL2 TDATA_5 2
2C464SC100P50V2JN
1 KCOL13 3
4
2C465SC100P50V2JN
1 KROW3 5
1 2C466SC100P50V2JN
1 KCOL11 6 1
2C467SC100P50V2JN
1 KCOL15 SB:03/05/2004 change pin
2C468SC100P50V2JN
1 KCOL14 define for one layer FPC 7
Wistron Corporation
1

BC224 BC223
2C473SC100P50V2JN
1 KROW2 SC47P50V2JN SC47P50V2JN MOLEX-CON6-1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2C474SC100P50V2JN
1 KCOL5 20.K0010.006 Taipei Hsien 221, Taiwan, R.O.C.
2

2C475SC100P50V2JN
1 KROW1
2C476SC100P50V2JN
1 KROW4 Title

2C477SC100P50V2JN
1 KROW7 KBC/KB&TPAD CONN
2C478SC100P50V2JN
1 KROW5 Size Document Number Rev
2C479SC100P50V2JN
1 KROW6 Custom SC
2C480SC100P50V2JN
1 KROW8 MOLOKAI
Date: Thursday, April 15, 2004 Sheet 28 of 39

A B C D E
1 2 3 4 5

MDC CONN
CN10

35
Voice Modem
31 32 3D3V_LAN_S5AC

A 1 2 A
3 4

1
TPAD28 TP96 5 6
TPAD28 TP95 7 8 R652
TPAD28 TP97 9 10 TP99 TPAD28 10KR2
TPAD28 TP94 11 12
TPAD28 TP98 13 14

2
15 16
17 18 TP80 TPAD28
3D3V_LAN_S5AC MDC_AC_SYNC 16
19 20
3D3V_S0 21 22
16 MDC_AC_DOUT 23 24
25 26 AC_DIN1B_R 1 2
16 MDC_AC_RST# AC_DIN1 16
27 28 R501 22R2
29 30 MDC_BITCLK 1 2 AC_BTCLK_MDC 24
R499 0R2-0
33 34

cc
1

1
36
R502 C402

SC4D7U10V5ZY
SC22P50V2JN-1

C220

2
1

1
100KR2
C515 C206

2
SCD1U16V SCD1U16V AMP-CONN30A-1

2
20.F0099.030

B B

o-
USB PORT Dual USB switch
USB0_VCC

-c

1
USB1_VCC 5V_S3
USB0_VCC C519
Layout trace 40 mil SCD1U10V2MX-1

2
SB:03/05/2004 Add C389 and U86
C390 for USB Droop test
1

1 8
C169SCD1U10V2MX-1

C388

C389

pass GND OC1# USB_OC#0 16


1

C520 C521 2 7
C391

C390

C170

C
SCD1U16V3KX SC10U10V5ZY IN OUT1 C
3 6
SC22U10V6ZY-U

SC22U10V6ZY-U

EN1# OUT2
2

4 5 USB1_VCC
SC22U10V6ZY-U

SC22U10V6ZY-U

SCD1U10V2MX-1

EN2# OC2# USB_OC#4 16


2

NEAR CONNECTOR
TPS2062D
VF
28 USB_EN#

1
C522
SKT2 SB:03/03/2004 SCD1U10V2MX-1

2
4
1
A1 B1 1 2 USBN4 USBN4 16
R648 0R3-U
USBN0 1 2 USB0- A2 B2 USB4-
16 USBN0
R649 0R3-U USB0+ A3 B3 USB4+ 1 2 USBP4 USBP4 16
A4 B4 R650 0R3-U
16 USBP0 USBP0 1 2 2 L24
R651 0R3-U 3
2 1
SKT-USB-61
L7 22.10218.C81
3 4
1 2

4 3 DY-DLW21SN900SQ2-U

D
DY-DLW21SN900SQ2-U D

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
MDC CONN & USB CONN
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 29 of 39

1 2 3 4 5
A B C D E

240 ms after VCC_G768 > 4.38v

Check default setting,


U66
5V_S0 default enable is
3 1 VCC_FAN preferred
5 THERMDP1 DXP1 FANVCC
4 THERMDP2 5 4
DXP2 G768_HW_SHDN
16
3D3V_S0 TH_SHUT R235
5 THERMDN 4
DXN
1 2 THRM_SDN_EN# 16
U46C CLK32_G768 9 2 U25D

14

13
CLK VCC TSAHCT125 DUMMY-R2
15

14
TSLCX08-U VCC
28 KBC_SCL_5 14
SMBCLK
9 28 KBC_SDA_5 12 8 12 11 HW_THRM_SDN
SMBDATA AGND
17,25 G768D_PWROK 8 7
DGND
10 6
RESET#

1
R420 10 FAN_FB
FG

7
R419 1 2 11 5V_S0
ALERT#

7
13
100KR2 100R2 NC 5V_S0

1
2
G768D R236
10KR2

cc
5V_S0

2
1
THERMDP1 THERMDP2 C351 C166
FAN
1

SCD1U16V SC10U10V5ZY Q32


8,17 PM_THRM#

2
Conn. R321 3
4K7R2

1
G768D_PWROK1 R1
C300 BC196 BC197 2
SC2200P50V2KX SC2200P50V2KX R2
2

2
CN8 FAN_FB 1 2 PDTC124EU
THERMDN THERMDN

3 3 DUMMY-C2 3
2 VCC_FAN THERMDP2 THERMDP1/DP2/THERMDN ON THE SAME LAYER
1
Q42 W/S = 10/5 MIL, 12 MIL AWAY FROM OTHERS
2

3
CON3-4 BC169 BC173 D31 CAPS CLOSE TO G768D
SC470P50V3JN

MMBT3904-U1
20.D0012.103 SC4D7U10V5ZY SCD1U16V C362 1

o-
S1N4148-U
SYSTEM SENSOR
1

THERMDN

put together 5V_AUX


SC:change TEMP
5V_AUX
setting from 85
3D3V_S5 to 105 degree. C349
SCD1U16V3KX

1
32K suspend clock output
1

R393 R106

-c
C144 1 2 CPU_THSET U65 0R2-0
U28 SCD1U16V
2

1 5 15KR3F 1 6
17,24,33,34,36 PM_SLP_S3# OE VCC SET VCC

2
2 R112 2 5
8,17 PM_SUS_CLK A GND OUTSET
3 4 32KHZ 1 2 CLK32_G768 31 PURE_HW_THRM_SDN# PURE_HW_THRM_SDN# 3 4 CPU_TH_HYST
GND Y OUT# HYST

1
NC7SZ126-U 10R2
MAX6510HAUT-T-U R417 R418
DUMMY-R2 DUMMY-R2
2 2
1

HW thermal shut down tempature


R120
240KR3 setting 105 degree . Put Near vent

2
out .
VF
2

3D3V_S5
COVER SWITCH RESUME RESET
D28 3D3V_S5 3D3V_S5
3D3V_S3 BAT54-1
2
TO SB
3 U56A U56B

14

14
1
1

RSMRST# is RTC power plane


R13 R2211 2 RSMRST#_1 1 2 3 4
10KR2 RSMRST# 17
470KR2
4

BC148 TSAHCT14 TSAHCT14


TO KBC
2

7
SCD1U16V3KX
14,28 COVERUP 1 2

R14 5V_AUX
100R2
2

U44D
14

1 1
TSAHCT32
3

BC9 12 DD
33,38 BL3
SC1000P50V SW1 11 HW_THRM_SDN_1 1 1 SW_THRM_SDN 28
Wistron Corporation
HW_THRM_SDN 13 G G 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

SW-SIZ011NST S S Taipei Hsien 221, Taiwan, R.O.C.


2

2
1

62.40060.011 Q30 Q31 R222


7

R203 2N7002 2N7002 10KR2 Title


10KR2
G768D
2

Size Document Number Rev


2

A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 30 of 39

A B C D E
A B C D E

5V_AUX

R459
Power ON Circuit 2 1

10KR2
4 4
5V_AUX 5V_AUX

5V_AUX
U44A

1
U73B

14

10
TSAHCT32 TSAHCT74 R362
1 9 14 10KR2 From PWRBTN

14
Q VCC

PR
3 12
D R363
2

2
11 8 9 PWRBTN#_RC 1 2 PWRBTN#
CLK
8
Q

7
PM_SLP_S4# 7 TSAHCT14 1KR2

CL
PM_SLP_S4# 17,28,34,35,36 GND

1
5V_AUX

7
1
U71D C321

13
R202 SCD1U16V
5V_AUX

2
100KR2
33 MAX1999_ON U44B

14

cc
3D3V_S0

1
TSAHCT32 R460
4 3D3V_S5
D1 R201
2 1 1 2 6 22KR2J
30 PURE_HW_THRM_SDN#

1
5 5V_AUX
AD_IN 28,36,37

1
220KR2J R458

2
S1N4148-U R474

7
51KR2 U71E 10KR2

14
2

3
D C370 TSAHCT14

2
1 Q43 SCD1U16V R464 D37

2
G 2N7002 1 2 11 10 2 1
3
SB_PWRBTN# 17
S 3

2
47KR2 To SB

1
S1N4148-U

7
C373
SCD1U16V

2
o-
PWRBTN PWRBTN#
SW3

1
PUSH-SW31-U

-c
C719
6 5 SCD1U16V

2
3

4
2 2
SB: 2004/03/05
VF
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
POWER ON CIRCUIT
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 31 of 39

A B C D E
A B C D E

Deep Sleep
100k/(100k+1.21k)=98.79%
OffSet= 1.21%

Active Deep Deeper


DPRSLPVR 0 0 1 IFL=(RISEN*32uA*n) / Rds(on)=
STP_CPU# 1 0 0 1.96k*32uA*2 / 5mR =25.157A
4 DCBATOUT FDS7088N3 Rds(on)=5mR 4
6217_DACOUT 5V_S0 DCBATOUT
MAX=14A SC:

1
populate
R88 5V_S0 C341 for
1K21R2F

1
SC:Change
VTT test
for VTT

1
test pass R105 pass

2
R90 100R5 C126
0R2-0 SC2D2U10V3ZY

2
1

1
C91 C119 C341 C120 C342
C99 R89 U24 U26

SC10U35V0ZY-U

SC10U35V0ZY-U
2
100KR2F

5
6
7
8
SCD027U50V3KX 6217_VBAT SC10U35V0ZY-U

SC10U35V0ZY-U
2

2
2

5
6
7
8
D33

SCD1U50V3ZY
BAT54-1
SCD1U50V3KX
2

1
R400 9

FDS7096N3
D
C100 C128 R104 2K55R3F 9

FDS7096N3
D
5 H_VID[5..0] 1R2J
SC1U10V3KX

cc
2

G
S
S
S

1
1 2

4
3
2
1

G
S
S
S
C92
MAX=21A

4
3
2
1
U27 SC2200P50V2KX
PWRCH Low ==> One Phase
Vf=0.7V VCC_CORE_S0

2
C127
1 38 SCD33U16V3ZY
R87 VDD VBAT

2
1 2 2 37 6217_ISEN1 L21
DACOUT ISEN1
6217_DSV 3 36 CPU_CORE_1 1 2
243KR2F DSV PHASE1
6217_FSET 4 35 6217_UG1
FSET UG1 IND-D68UH-4-U C122
5 34 6217_BOOT1
N/C BOOT1

1
CPUCORE_ON R86 1 2 1KR2 CPUCORE_ON_1 6 33 SCD1U16V3KX SC:
EN VSSP1

5
6
7
8

5
6
7
8
3 DPRSLPVR 7 32 6217_LG1 U64 U63 3

ISL6218
17 DPRSLPVR populate
DRSEN LG1 R394
3,17 PM_STPCPU# PM_STPCPU# 8 31
DSEN# VDDP 2D2R3-1-U C121
TC10 for
H_VID0 9 30
VID0 N/C VTT test

2
H_VID1 10 29 9 9 D19 SCD1U16V3KX

FDS7088N3

FDS7088N3
D

D
5V_S0 VID1 N/C

2
H_VID2 11 28 DUMMY-B340LA pass
VID2 N/C

1
12 27

ST220U2VDM-1

ST220U2VDM-1

ST220U2VDM-1

ST220U2VDM-1

ST220U2VDM-1
H_VID3

o-
VID3 N/C

1
H_VID4 13 26 D18
VID4 N/C

G
S
S
S

G
S
S
S
1

H_VID5 14 25 C343 TC10 TC7 TC9 TC4 TC5


VID5 N/C MMSZ4681T1

4
3
2
1

4
3
2
1

1
R85 VGATE 15 24 SC1000P50V
DUMMY-R2 17 VGATE PGOOD VSEN

2
6217_EA+ 16 23 6217_DRSV
EA+ DRSV

2
6217_CONP 17 22 6217_STV
COMP STV
R84 6217_FB 18 21 6217_OCSEL
FB OCSET

1
1 2 6217_SOFT 19 20
SOFT VSS
1 2

1
C125
5K11R3F SC1U10V3KX

2
C98 ISL6218CV-T R102
DUMMY-C2

1
G11 54K9R3F
2 1

R103
SC: change for

2
1

DUMMY-R2
load line test
1

C124
pass
For Banias/ULV CPU:

-c
2

1
C97 GAP-CLOSE SC560P

2
SCD015U50V3KX
2

2
1
C123 R396
45K3R3
1

SC2200P50V2KX
IMVP IV Active Mode:
2

2
C96 R101
Load Line Slope :3mR DUMMY-C2 15KR3F
1.Highest Frequency:

1
32A=> 96mV R111
VID=1.484V/1.00V
1 2

2 Rdroop = 96mV / 75KR2F 2


2

32uA C95
2.Lowest Frequency:
2
SC2200P50V2KX VID=0.956V/0.85V
2

VF
V_OCSET = 1.75V
Deep Sleep Mode:
1

1.Highest Frequency: VID=1.484V,Offset=


1

R83 V_DRSV = 0.75716V


DUMMY-R2
R82
V_BOOT =1.2611V -1.2%->VID=1.466
3K57R3F I_OCSET = 12.5uA => 2.Lowest Frequency: VID=0.956V,Offset=
OCP =125% ~ 175%
2

C94
-1.2%->VID=0.945
1 2
Deeper Sleep Mode:
VID=0.748V
DUMMY-C2 3D3V_S0 3D3V_S0
3D3V_S0 3D3V_S0
3D3V_S0 3D3V_S0
3D3V_S0
1

R376 R401 U6E U6F


10KR2 3K3R2 U6C U6D TSLCX14-U
14

14

14

14
TSLCX14-U TSLCX14-U TSLCX14-U
1

R375
2

R397 R395 CPUCORE_ON 5 6 9 8 1 2 11 10 13 12 CPUCORDE_ON_DELAY


10KR2
1 1KR2F 1 1
1KR2
3

C334
VCC_IO_S0 Wistron Corporation
2

7
VGATE 2 Q39 SC1U10V3KX
2

S2N3904-U2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


3

D Taipei Hsien 221, Taiwan, R.O.C.


1
3

CLK_PWD# 1 Q37 R377


3 CLK_PWD# 2N7002
G 1 2 2 Q36 Title
3

D S S2N3904-U2 SB: 2004/03/01


IMVP IV-CPU POWER-ISL6218
2

CPUCORDE_ON_DELAY 1 Q38 10KR2


1

2N7002 Size Document Number Rev


G
S A3 SC
MOLOKAI
2

Date: Thursday, April 15, 2004 Sheet 32 of 39


VCC_IO_S0-->Delay 3 mS-->CPUCORDE_ON_DELAY
A B C D E
A B C D E

SYSTEM DC/DC
3D3V_S5/5V_S5 DCBATOUT

5V_AUX MAX1999_VCC

1 2 MAX1999_V+
4 1 2 4
R36

SC4D7U35V-U

SCD1U50V3ZY
1
4D7R5 R35 C34 DCBATOUT

3
DCBATOUT 1 2 10R2 SC1U10V3ZY

C36

C8

SC1U10V3ZY
C35

2
R582
4D7R5 D2
BAW56-1

SC4D7U35V-U
MAX1999_BST3 MAX1999_BST5

1
SC4D7U35V-U

SCD1U50V3ZY

SC10U35V0ZY-U
C55
1

C54
OCP:7.5A~10.5A

8
7
6
5

5
6
7
8
C52

C39

SCD1U16V3KX

SCD1U16V3KX
OCP:6A~8A

2
1

D
D
D
D
U17 U18

C11

C32
D
D
D
D
2

0R2-0
R11

0R2-0
R34
SI4800DY U2 SI4800DY

20

17
MAX1999EEI

cc
VCC
V+
2

2
BST3

G
S
S
S
S
S
S
G
28 14
3D3V_S5 BST3 BST5

1
2
3
4

4
3
2
1
5V_S5

L2 MAX1999_DH3 26 16 MAX1999_DH5 L3
IND-4D7UH-16 DH3 DH5 IND-4D7UH-16
1 2 MAX1999_LX3 27 15 MAX1999_LX5 1 2
LX3 LX5
MAX1999_DL3 24 19 MAX1999_DL5
DL3 DL5
SI4892DY
U21
22 21

ST150U6D3VM-U
OUT3 OUT5
1

5
6
7
8

1
BC54
ST150U6D3VM-U

SC47P50V2JN

DY-SC100P50V2JN

SC47P50V2JN

SI4892DY
U22

SCD1U16V3KX
3 3

1
BC27 MAX1999_FB3 7 9 MAX1999_FB5
TC1

DY-SC100P50V2JN

TC2
FB3 FB5

D
D
D
D
C282
8
7
6
5

SCD1U16V3KX R288 R12

C9

C281

C30
2

2
D
D
D
D

G
S
S
S
DUMMY-R3 DUMMY-R3
MAX1999_ON_1 3

o-
ON3

4
3
2
1
2
MAX1999_ON_1
G
S
S
S

4 10 PRO#
ON5 PRO#

2
1

2MR2
R309
SC: change to
NC
1
2
3
4

1
MAX1999_SHDN# 6 fix 5V output
SHDN#

1
2MR2
R295

SC:Change for and not using


Derating pass R9

1
adjustment
R10 0R2-0
0R2-0 11 mode.
MAX1999_ILIM5
ILIM5
2

2
2

MAX1999_TON 13
TON
5 MAX1999_ILIM3
ILIM3 R293
10KR2
MAX1999_REF 8 2 1 2 R310
MAX1999_REF REF PGOOD MAX1999_VCC
18KR2F MAX1999_VCC DCBATOUT
SCD22U10V3KX

-c
2

1 2
MAX1999_SKIP# 12 23
C7

SC: change to
SKIP# GND
1 2

LDO3

LDO5
fix 3D3V output MAX1999_VCC
1

1
and not using
R291 R586
adjustment mode.

1
24KR2 470KR2

10KR2F-U

10KR2F-U
25

18

R311

R290

2
2 3D3V_AUX 5V_AUX 2

2
3

2
SC1U10V3KX

SC1U10V3KX
30mA MAX. 30mA MAX.
1

1
Q53

C10

C33

1
TP0610T
VF
2

2
PRO# R587
470KR2
MAX1999_VCC

2
MAX1999_VCC

2
R292
MAX1999_VCC
1

C451
R313 470KR2 SCD1U10V2MX-1
1

100KR2 R286

1
R312 DUMMY-R2
100KR2
1

MAX1999_VCC 1 2
DUMMY-R2
2

R33

MAX1999_SKIP#
2

MAX1999_SKIP 31 MAX1999_ON 1 2 MAX1999_ON_1


3

D D R289
2

1 Q51 1 Q52 MAX1999_TON 0R2-0


17,24,30,34,36 PM_SLP_S3# 2N7002 2N7002
G G
S S
2

R294
100KR2
1

MAX1999_V+ 1 2 MAX1999_SHDN#
R32
38 MAX1999_SKIP

3
0R2-0 D

DUMMY-2N7002
30,38 BL3 1

SCD1U50V3ZY
1 1

Q5
G
2

C6
Wistron Corporation

2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SKIP# = VCC : PWM MODE Title
SKIP# = GND : SKIP MODE Ton = VCC : 200KHz/300KHz
Ton = GND : 400KHz/500KHz MAX1999/3D3V_S5/5V_S5
SKIP# = REF/FloatING : Ultrasonic MODE Size Document Number Rev
(5V/3D3V) A3
(25KHz min) MOLOKAI SC
Date: Thursday, April 15, 2004 Sheet 33 of 39

A B C D E
A B C D E

SYSTEM DC/DC 3D3V_S3

1 2M1715SKIP# 1 2 PM_SLP_S3# PM_SLP_S3# 17,24,30,33,36


2D5V_S3/1D35V_S0

1
R126 R125
R121 10KR2 0R2-0
10KR2 5V_S5

2
DCBATOUT R122

SC4D7U10V5ZY
4 4
DUMMY-R2

SCD1U50V3ZY
1 2

BC205
17,28,31,35,36 PM_SLP_S4#

BC101
M1715VCCF 1 2

SC4D7U35V-U

SCD1U50V3ZY

SCD1U50V3ZY

SCD1U50V3ZY

SC4D7U35V-U

SC4D7U35V-U
1

1
R119

SC1U10V3ZY
8
7
6
5

5
6
7
8
10R2 R117

BC116

BC214

BC100

BC213

BC117

BC118

BC209
U30 0R2-0 U32

D
D
D
D
D
D
D
D
OCP:7.5A~9.5A 2

2
SI4800DY SI4800DY
1D35V_S0

2
M1715_VDD

SCD1U10V2MX-1
1

BAW56-1

G
S
S
S
S
S
S
G
OCP:8.5A~10.5A

cc
C363

D34
1
2
3
4

4
3
2
1
2
L22 1D2V_ON
GAP-CLOSE-PWR
G16

GAP-CLOSE-PWR
G15

IND-2D2UH-6 L23

2
2

1 2 2D5V_ON IND-4D7UH-16 2D5V_S3


M1715BST1 1 2

2
1
R134

SCD1U16V3KX
1

1
C167 R600 U69

11
10

21
20
8
7
6
5

4
SC47P50V2JN D21 MAX1715EEI-U2 R601 3D3R2J

BC206

U31
1
2D2R2J 2D2R2J

SI4892DY
U29

SCD1U16V3KX
V+
VCC
VDD
D
D
D
D

ON2
ON1
2

5
6
7
8

1
3 DUMMY-SSM5819S D22 3

SI4892DY
D
D
D
D
2
S
S
S
G
1D35V_DC_S0 25 6

BC211
BST1 SKIP#
R118 18 M1715BST2

DUMMY-SSM5819S
BST2
2

1
2
3
4

G
S
S
S
1 2 M1715DH1 26
SC100P50V2JN

DH1

2
1

3D3R2J 17

DUMMY-SC100P50V2JN
M1715DH2

o-
DH2

4
3
2
1

1
M1715LX1 27
C364

3K48R3F

2MR2
R124

LX1
16 M1715LX2
R447

C369

DUMMY-15KR2
R461
LX2
2

1
M1715DL1 24
DL1

2
1

1
19 M1715DL2

ST220U4VDM-6
DL2
2

TC17 BC198 1 D42 BC210


OUT1

2
ST220U2D5VBM SCD1U16V3KX 14 SSM34A SCD1U16V3KX

TC18
OUT2
2

2
1

M1715FB1 2
FB1

2
BC207
10KR2F-U
R448

SC2200P50V2KX M1715ILIM1 3 13 M1715FB2


ILIM1 FB2
2

1
12 M1715ILIM2

SC2200P50V2KX
ILIM2
2

1
8 R462
AGND

1
22 5 M1715TON 0R2-0

BC212
1V 7
PGND TON
9 M1715REF

330KR2F
R444
PGOOD REF

-c
2
1

1
SC: Change D42 to

N.C.
N.C.
N.C.

2
1

DUMMY-R2

DUMMY-R2
SSM34A for 2.5V
5V_S0
300KR2F
R445

R123

R446
undershoot issue

2
For MGM+,set to

28
15
23
1.35V
1

2
R443

SCD22U10V3KX
100KR2

1
BC208
2 2
2

2
VF
1D25V_DDRVREF_S3 need 10 mil and must near NB/DIMM

2D5V_S3

3D3V_S3 1D25V_DDRVREF_S3
2

R402 C359
470R2F 1 2
1

SCD1U16V
SCD1U10V2MX-1

U67B
C346

5 +
2

7
1

6 -
R403 C348
470R2F SCD1U10V2MX-1 LMV822MM
2

1
1
C344 BC190 1
2

SCD1U10V2MX-1 SCD47U10V3ZY
2

2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R404 Taipei Hsien 221, Taiwan, R.O.C.
1 2
Title
DUMMY-0R2-0
MAX1715/2D5V_S3/1D35V_S0
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 34 of 39

A B C D E
DCBATOUT
CHARGER CIRCUIT

3
D D12
BAT_IN# 1 Q3 2 1
2N7002
G

1
S DUMMY-SSM34

2
R30
DUMMY-R3 U15
SI4425DY R45
5 4 D02R7520F
AD+

2
D G
6 D S 3 1645_AD+_1 1 2
7 2

1
D S
D 8 1

1
D S
1 Q1 BC18
16 CHARGE_OFF 2N7002
G SCD1U50V3ZY

2
1
S R29 R27

1
R280 DUMMY-R3 DUMMY-R3 1645_PDS 4D7R3 R26

1
100KR2 1645_CSSP 1 2 4D7R3 R52
D9 R25 1645_CSSN 1 2

2
2 S1N4148-U 1KR2
LDO_VCC

2
1
R7 BC25 BC24

(SC1000P100V3KX) (10R3)
DUMMY-R3
2

1
SC1U50V5ZY SC1U50V5ZY

R46
SC: Change
16K2R3F

SC4D7U35V-U
constant

BC44
SC10U35V0ZY-U
current to

4
3
2
1
BC7 D13 LDO_VCC

BC43
R8

1 1645_LX_1
2
2.94A all
1 2 BC8 SC1U50V5ZY BC26 S1N4148-U U7

G
S
S
S
1645_DCIN

2
3

the time Q2 D SC1U50V5ZY SCD1U50V3ZY R49 SI4425DY

1645_CVS

2
5
6
7
8
1 DY-52K3R3F 2 1 1 2
17,28,31,34,36 PM_SLP_S4#

cc
G

D
D
D
D
S U10 33R2

DUMMY-C3
2

DY-2N7002 BC23 BC22

BC19

D
D
D
D
SCD1U16V3KX

S
S
S
G
1 28
DCIN CVS

5
6
7
8
BC6 R6 2 27
LDO PDS

4
3
2
1
1 2 1645_CLS 3 26 SCD1U16V3KX U8
40K2R3F CLS CSSP SI4892DY
1645_REF 4 25 02/09/2004
SC1U10V3KX REF CSSN R51
1645_CCS 5 24 1645_BST
CCS BST

2
1645_CCI 6 23 1645_DH1_1 1 0R2-0 2 1645_DH1_2 L1 R1
CCI DHI
1645_CCV_1 1 2 1645_CCV 7 22 1645_LX 1 2 1 2
BC5 CCV LX R47 BT+
8 21 1645_DLOV

DUMMY-R3
GND DLOV

1
SCD01U50V3KX R5 IND-15UH-27 D02R7520F

(10R3)
9 20 1645_DLO_1 1 2 1645_DLO_2
BC4

1645_LX1
SCD01U50V3KX

SCD01U50V3KX

R50
10KR2 1645_DAC BATT DLO 0R2-0
10 19

SCD01U50V3KX

SCD01U50V3KX
SC10U25VKX-1-U1

SC10U25VKX-1-U1
DAC PGND

1
11 18 1645_CSIP
BC3

11645_LX_2
5V_AUX VDD CSIP

1
12 17 1645_CSIN C4 C5
THM CSIN

5
6
7
8
13 16 1645_PDL

C26

C27
SCL PDL

2
14 15 1645_ALERT#
SCD1U16V3KX

SDA INT#

D
D
D
D

2
(SC1000P100V3KX)
o-
SC1U50V5ZY
BC2

BC1

S
S
S
G
MAX1645BEEI
2ND source PN:74.01645.07S BC21 BC20

4
3
2
1

2
SCD1U50V3ZY SCD1U50V3ZY U9
1645_TH

DUMMY-C3
5V_AUX SI4892DY R24 R23
0x12

BC45
2
1R2J 1R2J
1

1
BC170 R306
5V_AUX 5V_AUX 5V_AUX SC1500P50V2KX 1645_ALERT# 1 2 5V_AUX
2

G13 8K2R2
1

1 2
5V_AUX
1

R305 R2 R3
8K2R2 8K2R2 100KR2 R4 GAP-CLOSE
notice sense resistor noise and trace

-c
10KR2
2

37 BT+SENSE
2

1
28,37 BAT_IN#
R307
28,37 BT_SCL_5
100KR2
28,37 BT_SDA_5

28 FLASH_GPIO1 FLASH_GPIO1

2
28 FLASH_GPIO2 FLASH_GPIO2

1 ATTINY12_RST_1
U1

BL2# 2 6 BT_SCL_5
VF
28 BL2# XTAL1/PB3 PB1/MISO/INT0/AIN1
14 CHARGE_LED# CHARGE_LED# 3 5 ATTINY12_PB0
XTAL2/PB4 PB0/MOSI/AIN0
R28
System constant power setting 98% 1 2 ATTINY12_RESET 1 7 BT_SDA_5
RESET#/PB5 PB2/SCK/T0
VCLS=4.096(VREF)*{16.2K(R7)/[40.2k(R6)+16.2K(R7)]}=1.1765V 0R2-0 4 8
GND VCC 5V_AUX

1
Imax=1.1765/(20V*20m ohm)=2.94A R308

1
1KR2 C298
constant power setting=2.94*20=58.8W 2 SCD1U16V ATTINY12L-4SI-8 C280
SCD1U10V2MX-1
FLASH1_1 2

2
R283
37 AD_IN_C 1 2 ATTINY12_PB0_11 2

20KR2 20KR2 R284

3
Q7 R282
FLASH_GPIO2 1 2 FLASH2 2 Q4

3
D S2N3904-U2
2N7002
3

1
R346 1 BAT_IN# 1KR2

1
FLASH_GPIO1 1 2 FLASH1 2 Q13 G R281
S2N3904-U2 S 1 2 10KR2

2
1

1KR2
1

R345 C47

2
10KR2 DUMMY-C2
(SCD1U10V2MX-1)
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CHARGER&MicroP
Size Document Number Rev
Custom SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 35 of 39
A B C D E

LAN Power
3D3V_LAN_S5AC
DCBATOUT 3D3V_S5
4 4

U37
Q25 1 S D 8
R176 TP0610T 2 S D 7
10KR2 3 S D 6
1 2 2 1 4 G D 5

1
R177

SCD1U50V3KX

SCD1U10V2MX-1
SI4800DY

1
330KR2

BC124

330KR2
R174
3
1 2

C203
2

2
2
1
3D3V_S5

R175
1KR2
U38

cc
PM_SLP_S4# 1 5
A VCC

3 2
2
28,31,37 AD_IN B
D
3 4 LAN_PWR_EN 1 Q26
GND Y 2N7002
G
S

2
NC7SZ32-U

3 3

o-
-c
Run Power Suspend Power 5V_S3 5V_S5

U88
1 S D 8
5V_S0 5V_S5 2 S D 7
3 S D 6
U23 4 5

SCD1U10V2MX-1
G D

1
1 S D 8
2 2
2 7 SI4800DY

C723
S D
3 S D 6 01/29/04

2
4 G D 5
SCD1U10V2MX-1
1

SI4800DY
VF
DCBATOUT
C70

DCBATOUT 3D3V_S3 3D3V_S5


2

Q18 Q12 U16


TP0610T TP0610T 1 S D 8
R348 R55 2 S D 7
10KR2 10KR2 3 S D 6
1 2 2 1 1 2 2 1 4 G D 5
1

2
SI4800DY

SCD1U50V3ZY

SCD1U10V2MX-1
1

1
SCD1U50V3KX

330KR2
R69

RLZ12B
D17

C48

330KR2
R56

RLZ12B
D14
3

3
R350 C69 3D3V_S0 3D3V_S5 R54

C49
2
330KR2 U11 330KR2
2

2
1 2 1 S D 8 1 2
2

1
2 S D 7
3 S D 6
1

1
4 G D 5

R53
1KR2
R349

1KR2
SI4800DY
SCD1U10V2MX-1
1

C31
3 2

3 2
2

D D
1 Q15 1 Q11
17,24,30,33,34 PM_SLP_S3# 17,28,31,34,35 PM_SLP_S4#
1 G 2N7002 G 2N7002 1
S S
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PWR Plane SW / VCC_IO_S0
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 36 of 39

A B C D E
A B C D E

5V_AUX

D6
TV BD Conn 2
Battery Conn
BAT_IN# 3
BAT1
1
8
AD+_CONN BAV99-2 1
D7 BT+
2 2
R21 1 2 100R2 3
28,35 BT_SCL_5
BT_SDA_5 3 R20 1 2 100R2 4

SCD1U50V3ZY

SCD1U50V3ZY
4 28,35 BT_SDA_5 4
CN7 R22 1 2100R2 5
28,35 BAT_IN#
1 2 1 6

C16

C15
7
MH1 BAV99-2 9

1
3 4 D8 C23

C20
1

1
5 6 2 C24 C25 SYN-CON7-7

SC1000P50V
7 8 20.80203.A07

SCD1U50V3ZY

SC1000P100V3KX

SC47P50V2JN
2
9 10 BT_SCL_5 3

C22

DUMMY-C2

SC47P50V2JN
2

2
11 12 C21
13 14 1
15 16

2
1
17 18 CRMA CRMA 15 BAV99-2
3D3V_LAN_S5AC LAN_LINK10 19 20 LUMA R19
23 LAN_LINK10 LUMA 15
21 22 0R2-0
23 LAN_LINK100
23 LAN_TX/RX 23 24
25 26

2
cc
23 RJ45_6 RJ45_6 27 28 RJ45_2 RJ45_2 23 35 BT+SENSE
1

MH2
SCD1U16V

RJ45_3 29 30 RJ45_1
C485

23 RJ45_3 RJ45_1 23
2

SPD-CONN30D-4
20.F0578.030

3 3

o-
-c
Adaptor In Circuit 5V_AUX
AD_IN 28,31,36
D11
HZM24NBZ AD+
AD+_CONN 3 2 5V_AUX

1
R57 U44C
U13 LDO_VCC 100KR2 TSAHCT32

14
2 2
1 S 8
D 5V_AUX
2 S P-MOS 7 9
D

2
3 6 8
SCD1U50V3ZY

S FET D U71F AD_IN_C 35


2

1
4 5 10

SCD1U50V3ZY

14
G D
1

1
R319
C43

C41
TSAHCT14
VF 1

3
K 22 SI4435DY R583 D
1

7
1

1 2 13 12 1 Q14
100KR2
R298

SC1U50V5ZY

2
100KR2
C14

G 2N7002

1
S
2

2
2 10KR2
2

7
K 22 R584
3

D 10KR2
AD_OFF 1 Q10
28 AD_OFF

2
2N7002
G
1

S
2
100KR2
R320

47KR2
R299
3

Q6
DTA124EUA-U1
2

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Battery Conn/TV BD Conn/Adaptor In Circuit
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 37 of 39

A B C D E
A B C D E

BATRERY LOW3 DETECTOR


DCBATOUT 5V_AUX
Set 12V
5V_AUX

DUMMY-10KR2
1

R316
DUMMY-649KR2F

2
1
4 U3 4
1 5

R318
NC VCC
BL3# 2
A
3 4 BL3 30,33
GND Y

2
DUMMY-NC7SZ14-U

1
1 5
OUT NC R285
S-80840_VDD 2
VDD
3 4

DUMMY-SCD1U50V3ZY

DUMMY-357KR3F-1
VSS NC 10KR2

1
U12

2
R317 DUMMY-S-80840CNMC

BC28

2
S-80840 VDD Min 4.04V

cc
At Dothan CPU application, POWER is 1.5V or 1.8V.

3D3V_S0 --> 1D8V_VCCA_S0 3D3V_S5 --> 1D5V_S5 3D3V_S0 → 1D5V_S0


3
(For CPU VCCA) 1D5V_S5
1D5V_S0 3
1D8V_VCCA_S0 3D3V_S0
U5
1

SC20P50V2JN-U
ADJ

1
I max = 150 mA 2
VOUT
1

1
3
SC20P50V2JN-U

BC129

12K4R3D
R193
o-
BC16
VIN
1

1
3D3V_S5 R18
BC109

22KR3F
R137

SC1U10V3ZY
2
U78 APL1085 110R3F BC33
3D3V_S0 I max = 150 mA G913C-U
2

2
U33
2

2
G913C-U 1 5
SHDN# SET
2
GND

1
1 5 3 4
SHDN# SET IN OUT

1
2 SC10U6D3V5YZ

60K4R3F
R162
GND
1

3 4 I max = 3 A R17
IN OUT 22R3F
49K9R3F
R138

SC1U10V3ZY

SC1U10V3ZY
C450
1 2
SC1U10V3ZY

SC1U10V3ZY

BC232

BC131

2
SC10U6D3V5MX
BC110

BC107

-c
Vo=1.25*((R626+R629)/R626) = 1.5V

2D5V_S3 → 1D25V_S0 1D35V_S0 → VCC_IO_S0(1.05V)


2 2
2D5V_S3 VCC_IO_S0 1D35V_S0 5V_S0
MAX1999_REF 3D3V_S0
(2V)
VF
1D25V_S0 2D5V_S3
SC10U10V5ZY

GAP-CLOSE-PWR
1

2
SCD1U16V

1
5V_S0
C376

C377

G22

1
DUMMY-R2
2

1
SCD1U16V
BC121

R142

4K75R2F
R143
1
1

GAP-CLOSE-PWR

GAP-CLOSE-PWR

2
1

R588 U34

2
C452 1KR2F D G1211X-U1
G21

G20

U72 SCD1U16V Q44


SC4D7U10V-U
2

2
SUD50N03-11 5 1 G1211_IN+ (1.05V)
VDD IN+
2

4 1 2
C383

VOUT VIN APL533_VREF VSS


3 4 3
VREF OUT IN-
1
1

1
8 6 1
SC1U10V3ZY

ST100U4VBM

DUMMY-R2
NC VCNTL

G1211_IN-
1

1
7
C381

TC19

SCD1U16V

R145

2K26R2F
R144
NC G
1

5 2 BC112
SCD1U50V3ZY

BC113
NC GND
2

3
1

9 R589 S SC100P50V2JN
GND

2
1KR2F
C382

2
VIO_S0 1 2 1 2
2

2
2

APL5331KAC-TR BC111 R140


1

SC20P50V2JN-U 1K5R2
SCD1U16V

ST100U4VBM
BC215

TC20

1 1 2 1
2

APL533_VREF
R141
Wistron Corporation
1

1KR2F
DUMMY-R2
3

D 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


R139

MAX1999_SKIP 1 Q54 Taipei Hsien 221, Taiwan, R.O.C.


33 MAX1999_SKIP 2N7002
G
S Title
2

BATTERY/LDO/Adaptor In
2

CLOSE TO U72
Size Document Number Rev
PIN3 A3
MOLOKAI SC
Date: Thursday, April 15, 2004 Sheet 38 of 39

A B C D E
A B C D E

3D3V_S0 3D3V_S5 3D3V_S5


3D3V_S5 3D3V_S5
5V_AUX
U73A U56C U56D

14

14
4
U46B TSAHCT74 U56E U56F

14

14

14
5 14
Q VCC

PR
4 2 5 6 9 8
D
6 11 10 13 12
5 3
CLK TSAHCT14 TSAHCT14
6
Q

7
TSLCX08-U 7 TSAHCT14 TSAHCT14

CL
GND
7

7
4 4

1
FOR EMI 3D3V_S0
FOR EMI MOAT
C421 DUMMY-SCD1U16V
5V_AUX 5V_AUX 5V_AUX 3D3V_S5 2 1 3D3V_S0

2
C29 DUMMY-SCD1U50V3KX C403

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
1 2 2 1 DUMMY-SCD1U16V

C296

C327

C367

C118

C410

C397

C374

C188

C279
AD+ 3D3V_S0
U71C U71B U71A C393
14

14

14

1
TSAHCT14 TSAHCT14 TSAHCT14 2 1 DUMMY-SCD1U16V
C50 DUMMY-SCD1U50V3KX
6 5 4 3 2 1 AD+ 1 2 DCBATOUT
C51
1 2 DUMMY-SCD1U50V3KX C356 DUMMY-SCD1U16V 5V_S0 VCC_CORE_S0
1D35V_S0
C46 2D5V_S3 2 1 1D35V_S0

cc
7

7
1 2 DUMMY-SCD1U50V3KX

2
C187 DUMMY-SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
C68 DUMMY-SCD1U50V3KX 1D35V_S0 2 1 3D3V_S0

C320

C326

C361

C423

C199

C486

C487

C488

C195

C132
3D3V_S3 DCBATOUT 1 2 5V_S0

1
C67
1 2 DUMMY-SCD1U50V3KX
C62 DUMMY-SCD1U16V
C409 DUMMY-SCD1U16V 1D5V_S0 2 1 1D35V_S0 DCBATOUT
8

U67A 1D5V_S0 2 1 3D3V_S0


3 C198
+
3 1 2 1 DUMMY-SCD1U16V 3
2 C366 DUMMY-SCD1U16V
-

1
VCC_IO_S0 2 1 3D3V_S0

SCD1U50V3ZY

SCD1U50V3ZY

SCD1U50V3ZY

SCD1U50V3ZY

SCD1U50V3ZY

SCD1U50V3ZY

SCD1U50V3ZY

SCD1U50V3ZY

SCD1U50V3ZY
LMV822MM C157 DUMMY-SCD1U16V

C44

C168

C45

C38

C171

C392

C190

C115

C489
4

VCC_CORE_S0 2 1 VCC_IO_S0

2
C164

o-
2 1 DUMMY-SCD1U16V
C183 C93 DUMMY-SCD1U16V
2 1 DUMMY-SCD1U16V VCC_CORE_S0 2 1 3D3V_S0
C189
2 1 DUMMY-SCD1U16V AD+

1
SCD1U50V3ZY

SCD1U50V3ZY

SCD1U50V3ZY
C37

C28

C490
2

2
-c
SB: New add
left to
power button

HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE

H7 H12 H8 H5 H11 H16 H15 H20 H10 H3 H1 H9 H2 H6 H14 H13 H19


2 2
VF
1

1
34.42P15.001
TOP SIDE
02/02/2004

HOLE
H4

5
34.41Q08.001
H17 1 4
BOT SIDE

34.41P25.001 2 3
TOP SIDE BEETLE4
34.34S02.001

6
K4 K5 K6 K3 K1 K2 K7 K8 K9 K10 K11 K12 K13
BOT SIDE
GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS
1

SB: Change by ME
1 1

34.45V04.001 Wistron Corporation


34.41P23.001 34.41D14.001 34.41P18.001 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BOT SIDE BOT SIDE Taipei Hsien 221, Taiwan, R.O.C.
TOP SIDE TOP SIDE
Title
MISC
Size Document Number Rev
A3 SC
MOLOKAI
Date: Thursday, April 15, 2004 Sheet 39 of 39

A B C D E

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