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    Computer Organization Nov 2020

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    Sai Baba
    This document contains details of a computer organization exam, including instructions, parts A and B, and exam questions. Part A contains 6 short answer questions covering topics like multi-computers vs multi-processors, instruction codes, types of DRAM memory, memory hierarchy, register transfer implementation, and micro-operations for fetch cycles. Part B contains 6 longer answer questions asking students to design circuits, differentiate addressing modes and memory access types, compare DRAM types, and explain concepts like virtual memory and microprogram sequencers. The exam tests students' knowledge of computer hardware architecture and organization.

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    Computer Organization Nov 2020

    Uploaded by

    Sai Baba
    39 views1 page
    This document contains details of a computer organization exam, including instructions, parts A and B, and exam questions. Part A contains 6 short answer questions covering topics like multi-computers vs multi-processors, instruction codes, types of DRAM memory, memory hierarchy, register transfer implementation, and micro-operations for fetch cycles. Part B contains 6 longer answer questions asking students to design circuits, differentiate addressing modes and memory access types, compare DRAM types, and explain concepts like virtual memory and microprogram sequencers. The exam tests students' knowledge of computer hardware architecture and organization.

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    COMPUTER ORGANIZATION NOV 2020

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    This document contains details of a computer organization exam, including instructions, parts A and B, and exam questions. Part A contains 6 short answer questions covering topics like multi-computers vs multi-processors, instruction codes, types of DRAM memory, memory hierarchy, register transfer implementation, and micro-operations for fetch cycles. Part B contains 6 longer answer questions asking students to design circuits, differentiate addressing modes and memory access types, compare DRAM types, and explain concepts like virtual memory and microprogram sequencers. The exam tests students' knowledge of computer hardware architecture and organization.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    39 views1 page

    Computer Organization Nov 2020

    Uploaded by

    Sai Baba
    This document contains details of a computer organization exam, including instructions, parts A and B, and exam questions. Part A contains 6 short answer questions covering topics like multi-computers vs multi-processors, instruction codes, types of DRAM memory, memory hierarchy, register transfer implementation, and micro-operations for fetch cycles. Part B contains 6 longer answer questions asking students to design circuits, differentiate addressing modes and memory access types, compare DRAM types, and explain concepts like virtual memory and microprogram sequencers. The exam tests students' knowledge of computer hardware architecture and organization.

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    © All Rights Reserved
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    of 1

    Code No: R1622054 R16 SET - 1

    II B. Tech II Semester Regular/Supplementary Examinations, November - 2020


    COMPUTER ORGANIZATION
    (Com to CSE, IT, ECC)
    Time: 3 hours Max. Marks: 70
    Note: 1. Question Paper consists of two parts (Part-A and Part-B)
    2. Answer ALL the question in Part-A
    3. Answer any FOUR Questions from Part-B

    PART –A
    1. a) Differentiate multi computers and multi processors. (2M)
    b) Define the terms instruction code and operation code. (2M)
    c) Describe the different types of DRAMS. (2M)
    d) Write about memory hierarchy in computer system? (2M)
    e) Explain with example the implementation of register transfer? (3M)
    f) Write sequence of micro-operations for the fetch cycle of basic computer. (3M)
    PART –B
    2. a) Design a bus system for interconnecting four n bit registers (7M)
    b) Design a 4-bit arithmetic circuit which implements addition, subtraction, (7M)
    Increment and decrement operations.

    3. a) Differentiate relative and absolute addressing modes for branch instructions. (7M)
    b) Describe, with proper examples, the role of processor stack in subroutine call (7M)
    and return.

    4. a) Design an adder/subtractor circuit with one selection variable s and two inputs (7M)
    A and B. When s=0, the circuit performs A+B and when s=1 it performs A-B,
    by taking 2's complement of B.
    b) List the different type of Arithmetic and logic Instruction with suitable (7M)
    examples.

    5. a) Differentiate between Synchronous Bus, Asynchronous bus, Interface Circuits. (7M)


    b) Explain briefly about Direct memory Access. Why does DMA have Priority (7M)
    over the CPU when both request a memory transfer?

    6. a) Compare and contrast between Asynchronous DRAM and Synchronous (7M)


    DRAM.
    b) Define Virtual Memory. Explain the process of converting virtual addresses to (7M)
    physical addresses with a neat diagram.

    7. a) Draw the block diagram of microprogram sequencer for a control Memory and (7M)
    explain.
    b) Explain the design of a 4bit Arithmetic unit with two selection variables, which (7M)
    performs the basic arithmetic functions.
    1 of 1
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