Ldica A Course

St.
PETER’S ENGINEERING COLLEGE

(An ISO Certified Institution) (Sponsored by Shantha Educational Society)
(Approved by AICTE, Ne (Approved by New Delhi, Affiliated to JNTUH)
Giving Wings to Thoughts
Accredited by NA NAAC with ‘A’ grade (For CSE, ECE & EEE)
Department of Electronics and Communication Engineering

COURSE FILE CHECK LIST
NAME OF FACULTY: I.Obulesu NAME OF COURSE: LDIC
COURSE CODE: EC502PC B.Tech: III Sem: I
S.N PAGE
O CONTENTS NOS
1 Course/Subject Name
2
Prepared by - Faculty Name
3
Dept
4
AY/Sem
5
Class
6 V / M / PEO / POs /PSOs
7 Course syllabus including Course Structure
8 Course Outcomes (CO)
9
Mapping CO with PO/PSO; course with PO/PSO
Academic Calendar
10 Time table - highlighting your course periods including tutorial

11 Lesson plan with number of hours/periods, TA/TM, Text/Reference book
12 Gap within the syllabus - mapping to CO, PO/PSO
13 Gaps beyond the syllabus - Mapping to PO/PSO
14 Gaps addressed by a recourse person - document

15 Gaps addressed by any other teaching aid/methodology
16 Web references
17 Lecture notes
18 List of Power point presentations / Videos
19 CD with PPT/Videos
20 University Question papers
21 Internal Question papers, Key with CO and Blooms Levels of learning (BLL)
22 Assignment Question papers mapped with CO and BLL
23 Scheme of evaluation with CO and BLL mapping
24 Tutorial topics with evidence
25 Identifying weak and advanced learners before the semester start by previous semester performance and pre-
requisite course
26 Identifying weak and advanced learners after 3 weeks of observations
27 Identifying weak and advanced learners after 1st Mid
28 Remedial class for weak students - schedule and evidences
29 Bright students engagement documentation
30 Result Analysis at the end of the course
Maisammaguda,Opp.ForestAcademy,Dhulapally,NearKompally,Medchal(M),R.R.Dist.,Hyderabad-500 014.,T.S.INDIA
Tel: 040-65222235 * Mobile :9959222268,Email: principal@stpetershyd.com * www.stpetershyd.com
St. PETER’S ENGINEERING COLLEGE
31 Course Assessment
32 CO, PO/PSO attainment
33 Observation for not attaining CO or for improvement
34 Plan of action to improve CO attainment next time
35 Attendance register
36 Course file (Digital form)
Verified By
Name:
Signature:
Coordinator
ST. PETER’S ENGINEERING COLLEGE

(Approved by AICTE, Affiliated to JNTU Hyderabad)

Opp: AP Forest Academy, Dhullapally, Near Kompally, Secunderabad - 500010
DEPARTMENT
OF
ELECTRONICS AND COMMUNICATION ENGINEERING
Name of the course : Linear and Digital IC Applications
Name of the Faculty : I.Obulesu, Assistant professor
Name of the Dept. : Electronics & Communication Engineering
Course Code : EC502PC [C312]
Academic year : 2019-20
Class : III Year B.Tech. ECE I – Sem, A, B- Sec
SPEC/ECE/UG/CF-0403/2019 – 20
CERTIFICATE OF AUTHENTICATION
This is to certify that I.Obulesu of Electronics and Communications
Engineering Department has prepared the course material for Linear & Digital IC
Applications Subject Code: EC502PC of Jawaharlal Nehru Technological
University, Hyderabad for the academic year 2019-20. The contents of this
course/teaching module have not been reproduced elsewhere in any books or journals.
This is the sole property of St. Peter’s Engineering College, Hyderabad to be

referred by staff and students.
Name of the Faculty: I.Obulesu HOD

(ECE department)
Signature
COURSE INFORMATION SHEET
PROGRAMME: B.Tech COURSE: Linear & Digital Integrated Circuit & Applications
COURSE CODE: EC502PC (C312) REGULATION: R16 AY:2019-20 SEMESTER: I CREDITS: 4
COURSE TYPE: Professional Corery PO Mapped:Yes
COURSE AREA/DOMAIN: PEO Mapped:Yes
CONTACT HOURS: 4+1 (Tutorial) hours/Week CORRESPONDING LAB COURSE CODE:-
EC505PC&EC506PC
LAB COURSE NAME:-LICA Lab & DICA Lab
SYLLABUS:
UNIT DETAILS HOURS
I OPERATIONAL AMPLIFIER: Ideal and Practical Op-amp, Op-amp characteristics, DC and AC
characteristics, Features of 741 op-amp, Modes Of Operation-Inverting, Non-Inverting, Differential.
Instrumentation Amplifier, AC amplifier, Differentiators and Integrators, Comparators, Schmitt 14
trigger, Introduction to Voltage Regulators, features of 723 regulator, Three terminal voltage
regulator.
II OP-AMP,IC-555& IC-565 APPLICATIONS: Introduction to active filter Characteristics of band
pass, Band reject and all pass filters, Analysis of 1st order LPF, HPF Butterworth filters, Waveform
Generators – Triangular, saw tooth, square wave, IC 555 timer-functional diagram, monostable and 10
astable operations and applications ,IC 565 PLL-block schematic description of individual blocks
,applications.
III DATA CONVERTERS: Introduction, Basic DAC techniques, Different types of DAC, Weighted
Resistor DAC, R-2R ladder DAC, Inverted R-2R DAC, Different types of ADCs - Parallel
7
Comparator type ADC, Counter type ADC, Successive Approximation ADC and Dual slope ADC.
DAC and ADC specifications
IV DIGITAL INTEGRATED CIRCUITS: Classification of Integrated circuits, Comparison of
various logic families, specifications and application of TTL-74XX & code Converters ,Decoders,
Demultiplexers, LED & LCD decoder with drivers, Encoder, priority Encoder, Multiplexers, 10
Demultiplexers, Priority Generators/Checker circuits, Parallel Binary Adder/Subtractor Circuits
,Magnitude Comparators
V SEQUENTIAL CIRCUITSFamiliarity with commonly available 74XX & CMOS 40XX Series -All
types of Flip-flops. Synchronous counters. Decade counter, Shift Registers .Memories: ROM 10
architecture, Types of ROMS & Applications, RAM architecture, Static & Dynamic RAMs.
TOTAL 51
TUTORIAL HOURS 13
UNITWISE TEST 5
CLASSES BEYOND SYLLABUS 2
GAPS IN THE SYLLABUS 2
TOTAL HOURS 73
TEXT/REFERENCE BOOKS:
T/ BOOK TITLE/AUTHORS/PUBLICATION
R
T1 Op-Amps & Linear ICs – Ramakanth A. Gayakwad, PHI, 2003
T2 Digital Fundamentals – Floyd and Jain, Pearson Education,8th Edition, 2005.
R1 Linear Integrated Circuits –D. Roy Chowdhury, New Age International (p) Ltd, 2nd Ed., 2003.
R2 Op Amps and Linear Integrated Circuits concepts and applications James M.Fiore, Cenage Learning/Jaico,
2009
R3 Operational Amplifier with Linear Integrated Circuits by K.Lal Kishore – Pearson, 2009
R4 Linear Integrated Circuits and Applications – Salivahanan, Mc Graw Hill Education
R5 Modern digital electronics- RP Jain - 4/e – Mcgraw Hill Education, 2010
COURSE PRE-REQUISITES:
S.No Course code Course Name
1 Pulse Digital Circuits
2 Switching Theory Logic Design
COURSE OBJECTIVES:
1 To introduce the basic building blocks of linear integrated circuits

2 To illustrate the linear and non linear applications of operational amplifier.
3 To teach the applications of analog multipliers and PLL
4 To introduce the concept of Waveform generation and some special function of ICs
5 To enable the students to understand the concepts of ADC and DAC
6 To Understand and Implement the working of basic digital circuits.
COURSE OUTCOMES:
SNO DESCRIPTION POMAPPING
1 To Recognize the basic building blocks of linear integrated circuits 1,3
2 To Demonstrate the applications of operational Amplifier and some special function IC,s 2,3,5
3 To Analyze the the operations of ADC and DAC 1,5
4 To Discuss the applications of various Digital logic Families of combinational Logic Ics 2,3
5 To Analyze the functions and applications of Sequential logic Ics 1,3
6 To Design the architecture of memories 1,3

GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION REQUIREMENTS:
SN DESCRIPTION PROPOSEDACTIONS
O
1 Transistorized differential amplifier Lecture
2 Switched Capacitor filter vedio
TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:

SNO DESCRIPTION PO MAPPING
1 IC Fabrication 1,3
2 Voltage to current converter 2,3,5
WEB SOURCE REFERENCES:
1. https://www.allaboutcircuits.com/technical-articles/characteristics-of-operational-amplifiers/
2. http://www.circuitstoday.com/pll-phase-locked-loops
3. https://www.maximintegrated.com/en/app-notes/index.mvp/id/5074
4. https://www.brighthubengineering.com/diy-electronics-devices/61375-what-are-the-major-ic-digital-logic-
families/
DELIVERY/INSTRUCTIONAL METHODOLOGIES:
☑CHALK & TALK ☑ STUD. ASSIGNMENT ☑ WEB RESOURCES
☑ LCD/SMART BOARDS ☑ STUD. SEMINARS ☐ ADD-ON COURSES
ASSESSMENT METHODOLOGIES-DIRECT
☑ ASSIGNMENTS ☑ STUD. SEMINARS ☑ TESTS/MODEL ☑ UNIV.
EXAMS EXAMINATION
☑ STUD. LAB ☐ STUD. VIVA ☐ MINI/MAJOR ☐ CERTIFICATIONS
PRACTICES PROJECTS
☐ ADD-ON COURSES ☐ OTHERS
ASSESSMENT METHODOLOGIES-INDIRECT
☑ ASSESSMENT OF COURSE OUTCOMES (BY ☑ STUDENT FEEDBACK ON FACULTY
FEEDBACK, ONCE) (TWICE)
☐ ASSESSMENT OF MINI/MAJOR PROJECTS BY ☐ OTHERS
EXT. EXPERTS
Prepared by Approved by
Mr.I.Obulesu HOD-ECE
INSTITUTE VISION
Our vision is to promote quality education accessible to all sections of the Society without any
discrimination of caste, creed, color, sex and religion and help students discover their true potential.
INSTITUTE MISSION
M1.To provide integrated, continuous and wholesome development of students by equipping
them with knowledge and skills, social values and ethics, scientific attitude and Orientations
for lifelong education and mold them into useful citizens of the society.
M2. To create an environment conductive to inhibiting theirs total involvement and
participation of the students, faculty, staff and management. In making the institution into
a center of excellence imparting quality technical education and also arms the students with the
competence to be at the forefront of cutting edge technology and entrepreneurship in highly
competitive global market.
Principal

DEPARTMENT VISION
To Evolve the department as a centre of excellence in Electronics and Communication Engineering

education in the country, to train students in contemporary technologies to meet the needs of global
industry and to develop them into skilful engineers imbued with knowledge of core as well as inter-
disciplinary domains, human values and professional ethics.
DEPARTMENT MISSION
 To adopt pedagogical processes to meet the educational objectives and outcomes of B.Tech
programme in Electronics and Communication Engineering.
 To train students to take up projects in core and inter-disciplinary areas in tune with the industry,
leading to research.
 To build a team to foster research and development.
 To create an environment in improving qualifications leading to innovation.
 To develop infrastructure necessary for research through collaboration with leading organization in
India and abroad.
HOD-ECE

PROGRAM EDUCATIONAL OBJECTIVES (PEO’S):
1. Graduates shall have a solid foundation and in-depth knowledge in engineering, science and
technology for a successful career in Electronics and Communication Engineering.
2. Graduates shall become effective collaborators / innovators in efforts to address social, technical
and engineering challenges.
3. Graduates shall engage in professional development through self-study, post graduation and
research.
4. Graduates shall have integrity and ethical values, team spirit and good communication skills.
PROGRAM OUTCOMES (PO’S):
1. ENGINEERING KNOWLEDGE: Apply the knowledge of mathematics, science, engineering fundamentals, and an
engineering specialization to the solution of complex engineering problems.
2. PROBLEM ANALYSIS: Identify, formulate, research literature, and analyze complex engineering problems
reaching substantiated conclusions using first principles of mathematics, natural sciences, and engineering sciences.
3. DESIGN/DEVELOPMENT OF SOLUTIONS: Design solutions for complex engineering problems and design
system components or processes that meet the specified needs with appropriate consideration for the public health and
safety, and the cultural, societal, and environmental considerations.
4. CONDUCT INVESTIGATIONS OF COMPLEX PROBLEMS: Use research-based knowledge and research

methods including design of experiments, analysis and interpretation of data, and synthesis of the information to
provide valid conclusions.
5. MODERN TOOL USAGE: Create, select, and apply appropriate techniques, resources, and modern engineering and
IT tools including prediction and modelling to complex engineering activities with an understanding of the limitations.
6. THE ENGINEER AND SOCIETY: Apply reasoning informed by the contextual knowledge to assess societal,
health, safety, legal and cultural issues and the consequent responsibilities relevant to the professional engineering
practice.
7. ENVIRONMENT AND SUSTAINABILITY: Understand the impact of the professional engineering solutions in
societal and environmental contexts, and demonstrate the knowledge of, and need for sustainable development.
8. ETHICS: Apply ethical principles and commit to professional ethics and responsibilities and norms of the
engineering practice.
9. INDIVIDUAL AND TEAM WORK: Function effectively as an individual, and as a member or leader in diverse
teams, and in multidisciplinary settings.
10. COMMUNICATION: Communicate effectively on complex engineering activities with the engineering
community and with society at large, such as, being able to comprehend and write effective reports and design
documentation, make effective presentations, give and receive clear instructions.
11. PROJECT MANAGEMENT AND FINANCE: Demonstrate knowledge and understanding of the engineering
and management principles and apply these to one’s own work, as a member and leader in a team, to manage projects
and in multidisciplinary environments.
12. LIFE-LONG LEARNING: Recognize the need for, and have the preparation and ability to engage in independent
and life-long learning in the broadest context of technological change.
PROGRAM SPECIFIC OUTCOMES (PSO)

PSO1: Ability to use electronic modern IT tools (both software and hardware) for the design and analysis of complex
electronic systems for additional research activities.
PSO2: Should be able to clearly understand the concepts and applications in the field of communication/ networking,
signal processing, embedded systems and semiconductor technology for excellent adaptability, good interpersonal skills
with professional ethics and societal responsibilities.
HOD-ECE

Name of the Faculty: Mr. I.Obulesu Class: III ECE-I SEM
Course Name: Linear & Digital IC Applications Course Code: EC502PC
Academic Year: 2019-20
Course objectives
1 To introduce the basic building blocks of linear integrated circuits
2 To illustrate the linear and non linear applications of operational amplifier.

3 To teach the applications of analog multipliers and PLL
4 To introduce the concept of Waveform generation and some special function of ICs
5 To enable the students to understand the concepts of ADC and DAC
6 To Understand and Implement the working of basic digital circuits.
Course outcomes
Course Bloom’s
Course Outcome Statement
Outcome Taxonomylevel
C312.1 To recognize the basic building blocks of linear integrated circuits Knowledge
To demonstrate the applications of operational Amplifier and some Application
C312.2
special function IC,s
C312.3 To Analyze the operations of ADC and DAC Analysis
To discuss the applications of various Digital logic Families of Comprehension
C312.4
combinational Logic Ics
C312.5 To Analyze the functions and applications of Sequential logic Ics Analysis
C312.6 To design the architecture of memories Synthesis

Name of the Faculty: Mr.I.Obulesu Class: III ECE-I SEM

Course Name: Linear and Digital IC Application Course Code: EC502PC
CO-PO MAPPING
PO PO PO PO PO PO PO PO PO PO PO PO PSO PSO
1 2 3 4 5 6 7 8 9 10 11 12 1 2
C312.1 3 2 2
C312.2 1 3 2 3 2
C312.3 2 3 2
C312.4 3 2 2
C312.5 1 3 1
C312.6 1 2
1.75 2 2.5 2.33 2.5 1.75
C312.1 To recognize the basic building blocks of linear integrated circuits Knowledge
Justification
PO1 Students get the knowledge of engineering fundamentals to understand the basic blocks of
linear Integrated Circuits such as Inverting amplifier, Non Inverting amplifier(Level 3)
PO3 Students will able to design the linear circuit system such as differentiator, Integrator (Level
2)
PSO2 Students will be able to clearly understand the concepts such as characteristics, modes of
operation and features of Operational amplifier (Level2)
To demonstrate the applications of operational Amplifier and some Application

C312.2
special function IC,s
Justification
PO2 Students will able identify the different applications of Op amp, Timer and IC565 (Level 1)
PO3 Students will able to design the circuits such as wave form generators, PLL and Filters
(Level 3)
PO5 Students will able to create and choose appropriate filter such as high pass filter, band reject
filter to the complex engineering problems.(Level 2)
PSO1 Students will be able to design and analysis the filters for the complex electronic systems
(Level 3)
PSO2 Students will be able to understand the concept of PLL(Level 2)
C312.3 To Analyze the operations of ADC and DAC Analysis

Justification
PO1 Students will able to distinguish different types of ADC and DAC (Level 2)
PO5 Students will able to Analyze and select the appropriate ADC and DAC techniques such as
R-2R ladder ADC, counter DAC(Level 3)
PSO1 Students will able to Analyze and choose and use appropriate ADC and DAC(Level 2)
To discuss the applications of various Digital logic Families of Comprehension

C312.4
combinational Logic Ics
Justification
PO2 Students will able to analyze the various digital logic families of combinational Logic
ICs(Level 3)
PO3 Students will able to design a digital circuits such as encoder, decoder and code
converter(Level 2)
PSO2 Students will able to understand the concept of various digital logic families (level 2)
C312.5 To Analyze the functions and applications of Sequential logic Ics Analysis
Justification
PO1 Students will able to understand the concept of sequential logic circuit.(Level 1)
PO3 Students will able to Analyze and design a digital circuits such as shift register and
counter(Level 3)
PSO2 Students will able to understand the concepts of sequential logic IC (level1)
C312.6 To design the architecture of memories Synthesis
Justification
PO1 Students will able to understand and design the memories(Level 1)
PO5 Students will able to investigate and choose the appropriate type of memory (Level 2)
Faculty Signature
Name of the Faculty: Mr.I.Obulesu Class: III ECE-I SEM

Course Name: Linear and Digital IC Application Course Code: EC502PC

LESSON PLAN
TEXT
LECTURE TEACHING BOOK/RE
.NO LECTURE TOPIC
NUMBER METHOD FERENCE
BOOK
UNIT.1: Operational Amplifiers
1. Lecture 1 Introduction Chalk Board TB-1
2. Lecture 2 Ideal & Practical OP-AMP Chalk Board TB-1
3. Lecture 3 Op-Amp Characteristics - AC Characteristics VEDIO TB-1
4. Lecture 4 DC Characteristics Chalk Board TB-1
Tutorial-1
5. Lecture 5 Features of 741 OP-Amp, Modes of Operation Chalk Board TB-1
6. Lecture 6 Modes of Operation Chalk Board TB-1
7. Lecture 7 Inverting Amplifier Chalk Board TB-1
8. Lecture 8 Non Inverting Amplifier SEMINAR TB-1
Tutorial-2
9. Lecture 9 Differential Amplifier Chalk Board TB-1
10. Lecture 10 Instrumentation Amplifier Chalk Board TB-1
11. Lecture 11 AC Amplifier, Differentiator & Integrator Chalk Board TB-1
12. QUIZ Previous Topics Chalk Board TB-2
Tutorial-3
13. Lecture 12 Comparator Chalk Board TB-1
14. Lecture 13 Schmitt Trigger Chalk Board TB-1
15. Lecture 14 Introduction to voltage Regulator, Three terminal Chalk Board TB-1
Voltage Regulator
Tutorial-4
UNIT-II Op-Amp, IC555 & IC565 Applications:
16. Lecture 15 Introduction to active Filters Chalk Board TB-1
17. Lecture 16 Characteristics of Band pass, Band reject and all pass Chalk Board TB-1
Filters.
18. Lecture 17 Analysis of I order LPF & HPF Butterworth Filter Chalk Board TB-1
19. Lecture 18 Waveform Generators- Triangular, Saw tooth and Chalk Board TB-1
Square Wave
Tutorial-5
20. Lecture 19 IC 555 timer Functional Diagram Chalk Board TB-1
21. Lecture 20 Monostable & Astable Operation & Applications Chalk Board TB-1
22. Lecture 21 IC565 PLL Chalk Board TB-1
23. Lecture 22 Block Schematics Chalk Board TB-1
Tutorial-6
24. Lecture 23 Description of Individual block Chalk Board TB-1
25. Lecture 24 Applications Chalk Board TB-1
26. UNIT-III Data Converters
27. Lecture 25 Introduction, Basic DAC Techniques Chalk Board TB-1
Tutorial-7
28. Lecture 27 Different types of DAC, Weighted Resistor DAC Chalk Board TB-1
29. Lecture 28 R-2R Ladder DAC PPT TB-1
30. Lecture 29 Inverted R-2R DAC Chalk Board TB-1
Tutorial-8
31. Lecture 30 Different types of ADC, Parallel Comparator Type Chalk Board TB-1
ADC
32. Lecture 31 Counter Type ADC, Successive Approximation ADC Chalk Board TB-1
33. Lecture 32 Dual Slope ADC, ADC & DAC Specifications Chalk Board TB-1
Tutorial-9
34. Lecture 33 UNIT-IV Digital Integrated Circuits
35. Lecture 34 Classifications of IC, Comparison of Various Logic Chalk Board TB-2
Families
36. Lecture 35 CMOS Transmission Gate Chalk Board TB-2
37. Lecture 36 IC Interfacing Chalk Board TB-2
38. Lecture 37 TTL driving CMOS & CMOS driving TTL, Chalk Board TB-2
Combinational Logic Ics
Tutorial-10
39. Lecture 38 Specifications & Applications of TTL-74XX, CMOS Chalk Board TB-2
40XX Series IC
40. Lecture 39 Code Converters Chalk Board TB-2
41. Lecture 40 Decoders, LED & LCD decoders with drivers Chalk Board TB-2
42. Lecture 41 Encoders, Priority Encoders Chalk Board
Tutorial-11
43. Lecture 42 Multiplexers & Demultiplexers Chalk Board TB-2
44. Lecture 43 Parity Generator/Checker, Parallel Binary Adder/ Chalk Board TB-2
Subtractor, Magnitude Comparator
45. UNIT-V Sequential Logic ICs & Memories
46. Lecture 44 Familiarity with commonly available 74XX & CMOS Chalk Board TB-2
40XX series ICs
Tutorial-12
47. Lecture 45 All types of FF Chalk Board TB-2
48. Lecture 46 Synchronous Counters Chalk Board TB-2
49. Lecture 47 Decade Counters Chalk Board TB-2
50. Lecture 48 Shift Register Chalk Board 014.,T.S.INDIA

Maisammaguda,Opp.ForestAcademy,Dhulapally,NearKompally,Medchal(M),R.R.Dist.,Hyderabad-500 TB-2
Tutorial-13
51. Lecture 49 Memories NPTEL VEDIO TB-2
52. Lecture ROM architecture Chalk Board TB-2
53. Lecture 63 Types of ROM & Applications Chalk Board TB-2
54. Lecture 64 RAM Architecture Chalk Board TB-2
55. Lecture 65 Static & Dynamic RAM Chalk Board TB-2
56. Lecture 66 Transistorized Differential Amplifier Chalk Board
57. Lecture 67 Switched Capacitor Filter video
58. Lecture 68 IC Fabrication Chalk Board
Text Books:
T1 Linear Integrated Circuits –D. Roy Chowdhury, New Age International (p) Ltd, 2nd Ed.,2003.
T2 Op-Amps & Linear ICs – Ramakanth A. Gayakwad, PHI, 1987.
T3 Digital Fundamentals – Floyd and Jain, Pearson Education,8th Edition, 2005
WEB SOURCE REFERENCES:
W1  www.electronics-tutorials.ws › Operational Amplifiers

https://en.wikipedia.org/wiki/Operational_amplifier
W2 https://web.sonoma.edu/users/m/marivani/es231/units/experiment_02.shtml
W3 http://www.learnabout-electronics.org/Amplifiers/amplifiers64.php
W4 http://www.electronics-tutorials.ws/opamp/opamp_1.html
W5 https://books.google.co.in/books/about/Linear_Ic_Applications.html?id
W6  nptel.ac.in/courses/108106069/
https://en.wikipedia.org/wiki/Integrated_circuit_design
VIDEO REFERENCES:
V1 https://video.search.yahoo.com/search/video?
fr=tightropetb&p=OPAMP+CHARACERITICS+VEDIO#id=7&vid=268cb73be95a5bf3e8250b96934ff9
94&action=view
V2 https://video.search.yahoo.com/search/video?
fr=tightropetb&p=OPAMP+CHARACERITICS+VEDIO#id=8&vid=dafca97bd2bd55855ffd1dec420775
d6&action=view
V3 WWW.NPTEL.COM/LDICA
nptel.ac.in/courses/108106069
Faculty Signature HOD-ECE

Gap within the syllabus

S.No Topic CO PO
1. Transistorized Differential Amplifier C312.1 PO1,3 & PSO2
2. Switched Capacitor Filter C312.2 PO2,3,5

&PSO1,2
Topic beyond the syllabus

S.No Topic CO PO
1. IC fabrication C312.1 PO1,3 & PSO2
2. Voltage to current converter C312.2 PO2,3,5

&PSO1,2
Faculty Incharge HOD-ECE

Web Reference
S.No. Topic Website
1. Characteristics of https://www.allaboutcircuits.com/technical-articles/characteristics-of-
OP-Amp operational-amplifiers/
2. PLL http://www.circuitstoday.com/pll-phase-locked-loops
3. ADC https://www.maximintegrated.com/en/app-notes/index.mvp/id/5074
4. Classification of https://www.brighthubengineering.com/diy-electronics-devices/61375-what-
Digital Logic are-the-major-ic-digital-logic-families/
Families
Faculty Signature HOD-ECE

List of PPT and Videos

S.No. Topic PPT / Video
1. IC Processing PPT
2. Basics of Op-Amp Video
3. Characteristics of OP-AMP PPT
4. Monostable Multivibrator Video
5. Successive Approximation ADC Video
6. Introduction and classification of digital logic Video

families
7. Memories PPT

ASSINGNMENT-I
S.No Questions CO Blooms

Taxonomy
1. Design a differentiator circuit that will differentiate the input C312.1 Evaluation
signal with Fmax=100HZ
2. Explain the method of boosting the current of a three terminal C312.2 Comprehension
voltage regulator.
3. Draw the block diagram of 565 PLL and explain about each C312.2 Application
block. Make a circuit connection to track the input signal and
explain its operation.
4. Draw the circuit diagram of schmitt trigger using 555 timer and C312.2 Application
explain its operation.
5. With a neat diagram explain the operation of R-2R laddar type C312.3 Comprehension
DAC.
ASSINGNMENT-II
S.No Questions CO Blooms

Taxonomy
1. Design and explain 4-bit synchronous down counter using IC. C312.5 Synthesis
2. Explain the internal structure of internal RAM. C312.6 Comprehension
3. Design a 5 to 32 line decoder using 3 to 8 line decoder, active C312.4 Synthesis

low ouutputs with2 active low and 1 active high enable.
4. Draw and explain the block diagram of n-bit parallel binary C312.4 Comprehension
adder and subtractor.
5. What is the conversion time of 10 bit successive approximation C312.3 Synthesis
ADC if its input clock is 5MHZ?

UNIT WISE QUESTION BANK
UNIT – I :
2 Marks
1. Define input offset voltage. ( Nov/Dec 2017)

2. Show the standard representation of IC Voltage regulator(March 2017)
3. Define unity gain bandwidth of an opamp.(Dec 2016)
4. Significance and definition of upper and lower threshold points of Schmitt trigger(Nov 2015)
3 Marks
5. List the features of 741 Op-Amp ( Nov/Dec 2017)
6. Explain the precautions that can be taken to minimize the effect of noise on an Op-amp circuit(March 2017)
7. Define slew rate. What causes it? (Dec 2016)
8. Mention the reason why open loop is not preferred for linear applications. (Nov 2015)
9. What is an Op-amp?Why it is so called? (May -2005)
5 Marks
10. Explain the working of Instrumentation amplifier with neat diagram.( Nov/Dec 2017)
Draw the circuit of a two input non inverting type summing amplifier and derive the expression fpr output voltage.
11.
12. Design a differentiator circuit that will differentiate the input signal with Fmax=100HZ(March 2017)
13. Explain the method of boosting the current of a three terminal voltage regulator. (March 2017)
What are the difference between inverting and non inverting terminal? What do you mean by the term Virtual
14.
ground? (March 2017)
15. Draw and explain the output waveform of ideal inverter circuit when the input is square wave..(Dec 2016)
16. Explain why emitter follower circuit is used as level shifter. (Nov 2015)
UNIT – II :
2 Marks
17. Discuss about all pass filters. ( Nov/Dec 2017)

18. Define stable and quasi stable state. (March 2017)
19. What is switched capacitor filter? .(Dec 2016)
20. List the various applications of IC 555(Nov 2015)
3 Marks
21. List the applications of 565 PLL( Nov/Dec 2017)
22. Draw the circuit diagram of second order high pass filter and write the transfer function. (March 2017)
23. Draw the circuit diagram of AM detector using PLL. .(Dec 2016)
24. Differentiate Bessel, Butterworth and Chebyshev filter(Nov 2015)
25. What are the advantages and limitations of active filter over passive ones? (Dec-2012)
5 Marks
Draw the block diagram of 565 PLL and explain about each block. Make a circuit connection to track the input
26.
signal and explain its operation.( Nov/Dec 2017)
Design a wide band pass filter with fL=500HZ and fH=2KHZ and a pass band gain =5 for both section of filter.
27. Determine the value of Q.( Nov/Dec 2017)
28. Design and explain the operation of all pass filterwith its characteristics. (March 2017)
29. Draw the circuit diagram of schmitt trigger using 555 timer and explain its operation. (March 2017)
30. Draw the circuit diagram of PLL AM detector and explain its operation. (March 2017)
31. Explain the operation of monostable multivibrator using IC 555. Derive the expression of time delay..(Dec 2016)
For the given component value find the free running frequency, Vc=10.9V, Vcc=12V, R1=4.7K and C1=1.1NF.
32. (Dec 2016)
UNIT – III :
2 Marks
33. List the different ADC and DACs ( Nov/Dec 2017)

34. Which type of ADC is Fastest? Why? .(Dec 2016)
35. Define resolution and linearity(Nov 2015)
36. Draw the block diagram of Counter type ADC. (Dec-2006)
3 Marks
37. List the specifications of DAC ( Nov/Dec 2017)
38. What do you mean by quantization erroring an ADC? (March 2017)
39. An 8 bit DAC has a resolution of 20mv/bit. What is analog output voltage? .(Dec 2016)
40. Compare R-2R and weighted resistor type of ADC(Nov 2015)
41. Write a note on multiplying DACs. (Dec -2011)
5 Marks
42. Which is the fastest ADC? Discuss the operation of it, merits and demerits.( Nov/Dec 2017)
43. With a neat diagram explain the operation of R-2R laddar type DAC.( Nov/Dec 2017)
44. Draw the schematic block diagram of dual slope ADC and explain its operation. (March 2017)
45. What is the conversion time of 10 bit successive approximation ADC if its input clock is 5MHZ? (March 2017)
46. List the specifications of DAC(March 2017)
47. What do you mean by quantization error in ADC?.(Dec 2016)
48. What are the limitation of weighted resistor type DAC? .(Dec 2016)
UNIT – IV :
2 Marks
49. Which of the parameters decide the fan out and how? ( Nov/Dec 2017)
50. Give the working principle of analog multiplexer. (March 2017)
51. Mention any 2 applications of Multiplier IC.(Dec 2016)
52. What is meant by tristate logic? (Nov 2015)
3 Marks
53. Explain Noise margin and propagation delay with respect to CMOS logic ( Nov/Dec 2017)
54. How to interface the TTL logic to CMOS logic(March 2017)
55. Realize EX-OR gate with CMOS circuit. .(Dec 2016)
56. What is the purpose of priority encoder? (Nov 2015)
57. What are the merits of TTL gate if collector is open circuit? (Dec-2014)
5 Marks
58. With a neat circuit diagram explain the working 4-bit odd parity generator.( Nov/Dec 2017)
59. Design 16 X 1 multiplexer using 4 X 1 multiplexers.( Nov/Dec 2017)
60. Draw and explain the block diagram of n-bit parallel binary adder and subtractor. (March 2017)
61. What do you mean by carry propagation delay? Design a 4-bit carrylook ahead generation circuit. (March 2017)
Design a 5 to 32 line decoder using 3 to 8 line decoder, active low ouutputs with2 active low and 1 active high
62. enable. (March 2017)
Draw the basic DTL gate and explain its operation..(Dec 2016)
63.
Find the state diagram and state table of a binary coded decimal to excess-3 decoder. .(Dec 2016)
64.
UNIT – V :
2 Marks
65. What is race around condition? How is it avoided? ( Nov/Dec 2017)

66. What is meant by state diagram? (March 2017)
67. What is the difference between SRAM and DRAM? .(Dec 2016)
68. Write the applications of shift register. (Nov 2015)
3 Marks
69. Explain one application of SR Latch. ( Nov/Dec 2017)
70. Write the specifications of counter ICs. (March 2017)
71. Draw the block diagram 3-bit ring counter.(Nov 2015)
72. How synchronous counter differs from asynchronous counter? (Dec-2013)
5 Marks
73. Design a modulo 12 ripple counter using 74 X 74.( Nov/Dec 2017)
How many address and data lines are required to access all the location of dynamic RAM cell array specified
74. below?( Nov/Dec 2017)
A) the
Explain 4Moperation
X4 B) 1M X 1 Cell array.
of DRAM C) (March
4M X 12017)D) 1M X 4
75.
76. Design and implement of FIFO shift register using IC’s. (March 2017)
77. Explain the internal structure of internal RAM. (March 2017)
78. Design and explain 4-bit synchronous down counter using IC. (March 2017)
79. With the help of timing diagram explain read and write operation of SRAM.(Dec 2016)
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

IIIB.Tech I Semester
TUTORIAL CLASSES SUMMARY
Subject: Linear & Digital IC Applications Duration: 50 Min
For the benefit and improvement of the students, Department is conducting tutorial classes for IIIB.Tech, I-Sem
of ECE in the room number S-.41, 42
The summary of the tutorials are given below.
S.No DATE TOPIC DESCRIPTION
1. Inverting Amplifier Explanation of Inverting Amplifier
Characteristics of Op-Amp Explanation of Characteristics of Op-

2. Amp
3. AC Amplifier & Instrumentation Amplifier Explanation of Amplifier
Differentiator, Schmitt trigger Explanation of differentiator, Schmitt

4. trigger
5. Active Filter Explanation of filter
6. IC555 Timer Explanation of timer
7. A-D Converters Explanation of ADC
8. D-A Converters Problems on DAC
9. Code Converters Problems on Code converters
10. Encoder & Decoder Problems on encoder & Decoder
11. Counter Problems on counter
12. Shift register Universal Shift register
13. Memories DRAM memories
Subject In-charge Name:I.Obulesu HOD-ECE

Name of Faculty: I.OBULESU Class: -ECE A, B
Name of the Course: Linear & Digital IC Applications Code: EC502PC
Tutorial Classes and Implementation
PROGRAMME: ECE Room No.: S-41, 42
TUTORIAL CLASSES
Subject LDICA
Class Involved III-I B.Tech ECE-A,B
Faculty in-charge I.Obulesu

No. of Students identified / Total Students
Basis of identification of students to Tutorial In Each subject we are conducting Tutorial classes
Classes for few topics where students feel more difficulty.
Contents Taught Inverting Amplifier
Date and venue of the Class ROOM: S
Yes
Approved by HOD
TUTORIAL CLASSES IMPLEMENTATION
% Attendance of the Tutorial Class
Attendance details is forwarded to Yes

HOD
Good
Effectiveness of the Class
Yes
Verification by HOD
Subject In-charge Name: I.Obulesu HOD-ECE

Name of Faculty: I.OBULESU Class: III-ECE A, B
TUTORIAL CLASSES
Subject LDICA
Contents Taught Characteristics of OP-AMP
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught AC Amplifier, Instrumentation Amplifier

Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught Differentiator, Schmitt Trigger

Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught Active Filter
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught IC555 Timer
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught ADC
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught DAC
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught Code Converter
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

PROGRAMME: ECE Room No.: S-41,42
TUTORIAL CLASSES
Subject LDICA
Contents Taught Encoder & Decoder
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught Counters
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught Shift Register
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

TUTORIAL CLASSES
Subject LDICA
Contents Taught Memories
Yes
Approved by HOD

HOD
Good
Yes
Verification by HOD

IDENTIFICATION OF WEAK AND ADVANCED LEARNERS BEFORE THE SEMESTER START
BY PREVIOUS SEMESTER PERFORMANCE AND PRE-REQUISITE COURSE
Advanced learners
S.No Roll Number of Name of the Student CPGA

Students
1 16BK1A0404 Ankita mondal A
2 16BK1A0410 Cherla harisha A
3 16BK1A0418 Gangula sreeja A
4 16BK1A0419 Desai Balraj BPLUS
6 16BK1A0424 Punith kumar BPLUS
7 16BK1A0425 Karampuri Gourinath BPLUS
8 17BK5A0403 Pasupunuri BPLUS
Weak learners
S. Roll Name of the CPGA

No Number of Student
Students
1 16BK1A0428 K Likithmouli C
2 16BK1A0430 M Murali Krishna C
4 16BK1A0436 N Nikhil C
5 16BK1A0439 P Karthik C
6 16BK1A0441 P Prem Prakash C
7 16BK1A0442 P Mohith C
8 16BK1A0447 Radika C
PDC (134CC) STLD (134CF)

Regd No G GP CR CP G GP CR CP
16841A04B0 C 5 4 4 B 6 3 3
16BK1A0401 F 0 4 0 F 0 3 0
16BK1A0402 F 0 4 0 F 0 3 0
16BK1A0403 C 5 4 4 F 0 3 0
16BK1A0404 B+ 7 4 4 B 6 3 3
16BK1A0405 B 6 4 4 C 5 3 3
16BK1A0406 B 6 4 4 F 0 3 0
16BK1A0407 B 6 4 4 F 0 3 0
16BK1A0408 B 6 4 4 F 0 3 0
16BK1A0409 F 0 4 0 F 0 3 0
16BK1A0410 A 8 4 4 B+ 7 3 3
16BK1A0411 C 5 4 4 F 0 3 0
16BK1A0412 C 5 4 4 F 0 3 0
16BK1A0413 F 0 4 0 F 0 3 0
16BK1A0414 C 5 4 4 F 0 3 0
16BK1A0415 B 6 4 4 F 0 3 0
16BK1A0416 C 5 4 4 C 5 3 3
16BK1A0417 F 0 4 0 F 0 3 0
16BK1A0418 B+ 7 4 4 C 5 3 3
16BK1A0419 A 8 4 4 B 6 3 3
16BK1A0420 B+ 7 4 4 C 5 3 3
16BK1A0421 F 0 4 0 F 0 3 0
16BK1A0422 C 5 4 4 F 0 3 0
16BK1A0423 C 5 4 4 C 5 3 3
16BK1A0424 B+ 7 4 4 B 6 3 3
16BK1A0425 B+ 7 4 4 B 6 3 3
16BK1A0426 F 0 4 0 F 0 3 0
16BK1A0427 B 6 4 4 C 5 3 3
16BK1A0428 C 5 4 4 C 5 3 3
16BK1A0429 F 0 4 0 F 0 3 0
16BK1A0430 C 5 4 4 C 5 3 3
16BK1A0431 F 0 4 0 C 5 3 3
16BK1A0432 F 0 4 0 F 0 3 0
16BK1A0433 B 6 4 4 C 5 3 3
16BK1A0434 B 6 4 4 C 5 3 3
16BK1A0435 C 5 4 4 F 0 3 0
16BK1A0436 C 5 4 4 B 6 3 3
16BK1A0437 B 6 4 4 B 6 3 3
16BK1A0438 B 6 4 4 C 5 3 3
16BK1A0439 C 5 4 4 C 5 3 3
16BK1A0440 B 6 4 4 C 5 3 3
16BK1A0441 C 5 4 4 C 5 3 3
16BK1A0442 C 5 4 4 C 5 3 3
16BK1A0443 C 5 4 4 F 0 3 0
16BK1A0444 C 5 4 4 C 5 3 3
16BK1A0446 F 0 4 0 F 0 3 0
16BK1A0447 C 5 4 4 C 5 3 3
16BK1A0448 B 6 4 4 B 6 3 3
16BK1A0449 C 5 4 4 B 6 3 3
16BK1A0450 C 5 4 4 C 5 3 3
16BK1A0451 C 5 4 4 C 5 3 3
16BK1A0452 F 0 4 0 C 5 3 3
16BK1A0453 C 5 4 4 C 5 3 3
16BK1A0454 C 5 4 4 B 6 3 3
16BK1A0456 C 5 4 4 F 0 3 0
16BK1A0457 C 5 4 4 C 5 3 3
16BK1A0458 C 5 4 4 B 6 3 3
16BK1A0460 F 0 4 0 F 0 3 0
16BK1A0461 F 0 4 0 F 0 3 0
16BK1A0462 C 5 4 4 C 5 3 3
16BK1A0464 F 0 4 0 F 0 3 0
16BK1A0466 C 5 4 4 C 5 3 3
16BK1A0468 C 5 4 4 B 6 3 3
16BK1A0469 C 5 4 4 F 0 3 0
16BK1A0470 B 6 4 4 B 6 3 3
16BK1A0471 C 5 4 4 F 0 3 0
16BK1A0472 C 5 4 4 C 5 3 3
16BK1A0473 C 5 4 4 C 5 3 3
16BK1A0474 C 5 4 4 C 5 3 3
16BK1A0476 C 5 4 4 F 0 3 0
16BK1A0477 C 5 4 4 C 5 3 3
16BK1A0478 B 6 4 4 B 6 3 3
16BK1A0479 C 5 4 4 B+ 7 3 3
16BK1A0480 C 5 4 4 C 5 3 3
16BK1A0482 B 6 4 4 B+ 7 3 3
16BK1A0483 C 5 4 4 B 6 3 3
16BK1A0484 F 0 4 0 F 0 3 0
16BK1A0485 C 5 4 4 C 5 3 3
16BK1A0486 C 5 4 4 F 0 3 0
16BK1A0487 F 0 4 0 B 6 3 3
16BK1A0488 F 0 4 0 F 0 3 0
16BK1A0489 C 5 4 4 B 6 3 3
16BK1A0490 F 0 4 0 F 0 3 0
16BK1A0491 B 6 4 4 C 5 3 3
16BK1A0492 F 0 4 0 F 0 3 0
16BK1A0493 B 6 4 4 A+ 9 3 3
16BK1A0494 F 0 4 0 F 0 3 0
16BK1A0496 B 6 4 4 C 5 3 3
16BK1A0497 B 6 4 4 B 6 3 3
16BK1A0498 C 5 4 4 B 6 3 3
16BK1A0499 C 5 4 4 B 6 3 3
16BK1A04A1 C 5 4 4 C 5 3 3
16BK1A04A2 F 0 4 0 F 0 3 0
16BK1A04A3 C 5 4 4 B 6 3 3
16BK1A04A4 C 5 4 4 F 0 3 0
16BK1A04A5 C 5 4 4 B 6 3 3
16BK1A04A6 F 0 4 0 F 0 3 0
16BK1A04A7 F 0 4 0 F 0 3 0
16BK1A04A8 F 0 4 0 F 0 3 0
16BK1A04B0 B 6 4 4 B+ 7 3 3
16BK1A04B1 B 6 4 4 B 6 3 3
16BK1A04B2 B+ 7 4 4 B+ 7 3 3
16BK1A04B5 F 0 4 0 F 0 3 0
16BK1A04B6 B 6 4 4 C 5 3 3
16BK1A04B7 F 0 4 0 F 0 3 0
16BK1A04B8 B+ 7 4 4 C 5 3 3
16BK1A04B9 F 0 4 0 F 0 3 0
17BK5A0401 B 6 4 4 C 5 3 3
17BK5A0402 B 6 4 4 C 5 3 3
17BK5A0403 A 8 4 4 B 6 3 3
17BK5A0406 F 0 4 0 F 0 3 0
17BK5A0407 C 5 4 4 C 5 3 3
17BK5A0408 C 5 4 4 F 0 3 0
17BK5A0409 B+ 7 4 4 C 5 3 3
17BK5A0410 B 6 4 4 C 5 3 3
17BK5A0411 B 6 4 4 C 5 3 3
17BK5A0412 C 5 4 4 C 5 3 3
17BK5A0413 C 5 4 4 F 0 3 0
17BK5A0414 B 6 4 4 B 6 3 3
Exam Branch
HOD ECE

IDENTIFYING WEAK AND ADVANCED LEARNERS AFTER 3 WEEKS
S.No Roll Number of Name of the Student

Students
1 16BK1A0407 N Nandini Kumar
2 16BK1A0410 Cherla harisha
3 16BK1A0414 Sai pramod
4 16BK1A0419 H Desai balaraj
6 16BK1A0424 K Punith Kumar
7 16BK1A0425 K Gourinath
8 16BK1A0427 K Anusha
9 16BK1A0457 T Sai Vardhan
10 16BK1A0458 D Vaibhav
S.No Roll Number of Name of the Student

Students
1 16BK1A0433 N Sahasra Reddy
2 16BK1A0444 P Maheshwari
3 16BK1A0450 S Prashanth
4 S Nikith
Maisammaguda,Opp.ForestAcademy,Dhulapally,NearKompally,Medchal(M),R.R.Dist.,Hyderabad-500
16BK1A0452 014.,T.S.INDIA
5 16BK1A0429 K Chandra Sreesh Goud

IDENTIFYING WEAK AND ADVANCED LEARNERS AFTER 1ST MID
ADVANCED LEARNERS
S.No Roll Number of Name of the Student LDICA1 MID MARKS(25)

Students
1 16BK1A0407 N Nandini Kumar 22
2 16BK1A0410 Cherla harisha 21
3 16BK1A0414 Sai pramod 21
4 16BK1A0419 H Desai balaraj 21
6 16BK1A0424 K Punith Kumar 22
7 16BK1A0425 K Gourinath 22
8 16BK1A0427 K Anusha 23
9 16BK1A0457 T Sai Vardhan 22
10 16BK1A0458 D Vaibhav 22
WEAK LEARNERS
S.No Roll Number of Name of the Student LDICA1 MID MARKS

Students
1 16BK1A0431 M Manvitha 14
2 16BK1A0433 N Sahasra Reddy 14
4 16BK1A0444 P Maheshwari 14
5 16BK1A0450 S Prashanth 14
6 16BK1A0452 S Nikith 14
7 16BK1A0429 K Chandra Sreesh Goud 11
HOD ECE

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St.

PETER’S ENGINEERING COLLEGE

Department of Electronics and Communication Engineering

COURSE CODE: EC502PC B.Tech: III Sem: I

10 Time table - highlighting your course periods including tutorial

14 Gaps addressed by a recourse person - document

ST. PETER’S ENGINEERING COLLEGE

(Approved by AICTE, Affiliated to JNTU Hyderabad)

ELECTRONICS AND COMMUNICATION ENGINEERING

Name of the course : Linear and Digital IC Applications

Name of the Faculty : I.Obulesu, Assistant professor

Name of the Dept. : Electronics & Communication Engineering

Course Code : EC502PC [C312]

Academic year : 2019-20

Class : III Year B.Tech. ECE I – Sem, A, B- Sec

This is the sole property of St. Peter’s Engineering College, Hyderabad to be

Name of the Faculty: I.Obulesu HOD

COURSE INFORMATION SHEET

1 To introduce the basic building blocks of linear integrated circuits

6 To Design the architecture of memories 1,3

TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:

M1.To provide integrated, continuous and wholesome development of students by equipping

M2. To create an environment conductive to inhibiting theirs total involvement and

competence to be at the forefront of cutting edge technology and entrepreneurship in highly

competitive global market.

Department of Electronics and Communication Engineering

To Evolve the department as a centre of excellence in Electronics and Communication Engineering

Department of Electronics and Communication Engineering

PROGRAM OUTCOMES (PO’S):

4. CONDUCT INVESTIGATIONS OF COMPLEX PROBLEMS: Use research-based knowledge and research

PROGRAM SPECIFIC OUTCOMES (PSO)

Department of Electronics and Communication Engineering

2 To illustrate the linear and non linear applications of operational amplifier.

C312.6 To design the architecture of memories Synthesis

Department of Electronics and Communication Engineering

Name of the Faculty: Mr.I.Obulesu Class: III ECE-I SEM

To demonstrate the applications of operational Amplifier and some Application

C312.3 To Analyze the operations of ADC and DAC Analysis

To discuss the applications of various Digital logic Families of Comprehension

C312.6 To design the architecture of memories Synthesis

Department of Electronics and Communication Engineering

Name of the Faculty: Mr.I.Obulesu Class: III ECE-I SEM

Academic Year: 2019-20

UNIT.1: Operational Amplifiers

1. Lecture 1 Introduction Chalk Board TB-1

2. Lecture 2 Ideal & Practical OP-AMP Chalk Board TB-1

3. Lecture 3 Op-Amp Characteristics - AC Characteristics VEDIO TB-1

4. Lecture 4 DC Characteristics Chalk Board TB-1

5. Lecture 5 Features of 741 OP-Amp, Modes of Operation Chalk Board TB-1

6. Lecture 6 Modes of Operation Chalk Board TB-1

7. Lecture 7 Inverting Amplifier Chalk Board TB-1

8. Lecture 8 Non Inverting Amplifier SEMINAR TB-1

9. Lecture 9 Differential Amplifier Chalk Board TB-1

10. Lecture 10 Instrumentation Amplifier Chalk Board TB-1

11. Lecture 11 AC Amplifier, Differentiator & Integrator Chalk Board TB-1

12. QUIZ Previous Topics Chalk Board TB-2

13. Lecture 12 Comparator Chalk Board TB-1

14. Lecture 13 Schmitt Trigger Chalk Board TB-1

UNIT-II Op-Amp, IC555 & IC565 Applications: