Proteus VSM For PIC18: System Level Simulation For Microchip Technologies™ PIC18 Variants
Proteus VSM For PIC18: System Level Simulation For Microchip Technologies™ PIC18 Variants
Proteus VSM For PIC18: System Level Simulation For Microchip Technologies™ PIC18 Variants
Summary
Proteus Virtual System Modelling (VSM) combines mixed mode SPICE circuit simulation, animated
components and microprocessor models to facilitate co-simulation of complete microcontroller based
designs.The 'Proteus VSM for PIC18' product includes the following main software modules:
! Proteus VSM for PIC® Bundle products are ideal if you need to simulate more than one family of PIC
micro-controllers.
x The External Memory Interface (EMI) of devices such as the PIC18F8X20 is not modelled. These devices
can only be modelled when the PMx configuration bits select the Microcontroller Mode (MC) mode of
operation. Specifically, the Microprocessor Mode (MP), Microprocessor with Boot Block Mode (MPBB) and
Extended Microcontroller Mode (EMC) modes are not supported.
x Power Managed Modes is not modelled. Specifically, the use of IDLEN and SCS/SCSx bits in the
OSCCON register to switch oscillator sources and the behaviour of the SLEEP command is not modelled.
The SLEEP command always puts the processor in to full sleep mode. This limitation is largely due to poor
documentation on how the power managed modes actually affect peripherals.
x Brown-out detection and High-Low Voltage Detect (HLVD) is not modelled.
x RELEASE bit effects and Brown-out wakeup from Deep Sleep mode are not modelled.
x The Internal/External Switch Over (IESO configuration bit) and the Fail Safe Clock Monitor (FSCM
configuration bit) are not modelled.
x The CAN/ECAN module is not currently modelled.
x The SPP (Streaming Parallel Part) of the USB variants is not currently modelled.
x Isochronous USB transactions in the USB variants is not currently modelled.
x The external programming interface (PGC/PGD pins) are not modelled.
x The DMA features for SPI2 PGD pins are not modelled.
x The PMDx registers effects are not modelled.
x The VREGCON register effects are not modelled.
x The ACTCON register effects are not modelled.
x The SRLCON register effects are not modelled.
We recommend you use the free Labcenter VSM Studio IDE. This will greatly simplify the task as it will
automatically configure supported compilers to work with a Proteus VSM simulation.
If you prefer to work inside your own IDE then you will need to set your compiler options manually. After
compiling for debug, all you need to do is specify the debug file from the compiler as the program property of
the microcontroller on the schematic.
With continual development on the Proteus Design Suite we endeavour to keep all content updated with the latest product details. On
rare occasions this may not happen immediately, and website content will then be incomplete or inaccurate. We will attempt to correct
any such errors as soon as possible, E&OE.