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    1 Exp DLD LAB Logic Gates

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    Parimala Ashok
    The document summarizes an experiment to implement and verify logic gates using EMONA-net CIRCUIT labs software. The student logged into the software, selected columns to represent inputs and gates, connected a binary counter to the gate inputs and output to the software's channels. Screenshots show the implementation and output of AND, OR, NOT, NAND, NOR and XOR gates verifying their functions. The results demonstrated that the gates' workings were successfully verified in the software.

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    1 Exp DLD LAB Logic Gates

    Uploaded by

    Parimala Ashok
    42 views4 pages
    The document summarizes an experiment to implement and verify logic gates using EMONA-net CIRCUIT labs software. The student logged into the software, selected columns to represent inputs and gates, connected a binary counter to the gate inputs and output to the software's channels. Screenshots show the implementation and output of AND, OR, NOT, NAND, NOR and XOR gates verifying their functions. The results demonstrated that the gates' workings were successfully verified in the software.

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    The document summarizes an experiment to implement and verify logic gates using EMONA-net CIRCUIT labs software. The student logged into the software, selected columns to represent inputs and gates, connected a binary counter to the gate inputs and output to the software's channels. Screenshots show the implementation and output of AND, OR, NOT, NAND, NOR and XOR gates verifying their functions. The results demonstrated that the gates' workings were successfully verified in the software.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    42 views4 pages

    1 Exp DLD LAB Logic Gates

    Uploaded by

    Parimala Ashok
    The document summarizes an experiment to implement and verify logic gates using EMONA-net CIRCUIT labs software. The student logged into the software, selected columns to represent inputs and gates, connected a binary counter to the gate inputs and output to the software's channels. Screenshots show the implementation and output of AND, OR, NOT, NAND, NOR and XOR gates verifying their functions. The results demonstrated that the gates' workings were successfully verified in the software.

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    © All Rights Reserved
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    Register Number: 20BCE1082 Name:SHRIKUMARAN.

    P A

    Realization of logic gates using EMONA - net CIRCUIT labs

    Experiment no. 01 Date: 22.02.2021

    Aim of the Experiment:

    To implement and verify the working of a AND, OR, NOT, XOR, NAND and NOR gates using
    EMONA – net CIRCUIT labs.

    Procedure:
    • Log into the EMONA-net CIRCUIT labs software using the user id and password.
    • Out of the 12 columns available there select a column, left click and select binary counter
    • Go to another column and select the desired gate
    • Connect 2 terminals of the binary counter to the 2 input terminals of the gate
    • Also connect the same 2 terminals of the binary counter to the CHA and CHB input
    terminals
    • Connect the output terminal of the gate to the CHC terminal
    • Also give the voltage as 4V/div and timebase as 500milliseconds/div for clear
    waveforms.
    • Now we can see the output of the desired gate

    Circuit Implementation of AND gate in EMONA – net CIRCUIT labs:


    Output of OR gate obtained from EMONA – net CIRCUIT labs:

    Circuit Implementation of NOT gate in EMONA – net CIRCUIT labs:


    Output of NAND gate from EMONA – net CIRCUIT labs:

    Output of NOR gate form EMONA – net CIRCUIT labs:


    Output of XOR gate from EMONA - net CIRCUIT labs:

    Inference & Result :

    AND GATE:
    When both the inputs are high the output is high otherwise the output is low.
    OR GATE:
    If any one of the input is high the output is high otherwise the output is low.
    NOT GATE:
    The output is high if the input is low and the output is low if the input is high(the output is
    the inversion of the input).
    NAND GATE:
    The output is low only if both the inputs are high otherwise the output is high
    NOR GATE:
    The output is high only if both the inputs are low otherwise the output is low.
    XOR GATE:
    The output is high if the inputs are different otherwise if the inputs are same the output is low.

    All the gates except the not gate takes 2 inputs and gives one output while the not gate takes
    only one input
    RESULT:

    The working of AND , OR , NOT , NOR, NAND and XOR gates has been verified using
    EMONA – NET CIRCUIT LABS.

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