Lab Report 7 (Open Ended Lab)

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LAB REPORT

Experiment Name: Design of an Open-Ended Lab by Students

Experiment Number: 07

Course Code: EEE102

Sec: 02

Student Name: Adnan Hossain

Id: 2019-2-80-015

Date of submission: 16/09/2020


OBJECTIVE: The objective of this experiment is to assess students’ skill on designing and
performing demonstration of an open-ended lab.

PROBLEM STATEMENT: Design a common emitter BJT amplifier with the given data
and target as follows.

Given data:
1. Supply voltage Vcc = 15 V
2. Transistor has ẞ = 100
3. Load resistance RL = 2k
4. Input signal Vin = 10 mV (peak) at 10kHz.

Target to achieve:
1. Input resistance Ri >= 2k
2. Voltage gain Av = -50 (V/V)
3. Output resistance R0 <= 4k

CIRCUIT DIAGRAM:

Fig.1
DETAILED STEPS AND CALCULATION OF THE DESIGN:

Step1: Draw the small signal equivalent circuit. There we will get Vbe = Vin

Step2: Then we have to write node equation at V0, assume Rc<= 4k. I have assumed Rc= 3.9k.
since Vbe = Vin, we can use the targeted value of voltage gain which is -50 V/V.

Step3: After calculating the equation we will get the value of gm. As we found gm, now we can
get Ic, IB, and IE.

Step4: Now R = ẞ/gm, and following the design rule we can get VCE from VCE = Vcc/2. Now

we can calculate Vc, VB and VE. As we found VE we can also calculate RE.

Step5: As we have RE, we can get R2 and also can get the current across the R2.

Step6: Now we have to calculate IR1. After having the value of IR1, we can calculate R1.

Step7: Now, we can get Rin as we have R1, R2 and R∏.


The calculation of the design:
EQUIPMENT LIST:
1. Number of Resistors = 5
One resistor (83.09k), one resistor (39k), one resistor (3.86k), one resistor (2k) and one
resistor (3.9k)
2. Number of Capacitors = 3
Three capacitors (10uF)
3. One Q2N2222 BJT.
4. Pspice.

EXPERIMENT PROCEDURE (PSPICE):


1. Draw the dc part of the circuit. That is Q1, R1, R2, RC, RE and 15V source.
2. Use R2 = 39k. This will give a VCE of nearly 7.2 V.
3. Click on the BJT > go to edit Model > edit instance model text and change the value of
bf= 126. It will give us BETADC = 100
4. Run the simulation with bias point calculation only. Check VCE. This should be
approximately 7V. If not, change the R2 value and run again.
5. Write the values of VC, VE, and VB.
6. Write BETADC from analysis > examine output file.
7. Now add the rest of the components.
8. Set Vin as VSIN. Set its frequency to 10kHZ, amplitude to 10mV, and VOFF to 0V.
9. Setup simulation to transient. Set final time to 200 us, step ceiling to 1 us.
10. Simulate the circuit and observe the output. It will give a sine wave.
11. Measure the peak-to-peak values of the output signal and input signal.
12. Observe both the input and output signal together. For better view, multiply the input by
50. Now measure the phase difference.
13. Observe the current through Vin and measure its peak-to-peak value.
14. Measure the peak-to-peak value of open circuit voltage. To do that, change the RLvalue
to 100GΩ.
15. Measure the peak-to-peak value of short circuit current. To do that, change RL value to
1mΩ.
From simulation:

Vc = 11.12 V

VE = 3.884 V

VB = 4.528 V

Value of BETADC= 100

Peak-to-peak value of the output voltage = 991.041 mV

Peak-to-peak value of the input voltage = 19.991 mV


Vo
Voltage gain, Av =
Vin
991.041
=
19.991

= 49.574 V/V

Peak-to-peak value of the input current = 7.917 uA


Vin
Rin =
Iin

19.991×10−3
=
7.917 × 10−6

= 2525 Ω

= 2.52 k

Peak-to-peak value of the open circuit voltage = 2.83 V

Peak-to-peak value of the Short circuit current = 758.406 uA.


2.83
RO =
758.406× 10−6

= 3731.51Ω

= 3.73 k

Av(V/V) Rin(k) RO (k)


From calculation 50 2.40 3.9
From simulation 49.574 2.52 3.73
Comment: There is little bit difference between calculated values and simulation values which
is avoidable.

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