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    Question Paper Code:: (10×2 20 Marks)

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    Samraj Jebasingh
    This document appears to be an exam question paper for a digital principles and system design course. It contains 15 questions across 2 sections - Section A contains 10 multiple choice questions worth 2 marks each, and Section B contains 5 longer answer questions worth 16 marks each. The questions cover topics such as binary and octal number conversion, weighted binary codes, multiplexer implementation, data flow description, excitation tables, Hamming codes, race conditions, merger graphs, PLA vs PAL, memory decoding, Boolean simplification using K-maps, logic minimization, full adder design, gray to binary code conversion, sequence detection, synchronous counter design, synchronous sequential circuit analysis and design, state reduction, RAM array design, ASICs,

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    Question Paper Code:: (10×2 20 Marks)

    Uploaded by

    Samraj Jebasingh
    27 views2 pages
    This document appears to be an exam question paper for a digital principles and system design course. It contains 15 questions across 2 sections - Section A contains 10 multiple choice questions worth 2 marks each, and Section B contains 5 longer answer questions worth 16 marks each. The questions cover topics such as binary and octal number conversion, weighted binary codes, multiplexer implementation, data flow description, excitation tables, Hamming codes, race conditions, merger graphs, PLA vs PAL, memory decoding, Boolean simplification using K-maps, logic minimization, full adder design, gray to binary code conversion, sequence detection, synchronous counter design, synchronous sequential circuit analysis and design, state reduction, RAM array design, ASICs,

    Original Description:

    Anna university question

    Original Title

    X20389(CS6201)

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    This document appears to be an exam question paper for a digital principles and system design course. It contains 15 questions across 2 sections - Section A contains 10 multiple choice questions worth 2 marks each, and Section B contains 5 longer answer questions worth 16 marks each. The questions cover topics such as binary and octal number conversion, weighted binary codes, multiplexer implementation, data flow description, excitation tables, Hamming codes, race conditions, merger graphs, PLA vs PAL, memory decoding, Boolean simplification using K-maps, logic minimization, full adder design, gray to binary code conversion, sequence detection, synchronous counter design, synchronous sequential circuit analysis and design, state reduction, RAM array design, ASICs,

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    27 views2 pages

    Question Paper Code:: (10×2 20 Marks)

    Uploaded by

    Samraj Jebasingh
    This document appears to be an exam question paper for a digital principles and system design course. It contains 15 questions across 2 sections - Section A contains 10 multiple choice questions worth 2 marks each, and Section B contains 5 longer answer questions worth 16 marks each. The questions cover topics such as binary and octal number conversion, weighted binary codes, multiplexer implementation, data flow description, excitation tables, Hamming codes, race conditions, merger graphs, PLA vs PAL, memory decoding, Boolean simplification using K-maps, logic minimization, full adder design, gray to binary code conversion, sequence detection, synchronous counter design, synchronous sequential circuit analysis and design, state reduction, RAM array design, ASICs,

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    You are on page 1of 2

    *X20389*

    Reg. No. :

    Question Paper Code : X 20389


    B.E./B.Tech. Degree Examinations, NOVEMBER/DECEMBER 2020
    Second Semester
    Computer Science and Engineering
    cs 6201 – digital principles and system design
    (Common to Information Technology)
    (Regulations 2013)
    (Common to PTCS 6201 – Digital Principles and System Design for B.E.
    (Part-Time) – Computer Science and Engineering – First Semester (Regulations 2014))
    Time : Three Hours Maximum : 100 Marks

    Answer all questions


    Part – A (10×2=20 Marks)

    1. Convert (126)10 to octal number and binary number.

    2. Write short notes on weighted binary codes.

    3. Implement a full adder with 4 × 1 Multiplexer.

    4. Write the Data flow description of a 4-bit Comparator.

    5. State the excitation table of JK-Flip Flop.

    6. A seven bit Hamming code is received as 1111110. What is the correct code ?
    7. When do race conditions occur ?

    8. Define merger graph.

    9. List the major differences between PLA and PAL.

    10. What is memory decoding ?

    Part – B (5×16=80 Marks)


    11. a) Simplify the following Boolean expression in
    i) Sum-of-product
    ii) Product-of-sum using Karnaugh map
    AC′ + B′D + A′CD + ABCD (16)
    (OR)
    X 20389 *X20389*

    b) i) Express the following function in sum of min-terms and product of


    max-terms :
    F(x, y, z) = x + yz. (8)
    ii) Convert the following logic system into NAND gates only. (8)

    12. a) Design a full adder with inputs x, y, z and two outputs S and C. The circuits
    performs x + y + z, z is the input carry, C is the output carry and S is the
    sum. (16)
    (OR)
    b) Design a logic circuit that accepts a 4-bit Grey Code and convert it into 4-bit
    binary code. (16)

    13. a) Design a sequence detector that detects a sequence of three or more consecutive
    1’s in a string of bits coming through an input line and produces an output
    whenever this sequence is detected. (16)
    (OR)
    b) Design a three bit synchronous counter with T flip flop and draw the
    diagram. (16)

    14. a) Explain the analysis and design procedures of synchronous sequential


    circuits. (16)
    (OR)
    b) With necessary example and diagram, explain the concept of reduction of
    state and flow tables. (16)

    15. a) Design a 16 bit RAM array (4 × 4 RAM) and explain the operation. (16)
    (OR)
    b) Explain the following :
    i) ASIC (8)
    ii) Field Programmable Gate Array. (8)


    –––––––––––––

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