Adm 483 Ear

Download as pdf or txt
Download as pdf or txt
You are on page 1of 13

615 kV ESD Protected, EMC Compliant

a Slew Rate Limited, EIA RS-485 Transceiver


ADM483E
FEATURES FUNCTIONAL BLOCK DIAGRAM
Robust RS-485 Transceiver
15 kV ESD Protection Using HBM ADM483E
2 kV EFT Protection Meets IEC1000-4-4
High EM Immunity Meets IEC1000-4-3
RO R
Reduced Slew Rate for Low EM Interference
250 kbps Data Rate RE B
Single +5 V 6 10% Supply DE
A
–7 V to +12 V Bus Common-Mode Range
12 kV Input Impedance DI D
Short Circuit Protection
Excellent Noise Immunity
36 mA Supply Current
0.1 mA Shutdown Current
APPLICATIONS
Low Power RS-485 Systems
Electrically Harsh Environments
EMI Sensitive Applications
DTE-DCE Interface
Packet Switching
Local Area Networks

GENERAL DESCRIPTION The input impedance on the ADM483E is 12 kΩ, allowing up


The ADM483E is a robust, low power differential line trans- to 32 transceivers on the bus.
ceiver suitable for communication on multipoint bus transmis- The ADM483E operates from a single +5 V ± 10% power sup-
sion lines. Internal protection against electrostatic discharge ply. Excessive power dissipation caused by bus contention or by
(ESD), electrical fast transient (EFT) and electromagnetic output shorting is prevented by a thermal shutdown circuit. This
immunity (EMI) allows operation in electrically harsh environ- feature forces the driver output into a high impedance state if,
ments. ESD protection on the I-O lines meets ± 15 kV when during fault conditions, a significant temperature increase is
tested using the Human Body Model. EFT protection meets detected in the internal driver circuitry.
± 2 kV in accordance with IEC1000-4-4, while EMI immunity is
in excess of 10 V/m meeting IEC1000-4-3. The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The level of unwanted emissions is also carefully controlled
using slew limiting on the driver outputs. This reduces reflec- The ADM483E is fabricated on BiCMOS, an advanced mixed
tions with improperly terminated cables and also minimizes technology process combining low power CMOS with robust
electromagnetic interference. The controlled slew rate limits the bipolar technology.
data rate to 250 kbps. It is fully specified over the industrial temperature range and is
The ADM483E is intended for balanced data transmission and available in 8-lead DIP and SOIC packages.
complies with both EIA Standards RS-485 and RS-422. It
contains a differential line driver and a differential line receiver
and is suitable for half duplex data transmission, as the driver
and receiver share the same differential pins.

REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
which may result from its use. No license is granted by implication or Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
otherwise under any patent or patent rights of Analog Devices. Fax: 617/326-8703 © Analog Devices, Inc., 1997
ADM483E–SPECIFICATIONS (V CC = +5 V 6 10%. All specifications TMIN to TMAX unless otherwise noted)
Parameter Min Typ Max Units Test Conditions/Comments
DRIVER
Differential Output Voltage, VOD 5.0 V VCC = 5.25 V. R = ∞, Figure 1
2.0 5.0 V R = 50 Ω (RS-422), Figure 1
1.5 5.0 V R = 27 Ω (RS-485), Figure 1
1.5 5.0 V VTST = –7 V to +12 V, Figure 2, VCC ≥ 4.75 V
∆|VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, Figure 1
Common-Mode Output Voltage VOC 3 V R = 27 Ω or 50 Ω, Figure 1
∆|VOC| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω
Output Short Circuit Current (VOUT = High) 250 mA –7 V ≤ VO ≤ +12 V
Output Short Circuit Current (VOUT = Low) 250 mA –7 V ≤ VO ≤ +12 V
CMOS Input Logic Threshold Low, VINL 1.4 0.8 V
CMOS Input Logic Threshold High, VINH 2.0 1.4 V
Logic Input Current (DE, DI) ± 1.0 µA
RECEIVER
Differential Input Threshold Voltage, VTH –0.2 +0.2 V –7 V ≤ VCM ≤ +12 V
Input Voltage Hysteresis, ∆VTH 70 mV VCM = 0 V
Input Resistance 12 kΩ –7 V ≤ VCM ≤ +12 V
Input Current (A, B) +1 mA VIN = 12 V
–0.8 mA VIN = –7 V
Logic Enable Input Current (RE) ±1 µA
CMOS Output Voltage Low, VOL 0.4 V IOUT = +4.0 mA
CMOS Output Voltage High, VOH 4.0 V IOUT = –4.0 mA
Short Circuit Output Current 7 85 mA VOUT = GND or VCC
Three-State Output Leakage Current ± 1.0 µA 0.4 V ≤ VOUT ≤ +2.4 V
POWER SUPPLY CURRENT Outputs Unloaded, Receivers Enabled
ICC (ADM483E) 36 60 µA DE = 0 V (Disabled) RE = 0 V
270 360 µA DE = 5 V (Enabled) = RE = 0 V
Supply Current in Shutdown 0.1 10 µA DE = 0 V, RE = VCC
ESD/EFT IMMUNITY
ESD Protection ± 15 kV HBM Air Discharge. A, B Pins
± 3.5 kV HBM 3015.7 Contact Discharge. All Pins
EFT Protection ±2 kV IEC1000-4-4, A, B Pins
EMI Immunity 10 V/m IEC1000-4-3
Specifications subject to change without notice.

TIMING SPECIFICATIONS (VCC = +5 V 6 10%. All specifications TMIN to TMAX unless otherwise noted.)
Parameter Min Typ Max Units Test Conditions/Comments
DRIVER
Propagation Delay Input to Output TPLH, TPHL 250 2000 ns RL Diff = 54 Ω CL1 = CL2 = 100 pF, Figure 5
Driver O/P to O/P TSKEW 100 800 ns RL Diff = 54 Ω CL1 = CL2 = 100 pF, Figure 5
Driver Rise/Fall Time TR, TF 250 2000 ns RL Diff = 54 Ω CL1 = CL2 = 100 pF, Figure 5
Driver Enable to Output Valid 250 2000 ns RL = 500 Ω, CL = 100 pF, Figure 3
Driver Disable Timing 300 3000 ns RL = 500 Ω, CL = 15 pF, Figure 3
RECEIVER
Propagation Delay Input to Output TPLH, TPHL 250 2000 ns CL = 15 pF, Figure 5
Skew |TPLH–TPHL| 200 ns
Receiver Enable TEN1 10 50 ns RL = 1 kΩ, CL = 15 pF, Figure 4
Receiver Disable TEN2 10 50 ns RL = 1 kΩ, CL = 15 pF, Figure 4
SHUTDOWN
Time to Shutdown 50 200 600 ns
Driver Enable from Shutdown 2000 ns RL = 500 Ω, CL = 100 pF, Figure 3
Receiver Enable from Shutdown 2500 ns RL = 1 kΩ, CL = 15 pF, Figure 4
Specifications subject to change without notice.

–2– REV. 0
ADM483E
ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTION
(TA = +25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7 V Pin Mnemonic Function
Inputs
Driver Input (DI) . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V 1 RO Receiver Output. When enabled if A > B by
Control Inputs (DE, RE) . . . . . . . . . . –0.5 V to VCC + 0.5 V 200 mV, then RO = High. If A < B by
Receiver Inputs (A, B) . . . . . . . . . . . . . . . . . –14 V to +14 V 200 mV, then RO = Low.
Outputs 2 RE Receiver Output Enable. A low level enables
Driver Outputs . . . . . . . . . . . . . . . . . . . . –12.5 V to +12.5 V the receiver output, RO. A high level places it
Receiver Output . . . . . . . . . . . . . . . . . –0.5 V to VCC +0.5 V in a high impedance state.
ESD Rating: Air (Human Body Model) (A, B Pins) . . ± 15 kV 3 DE Driver Output Enable. A high level enables
ESD Rating: Contact (Human Body Model) the driver differential outputs, A and B. A
(A, B Pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 8 kV low level places it in a high impedance state.
ESD Rating MIL-STD-883B Method 3015
(Except A, B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 3.5 kV 4 DI Driver Input. When the driver is enabled a
EFT Rating (IEC1000-4-4) (A, B Pins) . . . . . . . . . . . . ± 2 kV logic Low on DI forces A low and B high
EMI Immunity (IEC1000-4-3) . . . . . . . . . . . . . . . . . . 10 V/m while a logic High on DI forces A high and B
Power Dissipation 8-Pin DIP . . . . . . . . . . . . . . . . . . . 727 mW low.
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . +135°C/W 5 GND Ground Connection, 0 V.
Power Dissipation 8-Pin SOIC . . . . . . . . . . . . . . . . . 470 mW
6 A Noninverting Receiver Input A/Driver
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . +110°C/W
Output A.
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . –40°C to +85°C 7 B Inverting Receiver Input B/Driver Output B.
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C 8 VCC Power Supply, 5 V ± 10%.
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C PIN CONFIGURATION
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; functional operation
RO 1 8 VCC
of the device at these or any other conditions above those indicated in the
ADM483E
operational sections of this specification is not implied. Exposure to absolute RE 2 7 B
maximum ratings for extended periods may affect device reliability.
DE 3 TOP VIEW 6 A
(Not to Scale)
ORDERING GUIDE DI 4 5 GND

Model Temperature Range Package Option


ADM483EAN –40°C to +85°C N-8
ADM483EAR –40°C to +85°C SO-8

Table I. Selection Table

Part No. Duplex Data Rate Low Power Tx/Rx ICC No of Tx/Rx ESD EFT EMI
kb/s Shutdown Enable mA On Bus kV kV V/m
ADM483E Half 250 Yes Yes 36 32 ± 15 ±2 10

REV. 0 –3–
ADM483E
Test Circuits VCC

A
RL
R
0V OR 3V S1 S2
VOD DE B CL
R VOUT
VOC
DE IN

Figure 1. Driver Voltage Measurement Test Circuit Figure 3. Driver Enable/Disable Test Circuit

VCC
+15V
375Ω
S1 RL
VOD3 60Ω VTST S2
–15V RE
CL
375Ω VOUT
RE IN

Figure 2. Driver Voltage Measurement Test Circuit 2 Figure 4. Receiver Enable/Disable Test Circuit

CL1 A
DI RO
D RLDIFF R
B
CL2 RE

Figure 5. Receiver Propagation Delay Test Circuit

Switching Characteristics
3V
3V
1.5V 1.5V
TPLH DE 1.5V 1.5V
0V
TPHL 0V
B TZL TLZ
1/2VO
VO
A, B 2.3V
A VOL+ 0.5V
TSKEW TSKEW VOL
VO 90% POINT TZH THZ
90% POINT
VOH
0V
VOH – 0.5V
10% POINT 10% POINT A, B 2.3V
–VO
TR TF 0V

Figure 6. Driver Propagation Delay, Rise/Fall Timing Figure 7. Driver Enable/Disable Timing

3V

RE 1.5V 1.5V

0V
A–B 0V 0V
TZL TLZ

TPLH TPHL R 1.5V


VOH O/P LOW VOL+ 0.5V
VOL
RO 1.5V 1.5V TZH THZ
VOH
O/P HIGH
VOL VOH – 0.5V
R 1.5V

0V

Figure 8. Receiver Propagation Delay Figure 9. Receiver Enable/Disable Timing

–4– REV. 0
Typical Performance Characteristics–ADM483E
40 0 90

35 80

OUTPUT CURRENT – mA
70

OUTPUT CURRENT – mA
30 –5
OUTPUT CURRENT – mA

60
25
50
20 –10
40
15
30
10 –15 20

5 10

0 –20 0
0 0.5 1.0 1.5 2.0 2.5 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0
OUTPUT VOLTAGE – Volts OUTPUT VOLTAGE – Volts OUTPUT VOLTAGE – Volts

Figure 11. Receiver Output Low Figure 12. Receiver Output High Figure 13. Driver Output Low
Voltage vs. Output Current Voltage vs. Output Current Voltage vs. Output Current

0 80

–10 70 T

–20 100
OUTPUT CURRENT – mA

OUTPUT CURRENT – mA

60 90 T

–30
50
–40
40 RO
–50 T
DI
30
–60 10

20 0%
–70

–80 10

–90 0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
OUTPUT VOLTAGE – Volts OUTPUT VOLTAGE – Volts

Figure 14. Driver Output High Figure 15. Driver Differential Output Figure 16. ADM483E Driving
Voltage vs. Output Current Voltage vs. Output Current 4000 ft. of Cable

80 80

70 70

100
60 LIMIT
90 60

50 50
dBµV
dBµV

10dB/DIV 40 LIMIT 40

30 30
10
0% 20 20

10 10

0 500kHz/DIV 5MHz 0 0
0.3 0.6 1 3 6 10 30
30 200
FREQUENCY – MHz LOG FREQUENCY (0.15–30) – MHz

Figure 17. Driver Output Waveform Figure 18. Radiated Emissions Figure 19. Conducted Emissions
and FFT Plot Transmitting @ 150 kHz

REV. 0 –5–
ADM483E
GENERAL INFORMATION Tables II and III show the truth tables for transmitting and
The ADM483E is a ruggedized RS-485 transceiver that operates receiving.
from a single +5 V supply.
Table II. Transmitting Truth Table
It contains protection against radiated and conducted interfer-
ence, including high levels of electrostatic discharge. Inputs Outputs
It is ideally suited for operation in electrically harsh environ- RE DE DI B A
ments or where cables may be plugged/unplugged. It is also X 1 1 0 1
immune to high RF field strengths without special shielding X 1 0 1 0
precautions. It is intended for balanced data transmission and 0 0 X Hi-Z Hi-Z
complies with both EIA Standards RS-485 and RS-422. It con- 1 0 X Hi-Z Hi-Z
tains a differential line driver and a differential line receiver, and
X = Don’t Care.
is suitable for half duplex data transmission as the driver and
receiver share the same differential pins. Table III. Receiving Truth Table
The input impedance on the ADM483E is 12 kΩ, allowing up to Inputs Outputs
32 transceivers on the differential bus.
RE DE A-B RO
The ADM483E operates from a single +5 V ± 10% power 0 0 ≥ +0.2 V 1
supply. Excessive power dissipation caused by bus contention or 0 0 ≤ –0.2 V 0
by output shorting is prevented by a thermal shutdown circuit. 0 0 Inputs O/C 1
This feature forces the driver output into a high impedance state 1 0 X Hi-Z
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry. X = Don’t Care.

The receiver contains a fail-safe feature that results in a logic ESD/EFT TRANSIENT PROTECTION SCHEME
high output state if the inputs are unconnected (floating). The ADM483E uses protective clamping structures on its
A high level of robustness is achieved using internal protection inputs and outputs that clamp the voltage to a safe level and
circuitry, eliminating the need for external protection compo- dissipates the energy present in ESD (Electrostatic) and EFT
nents such as tranzorbs or surge suppressors. (Electrical Fast Transients) discharges.
Low electromagnetic emissions are achieved using slew limited The protection structure achieves ESD protection up to ± 15 kV
drivers, minimizing interference both conducted and radiated. according to the Human Body Model, and EFT protection up
The ADM483 can transmit at data rates up to 250 kbps. to ± 2 kV on all I-O lines.
A typical application for the ADM483E is illustrated in Figure ESD TESTING
20. This shows a half-duplex link where data may be transferred Two coupling methods are used for ESD testing, contact
at rates up to 250 kbps. A terminating resistor is shown at both discharge and air-gap discharge. Contact discharge calls for a
ends of the link. This termination is not critical since the slew direct connection to the unit being tested. Air-gap discharge
rate is controlled by the ADM483E and reflections are minimized. uses a higher test voltage but does not make direct contact with
the unit under test. With air discharge, the discharge gun is
The communications network may be extended to include
moved toward the unit under test, developing an arc across the
multipoint connections as shown in Figure 30. Up to 32
air gap, hence the term air-discharge. This method is influenced
transceivers may be connected to the bus.
by humidity, temperature, barometric pressure, distance and
+5V +5V rate of closure of the discharge gun. The contact-discharge
method, while less realistic, is more repeatable and is gaining
0.1µF 0.1µF acceptance and preference over the air-gap method.
DE
Although very little energy is contained within an ESD pulse,
RE VCC VCC
the extremely fast rise time, coupled with high voltages, can
RO DI
cause failures in unprotected semiconductors. Catastrophic
B B destruction can occur immediately as a result of arcing or
ADM483E A A ADM483E heating. Even if catastrophic failure does not occur immedi-
ately, the device may suffer from parametric degradation, which
DI RS485/RS-422 LINK
RO may result in degraded performance. The cumulative effects of
DE RE
continuous exposure can eventually lead to complete failure.
GND GND

HIGH R2
VOLTAGE
GENERATOR
DEVICE
C1
Figure 20. Typical Half-Duplex Link Application UNDER TEST

ESD Test Method R2 C1


Human Body Model 1.5K 100pF

Figure 21. ESD Generator

–6– REV. 0
ADM483E
I-O lines are particularly vulnerable to ESD damage. Simply V
touching or plugging in an I-O cable can result in a static
discharge that can damage or completely destroy the interface
product connected to the I-O port.
t
It is, therefore, extremely important to have high levels of ESD
300ms 16ms
protection on the I-O lines.
It is possible that the ESD discharge could induce latchup in the V
5ns
device under test. It is therefore important that ESD testing on
the I-O pins be carried out while device power is applied. This
type of testing is more representative of a real world I-O
discharge where the equipment is operating normally when the 50ns
discharge occurs. t

0.2/0.4ms

100%

90% Figure 23. IEC1000-4-4 Fast Transient Waveform


Table V shows the peak voltages for each of the environments.
IPEAK

Table V.

Level VPEAK (kV) VPEAK (kV)


36.8% PSU I-O
1 0.5 0.25
2 1 0.5
10%
3 2 1
TIME t 4 4 2
tRL tDL

A simplified circuit diagram of the actual EFT generator is


Figure 22. Human Body Model ESD Current Waveform illustrated in Figure 24.
These transients are coupled onto the signal lines using an EFT
Table IV. ADM483E ESD Test Results coupling clamp. The clamp is 1 m long and completely sur-
rounds the cable, providing maximum coupling capacitance
ESD Test Method I-O Pins Other Pins (50 pF to 200 pF typ) between the clamp and the cable. High
Human Body Model: Air ± 15 kV energy transients are capacitively coupled onto the signal lines.
Human Body Model: Contact ± 8 kV ± 3.5 V Fast rise times (5 ns) as specified by the standard result in very
effective coupling. This test is very severe since high voltages are
coupled onto the signal lines. The repetitive transients can often
FAST TRANSIENT BURST IMMUNITY (IEC1000-4-4) cause problems, where single pulses do not. Destructive latchup
IEC1000-4-4 (previously 801-4) covers electrical fast-transient/ may be induced due to the high energy content of the transients.
burst (EFT) immunity. Electrical fast transients occur as a Note that this stress is applied while the interface products are
result of arcing contacts in switches and relays. The tests powered up and are transmitting data. The EFT test applies
simulate the interference generated when, for example, a power hundreds of pulses with higher energy than ESD. Worst case
relay disconnects an inductive load. A spark is generated due to transient current on an I-O line can be as high as 40 A.
the well known back EMF effect. In fact, the spark consists of a
burst of sparks as the relay contacts separate. The voltage
appearing on the line, therefore, consists of a burst of extremely HIGH RC L RM CD
50Ω
fast transient impulses. A similar effect occurs when switching VOLTAGE
SOURCE
OUTPUT
on fluorescent lights. CC ZS
The fast transient burst test, defined in IEC1000-4-4, simulates
this arcing and its waveform is illustrated in Figure 23. It
consists of a burst of 2.5 kHz to 5 kHz transients repeating at Figure 24. EFT Generator
300 ms intervals. It is specified for both power and data lines.
Test results are classified according to the following
Four severity levels are defined in terms of an open-circuit
voltage as a function of installation environment. The installa- 1. Normal performance within specification limits.
tion environments are defined as 2. Temporary degradation or loss of performance that is self-
recoverable.
1. Well-protected 3. Temporary degradation or loss of function or performance
2. Protected that requires operator intervention or system reset.
3. Typical Industrial 4. Degradation or loss of function that is not recoverable due to
4. Severe Industrial damage.

REV. 0 –7–
ADM483E
The ADM483E has been tested under worst case conditions EMI EMISSIONS
using unshielded cables, and meets Classification 2 at severity The ADM483E contains internal slew rate limiting in order to
Level 4. Data transmission during the transient condition is minimize the level of electromagnetic interference generated.
corrupted, but it may be resumed immediately following the Figure 25 shows an FFT plot when transmitting a 150 kHz
EFT event without user intervention. data stream.

RADIATED IMMUNITY (IEC1000-4-3)


IEC1000-4-3 (previously IEC801-3) describes the measurement
100
method and defines the levels of immunity to radiated electro- 90

magnetic fields. It was originally intended to simulate the electro-


magnetic fields generated by portable radio transceivers or any 10dB/DIV
other device that generates continuous wave radiated electromag-
netic energy. Its scope has since been broadened to include
10
spurious EM energy, which can be radiated from fluorescent 0%

lights, thyristor drives, inductive loads, etc.


Testing for immunity involves irradiating the device with an EM
0 500kHz/DIV 5MHz
field. There are various methods of achieving this including use
of anechoic chamber, stripline cell, TEM cell and GTEM cell. Figure 25. Driver Output Waveform and FFT Plot Trans-
These consist essentially of two parallel plates with an electric mitting @ 150 kHz
field developed between them. The device under test is placed
between the plates and exposed to the electric field. There As may be seen, the slew limiting attenuates the high frequency
are three severity levels having field strengths ranging from components. EMI is therefore reduced, as are reflections due to
1 V to 10 V/m. Results are classified in a similar fashion to those improperly terminated cables.
for IEC1000-4-2. EN55022, CISPR22 defines the permitted limits of radiated
1. Normal Operation. and conducted interference from Information Technology
2. Temporary Degradation or loss of function that is self- Equipment (ITE).
recoverable when the interfering signal is removed. The objective is to control the level of emissions, both con-
3. Temporary degradation or loss of function that requires ducted and radiated.
operator intervention or system reset when the interfering
For ease of measurement and analysis, conducted emissions are
signal is removed.
assumed to predominate below 30 MHz, while radiated
4. Degradation or loss of function that is not recoverable due to
emissions predominate above this frequency.
damage.
The ADM483E comfortably meets Classification 1 at the most CONDUCTED EMISSIONS
stringent (Level 3) requirement. In fact, field strengths up to This is a measure of noise that is conducted onto the mains
30 V/m showed no performance degradation and error-free data power supply. The noise is measured using a LISN (Linc
transmission continued even during irradiation. Impedance Stabilizing Network) and a spectrum analyzer. The
test setup is illustrated in Figure 26. The spectrum analyzer is
Table VI. set to scan the spectrum from 0 MHz to 30 MHz. Figure 27
shows that the level of conducted emissions from the
Level Field Strength ADM483E are well below the allowable limits.
V/m
1 1 SPECTRUM
ANALYSER
2 3
3 10
DUT LISN PSU

Figure 26. Conducted Emissions Test Setup

–8– REV. 0
ADM483E
80 APPLICATIONS INFORMATION
70
Differential Data Transmission
Differential data transmission is used to reliably transmit data at
60 LIMIT
high rates over long distances and through noisy environments.
50 Differential transmission nullifies the effects of ground shifts
dBµV

40
and noise signals that appear as common-mode voltages on the
line. There are two main standards approved by the Electron-
30 ics Industries Association (EIA) that specify the electrical
20 characteristics of transceivers used in differential data transmission.
10 The RS-422 standard specifies data rates up to 10 MBaud and
line lengths up to 4000 ft. A single driver can drive a transmis-
0
0.3 0.6 1 3 6 10 30 sion line with up to 10 receivers.
LOG FREQUENCY (0.15–30) – MHz
In order to cater for true multipoint communications, the RS-
Figure 27. Conducted Emissions 485 standard was defined. This standard meets or exceeds all
the requirements of RS-422, but also allows for up to 32 drivers
RADIATED EMISSIONS and 32 receivers to be connected to a single bus. An extended
Radiated emissions are measured at frequencies in excess of common-mode range of –7 V to +12 V is defined. The most
30 MHz. significant difference between RS-422 and RS-485 is the fact
that the drivers may be disabled, thereby allowing more than
A typical test setup for monitoring radiated emissions is one (32 in fact) to be connected to a single line. Only one driver
illustrated in Figure 28. should be enabled at a time, but the RS-485 standard contains
RADIATED NOISE
additional specifications to guarantee device safety in the event
of line contention.
OUT
Cable and Data Rate
The transmission line of choice for RS-485 communications is a
TO twisted pair. Twisted pair cable tends to cancel common-mode
TURNTABLE ADJUSTABLE RECEIVER
ANTENNA noise and also causes cancellation of the magnetic fields
generated by the current flowing through each wire, thereby
reducing the effective inductance of the pair.
Figure 28. Radiated Emissions Test Setup A typical application showing a multipoint transmission network
Figure 29 shows that the level of radiated emissions is also well is illustrated in Figure 30. An RS-485 transmission line can have
below the allowable limit. as many as 32 transceivers on the bus. Only one driver can
transmit at a particular time, but multiple receivers may be
80
enabled simultaneously.
70
RT RT
60

50 D D
dBµV

40 LIMIT

30
R R

20

10
R R
0 D D
30 200
FREQUENCY – MHz

Figure 29. Radiated Emissions Figure 30. Typical RS-485 Network

REV. 0 –9–
ADM483E
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC (SO-8)

0.1968 (5.00)
0.1890 (4.80)

8 5
0.1574 (4.00) 0.2440 (6.20)
0.1497 (3.80) 1 4 0.2284 (5.80)

PIN 1 0.0688 (1.75) 0.0196 (0.50)


x 45°
0.0098 (0.25) 0.0532 (1.35) 0.0099 (0.25)
0.0040 (0.10)


0.0500 0.0192 (0.49) 0°
SEATING (1.27) 0.0138 (0.35) 0.0098 (0.25) 0.0500 (1.27)
PLANE BSC 0.0075 (0.19) 0.0160 (0.41)

8-Pin Plastic DIP (N-8)

0.430 (10.92)
0.348 (8.84)

8 5
0.280 (7.11)
0.240 (6.10)
1 4 0.325 (8.25)
0.300 (7.62)
PIN 1 0.060 (1.52)
0.015 (0.38) 0.195 (4.95)
0.210 (5.33)
MAX 0.115 (2.93)
0.130
0.160 (4.06) (3.30)
0.115 (2.93) MIN
0.015 (0.381)
0.022 (0.558) 0.100 0.070 (1.77) SEATING
PLANE 0.008 (0.204)
0.014 (0.356) (2.54) 0.045 (1.15)
BSC

–10– REV. 0
–11–
–12–
PRINTED IN U.S.A. C2934–12–1/97
This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

You might also like