INTEGRATED CIRCUITS

DATA SHEET
For a complete data sheet, please also download:

• The IC04 LOCMOS HE4000B Logic

Family Specifications HEF, HEC
• The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC

HEF40244B
buffers
Octal buffers with 3-state outputs
Product specification January 1995
File under Integrated Circuits, IC04
Philips Semiconductors Product specification

HEF40244B
Octal buffers with 3-state outputs
buffers

DESCRIPTION
The HEF40244B is an octal non-inverting buffer with
3-state outputs. It features output stages with high current
output capability suitable for driving highly capacitive
loads.
The 3-state outputs are controlled by the output enable
inputs EOA and EOB. A HIGH on EO causes the outputs to
assume a high impedance OFF-state. The device also
features hysteresis on all inputs to improve noise
immunity.
Schmitt-trigger action in the inputs makes the circuit highly
tolerant to slower input rise and fall times.
The HEF40244B is pin and functionally compatible with
the TTL ‘244’ device.

Fig.2 Pinning diagram.

HEF40244BP(N): 20-lead DIL; plastic (SOT146-1)

HEF40244BD(F): 20-lead DIL; ceramic (cerdip) (SOT152)
HEF40244BT(D): 20-lead SO; plastic (SOT163-1)
( ): Package Designator North America

PINNING
IA1 to IA4 inputs
IB1 to IB4 inputs
OA1 to OA4 bus outputs
OB1 to OB4 bus outputs
EOA, EOB output enable inputs (active LOW)

FAMILY DATA, IDD LIMITS category buffers

See Family Specifications
Fig.1 Functional diagram.

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Philips Semiconductors Product specification

HEF40244B
Octal buffers with 3-state outputs
buffers

TRUTH TABLE

INPUTS OUTPUT
In EO On
H L H
L L L
X H Z

Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
Fig.3 Logic diagram (one buffer). Z = high impedance off state

RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134).
See Family Specifications, except for:
D.C. current into any input ± II max. 10 mA
D.C. source or sink current into any output ± IO max. 25 mA
D.C. current into the supply terminals ±I max. 100 mA

DC CHARACTERISTICS
VSS = 0 V

VDD VOH VOL Tamb (°C)

V V V SYMBOL
−40 +25 +85
MIN. TYP. MIN. TYP. MIN. TYP.
Output current 5 4,6 0,75 0,6 1,2 0,45 mA
HIGH 10 9,5 −IOH 1,85 1,5 3,0 1,1 mA
15 13,5 14,5 15 50 15,5 mA
Output current 5 3,6 9,3 10 24 10,7 mA
HIGH 10 8,4 −IOH 14,4 15 46 15,0 mA
15 13,2 19,5 20 62 19,8 mA
Output current 5 0,4 2,9 2,3 5,4 1,75 mA
LOW 10 0,5 IOL 9,5 7,6 17 5,50 mA
15 1,5 30,0 25 45 19,0 mA
Hysteresis 5 220 mV
voltage 10 VH 250 mV
(any input) 15 320 mV

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Philips Semiconductors Product specification

HEF40244B
Octal buffers with 3-state outputs
buffers

(1) P-channel MOS transistor conducting.

(2) P-channel MOS transistor and bipolar
n-p-n transistor conducting.

Fig.4 Typical output source current characteristic. Fig.5 Schematic diagram of output stage.

AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns

ALL BUFFERS VDD

TYPICAL FORMULA FOR P (µW)
SWITCHING V
Dynamic power 5 4 250 fi + ∑ (foCL) × VDD2 where
dissipation per 10 17 000 fi + ∑ (foCL) × VDD2 fi = input freq. (MHz)
package (P) 15 46 000 fi + ∑ (foCL) × VDD 2 fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)

January 1995 4
Philips Semiconductors Product specification

HEF40244B
Octal buffers with 3-state outputs
buffers

AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns

VDD TYPICAL EXTRAPOLATION

SYMBOL MIN. TYP. MAX.
V FORMULA
Propagation delays
IAn/Bn → OAn/Bn 5 95 190 ns 83 ns + (0,24 ns/pF) CL
HIGH to LOW 10 tPHL 40 80 ns 35 ns + (0,10 ns/pF) CL
15 30 60 ns 26 ns + (0,07 ns/pF) CL
IAn/Bn → OAn/Bn 5 85 170 ns 82 ns + (0,06 ns/pF) CL
LOW to HIGH 10 tPLH 40 80 ns 38 ns + (0,03 ns/pF) CL
15 30 60 ns 29 ns + (0,02 ns/pF) CL
Output transition 5 40 80 ns
times 10 tTHL 20 40 ns
HIGH to LOW 15 15 30 ns
see Fig.6
5 30 60 ns
LOW to HIGH 10 tTLH 20 40 ns
15 15 30 ns
3-state propagation delays
Output disable times
EO → OAn/Bn 5 70 140 ns
HIGH 10 tPHZ 35 70 ns
15 30 60 ns
5 75 150 ns
LOW 10 tPLZ 40 80 ns
15 30 60 ns
Output enable times
EO → OAn/Bn 5 80 160 ns
HIGH 10 tPZH 35 70 ns
15 30 60 ns
5 90 180 ns
LOW 10 tPZL 40 80 ns
15 30 60 ns

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Philips Semiconductors Product specification

HEF40244B
Octal buffers with 3-state outputs
buffers

 tTLH
− − − − tTHL

Fig.6 Output transition times as a function of the load capacitance.

January 1995 6